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5 4 3 2 1

Calpella Switchable Graphic BLOCK DIAGRAM GPU CORE PWR


MAX8792ETD P44
CHARGER
ISL88731 P38

3/5V SYS PWR DISCHARGER


+3V,+ 5V,+1.5V,+1.05V,+1.1V_VTT
RT8206 P39 P47

D DDR3 PWR CPU CORE PWR D

VT358 P43 ISL62882 P42


CLOCK GENERATOR
SELGO: SLG8SP595V
BCLK: 133MHz
PEG_CLK: 100MHz
DPLL_REF_SSCLK: 120MHz
intel Fan Driver
+1.8V (Linear)
CPU VTT
ARD: 1.05V
CFD: 1.1V
X'TAL
P3
<MCH Processor> HPA00835RTER P46 VT358 P41
14.318MHz (PWM Type)
P37

DDR SYSTEM MEMORY


CPU VGFX_AXG VTT 1.05V
ISL62881 P45 VT357 P42
Dual Channel Arrandale (SG)
DDR III
800/ 1066 MHz
SO-DIMM 0 THERMAL
SO-DIMM 1 800 MT/s 1066 MT/s PROTECTION P47
P14, 15 rPGA 989
(37.5mm X 37.5mm)
PCI-E PCIE
X16 Nvidia GPU MB CRT P23
P4.5.6.7
FDI DMI 2.5GT/s N11M 512MB CRT
N11P 1GB
LVDS Dock P27
Note: HDMI LVDS/CRT
C
HM55 does not support USB 6 & 7 * [Arrandale Only]
X4 DMI interface P16,17,18,19,20,21,22
Switch LVDS
C

HM55 does not support SATA 2 & 3


X'TAL P23
27.0MHz

Graphics Interfaces
FDI DMI P23
INT_CRT * [Arrandale Only]

HDD (SATA) *1
intel INT_LVDS *[Arrandale Only]
Card Reader <PCH> Docking DVI P33
Connector
P32 SATA0
AU6437 INT_HDMI
USB_P12 P25
SATA *[Arrandale Only] DVI L/S (UMA only)

3.0 GT/s SN75DP139


Ibex Peak_M P24
SATA1
MB USB P31 ODD (SATA)
Mini card SIM card
USB_P1 P39 PCI-Express PCIE-2
P32 PCI-E
2.5GT/s CLKOUT_PEG_4 3G/GPS P28
USB_P10 P28
DB USB Port x 2
USB_P3, 11 P31 USB 2.0 PCIE-6
B
USB mBGA 676 CLKOUT_PEG_1&3
Mini Card B
(27mm X 25mm) RTC
X'TAL WLAN
P9
Bluetooth 32.768KHz PCIE-1 USB_P13 P28
Azalia HDA
P8.9.10.11.12.13 CLKOUT_PEG_B
USB_P4 P39 MDC
P33 Broadcom
SPI LPC
CCD Giga-LAN
USB_P8 P23 BCM57760 P26
X'TAL
Audio CODEC SPI ROM 25MHz
FingerPrint RJ11 CX20672 P30 4MB x1 (Basic ME+Braidwood) Docking SW
USB_P2 P35 P9
TPM PI3L500 P27
EC (NPCE781) P31
SIMM card

Docking
P34
USB_P5 P28 Transformer P27

A
SPI ROM T/P K/B CON. RJ45 Connector A

P35 P35 P33 P27


Docking Speaker Docking Int. D-MIC MIC Jack HP Jack P34
S/PDIF P30 Line in P23 P30 P30
P33 P33

Docking Docking Quanta Computer Inc.


MIC HP
P33 P33
PROJECT : ZQ3
Size Document Number Rev
1A
Block Diagram
Date: Monday, March 29, 2010 Sheet 1 of 47
5 4 3 2 1
1 2 3 4 5 6 7 8

GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)


+3.3V VIN VIN +1.5V +1.5V_SUS +1.8V +5V

VDDR3 +3V_D VDDC PG_GPUIO_EN VDDCI PG_1V_EN +1V (DP PLL PWR) PG_1.5V_EN VDDR1 PG_1.5V_EN VDDR4 PG_1.5V_EN BJT dGPU_PWROK MOS
dGPU_VRON dGPU_PWR_EN#
MOS (AO3413) ISL6264 ISL62872 G9334ADJ & MOS MOS (AO4710) MOS (AO6402) AO3413
P22 P44 P45 P47 P43 P43 P22 P22
A A

+3_D (0.5A) +VGPU_CORE (20A) +VGPU_IO (4.5A) +1V (3A) +1.5V_GPU (10A) +1.8V_GPU (3A) +5_GPU

GPU PWR CTRL Option 2 (VDDR3 after VDDR1)


VIN VIN +1.5V +1.5V_SUS +3.3V +1.8V +5V

VDDC PG_GPUIO_EN VDDCI PG_1V_EN +1V (DP PLL PWR) PG_1.5V_EN VDDR1 +1.5V_GPU VDDR3 +3V_D VDDR4 PG_1.5V_EN BJT dGPU_PWROK MOS
dGPU_VRON dGPU_PWR_EN#
ISL6264 ISL62872 G9334ADJ & MOS MOS (AO4710) MOS (AO3413) MOS (AO6402) AO3413
P44 P45 P47 P43 P22 P43 P22 P22

+VGPU_CORE (20A) +VGPU_IO (4.5A) +1V (3A) +1.5V_GPU (10A) +3_D (0.5A) +1.8V_GPU (3A) +5_GPU
B B

Power States Thermal Follow Chart


CONTROL
POWER PLANE VOLTAGE DESCRIPTION SIGNAL ACTIVE IN

VIN +10V~+19V MAIN POWER S0~S5

+RTC_CELL +3V~+3.3V RTC S0~S5 NTC


+3VPCU +3.3V 8051 POWER ALWON S0~S5 Thermal
Protection
+5VPCU +5V CHARGE POWER ALWON S0~S5

+15V +15V LARGE POWER +15V_ALWP S0~S5

3V_LAN_S5 +3.3V LAN POWER AUX_ON


CPU H_ORICHOT# PM_THRMTRIP# SYS_SHDN# 3V/5 V
+5VSUS +5V SUSD
CORE PWR H/W Throttling
CPU WIRE-AND SYS PWR
C C

+3VSUS +3.3V SUSD

+1.5VSUS +1.5V SODIMM POWER SUSON

+0.75V_DDR_VTT +0.9V SODIMM POWER MAINON SML1ALERT#

+5V +5V MAIND PCH FAN Driver FAN


+3V +3.3V MAIND

+1.8V +1.8V MAINON SM-Bus

+1.5V +1.5V PCH POWER MAIND

+1.1V_VTT +1.05V~+1.1V CPU POWER MAINON EC


CPUFAN#
+1.05V +1.05V PCH POWER MAINON

+VCC_CORE 0V~+1.5V CPU CORE POWER VRON


D D

LCDVCC +3.3V LCD Power LVDS_VDDEN

MBAT+ +10V~+17V MAIN BATTERY


Quanta Computer Inc.
+5V_S5 +5V S5_ON
PROJECT : ZQ3
+3V_S5 +3.3V S5D Size Document Number Rev
1A
PWR Status & GPU PWR CRL & THRM
Date: Monday, March 29, 2010 Sheet 2 of 47
1 2 3 4 5 6 7 8
5 4 3 2 1

+1.5V 150mA(20mil)
L51 BKP1608HS181T/1.5A/180ohm_6 +1.5V_CLK U44
CLK Gen(CLK)
C763 C717 C758 C762 1 80mA(20mil)
R556 VDD_DOT +VDDIO_CLK L50 BKP1608HS181T/1.5A/180ohm_6
5 VDD_27 VDD_SRC_I/O 15 +1.05V
0.1u/16V_4 0.1u/16V_4 *585@0_6 17 18
+3V 4.7u/10V_8 0.1u/16V_4 VDD_SRC VDD_CPU_I/O C761 C747 C759 C753
D 24 VDD_CPU D
29 3 C308 may be can save
VDD_REF DOT_96 CLK_BUF_DREFCLKP (10)
L44 BKP1608HS181T/1.5A/180ohm_6 +3V_CLK 4 0.1u/16V_4 10u/10V_8
DOT_96# CLK_BUF_DREFCLKN (10)
CLK_SDATA 31 0.1u/16V_4 10u/10V_8
C700 C718 C749 CLK_SCLK SDA
32 SCL 27M 6 TP91
7 TP90 2/5 modified Place each 0.1uF cap as close as
4.7u/10V_8 0.1u/16V_4 27M_SS
possible to each VDD IO pin. Place
0.1u/16V_4 R588 33_4 CPU_SEL 30 10 the 10uF caps on the VDD_IO plane.
(10) CLK_ICH_14M REF_0/CPU_SEL SRC_1/SATA CLK_BUF_PCIE_3GPLLP (10)
SRC_1#/SATA# 11 CLK_BUF_PCIE_3GPLLN (10)
C752 33p/50V_4 13
SRC_2 CLK_BUF_DREFSSCLKP (10)
SRC_2# 14 CLK_BUF_DREFSSCLKN (10)

1
XTAL_IN 28
Y8 XTAL_IN +3V
14.318MHZ XTAL_OUT 27 16 R603 10K_4
XTAL_OUT *CPU_STOP#

2
C757 2 20
VSS_DOT CPU_1 TP83
33p/50V_4 8 19
VSS_27 CPU_1# TP84
C 9 VSS_SATA CPU_0 23 CLK_BUF_BCLKP (10) C
12 VSS_SRC CPU_0# 22 CLK_BUF_BCLKN (10)
21 VSS_CPU
26 25 CK_PWRGD_R
VSS_REF CKPWRGD/PD#
33 GND

SLG8SP595V

+3V +3V
CPU_CLK select(CLK) SMBus(CLK) CLK Enable(CLK)
+1.05V
R620
R554 1K/F_4
B B

2
R587 2.2K_4
*10K_4 CK_PWRGD_R
3 1 CLK_SDATA CLK_SDATA (14,15,28)
(10,26,28) ICH_SMBDATA

3
Q43
CPU_SEL Q41 2N7002D
2N7002D
(40) VR_PWRGD_CK505# 2 R621
100K/F_4
R576 C733 +3V
10K_4 *10p/50V_4

1
R555

2
2.2K_4
0 1
A
(10,26,28) ICH_SMBCLK 3 1 CLK_SCLK CLK_SCLK (14,15,28) Quanta Computer Inc. A

CPU_SEL CPU0/1=133MHz CPU0/1=100MHz Q42


2N7002D
PROJECT :ZQ3
(default)
Size Document Number Rev
1A
Clock Generator
Date: Monday, March 29, 2010 Sheet 3 of 47
5 4 3 2 1
5 4 3 2 1

Arrandale_1(CPU) AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI) AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)

Processor Compensation Signals


U36A U36B
B26 R440 49.9/F_4 R497 20/F_4 H_COMP3 AT23
PEG_ICOMPI COMP3
A26 A16 CLK_CPU_BCLKP (11)
PEG_ICOMPO BCLK

MISC
A24 B27 R494 20/F_4 H_COMP2 AT24 B16 CLK_CPU_BCLKN (11)
(8) DMI_TXN0 DMI_RX#[0] PEG_RCOMPO COMP2 BCLK#
C23 A25 R441 750/F_4
(8) DMI_TXN1 DMI_RX#[1] PEG_RBIAS R145 49.9/F_4 H_COMP1

CLOCKS
(8) DMI_TXN2 B22 PEG_RXN[0..15] (16) G16 AR30 TP70
DMI_RX#[2] PEG_RXN0 COMP1 BCLK_ITP
(8) DMI_TXN3 A21 K35 AT30 TP63
D DMI_RX#[3] PEG_RX#[0] PEG_RXN1 R483 49.9/F_4 H_COMP0 BCLK_ITP# D
J34 AT26
PEG_RX#[1] PEG_RXN2 COMP0
(8) DMI_TXP0 B24 J33 E16 CLK_PCIE_3GPLLP (10)
DMI_RX[0] PEG_RX#[2] PEG_RXN3 PEG_CLK
(8) DMI_TXP1 D23 G35 D16 CLK_PCIE_3GPLLN (10)
DMI_RX[1] PEG_RX#[3] PEG_CLK#

DMI
B23 G32 PEG_RXN4 TP5 TP_SKT0CC# AH24
(8) DMI_TXP2 DMI_RX[2] PEG_RX#[4] SKTOCC#
A22 F34 PEG_RXN5 A18 DPLL_REF_SSCLKP (10) Layout Note: Place
(8) DMI_TXP3 DMI_RX[3] PEG_RX#[5] DPLL_REF_SSCLK
F31 PEG_RXN6 A17 DPLL_REF_SSCLKN (10)
D24
PEG_RX#[6]
D35 PEG_RXN7 H_CATERR# AK14
DPLL_REF_SSCLK# these resistors
(8) DMI_RXN0 DMI_TX#[0] PEG_RX#[7] Use reverse type TP10 CATERR#

THERMAL
(8) DMI_RXN1 G24
DMI_TX#[1] PEG_RX#[8]
E33 PEG_RXN8 near Processor
F23 C33 PEG_RXN9
(8)
(8)
DMI_RXN2
DMI_RXN3 H23
DMI_TX#[2]
DMI_TX#[3]
PEG_RX#[9]
PEG_RX#[10]
D32
B32
PEG_RXN10
PEG_RXN11
(at GPU side) H_PECI_ISO AT15
SM_DRAMRST#
F6 CPU_DDR3_DRAMRST# CPU_DDR3_DRAMRST# (31)
PEG_RX#[11] (11) H_PECI PECI
D25 C31 PEG_RXN12 AL1 SM_RCOMP_0 R176 100/F_4
(8) DMI_RXP0 DMI_TX[0] PEG_RX#[12] SM_RCOMP[0]
F24 B28 PEG_RXN13 AM1 SM_RCOMP_1 R183 24.9/F_4
(8) DMI_RXP1 DMI_TX[1] PEG_RX#[13] SM_RCOMP[1]
E23 B30 PEG_RXN14 AN1 SM_RCOMP_2 R188 130/F_4
(8) DMI_RXP2 DMI_TX[2] PEG_RX#[14] SM_RCOMP[2]
G23 A31 PEG_RXN15 (40) H_PROCHOT# H_PROCHOT# AN26
(8) DMI_RXP3 DMI_TX[3] PEG_RX#[15] PROCHOT#
PEG_RXP[0..15] (16) AN15 PM_EXTTS#0 (14)
PM_EXT_TS#[0]

DDR3
MISC
J35 PEG_RXP0 AP15 R223 10K_4
PEG_RX[0] PEG_RXP1 PM_EXT_TS#[1] R221 10K_4
H34 +1.1V_VTT
PEG_RX[1] PEG_RXP2
H33 (11) PM_THRMTRIP# AK15 PM_EXTTS#1 (15)
PEG_RX[2] PEG_RXP3 THERMTRIP#
(8) FDI_TXN0 E22 F35
FDI_TX#[0] PEG_RX[3] PEG_RXP4
(8) FDI_TXN1 D21 G33
FDI_TX#[1] PEG_RX[4] PEG_RXP5
(8) FDI_TXN2 D19 E34 AT28 TP67
FDI_TX#[2] PEG_RX[5] PEG_RXP6 PRDY# XDP_PREQ#
(8) FDI_TXN3 D18 F32 AP27 TP69
FDI_TX#[3] PEG_RX[6] PEG_RXP7 PREQ#
(8) FDI_TXN4 G21 D34
FDI_TX#[4] PEG_RX[7] PEG_RXP8 XDP_TCLK
(8) FDI_TXN5 E19 F33 AN28 TP61
FDI_TX#[5] PEG_RX[8] TCK
PCI EXPRESS -- GRAPHICS
F21 B33 PEG_RXP9 H_CPURST# AP26 AP28 XDP_TMS TP68
(8) FDI_TXN6 FDI_TX#[6] PEG_RX[9] RESET_OBS# TMS
Intel(R) FDI

PWR MANAGEMENT
G18 D31 PEG_RXP10 AT27 XDP_TRST# TP71
(8) FDI_TXN7 FDI_TX#[7] PEG_RX[10] TRST#
PEG_RXP11

JTAG & BPM


A32
PEG_RX[11] PEG_RXP12 H_PM_SYNC XDP_TDI_R
C30 (8) PM_SYNC AL15 AT29 TP65
PEG_RX[12] PEG_RXP13 PM_SYNC TDI XDP_TDO_R
(8) FDI_TXP0 D22 A28 AR27 TP66
FDI_TX[0] PEG_RX[13] PEG_RXP14 TDO XDP_TDI_M
(8) FDI_TXP1 C21 B29 PEG_TXN[0..15] (16) AR29 TP64
FDI_TX[1] PEG_RX[14] PEG_RXP15 TDI_M XDP_TDO_M
(8) FDI_TXP2 D20 A30 AN14 AP29 TP62
FDI_TX[2] PEG_RX[15] VCCPWRGOOD_1 TDO_M
(8) FDI_TXP3 C18
FDI_TX[3] PEG_TXN0_C C573 0.1u/10V_4 PEG_TXN0 H_DBR#_R R229 0_4
(8) FDI_TXP4 G22 L33 AN25 XDP_DBRST# (8)
C FDI_TX[4] PEG_TX#[0] PEG_TXN1_C C575 0.1u/10V_4 PEG_TXN1 DBR# C
(8) FDI_TXP5 E20 M35 (11) H_PWRGOOD AN27
FDI_TX[5] PEG_TX#[1] PEG_TXN2_C C601 0.1u/10V_4 PEG_TXN2 VCCPWRGOOD_0
(8) FDI_TXP6 F20 M33
FDI_TX[6] PEG_TX#[2] PEG_TXN3_C C577 0.1u/10V_4 PEG_TXN3 XDP_OBS0_R
(8) FDI_TXP7 G19 M30 AJ22 TP14
FDI_TX[7] PEG_TX#[3] PEG_TXN4_C C590 0.1u/10V_4 PEG_TXN4 VDDPWRGOOD BPM#[0] XDP_OBS1_R
L31 (8,31) PM_DRAM_PWRGD AK13 AK22 TP15
PEG_TX#[4] PEG_TXN5_C C579 0.1u/10V_4 PEG_TXN5 SM_DRAMPWROK BPM#[1] XDP_OBS2_R
(8) FDI_FSYNC0 F17 K32 AK24 TP13
FDI_FSYNC[0] PEG_TX#[5] PEG_TXN6_C C592 0.1u/10V_4 PEG_TXN6 BPM#[2] XDP_OBS3_R
(8) FDI_FSYNC1 E17 M29 AJ24 TP12
FDI_FSYNC[1] PEG_TX#[6] PEG_TXN7_C C581 0.1u/10V_4 PEG_TXN7 H_VTTPWRGD BPM#[3] XDP_OBS4_R
J31 AM15 AJ25 TP7
PEG_TX#[7] PEG_TXN8_C C595 0.1u/10V_4 PEG_TXN8 VTTPWRGOOD BPM#[4] XDP_OBS5_R
(8) FDI_INT C17 K29 AH22 TP11
FDI_INT PEG_TX#[8] PEG_TXN9_C C568 0.1u/10V_4 PEG_TXN9 BPM#[5] XDP_OBS6_R
H30 AK23 TP8
PEG_TX#[9] PEG_TXN10_C C583 0.1u/10V_4 PEG_TXN10 BPM#[6] XDP_OBS7_R
(8) FDI_LSYNC0 F18 H29 TP9 AM26 AH23 TP6
FDI_LSYNC[0] PEG_TX#[10] PEG_TXN11_C C598 0.1u/10V_4 PEG_TXN11 TAPPWRGOOD BPM#[7]
(8) FDI_LSYNC1 D17 F29
FDI_LSYNC[1] PEG_TX#[11] PEG_TXN12_C C604 0.1u/10V_4 PEG_TXN12
E28
PEG_TX#[12] PEG_TXN13_C C570 0.1u/10V_4 PEG_TXN13 R215 1.5K/F_4 CPU_PLTRST# AL14
D29 (10,11,16,25,26,28,31,34) PLTRST#
PEG_TX#[13] PEG_TXN14_C C588 0.1u/10V_4 PEG_TXN14 RSTIN#
D27
PEG_TX#[14] PEG_TXN15_C C586 0.1u/10V_4 PEG_TXN15 R201
C26 PEG_TXP[0..15] (16)
PEG_TX#[15] 750/F_4
L34 PEG_TXP0_C C574 0.1u/10V_4 PEG_TXP0 Clarksfield/Auburndale
PEG_TX[0] PEG_TXP1_C C576 0.1u/10V_4 PEG_TXP1 SI 2/5 Modified
M34
PEG_TX[1] PEG_TXP2_C C602 0.1u/10V_4 PEG_TXP2
M32
PEG_TX[2] PEG_TXP3_C C578 0.1u/10V_4 PEG_TXP3
L30
PEG_TX[3] PEG_TXP4_C C591 0.1u/10V_4 PEG_TXP4
M31
PEG_TX[4] PEG_TXP5_C C580 0.1u/10V_4 PEG_TXP5
K31
PEG_TX[5] PEG_TXP6_C C593 0.1u/10V_4 PEG_TXP6
M28
PEG_TX[6] PEG_TXP7_C C582 0.1u/10V_4 PEG_TXP7
H31
PEG_TX[7] PEG_TXP8_C C596 0.1u/10V_4 PEG_TXP8
K28
PEG_TX[8] PEG_TXP9_C C569 0.1u/10V_4 PEG_TXP9
G30
PEG_TX[9] PEG_TXP10_C C584 0.1u/10V_4 PEG_TXP10
G29
PEG_TX[10] PEG_TXP11_C C599 0.1u/10V_4 PEG_TXP11
F28
PEG_TX[11] PEG_TXP12_C C600 0.1u/10V_4 PEG_TXP12
E27
PEG_TX[12] PEG_TXP13_C C571 0.1u/10V_4 PEG_TXP13
D28
PEG_TX[13] PEG_TXP14_C C589 0.1u/10V_4 PEG_TXP14
C27
PEG_TX[14] PEG_TXP15_C C587 0.1u/10V_4 PEG_TXP15
C25
PEG_TX[15]

B B
Clarksfield/Auburndale

Processor pull-up JTAG MAPPING


Thermaltrip protect VTT PWR_Good
XDP_TDI_R R468 *SHORT_4 XDP_TDI
+1.1V_VTT
XDP_TDO_M XDP_TDO
XDP_TDO R225 51/F_4 R467 *0_4
+1.1V_VTT H_CATERR# R216 49.9/F_4
H_PROCHOT# R226 68_4 R476
H_CPURST# R472 *68_4 *SHORT_4
3

XDP_TMS R481 *51_4


XDP_TDI_R R475 *51_4
+3V XDP_PREQ# R470 *51_4 XDP_TDI_M
2 Q23 XDP_TCLK R479 *51_4 R469 *0_4
(8,40) DELAY_VR_PWRGOOD
FDV301N XDP_TRST# R482 51/F_4 XDP_TDO_R
R471 *SHORT_4
C374
4/9 REV:B MODIFY BY DG1.52
1

0.1u/16V_4
Scan Chain STUFF -> R469, R491, R507
5

R237 (Default) NO STUFF -> R489, R490


1K_4 2 R224 +1.5V_CPUVDDQ
(34) MPWROK
4 H_VTTPWRGD
1 CPU Only STUFF -> R490, R491
2K/F_4 NO STUFF -> R469, R489, R507
R213
3
2

A U18 R200 1.1K/F_4 A


Q24 TC7SH08FU 1K_4 GMCH Only STUFF -> R489, R507
(11) PM_THRMTRIP#
PM_THRMTRIP# 1 3 MMBT3904 SYS_SHDN# (39,47)
PM_DRAM_PWRGD NO STUFF -> R491, R490, R469
R195 Use a voltage divider with VDDQ
pull-up 56ohm close to PCH 3K/F_4 (1.5V) rail (ON in S3) and
resistor combination of 4.75K (to
VDDQ)/12K(to GND) to generate the
required voltage.
Note: CRB uses a 3.3V (always ON)
Quanta Computer Inc.
rail with 2K and 1K combination.
PROJECT : ZQ3
Size Document Number Rev
1A
AUBURNDA 1/4
Date: Monday, March 29, 2010 Sheet 4 of 47
5 4 3 2 1
5 4 3 2 1

Arrandale_2(CPU)
AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3) U36D

U36C

(15) M_B_DQ[63:0] SB_CK[0] W8 M_B_CLKP0 (15)


SB_CK#[0] W9 M_B_CLKN0 (15)
M_B_DQ0 B5 M3
SB_DQ[0] SB_CKE[0] M_B_CKE0 (15)
M_B_DQ1 A5
M_B_DQ2 SB_DQ[1]
SA_CK[0] AA6 M_A_CLKP0 (14) C3 SB_DQ[2]
AA7 M_A_CLKN0 (14) M_B_DQ3 B3 V7 M_B_CLKP1 (15)
SA_CK#[0] M_B_DQ4 SB_DQ[3] SB_CK[1]
(14) M_A_DQ[63:0] SA_CKE[0] P7 M_A_CKE0 (14) E4 SB_DQ[4] SB_CK#[1] V6 M_B_CLKN1 (15)
D M_A_DQ0 M_B_DQ5 D
A10 SA_DQ[0] A6 SB_DQ[5] SB_CKE[1] M2 M_B_CKE1 (15)
M_A_DQ1 C10 M_B_DQ6 A4
M_A_DQ2 SA_DQ[1] M_B_DQ7 SB_DQ[6]
C7 SA_DQ[2] C4 SB_DQ[7]
M_A_DQ3 A7 Y6 M_B_DQ8 D1
SA_DQ[3] SA_CK[1] M_A_CLKP1 (14) SB_DQ[8]
M_A_DQ4 B10 Y5 M_B_DQ9 D2
SA_DQ[4] SA_CK#[1] M_A_CLKN1 (14) SB_DQ[9]
M_A_DQ5 D10 P6 M_A_CKE1 (14) M_B_DQ10 F2 AB8 M_B_CS#0 (15)
M_A_DQ6 SA_DQ[5] SA_CKE[1] M_B_DQ11 SB_DQ[10] SB_CS#[0]
E10 F1 AD6 M_B_CS#1 (15)
M_A_DQ7 SA_DQ[6] M_B_DQ12 SB_DQ[11] SB_CS#[1]
A8 SA_DQ[7] C2 SB_DQ[12]
M_A_DQ8 D8 M_B_DQ13 F5
M_A_DQ9 SA_DQ[8] M_B_DQ14 SB_DQ[13]
F10 AE2 M_A_CS#0 (14) F3
M_A_DQ10 SA_DQ[9] SA_CS#[0] M_B_DQ15 SB_DQ[14]
E6 SA_DQ[10] SA_CS#[1] AE8 M_A_CS#1 (14) G4 SB_DQ[15] SB_ODT[0] AC7 M_B_ODT0 (15)
M_A_DQ11 F7 M_B_DQ16 H6 AD1
SA_DQ[11] SB_DQ[16] SB_ODT[1] M_B_ODT1 (15)
M_A_DQ12 E9 M_B_DQ17 G2
M_A_DQ13 SA_DQ[12] M_B_DQ18 SB_DQ[17]
B7 J6
M_A_DQ14 SA_DQ[13] M_B_DQ19 SB_DQ[18]
E7 AD8 M_A_ODT0 (14) J3
M_A_DQ15 SA_DQ[14] SA_ODT[0] M_B_DQ20 SB_DQ[19]
C6 AF9 M_A_ODT1 (14) G1 M_B_DM[7:0] (15)
M_A_DQ16 SA_DQ[15] SA_ODT[1] M_B_DQ21 SB_DQ[20] M_B_DM0
H10 SA_DQ[16] G5 SB_DQ[21] SB_DM[0] D4
M_A_DQ17 G8 M_B_DQ22 J2 E1 M_B_DM1
M_A_DQ18 SA_DQ[17] M_B_DQ23 SB_DQ[22] SB_DM[1] M_B_DM2
K7 SA_DQ[18] J1 SB_DQ[23] SB_DM[2] H3
M_A_DQ19 J8 M_B_DQ24 J5 K1 M_B_DM3
M_A_DQ20 SA_DQ[19] M_B_DQ25 SB_DQ[24] SB_DM[3] M_B_DM4
G7 K2 AH1
M_A_DQ21 SA_DQ[20] M_B_DQ26 SB_DQ[25] SB_DM[4] M_B_DM5
G10 M_A_DM[7:0] (14) L3 AL2
M_A_DQ22 SA_DQ[21] M_A_DM0 M_B_DQ27 SB_DQ[26] SB_DM[5] M_B_DM6
J7 SA_DQ[22] SA_DM[0] B9 M1 SB_DQ[27] SB_DM[6] AR4
M_A_DQ23 J10 D7 M_A_DM1 M_B_DQ28 K5 AT8 M_B_DM7
M_A_DQ24 SA_DQ[23] SA_DM[1] M_A_DM2 M_B_DQ29 SB_DQ[28] SB_DM[7]
L7 H7 K4
M_A_DQ25 SA_DQ[24] SA_DM[2] M_A_DM3 M_B_DQ30 SB_DQ[29]
M6 SA_DQ[25] SA_DM[3] M7 M4 SB_DQ[30]
M_A_DQ26 M8 AG6 M_A_DM4 M_B_DQ31 N5
M_A_DQ27 SA_DQ[26] SA_DM[4] M_A_DM5 M_B_DQ32 SB_DQ[31]
L9 AM7 AF3
M_A_DQ28 SA_DQ[27] SA_DM[5] M_A_DM6 M_B_DQ33 SB_DQ[32]
L6 SA_DQ[28] SA_DM[6] AN10 AG1 SB_DQ[33] M_B_DQSN[7:0] (15)
M_A_DQ29 K8 AN13 M_A_DM7 M_B_DQ34 AJ3 D5 M_B_DQSN0
M_A_DQ30 SA_DQ[29] SA_DM[7] M_B_DQ35 SB_DQ[34] SB_DQS#[0] M_B_DQSN1
N8 AK1 F4
M_A_DQ31 SA_DQ[30] M_B_DQ36 SB_DQ[35] SB_DQS#[1] M_B_DQSN2
P9 AG4 J4
C M_A_DQ32 SA_DQ[31] M_B_DQ37 SB_DQ[36] SB_DQS#[2] M_B_DQSN3 C
AH5 SA_DQ[32] AG3 SB_DQ[37] SB_DQS#[3] L4
M_A_DQ33 AF5 M_B_DQ38 AJ4 AH2 M_B_DQSN4
SA_DQ[33] M_A_DQSN[7:0] (14) SB_DQ[38] SB_DQS#[4]

DDR SYSTEM MEMORY - B


M_A_DQ34 AK6 C9 M_A_DQSN0 M_B_DQ39 AH4 AL4 M_B_DQSN5
SA_DQ[34] SA_DQS#[0] SB_DQ[39] SB_DQS#[5]
DDR SYSTEM MEMORY A

M_A_DQ35 AK7 F8 M_A_DQSN1 M_B_DQ40 AK3 AR5 M_B_DQSN6


M_A_DQ36 SA_DQ[35] SA_DQS#[1] M_A_DQSN2 M_B_DQ41 SB_DQ[40] SB_DQS#[6] M_B_DQSN7
AF6 SA_DQ[36] SA_DQS#[2] J9 AK4 SB_DQ[41] SB_DQS#[7] AR8
M_A_DQ37 AG5 N9 M_A_DQSN3 M_B_DQ42 AM6
M_A_DQ38 SA_DQ[37] SA_DQS#[3] M_A_DQSN4 M_B_DQ43 SB_DQ[42]
AJ7 SA_DQ[38] SA_DQS#[4] AH7 AN2 SB_DQ[43]
M_A_DQ39 AJ6 AK9 M_A_DQSN5 M_B_DQ44 AK5
M_A_DQ40 SA_DQ[39] SA_DQS#[5] M_A_DQSN6 M_B_DQ45 SB_DQ[44]
AJ10 SA_DQ[40] SA_DQS#[6] AP11 AK2 SB_DQ[45]
M_A_DQ41 AJ9 AT13 M_A_DQSN7 M_B_DQ46 AM4
M_A_DQ42 SA_DQ[41] SA_DQS#[7] M_B_DQ47 SB_DQ[46]
AL10 SA_DQ[42] AM3 SB_DQ[47] M_B_DQSP[7:0] (15)
M_A_DQ43 AK12 M_B_DQ48 AP3 C5 M_B_DQSP0
M_A_DQ44 SA_DQ[43] M_B_DQ49 SB_DQ[48] SB_DQS[0] M_B_DQSP1
AK8 SA_DQ[44] AN5 SB_DQ[49] SB_DQS[1] E3
M_A_DQ45 AL7 M_B_DQ50 AT4 H4 M_B_DQSP2
M_A_DQ46 SA_DQ[45] M_A_DQSP0 M_A_DQSP[7:0] (14) M_B_DQ51 SB_DQ[50] SB_DQS[2] M_B_DQSP3
AK11 C8 AN6 M5
M_A_DQ47 SA_DQ[46] SA_DQS[0] M_A_DQSP1 M_B_DQ52 SB_DQ[51] SB_DQS[3] M_B_DQSP4
AL8 F9 AN4 AG2
M_A_DQ48 SA_DQ[47] SA_DQS[1] M_A_DQSP2 M_B_DQ53 SB_DQ[52] SB_DQS[4] M_B_DQSP5
AN8 H9 AN3 AL5
M_A_DQ49 SA_DQ[48] SA_DQS[2] M_A_DQSP3 M_B_DQ54 SB_DQ[53] SB_DQS[5] M_B_DQSP6
AM10 M9 AT5 AP5
M_A_DQ50 SA_DQ[49] SA_DQS[3] M_A_DQSP4 M_B_DQ55 SB_DQ[54] SB_DQS[6] M_B_DQSP7
AR11 AH8 AT6 AR7
M_A_DQ51 SA_DQ[50] SA_DQS[4] M_A_DQSP5 M_B_DQ56 SB_DQ[55] SB_DQS[7]
AL11 SA_DQ[51] SA_DQS[5] AK10 AN7 SB_DQ[56]
M_A_DQ52 AM9 AN11 M_A_DQSP6 M_B_DQ57 AP6
M_A_DQ53 SA_DQ[52] SA_DQS[6] M_A_DQSP7 M_B_DQ58 SB_DQ[57]
AN9 AR13 AP8
M_A_DQ54 SA_DQ[53] SA_DQS[7] M_B_DQ59 SB_DQ[58]
AT11 AT9
M_A_DQ55 SA_DQ[54] M_B_DQ60 SB_DQ[59]
AP12 AT7
M_A_DQ56 SA_DQ[55] M_B_DQ61 SB_DQ[60]
AM12 AP9
M_A_DQ57 SA_DQ[56] M_B_DQ62 SB_DQ[61]
AN12 M_A_A[15:0] (14) AR10 M_B_A[15:0] (15)
M_A_DQ58 SA_DQ[57] M_A_A0 M_B_DQ63 SB_DQ[62] M_B_A0
AM13 SA_DQ[58] SA_MA[0] Y3 AT10 SB_DQ[63] SB_MA[0] U5
M_A_DQ59 AT14 W1 M_A_A1 V2 M_B_A1
M_A_DQ60 SA_DQ[59] SA_MA[1] M_A_A2 SB_MA[1] M_B_A2
AT12 AA8 T5
M_A_DQ61 SA_DQ[60] SA_MA[2] M_A_A3 SB_MA[2] M_B_A3
AL13 AA3 V3
M_A_DQ62 SA_DQ[61] SA_MA[3] M_A_A4 SB_MA[3] M_B_A4
AR14 V1 R1
M_A_DQ63 SA_DQ[62] SA_MA[4] M_A_A5 SB_MA[4] M_B_A5
AP14 AA9 (15) M_B_BS#0 AB1 T8
B SA_DQ[63] SA_MA[5] M_A_A6 SB_BS[0] SB_MA[5] M_B_A6 B
SA_MA[6] V8 (15) M_B_BS#1 W5 SB_BS[1] SB_MA[6] R2
T1 M_A_A7 R7 R6 M_B_A7
SA_MA[7] (15) M_B_BS#2 SB_BS[2] SB_MA[7]
Y9 M_A_A8 R4 M_B_A8
SA_MA[8] M_A_A9 SB_MA[8] M_B_A9
(14) M_A_BS#0 AC3 SA_BS[0] SA_MA[9] U6 SB_MA[9] R5
(14) M_A_BS#1 AB2 AD4 M_A_A10 (15) M_B_CAS# AC5 AB5 M_B_A10
SA_BS[1] SA_MA[10] M_A_A11 SB_CAS# SB_MA[10] M_B_A11
(14) M_A_BS#2 U7 T2 (15) M_B_RAS# Y7 P3
SA_BS[2] SA_MA[11] M_A_A12 SB_RAS# SB_MA[11] M_B_A12
U3 (15) M_B_WE# AC6 R3
SA_MA[12] M_A_A13 SB_WE# SB_MA[12] M_B_A13
AG8 AF7
SA_MA[13] M_A_A14 SB_MA[13] M_B_A14
T3 P5
SA_MA[14] M_A_A15 SB_MA[14] M_B_A15
(14) M_A_CAS# AE1 SA_CAS# SA_MA[15] V9 SB_MA[15] N1
(14) M_A_RAS# AB3 SA_RAS#
(14) M_A_WE# AE9
SA_WE#

Clarksfield/Auburndale Clarksfield/Auburndale

Channel A DQ[15,32,48,54], DM[5] Channel B DQ[16,18,36,42,56,57,60,61,62]


Requires minimum 12mils spacing Requires minimum 12mils spacing
with all other signals, including data signals. with all other signals, including data signals.

A A

Quanta Computer Inc.


PROJECT : ZQ3
Size Document Number Rev
1A
AUBURNDA 2/4
Date: Monday, March 29, 2010 Sheet 5 of 47
5 4 3 2 1
5 4 3 2 1

Arrandale_3(CPU)
CPU Core Power U36F

VTT Rail Values are AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)


ARD:48A Auburndal VTT=1.05V
+VCC_CORE Clarksfield VTT=1.1V
CFD:52A
18A
AG35 AH14 +1.1V_VTT U36G
VCC1 VTT0_1
AG34 AH12
AG33
VCC2 VTT0_2
AH11 +
+VGFX_AXG
22A AT21
+ C264 + C295 + C281 + C296 VCC3 VTT0_3 C309 C303 C618 C284 VAXG1
AG32 AH10 AT19 AR22 VCC_AXG_SENSE (45)
D VCC4 VTT0_4 22u/6.3V_8 22u/6.3V_8 330u/2V_7343 VAXG2 VAXG_SENSE D

SENSE
LINES
AG31 J14 AT18 AT22 VSS_AXG_SENSE (45)
*330u/2V_7343 330u/2V_7343 *330u/2V_7343 330u/2V_7343 VCC5 VTT0_5 22u/6.3V_8 + + VAXG3 VSSAXG_SENSE
AG30 J13 AT16
VCC6 VTT0_6 C653 C650 VAXG4
AG29 H14 AR21
VCC7 VTT0_7 330u/2V_7343 330u/2V_7343 VAXG5
AG28 H12 AR19
VCC8 VTT0_8 VAXG6
AG27 G14 AR18
VCC9 VTT0_9 VAXG7
AG26 G13 AR16 AM22 GFX_VID0 (45)
VCC10 VTT0_10 VAXG8 GFX_VID[0]
AF35 G12 AP21 AP22 GFX_VID1 (45)
VCC11 VTT0_11 VAXG9 GFX_VID[1]

GRAPHICS VIDs
AF34 G11 AP19 AN22 GFX_VID2 (45)
C621 C633 C274 C304 C330 C334 C333 C628 VCC12 VTT0_12 VAXG10 GFX_VID[2]
AF33 F14 AP18 AP23 GFX_VID3 (45)
VCC13 VTT0_13 C271 C629 C622 C636 VAXG11 GFX_VID[3]
AF32 F13 AP16 AM23 GFX_VID4 (45)
22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 VCC14 VTT0_14 10u/6.3V_8 10u/6.3V_8 VAXG12 GFX_VID[4]
AF31 F12 AN21 AP24 GFX_VID5 (45)
VCC15 VTT0_15 VAXG13 GFX_VID[5]

GRAPHICS
22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 AF30 F11 10u/6.3V_8 10u/6.3V_8 AN19 AN24 GFX_VID6 (45)
VCC16 VTT0_16 C385 C375 C639 VAXG14 GFX_VID[6] R496 4.7K_4
AF29 E14 AN18
VCC17 VTT0_17 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 VAXG15 R492 *10K_4
AF28 E12 AN16
VCC18 VTT0_18 VAXG16
AF27 D14 AM21 AR25 GFX_ON (45)
VCC19 VTT0_19 VAXG17 GFX_VR_EN
AF26 D13 AM19 AT25 GFX_DPRSLPVR (45)
VCC20 VTT0_20 VAXG18 GFX_DPRSLPVR
AD35 D12 AM18 AM24

1.1V RAIL POWER


VCC21 VTT0_21 VAXG19 GFX_IMON GFX_IMON (45)
AD34 D11 AM16
VCC22 VTT0_22 C630 C615 C272 C535 and C1005 may be can save VAXG20
AD33 C14 AL21
C627 C332 C632 C310 C311 C331 C635 C634 VCC23 VTT0_23 10u/6.3V_8 10u/6.3V_8 VAXG21
AD32 C13 AL19
22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 VCC24 VTT0_24 10u/6.3V_8 VAXG22
AD31 C12 AL18
22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 VCC25 VTT0_25 VAXG23
AD30 C11 AL16
VCC26 VTT0_26 VAXG24
AD29 B14 AK21 AJ1 +1.5V_CPUVDDQ
VCC27 VTT0_27 C637 C381 C384 VAXG25 VDDQ1
AD28 B12 AK19 AF1
VCC28 VTT0_28 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 VAXG26 VDDQ2

- 1.5V RAILS
AD27 A14 AK18 AE7
VCC29 VTT0_29 VAXG27 VDDQ3 C353 C292 C315 C286 C308
AD26 A13 AK16 AE4
VCC30 VTT0_30 VAXG28 VDDQ4 1u/10V_4 1u/10V_4 1u/10V_4
AC35 A12 AJ21 AC1
VCC31 VTT0_31 VAXG29 VDDQ5 1u/10V_4 1u/10V_4
AC34 A11 AJ19 AB7
VCC32 VTT0_32 VAXG30 VDDQ6
AC33 AJ18 AB4
VCC33 +1.1V_VTT VAXG31 VDDQ7
AC32 AJ16 Y1
C625 C327 C325 C320 C626 C285 C278 C623 VCC34 VAXG32 VDDQ8
AC31 AH21 W7
VCC35 VAXG33 VDDQ9

POWER
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 AC30 AF10 AH19 W4
C 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 VCC36 VTT0_33 VAXG34 VDDQ10 C
AC29 AE10 AH18 U1
VCC37 VTT0_34 VAXG35 VDDQ11
AC28 AC10 AH16 T7
VCC38 VTT0_35 VAXG36 VDDQ12

CPU CORE SUPPLY


AC27 AB10 C282 C611 T4 +
VCC39 VTT0_36 22u/6.3V_8 VDDQ13 C266 C265 C261
AC26 Y10 P1
VCC40 VTT0_37 22u/6.3V_8 VDDQ14 22u/6.3V_8 330u/2V_7343
AA35 W10 N7
VCC41 VTT0_38 VDDQ15 22u/6.3V_8
AA34 U10 N4
VCC42 VTT0_39 VDDQ16

DDR3
AA33 T10 L1
VCC43 VTT0_40 VDDQ17
AA32 J12 +1.1V_VTT J24 H1
VCC44 VTT0_41 VTT1_45 VDDQ18

FDI
C329 C324 C276 C323 C277 C328 C275 C631 AA31 J11 J23
VCC45 VTT0_42 VTT1_46
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 AA30 J16 +VTT_43 R143 0_4 H25
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 VCC46 VTT0_43 VTT1_47
AA29 J15 +VTT_44 R144 0_4 C268 C612
VCC47 VTT0_44 22u/6.3V_8
AA28
AA27
VCC48
VCC49
(15mils) 22u/6.3V_8
VTT0_59
P10 +1.1V_VTT
AA26 N10
VCC50 C251 VTT0_60
Y35 L10
VCC51 1u/10V_4 VTT0_61 C616 C610
Y34 K10
VCC52 VTT0_62 10u/6.3V_6 10u/6.3V_6
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56

1.1V
Y29 J22
VCC57 VTT1_63
Y28 +1.1V_VTT K26 J20
VCC58 VTT1_48 VTT1_64
Y27 J27 J18
VCC59 VTT1_49 VTT1_65

PEG & DMI


Y26 J26 H21 C614 C613
VCC60 H_PSI# C620 C294 C288 C335 VTT1_50 VTT1_66 22u/6.3V_8 22u/6.3V_8
V35 AN33 H_PSI# (40) J25 H20
VCC61 PSI# 22u/6.3V_8 22u/6.3V_8 VTT1_51 VTT1_67
V34 H27 H19
POWER

VCC62 22u/6.3V_8 22u/6.3V_8 VTT1_52 VTT1_68


V33 G28
VCC63 H_VID0 VTT1_53
V32 AK35 H_VID0 (40) G27
VCC64 VID[0] H_VID1 VTT1_54
V31
VCC65 VID[1]
AK33
H_VID2
H_VID1 (40) G26
VTT1_55 0.6A
V30 AK34 H_VID2 (40) F26
VCC66 VID[2] H_VID3 VTT1_56
V29 AL35 H_VID3 (40) E26 L26 +1.8V
VCC67 VID[3] VTT1_57 VCCPLL1
CPU VIDS

1.8V
V28 AL33 H_VID4 H_VID4 (40) E25 L27
B VCC68 VID[4] H_VID5 VTT1_58 VCCPLL2 B
V27 AM33 H_VID5 (40) M26
VCC69 VID[5] H_VID6 VCCPLL3 C273 C280 C619 C617 C270
V26 AM35 H_VID6 (40)
VCC70 VID[6] H_DPRSLPVR 1u/10V_4 2.2u/10V_6 22u/6.3V_8
U35 AM34 H_DPRSLPVR (40)
VCC71 PROC_DPRSLPVR 1u/10V_4 4.7u/10V_6
U34
VCC72
U33
VCC73
U32
VCC74 H_VTTVID1
U31 G15 TP1
VCC75 VTT_SELECT
U30
VCC76 Clarksfield/Auburndale
U29
VCC77 H_VTTVID1=Low, 1.1V
U28
VCC78 H_VTTVID1=High, 1.05V
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82 +1.1V_VTT
R33
VCC83
R32 AN35 I_MON (40)
VCC84 ISENSE
R31
VCC85
R30
VCC86 R162 100_4
R29 +VCC_CORE
VCC87
R28 AJ34
SENSE LINES

VCC88 VCC_SENSE VCCSENSE (40)


R27 AJ35 VSSSENSE (40) R191 R186 R194 R197 R203 R228 R218 R181 R174
VCC89 VSS_SENSE R167 100_4 1K_4 1K_4 *1K_4 *1K_4 *1K_4
R26
VCC90 1K_4 *1K_4 1K_4 1K_4
P35
VCC91 VTT_SENSE H_VID0
P34 B15 TP56
VCC92 VTT_SENSE VSS_SENSE_VTT H_VID1
P33 A15 TP57
VCC93 VSS_SENSE_VTT H_VID2
P32
VCC94 H_VID3
P31
VCC95 H_VID4
P30
VCC96 H_VID5
P29
VCC97 H_VID6
P28
VCC98 H_DPRSLPVR
P27
VCC99 H_PSI#
P26
A VCC100 A

R190 R185 R193 R196 R202 R227 R217 R180 R173


*1K_4 *1K_4 1K_4 1K_4 1K_4
*1K_4 1K_4 *1K_4 *1K_4

Clarksfield/Auburndale
Note:
Quanta Computer Inc.
For Validating IMVP VR R6451 should be STUFF
HFM_VID : Max 1.4V
and R2N1 NO_STUFF LFM_VID : Min 0.65V PROJECT : ZQ3
AUBURNDALE/CLARKSFIELD PROCESSOR (POWER) Size Document Number Rev
1A
AUBURNDA 3/4 (PWR)
Date: Monday, March 29, 2010 Sheet 6 of 47
5 4 3 2 1
5 4 3 2 1

Arrandale_4(CPU) AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)


U36H U36I U36E

AT20 VSS1 VSS81 AE34 RSVD32 AJ13


AT17 VSS2 VSS82 AE33 RSVD33 AJ12
AR31 VSS3 VSS83 AE32 K27 VSS161
AR28 VSS4 VSS84 AE31 K9 VSS162 AP25 RSVD1
AR26 VSS5 VSS85 AE30 K6 VSS163 AL25 RSVD2 RSVD34 AH25
AR24 VSS6 VSS86 AE29 K3 VSS164 AL24 RSVD3 RSVD35 AK26
AR23 VSS7 VSS87 AE28 J32 VSS165 AL22 RSVD4
AR20 VSS8 VSS88 AE27 J30 VSS166 AJ33 RSVD5 RSVD36 AL26
AR17 VSS9 VSS89 AE26 J21 VSS167 AG9 RSVD6 RSVD_NCTF_37 AR2
D AR15 AE6 J19 M27 D
VSS10 VSS90 VSS168 RSVD7
AR12 VSS11 VSS91 AD10 H35 VSS169 L28 RSVD8 RSVD38 AJ26
AR9 VSS12 VSS92 AC8 H32 VSS170 (14,31) VREF_DQ_DIMM0 J17 SA_DIMM_VREF RSVD39 AJ27
AR6 VSS13 VSS93 AC4 H28 VSS171 (15,31) VREF_DQ_DIMM1 H17 SB_DIMM_VREF
AR3 VSS14 VSS94 AC2 H26 VSS172 G25 RSVD11
AP20 VSS15 VSS95 AB35 H24 VSS173 G17 RSVD12
AP17 VSS16 VSS96 AB34 H22 VSS174 E31 RSVD13 RSVD_NCTF_40 AP1
AP13 VSS17 VSS97 AB33 H18 VSS175 E30 RSVD14 RSVD_NCTF_41 AT2
AP10 VSS18 VSS98 AB32 H15 VSS176
AP7 VSS19 VSS99 AB31 H13 VSS177 RSVD_NCTF_42 AT3
AP4 VSS20 VSS100 AB30 H11 VSS178 RSVD_NCTF_43 AR1
AP2 VSS21 VSS101 AB29 H8 VSS179
AN34 VSS22 VSS102 AB28 H5 VSS180
AN31 VSS23 VSS103 AB27 H2 VSS181
AN23 VSS24 VSS104 AB26 G34 VSS182 RSVD45 AL28
AN20 AB6 G31 CFG0 AM30 AL29
VSS25 VSS105 VSS183 CFG[0] RSVD46
AN17 VSS26 VSS106 AA10 G20 VSS184 AM28 CFG[1] RSVD47 AP30
AM29 VSS27 VSS107 Y8 G9 VSS185 AP31 CFG[2] RSVD48 AP32
AM27 Y4 G6 CFG3 AL32 AL27
VSS28 VSS108 VSS186 CFG4 CFG[3] RSVD49
AM25 VSS29 VSS109 Y2 G3 VSS187 AL30 CFG[4] RSVD50 AT31
AM20 VSS30 VSS110 W 35 F30 VSS188 AM31 CFG[5] RSVD51 AT32
AM17 VSS31 VSS111 W 34 F27 VSS189 AN29 CFG[6] RSVD52 AP33
AM14 W 33 F25 CFG7 AM32 AR33
VSS32 VSS112 VSS190 CFG[7] RSVD53
AM11 VSS33 VSS113 W 32 F22 VSS191 AK32 CFG[8] RSVD_NCTF_54 AT33
AM8 W 31 F19 AK31 AT34

RESERVED
VSS34 VSS114 VSS192 CFG[9] RSVD_NCTF_55
AM5 VSS35 VSS115 W 30 F16 VSS193 AK28 CFG[10] RSVD_NCTF_56 AP35
AM2 VSS36 VSS116 W 29 E35 VSS194 AJ28 CFG[11] RSVD_NCTF_57 AR35
AL34 W 28 E32 AN30 AR32
C AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W 27
W 26
E29
E24
VSS195
VSS196
VSS197
VSS AN32
AJ32
CFG[12]
CFG[13]
CFG[14]
RSVD58
C

AL20 VSS40 VSS120 W6 E21 VSS198 AJ29 CFG[15] RSVD_TP_59 E15


AL17 VSS41 VSS121 V10 E18 VSS199 AJ30 CFG[16] RSVD_TP_60 F15
AL12 VSS42 VSS122 U8 E13 VSS200 AK30 CFG[17] KEY A2
AL9 U4 E11 TP2 H16 D15
VSS43 VSS123 VSS201 RSVD_TP_86 RSVD62
AL6 VSS44 VSS124 U2 E8 VSS202 CHECKLIST 2.0 CONNECT TO GND RSVD63 C15
AL3 VSS45 VSS125 T35 E5 VSS203 RSVD64 AJ15 TP16
AK29 VSS46 VSS126 T34 E2 VSS204 VSS_NCTF1 AT35 RSVD65 AH15 TP17
AK27 VSS47 VSS127 T33 D33 VSS205 VSS_NCTF2 AT1
AK25 VSS48 VSS128 T32 D30 VSS206 VSS_NCTF3 AR34 TP60 B19 RSVD15
AK20 VSS49 VSS129 T31 D26 VSS207 VSS_NCTF4 B34 TP58 A19 RSVD16
AK17 T30 D9 B2 TP3

NCTF
VSS50 VSS130 VSS208 VSS_NCTF5
AJ31 VSS51 VSS131 T29 D6 VSS209 VSS_NCTF6 B1 TP54 A20 RSVD17
AJ23 VSS52 VSS132 T28 D3 VSS210 VSS_NCTF7 A35 TP55 B20 RSVD18
AJ20 VSS53 VSS133 T27 C34 VSS211 RSVD_TP_66 AA5
AJ17 VSS54 VSS134 T26 C32 VSS212 U9 RSVD19 RSVD_TP_67 AA4
AJ14 VSS55 VSS135 T6 C29 VSS213 T9 RSVD20 RSVD_TP_68 R8
AJ11 VSS56 VSS136 R10 C28 VSS214 RSVD_TP_69 AD3
AJ8 VSS57 VSS137 P8 C24 VSS215 AC9 RSVD21 RSVD_TP_70 AD2
AJ5 VSS58 VSS138 P4 C22 VSS216 AB9 RSVD22 RSVD_TP_71 AA2
AJ2 VSS59 VSS139 P2 C20 VSS217 RSVD_TP_72 AA1
AH35 VSS60 VSS140 N35 C19 VSS218 RSVD_TP_73 R9
AH34 VSS61 VSS141 N34 C16 VSS219 RSVD_TP_74 AG7
AH33 VSS62 VSS142 N33 B31 VSS220 C1 RSVD_NCTF_23 RSVD_TP_75 AE3
AH32 VSS63 VSS143 N32 B25 VSS221 A3 RSVD_NCTF_24
AH31 VSS64 VSS144 N31 B21 VSS222
AH30 VSS65 VSS145 N30 B18 VSS223 RSVD_TP_76 V4
B AH29 VSS66 VSS146 N29 B17 VSS224 RSVD_TP_77 V5 B
AH28 VSS67 VSS147 N28 B13 VSS225 RSVD_TP_78 N2
AH27 VSS68 VSS148 N27 B11 VSS226 J29 RSVD26 RSVD_TP_79 AD5
AH26 VSS69 VSS149 N26 B8 VSS227 J28 RSVD27 RSVD_TP_80 AD7
AH20 VSS70 VSS150 N6 B6 VSS228 RSVD_TP_81 W3
AH17 VSS71 VSS151 M10 B4 VSS229 A34 RSVD_NCTF_28 RSVD_TP_82 W2
AH13 VSS72 VSS152 L35 A29 VSS230 A33 RSVD_NCTF_29 RSVD_TP_83 N3
AH9 VSS73 VSS153 L32 A27 VSS231 RSVD_TP_84 AE5
AH6 VSS74 VSS154 L29 A23 VSS232 C35 RSVD_NCTF_30 RSVD_TP_85 AD9
AH3 VSS75 VSS155 L8 A9 VSS233 B35 RSVD_NCTF_31
AG10 VSS76 VSS156 L5
AF8 VSS77 VSS157 L2 VSS AP34 TP59
AF4 VSS78 VSS158 K34
AF2 K33 AP34 can be NC on CRB; EDS/DG suggestion to GND
VSS79 VSS159
AE35 VSS80 VSS160 K30

Clarksfield/Auburndale

Clarksfield/Auburndale Clarksfield/Auburndale

Processor Strapping +1.1V_VTT

1 0 CFG4
R204 3.01K/F_4 R214 *3.01K/F_4
CFG4 Enabled; An external Display port CFG0
Disabled; No Physical Display Port R219 3.01K/F_4 R222 *3.01K/F_4
A (Display Port device is connected to the Embedded A

Presence) attached to Embedded Diplay Port Display port Use reverse type R198 *3.01K/F_4 CFG3 R199 3.01K/F_4

CFG0 CFG[ 1:0 ] - PCI_Epress Configuration Select CFG7 R474 *3.01K/F_4

(PCI-Epress * 11= 1 x 16 PEG


Single PEG Bifurcation enabled
Configuration Select)
* 10= 2 x 8 PEG The Clarkfield processor's PCI Express interface may not meet Quanta Computer Inc.
PCI Express 2.0 jitter specifications. Intel recommends
CFG3 placing a 3.01K +/- 5% pull down resistor to VSS on CFG[7] pin PROJECT : ZQ3
(PCI-Epress Static Normal Operation Lane Numbers Reversed for both rPGA and BGA components. This pull down resistor Size Document Number Rev
Lane Reversal) should be removed when this issue is fixed.(ES1 only) 1A
AUBURNDA 4/4
Date: Monday, March 29, 2010 Sheet 7 of 47
5 4 3 2 1
5 4 3 2 1

PCH1(CLG) IBEX PEAK-M (DMI,FDI,GPIO)


IBEX PEAK-M (LVDS,DDI)
U43C

BC24
FDI_RXN0
BA18
BH17
FDI_TXN0 (4) PD @ LVDS page U43D
(4) DMI_RXN0 DMI0RXN FDI_RXN1 FDI_TXN1 (4)
(4) DMI_RXN1 BJ22 BD16 FDI_TXN2 (4) (23) INT_LVDS_BLON T48 BJ46
DMI1RXN FDI_RXN2 L_BKLTEN SDVO_TVCLKINN
D (4) DMI_RXN2 AW20 BJ16 FDI_TXN3 (4) (23) INT_LVDS_DIGON T47 BG46 D
DMI2RXN FDI_RXN3 L_VDD_EN SDVO_TVCLKINP
(4) DMI_RXN3 BJ20 BA16 FDI_TXN4 (4)
DMI3RXN FDI_RXN4
BE14 FDI_TXN5 (4) (23) INT_LVDS_BRIGHT Y48 BJ48
FDI_RXN5 L_BKLTCTL SDVO_STALLN
(4) DMI_RXP0 BD24 BA14 FDI_TXN6 (4) BG48
DMI0RXP FDI_RXN6 SDVO_STALLP
(4) DMI_RXP1 BG22 BC12 FDI_TXN7 (4) (23) INT_LVDS_EDIDCLK AB48
DMI1RXP FDI_RXN7 L_DDC_CLK
(4) DMI_RXP2 BA20 (23) INT_LVDS_EDIDDATA Y45 BF45
DMI2RXP L_DDC_DATA SDVO_INTN
(4) DMI_RXP3 BG20 BB18 FDI_TXP0 (4) BH45
DMI3RXP FDI_RXP0 R295 10K/F_4 SDVO_INTP
BF17 FDI_TXP1 (4) +3V AB46
FDI_RXP1 R280 10K/F_4 L_CTRL_CLK
(4) DMI_TXN0 BE22
BF21
DMI0TXN FDI_RXP2
BC16
BG16
FDI_TXP2 (4) V48
L_CTRL_DATA PU @ DVI page
(4) DMI_TXN1 DMI1TXN FDI_RXP3 FDI_TXP3 (4)
BD20 AW16 R304 2.37K/F_4 AP39 T51
(4) DMI_TXN2 DMI2TXN FDI_RXP4 FDI_TXP4 (4) LVD_IBG SDVO_CTRLCLK SDVO_CTRLCLK (24)
(4) DMI_TXN3 BE18 BD14 FDI_TXP5 (4) AP41 T53 SDVO_CTRLDAT (24)
DMI3TXN FDI_RXP5 LVD_VBG SDVO_CTRLDATA
BB14 FDI_TXP6 (4)
FDI_RXP6
(4) DMI_TXP0 BD22 BD12 FDI_TXP7 (4) AT43
DMI0TXP FDI_RXP7 LVD_VREFH
(4) DMI_TXP1 BH21 AT42 BG44
DMI1TXP LVD_VREFL DDPB_AUXN
(4) DMI_TXP2 BC20 BJ44
DMI2TXP DDPB_AUXP
(4) DMI_TXP3 BD18 BJ14 FDI_INT (4) AU38 INT_HDMI_HPD (24)
DMI3TXP FDI_INT DDPB_HPD

LVDS
(23) INT_TXLCLKOUTN INT_TXLCLKOUTN AV53

DMI
FDI
INT_TXLCLKOUTP LVDSA_CLK# INT_HDMI_TXN2_C C444 IV@0.1u/10V_4
BF13 FDI_FSYNC0 (4) (23) INT_TXLCLKOUTP AV51 BD42 INT_HDMI_TXN2 (24)
FDI_FSYNC0 LVDSA_CLK DDPB_0N INT_HDMI_TXP2_C C439 IV@0.1u/10V_4
BH25 BC42 INT_HDMI_TXP2 (24)
DMI_ZCOMP INT_TXLOUTN0 DDPB_0P INT_HDMI_TXN1_C C434 IV@0.1u/10V_4
BH13 FDI_FSYNC1 (4) (23) INT_TXLOUTN0 BB47 BJ42 INT_HDMI_TXN1 (24)
R600 49.9/F_4 FDI_FSYNC1 INT_TXLOUTN1 LVDSA_DATA#0 DDPB_1N INT_HDMI_TXP1_C C432 IV@0.1u/10V_4
BF25 BA52 BG42

Digital Display Interface


+1.05V DMI_IRCOMP (23) INT_TXLOUTN1 LVDSA_DATA#1 DDPB_1P INT_HDMI_TXP1 (24)
BJ12 INT_TXLOUTN2 AY48 BB40 INT_HDMI_TXN0_C C459 IV@0.1u/10V_4
FDI_LSYNC0 FDI_LSYNC0 (4) (23) INT_TXLOUTN2 LVDSA_DATA#2 DDPB_2N INT_HDMI_TXN0 (24)
AV47 BA40 INT_HDMI_TXP0_C C449 IV@0.1u/10V_4
LVDSA_DATA#3 DDPB_2P INT_HDMI_TXP0 (24)
BG14 AW38 INT_HDMI_TXCN_C C429 IV@0.1u/10V_4
FDI_LSYNC1 FDI_LSYNC1 (4) DDPB_3N INT_HDMI_TXCN (24)
(23) INT_TXLOUTP0 INT_TXLOUTP0 BB48 BA38 INT_HDMI_TXCP_C C426 IV@0.1u/10V_4
LVDSA_DATA0 DDPB_3P INT_HDMI_TXCP (24)
(23) INT_TXLOUTP1 INT_TXLOUTP1 BA50
INT_TXLOUTP2 LVDSA_DATA1
C (23) INT_TXLOUTP2 AY49
LVDSA_DATA2
Add IV@ (1/11) C
AV48 Y49
LVDSA_DATA3 DDPC_CTRLCLK
AB49
DDPC_CTRLDATA
For LAN PU @ LAN site AP48
XDP_DBRST# PCIE_WAKE# LVDSB_CLK#
(4) XDP_DBRST# T6 J12 PCIE_WAKE# (26) LAN AP47 BE44
SYS_RESET# WAKE# LVDSB_CLK DDPC_AUXN
BD44
DDPC_AUXP
AY53 AV40
SYS_PWROK CLKRUN# LVDSB_DATA#0 DDPC_HPD
M6 Y1 CLKRUN# (31,34) TPM & EC AT49
SYS_PWROK CLKRUN# / GPIO32 LVDSB_DATA#1
AU52 BE40
LVDSB_DATA#2 DDPC_0N
AT53 BD40
LVDSB_DATA#3 DDPC_0P
System Power Management

B17 BF41
PWROK DDPC_1N
AY51 BH41
LVDSB_DATA0 DDPC_1P
AT48 BD38
SUS_STAT# LVDSB_DATA1 DDPC_2N
K5 P8 TP46 AU50 BC38
MEPWROK SUS_STAT# / GPIO61 LVDSB_DATA2 DDPC_2P
AT51 BB36
LVDSB_DATA3 DDPC_3N
BA36
RSV_ICH_LAN_RST# A10 DDPC_3P
F3 ICH_SUSCLK (34)
LAN_RST# SUSCLK / GPIO62
INT_CRT_BLU AA52 U50
(23) INT_CRT_BLU CRT_BLUE DDPD_CTRLCLK
D9 E4 SLP_S5#_R TP52 INT_CRT_GRE AB53 U52
(4,31) PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 (23) INT_CRT_GRE CRT_GREEN DDPD_CTRLDATA
INT_CRT_RED AD53
(23) INT_CRT_RED CRT_RED
ICH_RSMRST# C16 H7 BC46
(34) ICH_RSMRST# RSMRST# SLP_S4# SUSC# (34) DDPD_AUXN
(23) INT_CRT_DDCCLK V51
CRT_DDC_CLK DDPD_AUXP
BD46 R place close to PCH
(23) INT_CRT_DDCDAT V53 AT38
SUS_PWR_ACK_R CRT_DDC_DATA DDPD_HPD R514 150/F_4 INT_CRT_BLU
M1 P12 SUSB# (34)
SUS_PWR_DN_ACK / GPIO30 SLP_S3#
B BJ40 B
DDPD_0N R513 150/F_4 INT_CRT_GRE
(23) INT_HSYNC Y53 BG40
SLP_M# R352 *0_4 CRT_HSYNC DDPD_0P
(34) DNBSWON# P5 K8 (23) INT_VSYNC Y51 BJ38
PWRBTN# SLP_M# CRT_VSYNC DDPD_1N R512 150/F_4 INT_CRT_RED
BG38
DDPD_1P

CRT
BF37
ACIN_R DAC_IREF DDPD_2N
(34) PCH_ACIN P7 N2 TP85 AD48 BH37
R360 *0_4 ACPRESENT / GPIO31 TP23 DAC_IREF DDPD_2P
AB51 BE36
CRT_IRTN DDPD_3N
BD36
PM_BATLOW# R285 DDPD_3P
A6 BJ10 PM_SYNC (4)
BATLOW# / GPIO72 PMSYNCH 1K/F_4 IbexPeak-M_R1P0

PM_RI# F14 F6 PM_SLP_LAN# TP49


RI# SLP_LAN# / GPIO29

IbexPeak-M_R1P0

PCH Pull-high/low(CLG) +3V_S5


System PWR_OK(CLG)
+3V

PM_RI# R320 10K_4


CLKRUN# R647 8.2K_4 +3V_S5
PM_BATLOW# R351 8.2K_4 DELAY_VR_PWRGOOD need PU 2K to +3V.
XDP_DBRST# R354 1K_4 C750 *0.1u/10V_4
A PU at power side A

5
ICH_RSMRST# R327 10K_4 PM_SLP_LAN# R343 *10K_4 1 DELAY_VR_PWRGOOD (4,40)
SYS_PWROK 4
RSV_ICH_LAN_RST# R608 10K_4 SUS_PWR_ACK_R R626 10K_4 2 PWROK_EC (34)
Quanta Computer Inc.

3
SYS_PWROK R602 10K_4 ACIN_R R349 10K_4 U45 R601 100K_4
TC7SH08FU
PROJECT : ZQ3
Size Document Number Rev
1A
IBEX PEAK-M 1/6
Date: Monday, March 29, 2010 Sheet 8 of 47
5 4 3 2 1
5 4 3 2 1

RTC Circuitry(RTC) PCH2(CLG)


C484
15p/50V_4
+VCCRTC
IBEX PEAK-M (HDA,JTAG,SATA)

1
D35
+3VPCU
20mils R611 20K/F_4 RTC_RST# Y6 R328
VCCRTC_1 10M_4 U43A

4
1
20MIL J1 32.768KHz
C492
BAT54C C764 RTC_X1 B13 D33
RTCX1 FWH0 / LAD0 LPC_LAD0 (28,31,34)
1u/10V_4 15p/50V_4 RTC_X2 D13 B33
RTCX2 FWH1 / LAD1 LPC_LAD1 (28,31,34)
30mils *SHORT_ PAD1 C32 LPC_LAD2 (28,31,34)

2
FWH2 / LAD2
A32 LPC_LAD3 (28,31,34)
RTC_RST# FWH3 / LAD3
C14
RTCRST#
C34 LPC_LFRAME# (28,31,34)
D
R610 20K/F_4 SRTC_RST# SRTC_RST# FWH4 / LFRAME# D
D17
SRTCRST# PCH_DRQ#0
A34 TP80

RTC

LPC
LDRQ0#

1
R632 J2 +VCCRTC R604 1M_4 SM_INTRUDER# A16 F34 PCH_DRQ#1 TP30
1K_4 C769 C755 INTRUDER# LDRQ1# / GPIO23 R366 10K_4 +3V
1u/10V_4 1u/10V_4 PCH_INVRMEN A14 AB9
INTVRMEN SERIRQ IRQ_SERIRQ (31,34)
*SHORT_ PAD1

2
HDA_SYNC (PCH strap pin) ACZ_BIT_CLK A30
Tony:0831 HDA_BCLK
20MIL Internal weak pull-down
SATA0RXN
AK7 SATA_RXN0 (29)
VCCVRM=>+1.8V (default) ACZ_SYNC D29 AK6
HDA_SYNC SATA0RXP SATA_RXP0 (29)
VCCRTC_2 1 3 RTC_N01 R633 22K/F_6 AK11 SATA_TXN0_C C710 0.01u/25V_4 SATA HDD
+5V_S5 external pull-up SATA0TXN SATA_TXN0 (29)
(30) SPKR P1 AK9 SATA_TXP0_C C711 0.01u/25V_4
SATA_TXP0 (29)
Q46 R645 VCCVRM=>+1.5V SPKR SATA0TXP
20MIL ACZ_RST# C30 CAP. Close connect side
1

MMBT3904 68.1K/F_4 HDA_RST#


AH6 SATA_RXN1 (29)
CN23 SATA1RXN
AH5 SATA_RXP1 (29)
2

RTC_N03 SATA1RXP
RTC_ML2032 (30) PCH_AZ_CODEC_SDIN0 G30 AH9 SATA_TXN1_C C283 0.01u/25V_4
SATA_TXN1 (29) SATA ODD
HDA_SDIN0 SATA1TXN
AH8 SATA_TXP1_C C287 0.01u/25V_4
SATA_TXP1 (29)
SATA1TXP
(33) PCH_AZ_MDC_SDIN1 F30
R646 HDA_SDIN1
AF11
SATA2RXN
TP32 E32 AF9

IHDA
2

150K/F_6 HDA_SDIN2 SATA2RXP


AF7
SATA2TXN
TP33 F32
HDA_SDIN3 SATA2TXP
AF6 Note:
AH3 SATA port2/3 may not be available on all PCH sku
ACZ_SDOUT SATA3RXN
B29
HDA_SDO SATA3RXP
AH1 (HM55 support 4port only)
AF3
SATA3TXN
AF1
HDA_DOCK_EN# SATA3TXP
H32

SATA
HDA_DOCK_EN# / GPIO33
AD9
R313 *10K_4 PCH_GPIO13 SATA4RXN
+3V_S5 J30 AD8
HDA_DOCK_RST# / GPIO13 SATA4RXP
AD6
HDA Bus(CLG) SATA4TXN
SATA4TXP
AD5

R564 33_4 PCH_JTAG_TCK M3 AD3


(33) PCH_AZ_MDC_SYNC TP86 JTAG_TCK SATA5RXN
AD1
R574 33_4 ACZ_SYNC PCH_JTAG_TMS SATA5RXP
C
(30) PCH_AZ_CODEC_SYNC TP88 K3 AB3 C
JTAG_TMS SATA5TXN
AB1
R559 33_4 PCH_JTAG_TDI SATA5TXP
(33) PCH_AZ_MDC_RST# TP89 K1
JTAG_TDI

JTAG
R563 33_4 ACZ_RST# PCH_JTAG_TDO J2 AF16
(30) PCH_AZ_CODEC_RST# TP87 JTAG_TDO SATAICOMPO
R586 33_4 PCH_JTAG_RST# J4 AF15 R323 37.4/F_4 +1.05V
(33) PCH_AZ_MDC_SDOUT TP53 TRST# SATAICOMPI
R585 33_4 ACZ_SDOUT
(30) PCH_AZ_CODEC_SDOUT
SPI_CLK_R BA2
R575 33_4 SPI_CLK
(33) PCH_AZ_MDC_BITCLK
SPI_CS0#_R AV3
R582 33_4 ACZ_BIT_CLK SPI_CS0#
(30) PCH_AZ_CODEC_BITCLK
+3VPCU R625 *10K_4 SPI_CS1# AY3 T3
SPI_CS1# SATALED# SATA_ACT# (36)
C731 C732 R368 10K_4 +3V
*27p/50V_4 *27p/50V_4 SPI_SI_R AY1 Y9
SPI_MOSI SATA0GP / GPIO21 PCH_ODD_EN (29)

SPI
SPI_SO_R AV1 V1 R639 10K_4 +3V
SPI_MISO SATA1GP / GPIO19
Place all series terms close to PCH except for SDIN input PCH Strap Table
lines,which should be close to source.Placement of R773, R775, IbexPeak-M_R1P0
R776 & R777 should equal distance to the T split trace point. Pin Name Strap description Sampled Configuration ZY9B note
Basically, keep the same distance from T for all series
termination resistors. 0 = Default (weak pull-down 20K)
SPKR No reboot mode setting PWROK +3V R642 *10K_4 SPKR
1 = Setting to No-Reboot mode
1 = Default (weak pull-up 20K)
INIT3_3V Reserved PWROK Should not be pull-down
PCH SPI(CLG)
0 = "top-block swap" mode
2/10 modify for fac. request. GNT3# / GPIO55 Top-Block Swap Override PWROK R519 *4.7K_4
1 = Default (weak pull-up 20K) PCI_GNT3# (10)
+3V
B B
U47
SPI_CS0#_R 1 8 INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up +VCCRTC R606 330K_4 PCH_INVRMEN
SPI_CLK_R CE# VDD
6
SPI_SI_R SCK
5
SPI_SO_R SI
2 7 R618 3.3K/F_4
SO HOLD# GNT1# GNT0# Boot Location
GNT1# / GPIO51 Boot BIOS Selection 1 [bit-1] PWROK Default weak pull-up on GNT0/1#
3 4
C768 WP# VSS C488 [Need external pull-down for LPC BIOS]
*22p/50V_4 MX25L1605DM2I-12G 0.1u/10V_4 1 1 SPI +3V
R284 *1K_4 1/11 modified
R269 *1K_4
1 0 PCI
+3V R619 3.3K/F_4 GNT0# Boot BIOS Selection 0 [bit-0] PWROK R292 1K_4
PCI_GNT0# (10)
R268 1K_4
PCI_GNT1# (10)
0 0 LPC
Should not be pull-down
GNT2# / GPIO53 ESI strap (Server only) PWROK R303 *4.7K_4 from PCH and to control SW (EC or PCH control
(weak pull-up 20K) PWM_SELECT# (10,23)
Brightness switch)

NV_ALE Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 32ohm) +1.8V R624 *1K_4 NV_ALE
NV_ALE (10)

NV_CLE DMI Termination voltage PWROK weak pull-down 32ohm +1.8V R341 *1K_4 NV_CLE
NV_CLE (10)

HDA_DOCK_EN#/GPIO33 Flash Descriptor Security PWROK 0 = Override R592 *1K_4


+3V R594 *10K_4 HDA_DOCK_EN#
1 = Default (weak pull-up 20K)
SPI_MOSI iTPM function Disable MEPWROK 0 = Default (weak pull-down 20K) +3V R623 *8.2K_4 SPI_SI_R

1 = Enable
Should not be pull-up
A HDA_SDO Reserved RSMRST# (weak pull-down 20K)
A

Should not be pull-down +3V_S5 R336 10K_4


RSV_GPIO8 (11)
GPIO8 Reserved RSMRST# (weak pull-up 20K)
GPIO27 On-die PLL Voltage Regulator RSMRST# 0 = Disable R324 *10K_4
RSV_GPIO27 (11)
1 = Enable (weak pull-up 20K)
HDA_SYNC
On-die PLL PWR supply select RSMRST# 0 = 1.8V supply (weak pull-down 20K) use defaul (0 = 1.8V supply)
1 = 1.5V supply
Quanta Computer Inc.
GPIO15 Reserved RSMRST# 0 = TLS no Confidentiality
PROJECT : ZQ3
+3V_S5 R346 1K_4 Size Document Number Rev
(weak pull-down 20K) CR_WAKE# (11)
1A
1 = TLS Confidentiality
IBEX PEAK-M 2/6
Date: Monday, March 29, 2010 Sheet 9 of 47
5 4 3 2 1
5 4 3 2 1

PCH3(CLG)
IBEX PEAK-M (PCI-E,SMBUS,CLK)
IBEX PEAK-M (PCI,USB,NVRAM) U43B

BG30 B9 RSV_SMBALERT#
(26) PCIE_RXN1 PERN1 SMBALERT# / GPIO11

Fo
(26) PCIE_RXP1 BJ30
U43E C736 0.1u/10V_4 PCIE_TXN1_C PERP1 ICH_SMBCLK
LAN (26) PCIE_TXN1 BF29
PETN1 SMBCLK
H14 ICH_SMBCLK (3,26,28)
H40 AY9 C730 0.1u/10V_4 PCIE_TXP1_C BH29
AD0 NV_CE#0 (26) PCIE_TXP1 PETP1 ICH_SMBDATA

r
N34 BD1 C8 ICH_SMBDATA (3,26,28)
AD1 NV_CE#1 SMBDATA
C44 AP15 (28) PCIE_RXN2 AW30
AD2 NV_CE#2 PERN2
A38 BD8 (28) PCIE_RXP2 BA30
AD3 NV_CE#3 C465 0.1u/10V_4 PCIE_TXN2_C PERP2 RSV_SML0ALERT#
C36 Mini 3G BC30 J14

C
AD4 (28) PCIE_TXN2 PETN2 SML0ALERT# / GPIO60

Fo
D J34 AV9 C462 0.1u/10V_4 PCIE_TXP2_C BD30 D
AD5 NV_DQS0 (28) PCIE_TXP2 PETP2

l
A40 BG8 C6 SMB_CLK_ME0
AD6 NV_DQS1 SML0CLK SMB_CLK_ME0
D45 T24 AU30

SMBus

k
AD7 PERN3 SMB_DATA_ME0

r
E36 AP7 T22 AT30 G8
AD8 NV_DQ0 / NV_IO0 PERP3 SML0DATA SMB_DATA_ME0
H48 AP6 T19 AU32
AD9 NV_DQ1 / NV_IO1 T21 PETN3
E40 AT6 AV32

ge
AD10 NV_DQ2 / NV_IO2 PETP3

Fo
C40 AT9 M14 RSV_SML1ALERT# R649 *0_4

L
AD11 NV_DQ3 / NV_IO3 SML1ALERT# / GPIO74 SML1ALERT# (11,34,37)
M48 BB1 BA32
AD12 NV_DQ4 / NV_IO4 PERN4

A
Fo an
M45 AV6 BB32 E10 2ND_MBCLK
AD13 NV_DQ5 / NV_IO5 PERP4 SML1CLK / GPIO58

n
r
F53 BB3 BD32

N
AD14 NV_DQ6 / NV_IO6 PETN4 2ND_MBDATA
M40 BA4 BE32 G12
AD15 NV_DQ7 / NV_IO7 PETP4 SML1DATA / GPIO75

r
NVRAM
M43 BE4

PCI-E*
AD16 NV_DQ8 / NV_IO8

&
J36 BB6 BF33

PU
AD17 NV_DQ9 / NV_IO9 PERN5

Fo
K48 BD6 BH33 T13 CL_CLK1
AD18 NV_DQ10 / NV_IO10 PERP5 CL_CLK1 CL_CLK1 (28)

Controller
F40 BB7 BG32

ECthe
AD19 NV_DQ11 / NV_IO11 PETN5 CL_DATA1

M
C42 BC8 BJ32 T11

o
AD20 NV_DQ12 / NV_IO12 PETP5 CL_DATA1 CL_DATA1 (28)

r
K46 BJ8

Link
AD21 NV_DQ13 / NV_IO13

i
M51 BJ6 BA34 T9 CL_RST1#

@
AD22 NV_DQ14 / NV_IO14 (28) PCIE_RXN6 PERN6 CL_RST1# CL_RST1# (28)
J52 BG6 AW34

ni N s
AD23 NV_DQ15 / NV_IO15 (28) PCIE_RXP6 PCIE_TXN6_C PERP6
K51 MiniWLAN C445 0.1u/10V_4 BC34

Mi
AD24 NV_ALE (28) PCIE_TXN6 PCIE_TXP6_C PETN6
L34 BD3 C451 0.1u/10V_4 BD34

L
AD25 NV_ALE NV_CLE NV_ALE (9) (28) PCIE_TXP6 PETP6 PEG_CLKREQ#_R
F42 AY6 H1 R635 SW@0_4
AD26 NV_CLE NV_CLE (9) PEG_A_CLKRQ# / GPIO47 PEG_CLKREQ# (16)

A
J40 AT34

ni
AD27 PERN7 PEG_A_CLKRQ# PD for FreeRun, due GPU not support.

ca ite
G46 AU34
AD28 NV_RCOMP R342 *32.4/F_4 PERP7
F44 AU2 AU36 AD43 CLK_PCIE_VGAN (16)
AD29 NV_RCOMP PETN7 CLKOUT_PEG_A_N

PC
M47 AV36 AD45 CLK_PCIE_VGAP (16)
AD30 PETP7 CLKOUT_PEG_A_P

PCI
H36 AV7 Note:

rd
AD31 NV_RB#
BG34 AN4

ca
PCIE port7/8 may not be available on all PCH sku PERN8 CLKOUT_DMI_N CLK_PCIE_3GPLLN (4)

PEG

H
J50 AY8 BJ34 AN2 CLK_PCIE_3GPLLP (4)
C/BE0# NV_WR#0_RE# PERP8 CLKOUT_DMI_P
G42
C/BE1# NV_WR#1_RE#
AY5 (HM55 support 6port only) BG36
PETN8
H47 BJ36

r
C/BE2# PETP8
G34 AV11 AT1

pi
C/BE3# NV_WE#_CK0 CLKOUT_DP_N / CLKOUT_BCLK1_N DPLL_REF_SSCLKN (4)

d
BF5 AT3 DPLL_REF_SSCLKP (4)
TP29 PCI_PIRQA# NV_WE#_CK1 CLKOUT_DP_P / CLKOUT_BCLK1_P
G38 AK48
PCI_PIRQB# PIRQA# CLKOUT_PCIE0N
H51 Port1 and port9 can be used on debug mode AK47

n
PIRQB# CLKOUT_PCIE0P

From CLK BUFFER


PCI_PIRQC#

WM
B37 H18 USBP0- (33) AW24 CLK_BUF_PCIE_3GPLLN (3)
C TP76 PCI_PIRQD# PIRQC# USBP0N CLK_PCIE_REQ0# CLKIN_DMI_N C
A44
PIRQD# USBP0P
J18 USBP0+ (33) Docking P9
PCIECLKRQ0# / GPIO73 CLKIN_DMI_P
BA24 CLK_BUF_PCIE_3GPLLP (3)
A18 USBP1- (32)
USBP1N

AA
PCI_REQ0# F51 C18 M/B USB

AX
PCI_REQ1# REQ0# USBP1P USBP1+ (32) CLK_PCH_SRC1N_R AM43
TP77 A46 N20 R275 *0/short_4 AP3
dGPU_SELECT# REQ1# / GPIO50 USBP2N USBP2- (32) (28) CLK_PCH_SRC1N CLK_PCH_SRC1P_R AM45 CLKOUT_PCIE1N CLKIN_BCLK_N CLK_BUF_BCLKN (3)
B45 P20 EXT-USB1-1 Mini 3G (28) R274 *0/short_4 AP1
Se

(23) dGPU_SELECT# REQ2# / GPIO52 USBP2P USBP2+ (32) CLK_PCH_SRC1P CLKOUT_PCIE1P CLKIN_BCLK_P CLK_BUF_BCLKP (3)

4
PCI_REQ3# M53 J20
REQ3# / GPIO54 USBP3N USBP3- (32) CLK_PCIE_REQ1#_R
USBP3P
L20 USBP3+ (32) EXT-USB2 (28) CLK_PCIE_REQ1#_R U4
PCIECLKRQ1# / GPIO18
le ele

PCI_GNT0# F48 F20 EHCI1 F18


(9) PCI_GNT0# GNT0# USBP4N TP38 CLKIN_DOT_96N CLK_BUF_DREFCLKN (3)
PCI_GNT1#

&
(9) PCI_GNT1# K45
GNT1# / GPIO51 USBP4P
G20 TP36 15" USB PORT CLKIN_DOT_96P
E18 CLK_BUF_DREFCLKP (3)
F36 A20 R258 *0/short_4 CLK_PCH_SRC2N_R AM47
ct

(9,23) PWM_SELECT# PCI_GNT3# GNT2# / GPIO53 USBP5N USBP5- (28) (28) CLK_PCH_SRC2N CLK_PCH_SRC2P_R AM48 CLKOUT_PCIE2N
H53 C20 SIMM card MiniWLAN (28) R257 *0/short_4
S

(9) PCI_GNT3# GNT3# / GPIO55 USBP5P USBP5+ (28) CLK_PCH_SRC2P CLKOUT_PCIE2P


M22 USBP6- AH13

FA
USBP6N TP35 CLKIN_SATA_N / CKSSCD_N CLK_BUF_DREFSSCLKN (3)
PCI_PIRQE# B41 N22 USBP6+ USB port6/7 may not be available on all PCH sku CLK_PCIE_WLAN# N4 AH12
TP78 PIRQE# / GPIO2 USBP6P TP34 (28) CLK_PCIE_WLAN# PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P CLK_BUF_DREFSSCLKP (3)
PCI_PIRQF# K53 B21 USBP7- (HM55 support 12port only)
LV

TP72 PIRQF# / GPIO3 USBP7N TP43


PCI_PIRQG# A36 D21 USBP7+ 2/10 modified

N
TP79 PIRQG# / GPIO4 USBP7P TP41
PCI_PIRQH# A48 H22 AH42 P41
ct

TP73 PIRQH# / GPIO5 USBP8N USBP8- (23) CLKOUT_PCIE3N REFCLK14IN CLK_ICH_14M (3)
D

USBP8P
J22 USBP8+ (23) Camera AH41
CLKOUT_PCIE3P
USB

PCI_RST# C664 27p/50V_4


S

(28) PCI_RST# K6 E22 USBP4- (32)

&
PCIRST# USBP9N CLK_PCIE_REQ3# CLK_PCI_FB
USBP9P
F22 USBP4+ (32) BLUETOOTH A8
PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK
J42

2
PCI_SERR# E44 A22
br

TP21 SERR# USBP10N USBP10- (28)


&

PCI_PERR# E50 C22 Mini Card (WWAN) Y3


TP18 PERR# USBP10P USBP10+ (28)

EC
G24 AM51 AH51 XTAL25_IN R518 25MHz
USBP11N USBP11- (35) CLKOUT_PCIE4N XTAL25_IN
i

H24 Finger Printer EHCI2 AM53 AH53 XTAL25_OUT 1M_4


CR nes

1
PCI_IRDY# USBP11P USBP11+ (35) CLKOUT_PCIE4P XTAL25_OUT
gh

A42 L24 USBP12- (25)


TP22 PCI_PAR IRDY# USBP12N CLK_PCIE_REQ4#
H44 M24 USBP12+ (25) Card reader M9 AF38 XCLK_RCOMP R306 90.9/F_4 +1.05V
TP25 PAR USBP12P PCIECLKRQ4# / GPIO26 XCLK_RCOMP
T

PCI_DEVSEL# F46 A24 C663 33p/50V_4


TP24 DEVSEL# USBP13N USBP13- (28)
t

PCI_FRAME# C46 C24 Mini Card (WLAN)


TP75 FRAME# USBP13P USBP13+ (28) BOARD_ID1
AJ50 T45
PCI_PLOCK# CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64
D49
PLOCK#
AJ52
CLKOUT_PCIE5P
No stuff XTAL25_IN and XTAL25_OUT circuitry
TP20 USB_BIAS
B25 until integrated CG becomes PCH POR.
PCI_STOP# USBRBIAS# R317 CLK_PCIE_REQ5# BOARD_ID2
D41 H6 P43

Clock Flex
TP28 STOP# PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65
s

PCI_TRDY# C48 D25 22.6/F_4


TP74 TRDY# USBRBIAS

Se
TP51 ICH_PME# M7 R506 *0/short_4 CLK_PCH_SRC6N_R AK53 T42 BOARD_ID3
PME# USB_OC0# (26) CLK_PCIE_LOMN CLK_PCH_SRC6P_R CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66
N16 LAN R505 *0/short_4 AK51
PCI_PLTRST# OC0# / GPIO59 USB_OC1# USB_OC0# (32) (26) CLK_PCIE_LOMP CLKOUT_PEG_B_P

le
D5 J16 USB_OC1# (32)
PLTRST# OC1# / GPIO40

Fo
B F16 USB_OC2# CLK_PCIE_LAN_REQ# P13 N50 B
OC2# / GPIO41 TP45 (26) CLK_PCIE_LAN_REQ# PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67 dGPU_EDIDSEL# (23,24)
R267 22_4 CLK_LPC_DEBUG_C N52 L16 USB_OC3# TP40
(28) CLK_LPC_DEBUG CLK_PCI_TPM_C CLKOUT_PCI0 OC3# / GPIO42 USB_OC4#
R515 22_4 P53 E14

ct
(31) CLK_LPC_TPM CLK_PCI_775_C CLKOUT_PCI1 OC4# / GPIO43 USB_OC5#

r
R260 22_4 P46 G16 TP92 IbexPeak-M_R1P0 R509 10K_4 +3V
(34) CLK_PCI_775 CLK_PCI_FB CLK_PCI_FB_C CLKOUT_PCI2 OC5# / GPIO9 USB_OC6#
R273 22_4 P51 F12 TP39
CLKOUT_PCI3 OC6# / GPIO10 USB_OC7#
P48 T15 TP37
CLKOUT_PCI4 OC7# / GPIO14 May be remove is OK

LA

LV
C411
C660 C421 IbexPeak-M_R1P0
*10p/50V_4

EMI addition

N
*10p/50V_4

*10p/50V_4

DS
PU
PEG_A_CLKRQ# PD for FreeRun, due GPU not support. +3V_S5 +3V_S5
CLK_REQ/Strap Pin(CLG)
PCI/USBOC# Pull-up(CLG) SMBus/Pull-up(CLG)

&
A16 swap override Strap/Top-Block
Swap Override jumper
+3V_S5 R318 R322

@
+3V_S5 Low = A16 swap

CR
PLTRST#(CLG) RP3 R348 10K_4 CLK_PCIE_REQ0# override/Top-Block 2.2K_4 2.2K_4
USB_OC7# 6 5 R340 10K_4 CLK_PCIE_REQ3# PCI_GNT3# Swap Override enabled

LA
USB_OC6# 7 4 USB_OC0# R355 10K_4 CLK_PCIE_REQ4# 2ND_MBDATA 2ND_MBCLK

T
USB_OC5# USB_OC1# CLK_PCIE_REQ5# High = Default (34) 2ND_MBDATA (34) 2ND_MBCLK
8 3 R350 10K_4
Add Buffers as needed for USB_OC4# 9 2 USB_OC2#

N
+3V_S5 10 1 USB_OC3# R628 IV@10K_4 PEG_CLKREQ#_R +3V_S5
Loading and fanout concerns.

ED
+3V_S5
Boot BIOS Strap
8.2K_10P8R +3V R612 10K_4 RSV_SMBALERT# :PCI
0:

si
GNT0# GNT1# Boot BIOS Location R319 10K_4 RSV_SML0ALERT# BID3
To

:LPC
1:

ID
C495 R640 10K_4 CLK_PCIE_REQ1#_R R358 10K_4 RSV_SML1ALERT#
/ EC

+3V R644 10K_4 CLK_PCIE_WLAN# 0 0 LPC R617 2.2K_4 ICH_SMBCLK


0.1u/10V_4 RP4 R288 10K_4 dGPU_SELECT# te R615 2.2K_4 ICH_SMBDATA :ZQ3
0:
PCI_REQ0# R536 8.2K_4 PCI_PIRQE# 0 1 Reserved (NAND)
C

6 5 BID2 :ZR9
LA

1:
5

PCI_PIRQB# 7 4 PCI_PIRQH# R510 8.2K_4 PCI_PIRQF# R85 4.7K_4 SMB_CLK_ME0


PU

in
PCI_PLTRST# 2 PCI_REQ3# 8 3 PCI_TRDY# R549 8.2K_4 PCI_PIRQG# 1 0 PCI R84 4.7K_4 SMB_DATA_ME0
:Mux
N

4 PCI_PIRQD# 9 2 PCI_FRAME# 0:
PLTRST# (4,11,16,25,26,28,31,34) PCI_REQ1#
1 +3V 10 1 1 1 SPI 1/21 modified BID1 :Optimas
1:

pu
A A
/
/

U24 R364 8.2K_10P8R


3

TC7SH08FU
BOARD ID

t
G

100K_4 Danbury Technology Enabled


Mi

+3V +3V
PU

RP2 High = Enable


ni

PCI_PLOCK#

so
6 5 NV_ALE
PCI_SERR# 7 4 PCI_PERR# R634 *10K_4 PEG_CLKREQ#_R Low = Disable R262 OPTIM@10K_4 BOARD_ID1 R276 MUX@10K_4
PCI_DEVSEL# PCI_PIRQC#
/ ca

8 3
PCI_STOP# 9 2 PCI_IRDY# R270 *10K_4 BOARD_ID2 R271 10K_4

ur
+3V 10 1 PCI_PIRQA# Quanta Computer Inc.
C

DMI Termination Voltage R277 10K_4 BOARD_ID3 R289 *10K_4


a

8.2K_10P8R
PROJECT :ZQ3
r

ce
Set to Vcc when LOW
r
d

NV_CLE Size Document Number Rev


d/

Set to Vcc/2 when HIGH IBEX PEAK-M 3/6 1A

Date: Monday, March 29, 2010 Sheet 10 of 47


re

5 4 3 2 1
TP
ad
M
er
/
5 4 3 2 1

PCH4(CLG) IBEX PEAK-M (GPIO,VSS_NCTF,RSVD) GPU RST#(CLG)


U43F

BMBUSY# Y3 AH45 TP_PCH_PCIE6N TP26 +3V


BMBUSY# / GPIO0 CLKOUT_PCIE6N TP_PCH_PCIE6P TP27
CLKOUT_PCIE6P AH46
(34) SIO_EXT_SMI# SIO_EXT_SMI# C38 C496 *0.1u/10V_4
TACH1 / GPIO1

(34) SIO_EXT_SCI# SIO_EXT_SCI# D37 TACH2 / GPIO6

5
AF48 TP_PCH_PCIE7N TP19 1
CLKOUT_PCIE7N PLTRST# (4,10,16,25,26,28,31,34)

MISC
change board_id0 to GPIO7 at 6/1 BOARD_ID0 J32 AF47 TP_PCH_PCIE7P TP23 (16) GPU_RST# 4
TACH3 / GPIO7 CLKOUT_PCIE7P
2dGPU_HOLD_RST#
D RSV_GPIO8 F10 D
(9) RSV_GPIO8

3
GPIO8

TP48 LAN_DISABLE# K9 U2 U23 R363


LAN_PHY_PWR_CTRL / GPIO12 A20GATE SIO_A20GATE (34)
SW@TC7SH08FU SW@100K_4
(9) CR_WAKE# CR_WAKE# T7 GPIO15
Fr

dGPU_HOLD_RST# AA2 AM3


SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLKN (4)
om

(18) dGPU_PWROK dGPU_PWROK F38 AM1 1/11 modified


TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLKP (4)
GPIO22 Y7 BG10
SCLOCK / GPIO22 PECI H_PECI (4)

GPIO
TP47 H10
GPIO24 RCIN#
T1 SIO_RCIN# (34) GPIO Pull-up/Pull-down(CLG)
G

GPIO24 NC for Intel suggestion at 6/1


GPIO27 AB12 BE10
P

(9) RSV_GPIO27 GPIO27 PROCPWRGD H_PWRGOOD (4)

CPU
U

TP_PCH_GPIO28 V13 BD10 PCH_THRMTRIP#_R R338 56/F_4


GPIO28 THRMTRIP# PM_THRMTRIP# (4)
T ow

STP_PCI# M11
o

STP_PCI# / GPIO34 +1.1V_VTT


56/F_4 +3V_S5
p

V6 R337
(44) dGPU_VRON SATACLKREQ# / GPIO35
GP r

dGPU_PWR_EN# should be stable (46) dGPU_PWR_EN dGPU_PWR_EN AB7 BA22 TP1_PCH TP42
SATA2GP / GPIO36 TP1
E

before dGPU_VRON enable TP_PCH_GPIO28 R345 10K_4


e

dGPU_PRSNT# AB13 AW22 TP2_PCH TP44 GPIO45 R629 10K_4


n

SATA3GP / GPIO37 TP2


U o

RST_GATE# R631 10K_4


GPIO38 GPIO57
ab

V3 BB22 R333 *10K_4


SLOAD / GPIO38 TP3 LAN_DISABLE# R332 10K_4
SAVE_LED# P3 AY45
SDATAOUT0 / GPIO39 TP4 +3V
lk

C GPIO45 H3 AY46 C
PCIECLKRQ6# / GPIO45 TP5
e

SIO_EXT_SMI# R537 10K_4


F

(31) RST_GATE# RST_GATE# F1 AV43 SIO_EXT_SCI# R541 10K_4


PCIECLKRQ7# / GPIO46 TP6
o

SV_SET_UP AB6 AV45 dGPU_PWR_EN R367 *10K_4


SDATAOUT1 / GPIO48 TP7
r

(10,34,37) SML1ALERT# R636 *0/short_4 SATA5GP AA4 AF13


SATA5GP / GPIO49 TP8
remove GPIO7 PU at 6/1
GPIO57 F8 M18
an

GPIO57 TP9 +3V


N18
EC suggestion use GPIO49 for FAN control TP10 SIO_RCIN# R641 10K_4
A4 AJ24 SIO_A20GATE R627 10K_4
VSS_NCTF_1 TP11 dGPU_HOLD_RST# R630 10K_4
A49
NCTF

VSS_NCTF_2 RSVD
SATA5GP R637 10K_4
SATA5GP / GPIO49 / TEMP_ALERT# is used to A5 VSS_NCTF_3 TP12 AK41
A50 GPIO22 R353 10K_4
alert for EC when CPU or Graph/Memory A52
VSS_NCTF_4
AK42 dGPU_PRSNT# R356 IV@10K_4
VSS_NCTF_5 TP13
controllers' temperature go out of limit. A53
VSS_NCTF_6
SAVE_LED# R643 10K_4
B2 M32 STP_PCI# R347 10K_4
So connecting GPIO49 to EC and avoid this VSS_NCTF_7 TP14
B4 VSS_NCTF_8
pin to be used for other purpose B52 N32 GPIO38 R648 10K_4
VSS_NCTF_9 TP15
B53
VSS_NCTF_10 BMBUSY# R638 8.2K_4
BE1 M30
VSS_NCTF_11 TP16
BE53 VSS_NCTF_12
BF1 N30 SV_SET_UP R357 10K_4
VSS_NCTF_13 TP17
BF53 VSS_NCTF_14
BH1 H12
VSS_NCTF_15 TP18 dGPU_PWROK R542 IV@10K_4
BH2
VSS_NCTF_16
BH52
BH53
VSS_NCTF_17 TP19
AA23 UMA only
VSS_NCTF_18
B BJ1 AB45 B
VSS_NCTF_19 NC_1
BJ2
VSS_NCTF_20
BJ4 AB38
VSS_NCTF_21 NC_2
BJ49
VSS_NCTF_22
BJ5 VSS_NCTF_23 NC_3 AB42
BJ50 SV_SET_UP 1-X High = Strong (Default)
VSS_NCTF_24
BJ52 AB41
VSS_NCTF_25 NC_4
BJ53 VSS_NCTF_26
D1 T39
VSS_NCTF_27 NC_5 GPIO57 stuff PD and not stuff PU for Intel suggestion at 6/1
D2
VSS_NCTF_28
D53
VSS_NCTF_29 TP_INT3_3V GPIO57 R335 10K_4
E1 VSS_NCTF_30 INIT3_3V# P6
E53 TP50
VSS_NCTF_31
C10
TP24
IbexPeak-M_R1P0

+3V_S5 R314 SW@10K_4 BOARD_ID0 R307 IV@10K_4

dGPU_PRSNT# R344 SW@10K_4

dGPU always exist

Integrated Clock Chip Enable


High = SG
BOARD_ID0
Low = UMA
High = Disable
A RSV_GPIO8 A
Low = Enable

Quanta Computer Inc.


PROJECT :ZQ3
Size Document Number Rev
1A
IBEX PEAK-M 4/6
Date: Monday, March 29, 2010 Sheet 11 of 47
5 4 3 2 1
5 4 3 2 1

VCCADAC= 69mA(15mils)
PCH5(CLG) U43G POWER
+1.05V R560 *0/short_8 +1.05V_VCCCORE_ICH AB24 AE50 +VCCA_DAC_1_2 L26 +3V
R551 *0/short_8 VCCCORE[1] VCCADAC[1] BKP1608HS181T/1.5A/180ohm_6
AB26
VCCCORE[2]
AB28 AE52
C461 1u/10V_4 VCCCORE[3] VCCADAC[2] C417 C415 C419
VCCCORE(+1.05V) = 1.432A(80mils) AD26
VCCCORE[4]

CRT
AD28 AF53 VCCIO = 3.062A(150mils)
C471 10u/6.3V_6 AF26
VCCCORE[5]
VCCCORE[6]
VSSA_DAC[1] 10u/6.3V_6 22U/6.3V_8 0.1u/16V_4 VCCACLK= 52mA(15mils) U43J POWER

VCC CORE
AF28 AF51
VCCCORE[7] VSSA_DAC[2] L41 *10uH/100mA_8 +V1.1LAN_VCCA_CLK
AF30 +1.05V AP51 V24 +1.05V
VCCCORE[8] R302 *0/short_4 C662 *10u/6.3V_6 VCCACLK[1] VCCIO[5]
AF31 V26
IBEX PEAK-M (POWER) AH26
AH28
VCCCORE[9]
VCCCORE[10]
VCCALVDS= 1mA
+3V
VCCLAN = 320mA(30mils)
C666 *1u/6.3V_4 AP53
VCCACLK[2]
VCCIO[6]
VCCIO[7]
Y24
Y26
C469 1u/10V_4
VCCSUS3_3 = 0.163A(20mils)
VCCCORE[11] VCCIO[8]
AH30
VCCCORE[12] C446 R316 *0_6 +1.05V_VCCAUX +3V_S5_VCCPSUS R365 *0/short_6
AH31 AH38 +1.05V AF23 V28 +3V_S5
D VCCCORE[13] VCCALVDS 0.1u/16V_4 VCCLAN[1] VCCSUS3_3[1] D
AJ30 U28
VCCCORE[14] VCCSUS3_3[2] C497 C468 C463
AJ31 AH39 AF24 U26
VCCCORE[15] VSSA_LVDS R321 VCCLAN[2] VCCSUS3_3[3]
U24
VCCSUS3_3[4] 0.1u/16V_4
VCCTX_LVDS= 59mA(15mils) 0_4 VCCSUS3_3[5]
P28
AP43 VCCTX_LVDS L27 +1.8V TP_PCH_VCCDSW Y20 P26 0.022u/16V_4 0.1u/16V_4
VCCTX_LVDS[1] 0.1uH/250mA_8 DCPSUSBYP VCCSUS3_3[6]
AP45 N28
VCCTX_LVDS[2] C425 C427 C422 C473 VCCSUS3_3[7]
AT46 N26

LVDS
VCCTX_LVDS[3] VCCSUS3_3[8]
+1.05V AK24 AT45 AD38 M28
VCCIO[24] VCCTX_LVDS[4] 0.1u/16V_4 0.1u/16V_4 VCCME[1] VCCSUS3_3[9]
M26
0.01u/25V_4 10u/6.3V_6 VCCSUS3_3[10]
AD39 L28

USB
L36 *1uH/25mA_6 +V1.1LAN_VCCAPLL_EXP VCCME[2] VCCSUS3_3[11]
40mA(15mils) +1.05V BJ24 L26
VCCAPLLEXP VCCSUS3_3[12]
AB34 AD41 J28
C470 *10u/6.3V_6 VCC3_3[2] VCCME[3] VCCSUS3_3[13]
J26
VCCSUS3_3[14]
AN20
VCCIO[25] VCC3_3[3]
AB35 VCC3_3 = 357mA(30mils) AF43
VCCME[4] VCCSUS3_3[15]
H28
AN22 H26

HVCMOS
VCCIO[26] +3V_VCC_GIO R294 *0/short_4 VCCSUS3_3[16]
AN23 AD35 +3V VCCME(+1.05V) = 1.849A(100mils) AF41 G28
VCCIO[27] VCC3_3[4] VCCME[5] VCCSUS3_3[17]
AN24 G26
VCCIO[28] C438 R272 *0/short_8 +1.05V_VCCEPW VCCSUS3_3[18]
VCCIO = 3.062A(150mils) AN26 +1.05V AF42 F28
VCCIO[29] VCCME[6] VCCSUS3_3[19]
AN28 F26
VCCIO[30] 0.1u/16V_4 R266 *0/short_8 C416 22u/6.3V_8 VCCSUS3_3[20]
+1.05V BJ26 V39 E28
VCCIO[31] VCCME[7] VCCSUS3_3[21]

Clock and Miscellaneous


BJ28 E26
VCCIO[32] C441 22u/6.3V_8 VCCSUS3_3[22]
AT26 V41 C28
VCCIO[33] VCCME[8] VCCSUS3_3[23]
AT28 C26
VCCIO[34] C447 1u/10V_4 VCCSUS3_3[24]
AU26 V42 B27
C472 1u/10V_4 VCCIO[35] VCCME[9] VCCSUS3_3[25]
AU28
VCCIO[36]
VCCVRM= 196mA(15mils) VCCSUS3_3[26]
A28
AV26 C455 1u/10V_4 Y39 A26
C458 1u/10V_4 VCCIO[37] VCCME[10] VCCSUS3_3[27]
AV28 AT24 +V1.5S_1.8S
VCCIO[38] VCCVRM[2]
AW26 Y41 U23
C457 1u/10V_4 VCCIO[39] VCCME[11] VCCSUS3_3[28]
AW28
VCCIO[40]

DMI
BA26 AT16 +VCCDM R331 *0/short_4 +1.1V_VTT VCCDMI= 61mA(15mils) Y42 V23 +1.05V
C466 1u/10V_4 VCCIO[41] VCCDMI[1] VCCME[12] VCCIO[56]
BA28 V5REF_SUS< 1mA
VCCIO[42] R265 100/F_4
BB26 AU16 F24 +5V_S5
C C751 10u/6.3V_6 VCCIO[43] VCCDMI[2] V5REF_SUS C
BB28
VCCIO[44] +VCCRTCEXT C414 D9 RB500V-40
BC26 V9 +3V_S5
VCCIO[45] DCPRTC

PCI E*
BC28 C487 C494 0.1u/16V_4 1u/16V_6
VCCIO[46] 1u/10V_4
BD26 V5REF< 1mA
VCCIO[47] R259 100/F_4
BD28 K49 +5V
VCCIO[48] V5REF
BE26 AM16 +V1.5S_1.8S AU24

PCI/GPIO/LPC
VCCIO[49] VCCPNAND[1] VCCVRM[3] D8 RB500V-40
BE28
VCCIO[50] VCCPNAND[2]
AK16 VCCPNAND= 156mA(15mils) +3V
BG26 AK20 J38 C412
VCCIO[51] VCCPNAND[3] VCCPNAND R613 *0/short_8 VCC3_3[8] 1u/16V_6
BG28 AK19 +1.8V BB51
VCCIO[52] VCCPNAND[4] +V1.1LAN_VCCA_A_DPL VCCADPLLA[1]
BH27
VCCIO[53] VCCPNAND[5]
AK15 68mA(15mils) BB53
VCCADPLLA[2] VCC3_3[9]
L38
AK13 C482
VCCPNAND[6] +3V_VCCPPCI R300 *0/short_4
AN30 AM12 M36 +3V
VCCIO[54] VCCPNAND[7] VCC3_3[10]

NAND / SPI
VRM enable by strap pin GPIO27 AN31 AM13 0.1u/16V_4 69mA(15mils) +V1.1LAN_VCCA_B_DPL BD51
VCCIO[55] VCCPNAND[8] VCCADPLLB[1]
which supply clean 1.05V for AM15 BD53 N36 VCC3_3 = 0.357A(30mils)
VCCPNAND[9] VCCADPLLB[2] VCC3_3[11]
[VCCACLK,VCCAPLLEXP,VCCFDIPLL,VCCSATAPLL] +3V_VCC_GIO AN35
VCC3_3[1] +1.05V AH23
VCCIO[21] VCC3_3[12]
P36 C452
AJ35 0.1u/16V_4
VCCIO[22]
VCCIO = 3.062A(150mils) AH35
VCCIO[23] VCC3_3[13]
U35
37mA(15mils) +V1.5S_1.8S AT22 C467 1u/10V_4
VCCVRM[1] C454 1u/10V_4
VCCME3_3= 85mA(15mils) AF34
VCCIO[2]
+1.05V L37 *1uH/25mA_6 +V1.1LAN_VCCAPLL_FDI BJ18 AM8 C478 1u/10V_4 AD13 +3V
VCCFDIPLL VCCME3_3[1] +3V_VCCME_SPI R339 *0/short_6 VCC3_3[14]
AM9 +3V AH34
VCCME3_3[2] VCCIO[3]
FDI

+1.05V AM23 AP11 C428


C476 VCCIO[1] VCCME3_3[3] C490 0.1u/16V_4
AP9 AF32 31mA(15mils)
*10u/6.3V_6 VCCME3_3[4] VCCIO[4]
AK3
0.1u/16V_4 +VCCSST VCCSATAPLL[1] +V1.1LAN_VCCAPLL L56 *10uH/100mA_8
V12 AK1 +1.05V
C491 0.1u/16V_4 DCPSST VCCSATAPLL[2]
IbexPeak-M_R1P0 C770 C771
*1u/6.3V_4 *10u/6.3V_6 VCCIO = 3.062A(150mils)
+V1.1LAN_INT_VCCSUS Y22
C477 0.1u/16V_4 DCPSUS
AH22 +1.05V
VCCIO[9]
B VCCSUS3_3 = 163mA(20mils) B
P18 AT20 +V1.5S_1.8S
+3V_S5_VCCPSUS VCCSUS3_3[29] VCCVRM[4] C475
U19 1u/10V_4

SATA
VCCSUS3_3[30]

PCI/GPIO/LPC
VCCVRM=196mA(15mils) HDA_SYNC (PCH strap pin) VCCIO[10]
AH19
C464 0.1u/16V_4 U20
R325 *0/short_6 VCCSUS3_3[31]
+1.8V +V1.5S_1.8S Internal weak pull-down AD20
VCCIO[11]
VCCVRM=>+1.8V (default) U22
VCCSUS3_3[32]
external pull-up AF22
C474 C479 VCCIO[12]
VCC3_3 = 0.357A(30mils)
0.1u/16V_4 0.1u/16V_4 VCCVRM=>+1.5V AD19
R359 *0/short_6 +3V_VCCPCORE VCCIO[13]
+3V V15 AF20
VCC3_3[5] VCCIO[14]
AF19
C481 VCCIO[15]
V16 AH20
VCC3_3[6] VCCIO[16]
0.1u/16V_4 Y16 AB19
VCC3_3[7] VCCIO[17]
AB20
VCCIO[18]
AB22
VCCIO[19]
V_CPU_IO >1mA(15mils) AD22
R334 *0/short_6 +VTT_VCCPCPU VCCIO[20]
+1.1V_VTT AT18
V_CPU_IO[1]
VCCME = 1.849A(100mils)
L42 10uH/100mA_8 +V1.1LAN_VCCA_A_DPL AA34 +1.05V_VCCEPW

CPU
+1.05V VCCME[13]
C493 4.7u/10V_8 Y34
C659 + C486 0.1u/16V_4 VCCME[14]
B test move 1u cap at check list AU18
V_CPU_IO[2] VCCME[15]
Y35
220u/2.5V_3528 C667 C485 0.1u/16V_4 AA35
1u/10V_4 VCCME[16]
VCCRTC= 2mA(15mils)

RTC
+VCCRTC A12 L30 +V3.3A_1.5A_HDA_IO R253 *0/short_4 +3V_S5
VCCRTC VCCSUSHDA

HDA
L45 10uH/100mA_8 +V1.1LAN_VCCA_B_DPL
C760 C766 VCCSUSHDA= 6mA(15mils)
+ IbexPeak-M_R1P0 C460
C698 C701 B test move 1u cap at check list 0.1u/16V_4 0.1u/16V_4 1u/10V_4
220u/2.5V_3528 1u/10V_4
A A

Quanta Computer Inc.


PROJECT : ZQ3
Size Document Number Rev
1A
IBEX PEAK-M 5/6
Date: Monday, March 29, 2010 Sheet 12 of 47
5 4 3 2 1
5 4 3 2 1

PCH6(CLG)

U43I
AY7 H49
IBEX PEAK-M (GND) B11
B15
VSS[159]
VSS[160]
VSS[259]
VSS[260] H5
J24
VSS[161] VSS[261]
D B19 VSS[162] VSS[262] K11 D
B23 VSS[163] VSS[263] K43
B31 VSS[164] VSS[264] K47
B35 VSS[165] VSS[265] K7
B39 VSS[166] VSS[266] L14
B43 VSS[167] VSS[267] L18
B47 VSS[168] VSS[268] L2
B7 VSS[169] VSS[269] L22
BG12 VSS[170] VSS[270] L32
BB12 VSS[171] VSS[271] L36
U43H BB16 L40
VSS[172] VSS[272]
AB16 VSS[0] BB20 VSS[173] VSS[273] L52
BB24 VSS[174] VSS[274] M12
AA19 VSS[1] VSS[80] AK30 BB30 VSS[175] VSS[275] M16
AA20 VSS[2] VSS[81] AK31 BB34 VSS[176] VSS[276] M20
AA22 VSS[3] VSS[82] AK32 BB38 VSS[177] VSS[277] N38
AM19 VSS[4] VSS[83] AK34 BB42 VSS[178] VSS[278] M34
AA24 VSS[5] VSS[84] AK35 BB49 VSS[179] VSS[279] M38
AA26 VSS[6] VSS[85] AK38 BB5 VSS[180] VSS[280] M42
AA28 VSS[7] VSS[86] AK43 BC10 VSS[181] VSS[281] M46
AA30 VSS[8] VSS[87] AK46 BC14 VSS[182] VSS[282] M49
AA31 VSS[9] VSS[88] AK49 BC18 VSS[183] VSS[283] M5
AA32 VSS[10] VSS[89] AK5 BC2 VSS[184] VSS[284] M8
AB11 VSS[11] VSS[90] AK8 BC22 VSS[185] VSS[285] N24
AB15 VSS[12] VSS[91] AL2 BC32 VSS[186] VSS[286] P11
AB23 VSS[13] VSS[92] AL52 BC36 VSS[187] VSS[287] AD15
AB30 VSS[14] VSS[93] AM11 BC40 VSS[188] VSS[288] P22
AB31 VSS[15] VSS[94] BB44 BC44 VSS[189] VSS[289] P30
AB32 VSS[16] VSS[95] AD24 BC52 VSS[190] VSS[290] P32
AB39 VSS[17] VSS[96] AM20 BH9 VSS[191] VSS[291] P34
AB43 VSS[18] VSS[97] AM22 BD48 VSS[192] VSS[292] P42
AB47 VSS[19] VSS[98] AM24 BD49 VSS[193] VSS[293] P45
C C
AB5 VSS[20] VSS[99] AM26 BD5 VSS[194] VSS[294] P47
AB8 VSS[21] VSS[100] AM28 BE12 VSS[195] VSS[295] R2
AC2 VSS[22] VSS[101] BA42 BE16 VSS[196] VSS[296] R52
AC52 VSS[23] VSS[102] AM30 BE20 VSS[197] VSS[297] T12
AD11 VSS[24] VSS[103] AM31 BE24 VSS[198] VSS[298] T41
AD12 VSS[25] VSS[104] AM32 BE30 VSS[199] VSS[299] T46
AD16 VSS[26] VSS[105] AM34 BE34 VSS[200] VSS[300] T49
AD23 VSS[27] VSS[106] AM35 BE38 VSS[201] VSS[301] T5
AD30 VSS[28] VSS[107] AM38 BE42 VSS[202] VSS[302] T8
AD31 VSS[29] VSS[108] AM39 BE46 VSS[203] VSS[303] U30
AD32 VSS[30] VSS[109] AM42 BE48 VSS[204] VSS[304] U31
AD34 VSS[31] VSS[110] AU20 BE50 VSS[205] VSS[305] U32
AU22 VSS[32] VSS[111] AM46 BE6 VSS[206] VSS[306] U34
AD42 VSS[33] VSS[112] AV22 BE8 VSS[207] VSS[307] P38
AD46 VSS[34] VSS[113] AM49 BF3 VSS[208] VSS[308] V11
AD49 VSS[35] VSS[114] AM7 BF49 VSS[209] VSS[309] P16
AD7 VSS[36] VSS[115] AA50 BF51 VSS[210] VSS[310] V19
AE2 VSS[37] VSS[116] BB10 BG18 VSS[211] VSS[311] V20
AE4 VSS[38] VSS[117] AN32 BG24 VSS[212] VSS[312] V22
AF12 VSS[39] VSS[118] AN50 BG4 VSS[213] VSS[313] V30
Y13 VSS[40] VSS[119] AN52 BG50 VSS[214] VSS[314] V31
AH49 VSS[41] VSS[120] AP12 BH11 VSS[215] VSS[315] V32
AU4 VSS[42] VSS[121] AP42 BH15 VSS[216] VSS[316] V34
AF35 VSS[43] VSS[122] AP46 BH19 VSS[217] VSS[317] V35
AP13 VSS[44] VSS[123] AP49 BH23 VSS[218] VSS[318] V38
AN34 VSS[45] VSS[124] AP5 BH31 VSS[219] VSS[319] V43
AF45 VSS[46] VSS[125] AP8 BH35 VSS[220] VSS[320] V45
AF46 VSS[47] VSS[126] AR2 BH39 VSS[221] VSS[321] V46
AF49 VSS[48] VSS[127] AR52 BH43 VSS[222] VSS[322] V47
AF5 VSS[49] VSS[128] AT11 BH47 VSS[223] VSS[323] V49
AF8 VSS[50] VSS[129] BA12 BH7 VSS[224] VSS[324] V5
B AG2 AH48 C12 V7 B
VSS[51] VSS[130] VSS[225] VSS[325]
AG52 VSS[52] VSS[131] AT32 C50 VSS[226] VSS[326] V8
AH11 VSS[53] VSS[132] AT36 D51 VSS[227] VSS[327] W2
AH15 VSS[54] VSS[133] AT41 E12 VSS[228] VSS[328] W52
AH16 VSS[55] VSS[134] AT47 E16 VSS[229] VSS[329] Y11
AH24 VSS[56] VSS[135] AT7 E20 VSS[230] VSS[330] Y12
AH32 VSS[57] VSS[136] AV12 E24 VSS[231] VSS[331] Y15
AV18 VSS[58] VSS[137] AV16 E30 VSS[232] VSS[332] Y19
AH43 VSS[59] VSS[138] AV20 E34 VSS[233] VSS[333] Y23
AH47 VSS[60] VSS[139] AV24 E38 VSS[234] VSS[334] Y28
AH7 VSS[61] VSS[140] AV30 E42 VSS[235] VSS[335] Y30
AJ19 VSS[62] VSS[141] AV34 E46 VSS[236] VSS[336] Y31
AJ2 VSS[63] VSS[142] AV38 E48 VSS[237] VSS[337] Y32
AJ20 VSS[64] VSS[143] AV42 E6 VSS[238] VSS[338] Y38
AJ22 VSS[65] VSS[144] AV46 E8 VSS[239] VSS[339] Y43
AJ23 VSS[66] VSS[145] AV49 F49 VSS[240] VSS[340] Y46
AJ26 VSS[67] VSS[146] AV5 F5 VSS[241] VSS[341] P49
AJ28 VSS[68] VSS[147] AV8 G10 VSS[242] VSS[342] Y5
AJ32 VSS[69] VSS[148] AW14 G14 VSS[243] VSS[343] Y6
AJ34 VSS[70] VSS[149] AW18 G18 VSS[244] VSS[344] Y8
AT5 VSS[71] VSS[150] AW2 G2 VSS[245] VSS[345] P24
AJ4 VSS[72] VSS[151] BF9 G22 VSS[246] VSS[346] T43
AK12 VSS[73] VSS[152] AW32 G32 VSS[247] VSS[347] AD51
AM41 VSS[74] VSS[153] AW36 G36 VSS[248] VSS[348] AT8
AN19 VSS[75] VSS[154] AW40 G40 VSS[249] VSS[349] AD47
AK26 VSS[76] VSS[155] AW52 G44 VSS[250] VSS[350] Y47
AK22 VSS[77] VSS[156] AY11 G52 VSS[251] VSS[351] AT12
AK23 VSS[78] VSS[157] AY43 AF39 VSS[252] VSS[352] AM6
AK28 VSS[79] VSS[158] AY47 H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
IbexPeak-M_R1P0 H30 AK45
VSS[255] VSS[355]
A H34 VSS[256] VSS[356] AK39 A
H38 VSS[257] VSS[366] AV14
H42 VSS[258]

IbexPeak-M_R1P0
Quanta Computer Inc.
PROJECT :ZQ3
Size Document Number Rev
1A
IBEX PEAK-M 6/6
Date: Monday, March 29, 2010 Sheet 13 of 47
5 4 3 2 1
5 4 3 2 1

DDR_STD(DDR) +1.5V_SUS
JDIM1B
JDIM1A M_A_DQ[63:0] (5)
(5) M_A_A[15:0] 75 VDD1 VSS16 44
M_A_A0 98 5 M_A_DQ5 76 48
M_A_A1 A0 DQ0 M_A_DQ4 VDD2 VSS17
97 A1 DQ1 7 81 VDD3 VSS18 49
M_A_A2 96 15 M_A_DQ2 82 54
M_A_A3 A2 DQ2 M_A_DQ3 VDD4 VSS19
95 A3 DQ3 17 87 VDD5 VSS20 55
M_A_A4 92 4 M_A_DQ0 88 60
M_A_A5 A4 DQ4 M_A_DQ1 VDD6 VSS21
91 A5 DQ5 6 93 VDD7 VSS22 61
M_A_A6 90 16 M_A_DQ7 94 65
M_A_A7 86
A6 DQ6
18 M_A_DQ6
2.48A 99
VDD8 VSS23
66
M_A_A8 A7 DQ7 M_A_DQ8 VDD9 VSS24
D 89 A8 DQ8 21 100 VDD10 VSS25 71 D
M_A_A9 85 23 M_A_DQ9 105 72
M_A_A10 A9 DQ9 M_A_DQ11 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


107 A10/AP DQ10 33 106 VDD12 VSS27 127
M_A_A11 84 35 M_A_DQ14 111 128
M_A_A12 A11 DQ11 M_A_DQ13 VDD13 VSS28
83 A12/BC# DQ12 22 112 VDD14 VSS29 133
M_A_A13 119 24 M_A_DQ12 117 134
M_A_A14 A13 DQ13 M_A_DQ15 VDD15 VSS30
80 A14 DQ14 34 118 VDD16 VSS31 138
M_A_A15 78 36 M_A_DQ10 123 139
A15 DQ15 M_A_DQ20 VDD17 VSS32

PC2100 DDR3 SDRAM SO-DIMM


DQ16 39 124 VDD18 VSS33 144
109 41 M_A_DQ21 145
(5) M_A_BS#0 BA0 DQ17 VSS34
108 51 M_A_DQ19 199 150
(5) M_A_BS#1 BA1 DQ18 +3V VDDSPD VSS35
79 53 M_A_DQ23 151
(5) M_A_BS#2 BA2 DQ19 VSS36
114 40 M_A_DQ17 77 155
(5) M_A_CS#0 S0# DQ20 NC1 VSS37
121 42 M_A_DQ16 122 156
(5) M_A_CS#1 S1# DQ21 NC2 VSS38
101 50 M_A_DQ22 R245 *10K_4 125 161
(5) M_A_CLKP0 CK0 DQ22 +3V NCTEST VSS39
103 52 M_A_DQ18 162
(5) M_A_CLKN0 CK0# DQ23 VSS40
102 57 M_A_DQ28 198 167
(5) M_A_CLKP1 CK1 DQ24 (4) PM_EXTTS#0 EVENT# VSS41
104 59 M_A_DQ25 30 168
(5) M_A_CLKN1 CK1# DQ25 (15,31) DDR3_DRAMRST# RESET# VSS42
73 67 M_A_DQ31 172
(5) M_A_CKE0 CKE0 DQ26 0831:Remove M2 CKT. VSS43
74 69 M_A_DQ27 173
(5) M_A_CKE1 CKE1 DQ27 VSS44
115 56 M_A_DQ29 +SMDDR_VREF_DQ0 1 178
(5) M_A_CAS# CAS# DQ28 (31) +SMDDR_VREF_DQ0 VREF_DQ VSS45
110 58 M_A_DQ24 +SMDDR_VREF R138 *M1@0/short_6 +SMDDR_VREF_DIMM 126 179
(5) M_A_RAS# RAS# DQ29 VREF_CA VSS46
113 68 M_A_DQ26 R139 *M3@0_6 184
(5) M_A_WE# WE# DQ30 (7,31) VREF_DQ_DIMM0 VSS47
R241 10K_4 DIMM0_SA0 197 70 M_A_DQ30 185
10K_4 DIMM0_SA1 SA0 DQ31 M_A_DQ32 VSS48
201 SA1 DQ32 129 2 VSS1 VSS49 189
R244 CLK_SCLK 202 131 M_A_DQ33 3 190
(3,15,28) CLK_SCLK CLK_SDATA SCL DQ33 M_A_DQ35 VSS2 VSS50
200 141 8 195

(204P)
(3,15,28) CLK_SDATA SDA DQ34 M_A_DQ39 VSS3 VSS51
C DQ35 143 9 VSS4 VSS52 196 C
116 130 M_A_DQ36 13
(5) M_A_ODT0 ODT0 DQ36 VSS5
120 132 M_A_DQ37 14
(5) M_A_ODT1 ODT1 DQ37 VSS6
140 M_A_DQ38 19
(5) M_A_DM[7:0] DQ38 +1.5V_SUS VSS7
M_A_DM0 11 142 M_A_DQ34 20
M_A_DM1 DM0 DQ39 M_A_DQ41 VSS8
28 DM1 DQ40 147 25 VSS9
M_A_DM2 46 149 M_A_DQ40 26 203 +0.75V_DDR_VTT
M_A_DM3 63
DM2
DM3
(204P) DQ41
DQ42 157 M_A_DQ46 31
VSS10
VSS11
VTT1
VTT2 204
M_A_DM4 136 159 M_A_DQ47 R172 32
M_A_DM5 DM4 DQ43 M_A_DQ45 *10K_4 VSS12
153 DM5 DQ44 146 37 VSS13 GND 205
M_A_DM6 170 148 M_A_DQ44 38 206
M_A_DM7 DM6 DQ45 M_A_DQ43 VSS14 GND
187 DM7 DQ46 158 43 VSS15
160 M_A_DQ42 +SMDDR_VREF R182 *0/short_6 +SMDDR_VREF_DIMM
(5) M_A_DQSP[7:0] DQ47
M_A_DQSP0 12 163 M_A_DQ53
M_A_DQSP1 DQS0 DQ48 M_A_DQ48
29 DQS1 DQ49 165 DDR3-DIMM0_H=4_Standard
M_A_DQSP2 47 175 M_A_DQ50 R187 C362
M_A_DQSP3 DQS2 DQ50 M_A_DQ51
64 DQS3 DQ51 177 *10K_4 470p/50V_4
M_A_DQSP4 137 164 M_A_DQ49
M_A_DQSP5 DQS4 DQ52 M_A_DQ52
154 DQS5 DQ53 166
M_A_DQSP6 171 174 M_A_DQ54
M_A_DQSP7 DQS6 DQ54 M_A_DQ55
(5) M_A_DQSN[7:0] 188 DQS7 DQ55 176
M_A_DQSN0 10 181 M_A_DQ56
M_A_DQSN1 DQS#0 DQ56 M_A_DQ57
27 DQS#1 DQ57 183
M_A_DQSN2 45 191 M_A_DQ58
M_A_DQSN3 DQS#2 DQ58 M_A_DQ59
62 DQS#3 DQ59 193
M_A_DQSN4 135 180 M_A_DQ60
M_A_DQSN5 DQS#4 DQ60 M_A_DQ61
152 DQS#5 DQ61 182
B M_A_DQSN6 169 192 M_A_DQ63 B
M_A_DQSN7 DQS#6 DQ62 M_A_DQ62
186 DQS#7 DQ63 194

DDR3-DIMM0_H=4_Standard

Place these Caps near So-Dimm0.

+1.5V_SUS
+SMDDR_VREF_DIMM +SMDDR_VREF_DQ0
C344 C341 C306 C314 C301
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4

C326 + 0.1u/16V_4 C358 C248 C246


C359
10u/6.3V_6 C298 0.1u/16V_4
330u/2V_7343
C293 C305 C317 C321 C300 2.2u/6.3V_6 2.2u/6.3V_6
10u/6.3V_6 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4

A A
+3V +0.75V_DDR_VTT

C399 C404 C403 C400 C396 C405 C407


C387
2.2u/6.3V_6
C397
0.1u/16V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6
Quanta Computer Inc.
PROJECT :ZQ3
Size Document Number Rev
maybe can save 1A
DDRIII SO-DIMM-0
Date: Monday, March 29, 2010 Sheet 14 of 47
5 4 3 2 1
5 4 3 2 1

DDR_STD(DDR) +1.5V_SUS
JDIM2A M_B_DQ[63:0] (5) JDIM2B
(5) M_B_A[15:0]
M_B_A0 98 5 M_B_DQ5 75 44
M_B_A1 A0 DQ0 M_B_DQ4 VDD1 VSS16
97 A1 DQ1 7 76 VDD2 VSS17 48
M_B_A2 96 15 M_B_DQ7 81 49
M_B_A3 A2 DQ2 M_B_DQ3 VDD3 VSS18
95 A3 DQ3 17 82 VDD4 VSS19 54
M_B_A4 92 4 M_B_DQ1 87 55
M_B_A5 A4 DQ4 M_B_DQ0 VDD5 VSS20
91 A5 DQ5 6 88 VDD6 VSS21 60
M_B_A6 90 16 M_B_DQ2 93 61
M_B_A7 A6 DQ6 M_B_DQ6 VDD7 VSS22
86 A7 DQ7 18 94 VDD8 VSS23 65
M_B_A8 89 21 M_B_DQ12 99 66
D
M_B_A9 85
A8 DQ8
23 M_B_DQ13
2.48A 100
VDD9 VSS24
71
D

M_B_A10 A9 DQ9 M_B_DQ11 VDD10 VSS25


107 A10/AP DQ10 33 105 VDD11 VSS26 72
M_B_A11 M_B_DQ14

PC2100 DDR3 SDRAM SO-DIMM


84 A11 DQ11 35 106 VDD12 VSS27 127
M_B_A12 83 22 M_B_DQ8 111 128
M_B_A13 A12/BC# DQ12 M_B_DQ9 VDD13 VSS28
119 A13 DQ13 24 112 VDD14 VSS29 133
M_B_A14 80 34 M_B_DQ15 117 134
M_B_A15 A14 DQ14 M_B_DQ10 VDD15 VSS30
78 A15 DQ15 36 118 VDD16 VSS31 138
M_B_DQ17

PC2100 DDR3 SDRAM SO-DIMM


DQ16 39 123 VDD17 VSS32 139
109 41 M_B_DQ20 124 144
(5) M_B_BS#0 BA0 DQ17 VDD18 VSS33
108 51 M_B_DQ19 145
(5) M_B_BS#1 BA1 DQ18 VSS34
79 53 M_B_DQ23 199 150
(5) M_B_BS#2 BA2 DQ19 +3V VDDSPD VSS35
114 40 M_B_DQ21 151
(5) M_B_CS#0 S0# DQ20 VSS36
121 42 M_B_DQ16 77 155
(5) M_B_CS#1 S1# DQ21 NC1 VSS37
101 50 M_B_DQ22 122 156
(5) M_B_CLKP0 CK0 DQ22 NC2 VSS38
103 52 M_B_DQ18 125 161
(5) M_B_CLKN0 CK0# DQ23 NCTEST VSS39
102 57 M_B_DQ29 R242 *10K_4 162
(5) M_B_CLKP1 CK1 DQ24 +3V VSS40
104 59 M_B_DQ28 198 167
(5) M_B_CLKN1 CK1# DQ25 (4) PM_EXTTS#1 EVENT# VSS41
73 67 M_B_DQ30 30 168
(5) M_B_CKE0 CKE0 DQ26 (14,31) DDR3_DRAMRST# RESET# VSS42
74 69 M_B_DQ31 172
(5) M_B_CKE1 CKE1 DQ27 0831:Remove M2 CKT. VSS43
115 56 M_B_DQ24 173
(5) M_B_CAS# CAS# DQ28 VSS44
110 58 M_B_DQ25 +SMDDR_VREF_DQ1 1 178
(5) M_B_RAS# RAS# DQ29 (31) +SMDDR_VREF_DQ1 VREF_DQ VSS45
113 68 M_B_DQ26 R120 *M1@0/short_6 126 179
(5) M_B_WE# WE# DQ30 +SMDDR_VREF VREF_CA VSS46
R240 10K_4 DIMM1_SA0 197 70 M_B_DQ27 R119 *M3@0_6 184
SA0 DQ31 (7,31) VREF_DQ_DIMM1 VSS47
R243 10K_4 DIMM1_SA1 201 129 M_B_DQ37 185
+3V SA1 DQ32 +SMDDR_VREF_DIMM VSS48
202 131 M_B_DQ36 2 189
(3,14,28) CLK_SCLK SCL DQ33 M_B_DQ38 VSS1 VSS49
200 SDA DQ34 141 3 VSS2 VSS50 190
(3,14,28) CLK_SDATA 143 M_B_DQ39 8 195

(204P)
C DQ35 VSS3 VSS51 C
116 130 M_B_DQ33 9 196
(5) M_B_ODT0 ODT0 DQ36 VSS4 VSS52
120 132 M_B_DQ32 13
(5) M_B_ODT1 ODT1 DQ37 VSS5
140 M_B_DQ34 14
(5) M_B_DM[7:0] DQ38 VSS6
M_B_DM0 11 142 M_B_DQ35 19
M_B_DM1 DM0 DQ39 M_B_DQ41 VSS7
28 DM1 DQ40 147 20 VSS8
M_B_DM2 46 149 M_B_DQ40 25
M_B_DM3 63
DM2
DM3
(204P) DQ41
DQ42 157 M_B_DQ46 26
VSS9
VSS10 VTT1 203 +0.75V_DDR_VTT
M_B_DM4 136 159 M_B_DQ47 31 204
M_B_DM5 DM4 DQ43 M_B_DQ44 VSS11 VTT2
153 DM5 DQ44 146 32 VSS12
M_B_DM6 170 148 M_B_DQ45 37 205
M_B_DM7 DM6 DQ45 M_B_DQ43 VSS13 GND
187 DM7 DQ46 158 38 VSS14 GND 206
160 M_B_DQ42 43
(5) M_B_DQSP[7:0] DQ47 VSS15
M_B_DQSP0 12 163 M_B_DQ52
M_B_DQSP1 DQS0 DQ48 M_B_DQ53
29 DQS1 DQ49 165
M_B_DQSP2 47 175 M_B_DQ55 DDR3-DIMM1_H=8_Standard
M_B_DQSP3 DQS2 DQ50 M_B_DQ54
64 DQS3 DQ51 177
M_B_DQSP4 137 164 M_B_DQ49
M_B_DQSP5 DQS4 DQ52 M_B_DQ48
154 DQS5 DQ53 166
M_B_DQSP6 171 174 M_B_DQ51
M_B_DQSP7 DQS6 DQ54 M_B_DQ50
(5) M_B_DQSN[7:0] 188 DQS7 DQ55 176
M_B_DQSN0 10 181 M_B_DQ56
M_B_DQSN1 DQS#0 DQ56 M_B_DQ57
27 DQS#1 DQ57 183
M_B_DQSN2 45 191 M_B_DQ62
M_B_DQSN3 DQS#2 DQ58 M_B_DQ63
62 DQS#3 DQ59 193
M_B_DQSN4 135 180 M_B_DQ60
M_B_DQSN5 DQS#4 DQ60 M_B_DQ61
152 DQS#5 DQ61 182
B M_B_DQSN6 169 192 M_B_DQ59 B
M_B_DQSN7 DQS#6 DQ62 M_B_DQ58
186 DQS#7 DQ63 194

DDR3-DIMM1_H=8_Standard

+1.5V_SUS Place these Caps near So-Dimm1.


+SMDDR_VREF_DIMM +SMDDR_VREF_DQ1
C307 C299 C350 C297 C289
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4
2.2u/6.3V_6
C291 + 0.1u/16V_4 C233 C235
C361
10u/6.3V_6 C263 C360
330u/2V_7343 2.2u/6.3V_6
C316 C336 C340 C290 C349
10u/6.3V_6 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4

+3V +0.75V_DDR_VTT

A C402 C393 C401 C392 C406 C394 C395 A


C423 C398
2.2u/6.3V_6 0.1u/16V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6

maybe can save


Quanta Computer Inc.
PROJECT :ZQ3
Size Document Number Rev
1A
DDRIII SO-DIMM-1
Date: Monday, March 29, 2010 Sheet 15 of 47
5 4 3 2 1
1 2 3 4 5 6 7 8

GPU_1(VGA) :AJ0N11P0T05
N11P GPU: :AJ0N11P0T20
N11P_A2 GPU:
PEX_IOVDD+PEX_IOVDDQ+PEX_PLLVDD >2.2A
:AJ0N11M0T07
N11M GPU: :AJ0N11M0T22
N11M_B1 GPU:
U32A
+1.05V_GFX COMMON

AK16 AP17 PEG_TXP15


~ 500mA C101
C89
SW@0.1u/10V_4
SW@0.1u/10V_4
AK17
PEX_IOVDD_1
PEX_IOVDD_2
PEX_RX0
PEX_RX0* AN17 PEG_TXN15
PEG_TXP14
PEG_TXP15 (4)
PEG_TXN15 (4) power up sequence
AK21 PEX_IOVDD_3 PEX_RX1 AN19 PEG_TXP14 (4)
C114 SW@1u/6.3V_4 AK24 AP19 PEG_TXN14 PEG_TXN14 (4)
C125 SW@1u/6.3V_4 PEX_IOVDD_4 PEX_RX1* PEG_TXP13
AK27 PEX_IOVDD_5 PEX_RX2 AR19 PEG_TXP13 (4)
A C187 SW@4.7u/6.3V_6 AR20 PEG_TXN13 PEG_TXN13 (4) A
C205 SW@4.7u/6.3V_6 PEX_RX2* PEG_TXP12
PEX_RX3 AP20 PEG_TXP12 (4)
C203 SW@10u/6.3V_8 AN20 PEG_TXN12 PEG_TXN12 (4)
PEX_RX3* PEG_TXP11
PEX_RX4 AN22 PEG_TXP11 (4)
AP22 PEG_TXN11 PEG_TXN11 (4) PXE 1.05VDD
PEX_RX4* PEG_TXP10
+1.05V_GFX AG11 PEX_IOVDDQ_1 PEX_RX5 AR22 PEG_TXP10 (4)
AG12 AR23 PEG_TXN10 PEG_TXN10 (4)
PEX_IOVDDQ_2 PEX_RX5* PEG_TXP9
AG13 AP23
1600mA C124
C88
SW@0.1u/10V_4
SW@0.1u/10V_4
AG15
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_RX6
PEX_RX6* AN23 PEG_TXN9
PEG_TXP8
PEG_TXP9 (4)
PEG_TXN9 (4)
AG16 PEX_IOVDDQ_5 PEX_RX7 AN25 PEG_TXP8 (4) I/O 3.3V
C87 SW@1u/6.3V_4 AG17 AP25 PEG_TXN8 PEG_TXN8 (4)
C138 SW@1u/6.3V_4 PEX_IOVDDQ_6 PEX_RX7* PEG_TXP7
AG18 PEX_IOVDDQ_7 PEX_RX8 AR25 PEG_TXP7 (4)
C183 SW@4.7u/6.3V_6 AG22 AR26 PEG_TXN7 PEG_TXN7 (4)
C177 SW@4.7u/6.3V_6 PEX_IOVDDQ_8 PEX_RX8* PEG_TXP6
AG23 PEX_IOVDDQ_9 PEX_RX9 AP26 PEG_TXP6 (4)
C184 SW@10u/6.3V_8 AG24 AN26 PEG_TXN6 NVCORE
Near BGA AG25
PEX_IOVDDQ_10 PEX_RX9*
AN28 PEG_TXP5
PEG_TXN6 (4)
PEX_IOVDDQ_11 PEX_RX10 PEG_TXP5 (4)
AG26 AP28 PEG_TXN5 PEG_TXN5 (4)
PEX_IOVDDQ_12 PEX_RX10* PEG_TXP4
AJ14 PEX_IOVDDQ_13 PEX_RX11 AR28 PEG_TXP4 (4)
AJ15 AR29 PEG_TXN4 PEG_TXN4 (4)
PEX_IOVDDQ_14 PEX_RX11* PEG_TXP3
AJ19 PEX_IOVDDQ_15 PEX_RX12 AP29 PEG_TXP3 (4) 1.5VFBDDQ
AJ21 AN29 PEG_TXN3 PEG_TXN3 (4)
PEX_IOVDDQ_16 PEX_RX12* PEG_TXP2
AJ22 PEX_IOVDDQ_17 PEX_RX13 AN31 PEG_TXP2 (4)
AJ24 AP31 PEG_TXN2 PEG_TXN2 (4)
PEX_IOVDDQ_18 PEX_RX13* PEG_TXP1
AJ25 PEX_IOVDDQ_19 PEX_RX14 AR31 PEG_TXP1 (4)
AJ27 AR32 PEG_TXN1 PEG_TXN1 (4)
PEX_IOVDDQ_20 PEX_RX14* PEG_TXP0
AK18 PEX_IOVDDQ_21 PEX_RX15 AR34
PEG_TXN0
PEG_TXP0 (4) NB9M: VGACORE +0.90V (Normal) , +1.09V
AK20 PEX_IOVDDQ_22 PEX_RX15* AP34 PEG_TXN0 (4)
AK23
AK26
PEX_IOVDDQ_23 NVVDD Maximum Settling Time
PEX_IOVDDQ_24 PEG_RXP15_C C131 SW@0.1u/10V_4
B AL16 PEX_IOVDDQ_25 PEX_TX0 AL17 PEG_RXP15 (4) B
+3V_GFX AM17 PEG_RXN15_C C139 SW@0.1u/10V_4 PEG_RXN15 (4)
PEX_TX0* PEG_RXP14_C C127 SW@0.1u/10V_4
C129 SW@4.7u/6.3V_6 PCI EXPRESS PEX_TX1 AM18
AM19 PEG_RXN14_C C119 SW@0.1u/10V_4
PEG_RXP14 (4)
PEG_RXN14 (4)
C148 SW@1u/6.3V_4 PEX_TX1* PEG_RXP13_C C118 SW@0.1u/10V_4
J10 VDD33_1 PEX_TX2 AL19 PEG_RXP13 (4)
C159 SW@0.1u/10V_4 J11 AK19 PEG_RXN13_C C109 SW@0.1u/10V_4 PEG_RXN13 (4)
C156 SW@0.1u/10V_4 VDD33_2 PEX_TX2* PEG_RXP12_C C108 SW@0.1u/10V_4
C143 SW@0.1u/10V_4
J12 VDD33_3 PEX_TX3 AL20
PEG_RXN12_C C103 SW@0.1u/10V_4
PEG_RXP12 (4) NVVDD
J13 VDD33_4 PEX_TX3* AM20 PEG_RXN12 (4)
J9 AM21 PEG_RXP11_C C102 SW@0.1u/10V_4 PEG_RXP11 (4)
VDD33_5 PEX_TX4 PEG_RXN11_C C95 SW@0.1u/10V_4
PEX_TX4* AM22 PEG_RXN11 (4)
10/20 add T7 AD20 AL22 PEG_RXP10_C C94 SW@0.1u/10V_4 PEG_RXP10 (4)
VDD_SENSE PEX_TX5 PEG_RXN10_C C85 SW@0.1u/10V_4
T2 D35 NC_9/ VDD_SENSE PEX_TX5* AK22 PEG_RXN10 (4)
T9 P7 AL23 PEG_RXP9_C C81 SW@0.1u/10V_4 PEG_RXP9 (4)
NC_16/ VDD_SENSE PEX_TX6 PEG_RXN9_C C84 SW@0.1u/10V_4
PEX_TX6* AM23 PEG_RXN9 (4)
AM24 PEG_RXP8_C C76 SW@0.1u/10V_4
12~16 mils width 110mA +1.05V_GFX AD19 GND_SENSE
PEX_TX7
PEX_TX7* AM25 PEG_RXN8_C C79 SW@0.1u/10V_4
PEG_RXP8 (4)
PEG_RXN8 (4)
E35 AL25 PEG_RXP7_C C73 SW@0.1u/10V_4 PEG_RXP7 (4)
C174 SW@1u/6.3V_4 NC_10/ GND_SENSE PEX_TX8 PEG_RXN7_C C68 SW@0.1u/10V_4
R7 NC_17/ GND_SENSE PEX_TX8* AK25 PEG_RXN7 (4)
C100 SW@1u/6.3V_4 AL26 PEG_RXP6_C C64 SW@0.1u/10V_4 PEG_RXP6 (4) GPIO
L4 PEX_TX9 PEG_RXN6_C C59 SW@0.1u/10V_4
PEX_TX9* AM26 PEG_RXN6 (4)
SW@100nH/400mA_6 AM27 PEG_RXP5_C C57 SW@0.1u/10V_4 PEG_RXP5 (4)
C130 SW@1u/6.3V_4 +PEX_PLLVDD PEX_TX10 PEG_RXN5_C C58 SW@0.1u/10V_4
AG14 PEX_PLLVDD PEX_TX10* AM28 PEG_RXN5 (4)
C149 SW@4.7u/6.3V_6 AL28 PEG_RXP4_C C56 SW@0.1u/10V_4 PEG_RXP4 (4)
PEX_TX11 PEG_RXN4_C C55 SW@0.1u/10V_4
PEX_TX11* AK28 PEG_RXN4 (4)
10/20 del C3553,C3554 AK29 PEG_RXP3_C C53 SW@0.1u/10V_4 PEG_RXP3 (4) tsNVVDD<= 192us
PEX_TX12 PEG_RXN3_C C54 SW@0.1u/10V_4
AL29
12~16 mils width PEX_TX12*
PEX_TX13 AM29 PEG_RXP2_C
PEG_RXN2_C
C52
C50
SW@0.1u/10V_4
SW@0.1u/10V_4
PEG_RXN3 (4)
PEG_RXP2 (4)
PEX_TX13* AM30 PEG_RXN2 (4)
+3V_GFX L11 SW@0_6 +PEX_SVDD_3V3 AG19 AM31 PEG_RXP1_C C44 SW@0.1u/10V_4 PEG_RXP1 (4)
PEX_CAL_PD_VDDQ/ PEX_SVDD_3V3 PEX_TX14 PEG_RXN1_C C43 SW@0.1u/10V_4
C F7 NC_12/ PEX_SVDD_3V3 PEX_TX14* AM32 PEG_RXN1 (4) C
10/20 Modify to 1uF AN32 PEG_RXP0_C C47 SW@0.1u/10V_4 PEG_RXP0 (4)
C113 SW@1u/6.3V_4 PEX_TX15 PEG_RXN0_C C48 SW@0.1u/10V_4
PEX_TX15* AP32 PEG_RXN0 (4)

C176 SW@0.1u/10V_4 AG20 AR16


C178 SW@4.7u/6.3V_6 A2
PEX_CAL_PU_GND/ NC PEX_REFCLK
AR17
CLK_PCIE_VGAP
CLK_PCIE_VGAN
(10)
(10)
PEX_RST timing
NC_1 PEX_REFCLK* R416 SW@100K_4
AB7 NC_2
AD6 NC_3
AF6 AJ17 PEX_TSTCLK R40 *SW@200_4
NC_4 PEX_TSTCLK_OUT PEX_TSTCLK#
AG6 NC_5 PEX_TSTCLK_OUT* AJ18
AJ5 R417 SW@0_4 GPU_RST# (11) I/O 3.3V
NC_6
AK15 NC_7
AL7 AM16 VGA_RST# R415 *SW@0_4 PLTRST# (4,10,11,25,26,28,31,34)
+1.05V_GFX NC_8 PEX_RST*
E7 NC_11 PEX_RST
H32 AR13 PEX_CLKREQ# R423 SW@10K/F_4 +3V_GFX
NC_13 PEX_CLKREQ*
M7 NC_14
C204 SW@0.1u/10V_4 P6 AG21 PEX_TERMP R38 SW@2.49K/F_4
C211 SW@0.1u/10V_4 NC_15 PEX_TERMP
U7 NC_18 SW@10K/F_4
R450 un-mount for switchable function
C210 SW@0.1u/10V_4 V6 AP35 TESTMODE R28 Trise >= 1uS Tfail <=500nS
C186 SW@0.1u/10V_4 NC_19 TESTMODE
C185 SW@0.1u/10V_4 CSP@N11P-GE1-A3 R25 *SW@10K/F_4
+3V_GFX
1211 for Nvidia request
+3V_GFX
add transition cap Only for Hybrid R232 SW@10K/F_4 +3V_S5

PEG_CLKREQ# (10)
R211

3
D SW@10K/F_4 D

2 Q18
SW@DTC144EUA
3

PEX_CLKREQ# 2 Q16
SW@DTC144EUA Quanta Computer Inc.
PROJECT : ZQ3
1

Size Document Number Rev


1A
N11P-GE (PCIE I/F) 1/5
Date: Monday, March 29, 2010 Sheet 16 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

GPU_2(VGA) (21) VMA_DQ[63..0]

U32B (21) VMA_DM[7..0] U32C


12/02 modify
fcbga973-nvidia-n11p-es-a1 fcbga973-nvidia-n11p-es-a1
COMMON package for N10 (21) VMA_WDQS[7..0] COMMON
12/02 modify
(21) VMA_CMD0 V32 (21) VMA_RDQS[7..0] (22) VMC_CMD0 C17 B13 VMC_DQ0 package for N10
FBA_CMD0 VMA_DQ0 FBC_CMD0 FBC_D00 VMC_DQ1
(21) VMA_CMD1 W31 FBA_CMD1 FBA_D00 L32 (22) VMC_CMD1 B19 FBC_CMD1 FBC_D01 D13
(21) VMA_CMD2 U31 N33 VMA_DQ1 (22) VMC_DQ[63..0] (22) VMC_CMD2 D18 A13 VMC_DQ2
FBA_CMD2 FBA_D01 VMA_DQ2 FBC_CMD2 FBC_D02 VMC_DQ3
(21) VMA_CMD3 Y32 FBA_CMD3 FBA_D02 L33 (22) VMC_CMD3 F21 FBC_CMD3 FBC_D03 A14
(21) VMA_CMD4 AB35 N34 VMA_DQ3 (22) VMC_DM[7..0] (22) VMC_CMD4 A23 C16 VMC_DQ4
FBA_CMD4 FBA_D03 VMA_DQ4 FBC_CMD4 FBC_D04 VMC_DQ5
(21) VMA_CMD5 AB34 FBA_CMD5 FBA_D04 N35 (22) VMC_CMD5 D21 FBC_CMD5 FBC_D05 B16
(21) VMA_CMD6 W35 P35 VMA_DQ5 (22) VMC_WDQS[7..0] (22) VMC_CMD6 B23 A17 VMC_DQ6
FBA_CMD6 FBA_D05 VMA_DQ6 FBC_CMD6 FBC_D06 VMC_DQ7
A (21) VMA_CMD7 W33 FBA_CMD7 FBA_D06 P33 (22) VMC_CMD7 E20 FBC_CMD7 FBC_D07 D16 A
(21) VMA_CMD8 W30 P34 VMA_DQ7 (22) VMC_RDQS[7..0] (22) VMC_CMD8 G21 C13 VMC_DQ8
FBA_CMD8 FBA_D07 VMA_DQ8 FBC_CMD8 FBC_D08 VMC_DQ9
(21) VMA_CMD9 T34 FBA_CMD9 FBA_D08 K35 (22) VMC_CMD9 F20 FBC_CMD9 FBC_D09 B11
(21) VMA_CMD10 T35 K33 VMA_DQ9 (22) VMC_CMD10 F19 C11 VMC_DQ10
FBA_CMD10 FBA_D09 VMA_DQ10 FBC_CMD10 FBC_D10 VMC_DQ11
(21) VMA_CMD11 AB31 FBA_CMD11 FBA_D10 K34 (22) VMC_CMD11 F23 FBC_CMD11 FBC_D11 A11
(21) VMA_CMD12 Y30 H33 VMA_DQ11 (22) VMC_CMD12 A22 C10 VMC_DQ12
FBA_CMD12 FBA_D11 VMA_DQ12 FBC_CMD12 FBC_D12 VMC_DQ13
(21) VMA_CMD13 Y34 FBA_CMD13 FBA_D12 G34 (22) VMC_CMD13 C22 FBC_CMD13 FBC_D13 C8
(21) VMA_CMD14 W32 G33 VMA_DQ13 (22) VMC_CMD14 B17 B8 VMC_DQ14
VMA_CMD15 AA30 FBA_CMD14 FBA_D13 VMA_DQ14 VMC_CMD15 FBC_CMD14 FBC_D14 VMC_DQ15
T3 E34 T6 F24 A8
FBA_CMD15 FBA_D14 VMA_DQ15 FBC_CMD15 FBC_D15 VMC_DQ16
(21) VMA_CMD16 AA32 FBA_CMD16 FBA_D15 E33 (22) VMC_CMD16 C25 FBC_CMD16 FBC_D16 E8
(21) VMA_CMD17 Y33 G31 VMA_DQ16 (22) VMC_CMD17 E22 F8 VMC_DQ17
FBA_CMD17 FBA_D16 VMA_DQ17 FBC_CMD17 FBC_D17 VMC_DQ18
(21) VMA_CMD18 U32 FBA_CMD18 FBA_D17 F30 (22) VMC_CMD18 C20 FBC_CMD18 FBC_D18 F10
(21) VMA_CMD19 Y31 G30 VMA_DQ18 (22) VMC_CMD19 B22 F9 VMC_DQ19
FBA_CMD19 FBA_D18 VMA_DQ19 FBC_CMD19 FBC_D19 VMC_DQ20
(21) VMA_CMD20 U34 G32 (22) VMC_CMD20 A19 F12
FBA_CMD20 FBA_D19 VMA_DQ20 FBC_CMD20 FBC_D20 VMC_DQ21
(21) VMA_CMD21 Y35 FBA_CMD21 FBA_D20 K30 (22) VMC_CMD21 D22 FBC_CMD21 FBC_D21 D8
(21) VMA_CMD22 W34 K32 VMA_DQ21 (22) VMC_CMD22 D20 D11 VMC_DQ22
VMA_CMD23 V30 FBA_CMD22 FBA_D21 VMA_DQ22 VMC_CMD23 FBC_CMD22 FBC_D22 VMC_DQ23
T4 H30 T8 E19 E11
FBA_CMD23 FBA_D22 VMA_DQ23 FBC_CMD23 FBC_D23 VMC_DQ24
(21) VMA_CMD24 U35 FBA_CMD24 FBA_D23 K31 (22) VMC_CMD24 D19 FBC_CMD24 FBC_D24 D12
(21) VMA_CMD25 U30 L31 VMA_DQ24 (22) VMC_CMD25 F18 E13 VMC_DQ25
FBA_CMD25 FBA_D24 VMA_DQ25 FBC_CMD25 FBC_D25 VMC_DQ26
(21) VMA_CMD26 U33 L30 (22) VMC_CMD26 C19 F13
FBA_CMD26 FBA_D25 VMA_DQ26 FBC_CMD26 FBC_D26 VMC_DQ27
(21) VMA_CMD27 AB30 FBA_CMD27 FBA_D26 M32 (22) VMC_CMD27 F22 FBC_CMD27 FBC_D27 F14
(21) VMA_CMD28 AB33 N30 VMA_DQ27 (22) VMC_CMD28 C23 F15 VMC_DQ28
FBA_CMD28 FBA_D27 VMA_DQ28 FBC_CMD28 FBC_D28 VMC_DQ29
(21) VMA_CMD29 T33 FBA_CMD29 FBA_D28 M30 (22) VMC_CMD29 B20 FBC_CMD29 FBC_D29 E16
(21) VMA_CMD30 W29 P31 VMA_DQ29 (22) VMC_CMD30 A20 F16 VMC_DQ30
FBA_CMD30 FBA_D29 VMA_DQ30 FBC_CMD30 FBC_D30 VMC_DQ31
R32 F17
VMA_DM0 FBA_D30 VMA_DQ31 VMC_DM0 FBC_D31 VMC_DQ32
P32 R30 A16 D29
VMA_DM1 FBA_DQM0 FBA_D31 VMA_DQ32 VMC_DM1 FBC_DQM0 FBC_D32 VMC_DQ33
12/02 modify H34
FBA_DQM1 FBA_D32
AG30 D10
FBC_DQM1 FBC_D33
F27
package for N10 VMA_DM2 J30 AG32 VMA_DQ33 VMC_DM2 F11 F28 VMC_DQ34
VMA_DM3 FBA_DQM2 FBA_D33 VMA_DQ34 VMA_CMD25 R19 SW@10K/F_4 VMC_DM3 FBC_DQM2 FBC_D34 VMC_DQ35
P30 AH31 D15 E28
VMA_DM4 FBA_DQM3 FBA_D34 VMA_DQ35 VMC_DM4 FBC_DQM3 FBC_D35 VMC_DQ36
B AF32 AF31 D27 D26 B
VMA_DM5 FBA_DQM4 FBA_D35 VMA_DQ36 VMA_CMD16 R404 SW@10K/F_4 VMC_DM5 FBC_DQM4 FBC_D36 VMC_DQ37
AL32 AF30 D34 F25
VMA_DM6 FBA_DQM5 FBA_D36 VMA_DQ37 VMC_DM6 FBC_DQM5 FBC_D37 VMC_DQ38
AL34 FBA_DQM6 FBA_D37 AE30 A34 FBC_DQM6 FBC_D38 D24
VMA_DM7 AF35 AC32 VMA_DQ38 VMA_CMD0 R395 SW@10K/F_4 VMC_DM7 D28 E25 VMC_DQ39
FBA_DQM7 FBA_D38 VMA_DQ39 FBC_DQM7 FBC_D39 VMC_DQ40
FBA_D39 AD30 FBC_D40 E32
VMA_WDQS0 L34 AN33 VMA_DQ40 VMA_CMD27 R16 SW@10K/F_4 VMC_WDQS0 C14 F32 VMC_DQ41
VMA_WDQS1 FBA_DQS_WP0 FBA_D40 VMA_DQ41 VMC_WDQS1 FBC_DQS_WP0 FBC_D41 VMC_DQ42
H35 FBA_DQS_WP1 FBA_D41 AL31 A10 FBC_DQS_WP1 FBC_D42 D33
VMA_WDQS2 J32 AM33 VMA_DQ42 VMA_CMD28 R26 SW@10K/F_4 VMC_WDQS2 E10 E31 VMC_DQ43
VMA_WDQS3 FBA_DQS_WP2 FBA_D42 VMA_DQ43 VMC_WDQS3 FBC_DQS_WP2 FBC_D43 VMC_DQ44
N31 AL33 D14 C33
VMA_WDQS4 FBA_DQS_WP3 FBA_D43 VMA_DQ44 VMC_WDQS4 FBC_DQS_WP3 FBC_D44 VMC_DQ45
AE31 AK30 E26 F29
VMA_WDQS5 FBA_DQS_WP4 FBA_D44 VMA_DQ45 VMC_CMD25 R41 SNP@10K/F_4 VMC_WDQS5 FBC_DQS_WP4 FBC_D45 VMC_DQ46
AJ32 AK32 D32 D30
VMA_WDQS6 FBA_DQS_WP5 FBA_D45 VMA_DQ46 VMC_WDQS6 FBC_DQS_WP5 FBC_D46 VMC_DQ47
AJ34 AJ30 A32 E29
VMA_WDQS7 FBA_DQS_WP6 FBA_D46 VMA_DQ47 VMC_CMD16 R407 SNP@10K/F_4 VMC_WDQS7 FBC_DQS_WP6 FBC_D47 VMC_DQ48
AC33 AH30 B26 B29
FBA_DQS_WP7 FBA_D47 VMA_DQ48 FBC_DQS_WP7 FBC_D48 VMC_DQ49
AH33 C31
VMA_RDQS0 FBA_D48 VMA_DQ49 VMC_CMD0 R410 SNP@10K/F_4 VMC_RDQS0 FBC_D49 VMC_DQ50
L35 AH35 B14 C29
VMA_RDQS1 FBA_DQS_RN0 FBA_D49 VMA_DQ50 VMC_RDQS1 FBC_DQS_RN0 FBC_D50 VMC_DQ51
G35 FBA_DQS_RN1 FBA_D50 AH34 B10 FBC_DQS_RN1 FBC_D51 B31
VMA_RDQS2 H31 AH32 VMA_DQ51 VMC_CMD27 R30 SNP@10K/F_4 VMC_RDQS2 D9 C32 VMC_DQ52
VMA_RDQS3 FBA_DQS_RN2 FBA_D51 VMA_DQ52 VMC_RDQS3 FBC_DQS_RN2 FBC_D52 VMC_DQ53
N32 AJ33 E14 B32
VMA_RDQS4 FBA_DQS_RN3 FBA_D52 VMA_DQ53 VMC_CMD28 R408 SNP@10K/F_4 VMC_RDQS4 FBC_DQS_RN3 FBC_D53 VMC_DQ54
AD32 AL35 F26 B35
VMA_RDQS5 FBA_DQS_RN4 FBA_D53 VMA_DQ54 VMC_RDQS5 FBC_DQS_RN4 FBC_D54 VMC_DQ55
AJ31 AM34 D31 B34
VMA_RDQS6 FBA_DQS_RN5 FBA_D54 VMA_DQ55 VMC_RDQS6 FBC_DQS_RN5 FBC_D55 VMC_DQ56
AJ35
FBA_DQS_RN6 FBA_D55
AM35 12/02 modify A31
FBC_DQS_RN6 FBC_D56
A29
VMA_RDQS7 AC34 AF33 VMA_DQ56 package for N10 VMC_RDQS7 A26 B28 VMC_DQ57
FBA_DQS_RN7 FBA_D56 VMA_DQ57 FBC_DQS_RN7 FBC_D57 VMC_DQ58
FBA_D57 AE32 Un-stuff for N11M FBC_D58 A28
P29 AF34 VMA_DQ58 G14 C28 VMC_DQ59
FBA_WCK0 FBA_D58 VMA_DQ59 FBC_WCK0 FBC_D59 VMC_DQ60
R29
FBA_WCK0_N FBA_D59
AE35 Stuff for N11P ,N11S G15
FBC_WCK0_N FBC_D60
C26
L29 AE34 VMA_DQ60 G11 D25 VMC_DQ61
FBA_WCK1 FBA_D60 VMA_DQ61 FBC_WCK1 FBC_D61 VMC_DQ62
M29 FBA_WCK1_N FBA_D61 AE33 G12 FBC_WCK1_N FBC_D62 B25
AG29 AB32 VMA_DQ62 G27 A25 VMC_DQ63
FBA_WCK2 FBA_D62 VMA_DQ63 FBC_WCK2 FBC_D63
AH29 AC35 G28
FBA_WCK2_N FBA_D63 FBC_WCK2_N
C AD29 G24 C
+1.5V_GFX FBA_WCK3 +1.5V_GFX FBC_WCK3
AE29 T32 VMA_CLKP0 (21) G25 E17 VMC_CLKP0 (22)
FBA_WCK3_N FBA_CLK0 FBC_WCK3_N FBC_CLK0
T31 VMA_CLKN0 (21) D17 VMC_CLKN0 (22)
FBA_CLK0* FBC_CLK0*
AC31 VMA_CLKP1 (21) D23 VMC_CLKP1 (22)
FBA_CLK1 FBC_CLK1
AA27 AC30 VMA_CLKN1 (21) N27 E23 VMC_CLKN1 (22)
FBVDDQ_1 FBA_CLK1* FBVDDQ_28 FBC_CLK1*
AA29 P27
FBVDDQ_2 FBVDDQ_29
AA31 R27
FBVDDQ_3 FBVDDQ_30
AB27 FBVDDQ_4 T27 FBVDDQ_31
AB29 J27 +FB_VREF1 T5 U27
FBVDDQ_5 FB_VREF FBVDDQ_32
AC27
AD27
FBVDDQ_6
15mils width
U29
V27
FBVDDQ_33 MEMORY I/F C
FBVDDQ_7 FBVDDQ_34
AE27 V29
FBVDDQ_8 FBVDDQ_35
AJ28 V34
FBVDDQ_9 FBVDDQ_36 FB_CAL_PD_VDDQ R33 SW@40.2/F_4
B18 W27 K27 +1.5V_GFX
FBVDDQ_10 FBVDDQ_37 FB_CAL_PD_VDDQ
E21 FBVDDQ_11 Y27 FBVDDQ_38
G17 FBVDDQ_12
G18 L27 FB_CAL_PU_GND R36 SW@40.2/F_4
FBVDDQ_13 FB_CAL_PU_GND
G22
FBVDDQ_14
G8
G9
FBVDDQ_15 MEMORY I/F A M27 FB_CAL_TERM_GND R34 SNP@40.2/F_4
FBVDDQ_16 FB_CAL_TERM_GND R35 SNM@60.4/F_4
H29 FBVDDQ_17 For Debug only
J14 FBVDDQ_18
2/16
J15 T30 FBA_DEBUG R32 *SW@10K/F_4 +1.5V_GFX G19 FBC_DEBUG R39 *SW@10K/F_4 +1.5V_GFX
FBVDDQ_19 FBA_DEBUG FBC_DEBUG
J16 FBVDDQ_20
J17 15mils width +1.5V_GFX
FBVDDQ_21 SW@PBY160808T-301Y-N/2A/30ohm_6
J20
FBVDDQ_22 +FB_PLLAVDD L2
J21
FBVDDQ_23 FB_DLLAVDD0
AG27 +1.05V_GFX NC/ FB_DLLAVDD1
J19 N11P-GE1 Stuff 40.2 ohm
J22 C65 SW@0.01u/25V_4
FBVDDQ_24 C75 SW@4.7u/6.3V_6 C66 SW@0.01u/25V_4
J23
FBVDDQ_25 FB_PLLAVDD0
AF27
NC/ FB_PLLAVDD1
J18 N11M-GE1 Stuff 60.2 ohm
D J24 C74 SW@1u/6.3V_4 C71 SW@0.01u/25V_4 D
FBVDDQ_26 C78 SW@0.1u/10V_4 C70 SW@0.01u/25V_4
J29 FBVDDQ_27 C98 SW@0.1u/10V_4
CSP@N11P-GE1-A3 C83 SW@0.1u/10V_4 CSP@N11P-GE1-A3
C67 SW@0.1u/10V_4
C62 SW@0.047u/10V_4
C61 SW@0.047u/10V_4
C72
C121
SW@0.047u/10V_4
SW@4.7u/6.3V_6
Quanta Computer Inc.
C49 SW@4.7u/6.3V_6
PROJECT : ZQ3
Size Document Number Rev
All need stuff for N10P 1A
N11P-GE (MEMORY I/F) 2/5
Date: Monday, March 29, 2010 Sheet 17 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

GPU_3(VGA)
fcbga973-nvidia-n11p-es-a1

SW@FBMA-10-160808-300T/300mA/30ohm_6 U32D COMMON

+1.05V_GFX L8 +IFPAB_PLLVDD 220 mA AK9 AM11 EV_TXLCLKOUTP (23)


IFPAB_PLLVDD IFPA_TXC
IFPA_TXC* AM12 EV_TXLCLKOUTN (23)
C173 SW@1u/6.3V_4 IFPAB(LVDS) IFPA_TXD0 AM8
AL8
EV_TXLOUTP0 (23)
EV_TXLOUTN0 (23)
C179 SW@4.7u/6.3V_6 IFPA_TXD0*
IFPA_TXD1 AM10 EV_TXLOUTP1 (23)
AM9 EV_TXLOUTN1 (23) LVDS clk spread : Center
IFPA_TXD1*
10/20 Del C3647 IFPA_TXD2 AK10 EV_TXLOUTP2 (23) +/-0.5% ( 30~33KHZ)
IFPA_TXD2* AL10 EV_TXLOUTN2 (23)
A R49 *SW@1K/F_4 IFPAB_RSET AJ11 AK11 A
IFPAB_RSET IFPA_TXD3
IFPA_TXD3* AL11
SW@FBMA-10-160808-300T/300mA/30ohm_6 AG9 AP13
+1.8V_GFX L17 +IFPAB_IOVDD 200 mA AG10
IFPA_IOVDD IFPB_TXC
AN13
IFPB_IOVDD IFPB_TXC*
IFPB_TXD4 AN8
C165 SW@0.1u/10V_4 AP8
C216 SW@0.1u/10V_4 IFPB_TXD4*
IFPB_TXD5 AP10
C217 SW@1u/6.3V_4 AN10
C219 SW@4.7u/6.3V_6 IFPB_TXD5*
IFPB_TXD6 AR11
IFPB_TXD6* AR10
IFPB_TXD7 AN11
IFPB_TXD7* AP11

R59 SW@10K/F_4 +IFPCD_PLLVDD 220 mA AJ9 AN3


IFPCD_PLLVDD/ I2CW _SDA/ IFPC_AUX_N
IFPC_PLLVDD I2CW _SCL/ IFPC_AUX AP2 10/20 +3V_GFX
AC6 DACB_VDD/ IFPC_L3_N AR2
IFPD_PLLVDD IFPC_L3 AP1
IFPC_L2_N AM4
+3V_S5
IFPC IFPC_L2 AM3
R109
IFPC_L1_N AM5
AL5 SW@10K_4
IFPC_L1
AM6
GPU all PWROK
IFPC_L0_N
IFPC_L0 AM7
R58 *SW@1K/F_4 IFPC_RSET AK7 AN4 R108 dGPU_PWROK (11)
R61 *SW@1K/F_4 IFPD_RSET IFPCD_RSET/ IFPC_RSET I2CX_SDA/ IFPD_AUX_N SW@10K_4
AB6 DACB_RSET/ IFPD_RSET I2CX_SCL/ IFPD_AUX AP4

3
IFPD_L3_N AR4
IFPCD IFPD_L3 AR5
AP5
285 mA AJ8 IFPD
IFPD_L2_N
AN5 TMDS channel two 2 Q4
R51 SW@10K/F_4 +IFPCD_IOVDD IFPC_IOVDD IFPD_L2 SW@2N7002D
B AK8 IFPD_IOVDD IFPD_L1_N AN7 B
IFPD_L1 AP7

3
IFPD_L0_N AR7
R424 SW@1K/F_4 IFPE_RSET AR8

1
IFPD_L0
+1.8V_GFX 2
AE4 MXM_DDCCK_C MXM_DDCCK_C (24)
C188 SW@0.1u/10V_4 I2CY_SCL/ IFPE_AUX MXM_DDCDAT_C
I2CY_SDA/ IFPE_AUX* AD4 MXM_DDCDAT_C (24)
C200 SW@1u/6.3V_4 AH6 Q3
HDMITXP2 (24)

1
C214 SW@0.1u/10V_4 IFPE_L0 SW@PDTC143TT
AL1 IFPEF_RSET IFPE_L0* AH5 HDMITXN2 (24)
C215 SW@0.1u/10V_4 AH4
IFPE_L1 HDMITXP1 (24)
C218 SW@4.7u/6.3V_6 DVI
SW@FBMA-10-160808-300T/300mA/30ohm_6 IFPEF IFPE_L1* AG4
AF4
HDMITXN1 (24)
HDMITXP0 (24)
L16 IFPEF_PLLVDD IFPE_L2
+3V_GFX AJ6 IFPEF_PLLVDD IFPE_L2* AF5 HDMITXN0 (24)
L15 IFPEF_IOVDD AE7 AE6
(1.05V +/- 3% ) +1.05V_GFX
AD7
IFPE_IOVDD IFPE_L3
AE5
HDMICLKP (24)
IFPF_IOVDD IFPE_L3* HDMICLKN (24)
SW@MLB-201209-0030P-N1-RU/6A/30ohm_8 C197 SW@0.1u/10V_4 AF3
C206 SW@0.1u/10V_4 I2CZ_SCL/ IFPF_AUX
I2CZ_SDA/ IFPF_AUX* AF2
C202 SW@1u/6.3V_4 AL2 +3V_GFX
C212 SW@4.7u/6.3V_6 IFPF_L0
SW@PBY160808T-301Y-N/2A/30ohm_6 IFPF_L0* AL3 Display port output
IFPF_L1 AJ3
+3V_GFX L7 C157 SW@0.1u/10V_4 AJ2 10/20 STUFF
C163 SW@0.1u/10V_4 IFPF_L1* R80 SW@4.7K_4 EV_CRTDCLK
IFPF_L2 AJ1
C146 SW@0.1u/10V_4 AH1
IFPF_L2* R81 SW@4.7K_4 EV_CRTDDAT
IFPF_L3 AH2
IFPF_L3* AH3

+DACA_VDD 120 mA AJ12 AM15 EV_CRT_RED EV_CRT_RED (23)


DACA_VDD DACA_RED R425 SW@4.7K_4 MXM_DDCCK_C
C167 SW@1u/6.3V_4 DACA(CRT) AM14 EV_CRT_GRE EV_CRT_GRE (23)
C172 SW@4.7u/6.3V_6 DACA_GREEN R426 SW@4.7K_4 MXM_DDCDAT_C
C C
C175 SW@4700p/25V_4 AL14 EV_CRT_BLU EV_CRT_BLU (23)
C154 SW@470p/50V_4 DACA_BLUE
AM13 EV_HSYNC_R R63 SW@33_4 EV_HSYNC (23)
DACA_HSYNC EV_VSYNC_R R57 SW@33_4
DACA_VSYNC AL13 EV_VSYNC (23)
C144 SW@0.1u/10V_4 DACA_VREF AK12
R45 SW@124/F_4 DACA_RSET DACA_VREF EV_CRTDCLK EV_CRT_RED R50 SW@150/F_4
AK13 DACA_RSET I2CA_SCL G1 EV_CRTDCLK (23)
G4 EV_CRTDDAT EV_CRTDDAT (23)
I2CA_SDA EV_CRT_GRE R54 SW@150/F_4
R62 SW@10K/F_4 +DACB_VDD AG7 AK4
DACC_VDD/ /DACC_RED EV_CRT_BLU R47 SW@150/F_4
AK6
DACB_VDD DACC(CRT2) DACB_RED
AL4
DACC_VREF/ /DACC_GREEN
DACB_VREF DACB_GREEN
AH7 DACC_RSET/ /DACC_BLUE AJ4
DACB_RSET DACB_BLUE +3V_GFX
DACB_HSYNC/ DACC_HSYNC AM1
DACB_VSYNC/ DACC_VSYNC AM2

G3 I2CB_SCL R79 SW@2.2K_4


I2CB_SCL I2CB_SDA R93 SW@2.2K_4
I2CB_SDA G2

AA4 PLACE CLOSE TO GPU


NC/ DACB_RED XTAL_SSIN R420 SW@10K/F_4
AC5
DACB(TV) NC/ DACB_GREEN AB4
Y4
DACB_VREF/ NC NC/ DACB_BLUE DACB_CSYNC R67 SW@10K/F_4 BXTALOUT R433 SW@10K/F_4
CEC/ DACB_CSYNC AB5
SW@100nH/400mA_6
+1.05V_GFX L14 +NV_PLLVDD 60mA AE9 D2 XTAL_SSIN
PLLVDD XTAL_SSIN BXTALOUT
XTAL_OUTBUFF D1 2/5 modified
C171 SW@0.1u/10V_4 AD9
C180 SW@0.1u/10V_4 VID_PLLVDD XTALI_27M
D XTAL_IN B1 10 kΩ pull-down only if no spread chip used. D
C189 SW@1u/6.3V_4
C199 SW@4.7u/6.3V_6 XTAL_PLL B2 XTALO_27M 2 1
XTAL_OUT
STUFF PDs on XTALSSIN and
Y2 XTALOUTBUFF WHEN
SW@100nH/400mA_6 C566 SW@27MHZ C564
L13 +NV_SPPLLVDD 45mA AF9 SW@18p/50V_4 SW@18p/50V_4
EXT_SS IS NOT USED
+1.05V_GFX SP_PLLVDD
CSP@N11P-GE1-A3
Quanta Computer Inc.
C195 SW@1u/6.3V_4
C198 SW@4.7u/6.3V_6 PROJECT : ZQ3
Size Document Number Rev
10/20 Del C3515 1A
N11P-GE (DISPLAY) 3/5
Date: Monday, March 29, 2010 Sheet 18 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3V_GFX PIN STRAPS(VGA) Logical Logical Logical Logical


10/20 Add Strapping Bit3 Strapping Bit2 Strapping Bit1 Strapping Bit0
fcbga973-nvidia-n11p-es-a1
U32E COMMON
ROM_SO NB10X XCLK_417 FB_0_BAR_SIZE SMB_ALT_ADDR VGA_DEVICE 0001
R55 CSP@0_6 P9 N1
MIOA_VDDQ_1 MIOA_D0 T45
R9 MIOA_VDDQ_2 MIOA MIOA_D1 P4 T52 ROM_SCLK PCI_DEVIDE[4] SUB_VENDOR SLOT_CLK_CFG PEX_PLL_EN_TERM 0010
T9 MIOA_VDDQ_3 MIOA_D2 P1 T56
C162 U9 P2 ROM_SI RAMCFG[3] RAMCFG[2] RAMCFG[1] RAMCFG[0] XXXX
MIOA_VDDQ_4 MIOA_D3 T57
MIOA_D4 P3 T47
CSP@0.1u/10V_4 T3 STRAP2 PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0] 1000
CSP@ MIOA_D5
MIOA_D6 T2
T53
T36
N11P/M : Stuff 0 ohm 10/20 MIOA_D7 T1 T30 STRAP1 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0] 0001
U4 T49
N11X-FERMI : UnStuff 0 ohm U5
MIOA_D8
U1 STRAP0 USER[3] USER[2] USER[1] USER[0] 1111
MIOA_CAL_PD_VDDQ MIOA_D9 T42
A
MIOA_D10 U2 T54 A
MIOA_D11 U3 T50 VRAM Configuration Table
T5 MIOA_CAL_PU_GND MIOA_D12 R6
T6 RAMCFG
CSP@
N11P/M : Stuff 0.1uF
N5
MIOA_D13
MIOA_D14 N6

P5
[3:0]
0000
DESCRIPTION Vendor
Reserved
Vendor P/N ROM_SI
(Ra)
N11X-FERMI : Stuff 10K ohm MIOA_VREF MIOA_CTL3
MIOA_HSYNC N3 CSP@ 0001 DDR3 64Mx16x8, 128bit, 1GB,800MHz Qimonda IDGH1G-04A1F1C-16X PD 10K AKD58GGT^01
MIOA_VSYNC
L3 N11P/M : Stuff 10 Kohm 0010 DDR3 64Mx16x8, 128bit, 1GB,800MHz Hynix H5TQ1G63BFR-12C PD 15K AKD5LZGTW00
N2 0011 DDR3 64Mx16x8, 128bit, 1GB,800MHz Samsung K4W1G1646E-HC12 PD 20K AKD5LGGT502
MIOA_DE N11X-FERMI : UnStuff 10 Kohm 0101 Reserved
MIOA_CLKOUT
R4 0110
+3V_GFX 10/20 Add T4 XXXX DDR3 64Mx16x8, 128bit, 1GB,667MHz Hynix H5TQ1G63AFR-14C
MIOA_CLKOUT* MIOA_CLKIN +3V_GFX
MIOA_CLKIN
N4 XXXX DDR3 64Mx16x8, 128bit, 1GB,667MHz Samsung K4W1G1646D-EC12
R66 CSP@10K/F_4
R52 CSP@0_6 AA9 Y1
MIOB_VDDQ_1 MIOB_D0 T34 +3V_GFX
AB9
MIOB_VDDQ_2 MIOB MIOB_D1
Y2 T28
W9 MIOB_VDDQ_3 MIOB_D2 Y3 T40
C161 Y9 AB3
MIOB_VDDQ_4 MIOB_D3 T48
MIOB_D4 AB2 T33
CSP@0.1u/10V_4 AB1 R74 R70 R65
CSP@ MIOB_D5
MIOB_D6 AC4
T39
T27
SW @35.7K/F_4
N11P/M : Stuff 0 ohm 10/20 AC1 STRAP0 SW @45.3K/F_4 SNP@10K/F_4
MIOB_D7 T26
AC2 R95 R434 R101 STRAP1
N11X-FERMI : UnStuff 0 ohm MIOB_D8 T32
AA7 AC3 *SW @20K/F_4 SNM@15K/F_4 STRAP2
MIOB_CAL_PD_VDDQ MIOB_D9 T38
AE3 ROM_SI *SW @4.99K/F_4
MIOB_D10 T46
AE2 ROM_SO
MIOB_D11 T37
AA6 U6 ROM_SCLK
MIOB_CAL_PU_GND MIOB_D12 R76 R68 R64
W6
MIOB_D13
Y6
CSP@ MIOB_D14
STRAP0 W5 STRAP0 *SW @2K/F_4 *SW @35.7K/F_4 SNM@30.1K/F_4
B
N11P/M : Stuff 0.1uF AF1 W7 STRAP1 R100 R421 R96 B
MIOB_VREF STRAP1 STRAP2 CSP@15K/F_4 SNP@15K/F_4
V7
N11X-FERMI : Stuff 10K ohm STRAP2

MIOB_CTL3 W3
W1 CSP@ (Ra) SW @10K/F_4
Logical Strap Bit Mapping
MIOB_HSYNC
MIOB_VSYNC
W2 N11P/M : Stuff 10 Kohm Default: Hynix VRAM PU PD
Y5
MIOB_DE N11X-FERMI : UnStuff 10 Kohm Hynix =15K pull down(64Mx16) 5K 1000 0000
V4
MIOB_CLKOUT Samsung =20k pull down(64Mx16)
MIOB_CLKOUT* W4
MIOB_CLKIN
10K 1001 0001
AE1
MIOB_CLKIN R427 CSP@10K/F_4
CHIP
15K 1010 0010
(20) GPU_D- B4
THERMDN GPIO0
K1 T44 ROM_SCLK STRAP2 PCI_DEVID
GPIO1
K2
EV_LVDS_BRIGHT
20K 1011 0011
GPIO2 K3 EV_LVDS_BRIGHT (23) N11M-GE1 PU 15K PD 30K 0x0A75
B5 H3 EV_LVDS_VDDEN
(20) GPU_D+ THERMDP GPIO3 EV_LVDS_BLON
EV_LVDS_VDDEN (23) 25K 1100 0100
GPIO4
H2 EV_LVDS_BLON (23) N11P-GE1 PD 15K PU 10K 0x0A29
H1 GPU_VID1
JTAG_TCK GPIO5 GPU_VID2
GPU_VID1 (44) 30K 1101 0101
T35
JTAG_TMS
AP14 JTAG_TCK MISC1 GPIO6 H4 GPU_VID2 (44) +3V_GFX
T29
JTAG_TDI
AR14 JTAG_TMS (GPIOS,JTAG,THERM,I2C) GPIO7 H5
VGA_OVT#
T10 35K 1110 0110
T41 AN14 JTAG_TDI GPIO8 H6
JTAG_TDO ALERT# DGPU_IDLE_INT# R438 SW @10K/F_4
T43
JTAG_TRST#
AN16
JTAG_TDO GPIO9
J7 ALERT# (20) 45K 1111 0111
T31 AP16
JTAG_TRST* GPIO10
K4 T51 10/20
GPIO11 K5 T55
H7 VGA_ACIN 10/20 Modify 12/9 Move R13042,R13043 to PWM PAGE 4.99K/F_4: CS24992FB26 [RES CHIP 4.99K 1/16W +1%(0402)]
SMB_CLK_VGA GPIO12
E2 I2CS_SCL GPIO13 J4 10K/F_4: CS31002FB26 [RES CHIP 10K 1/16W +1% (0402)]
SW @33_4 SMB_DATA_VGA E1 J6 12/9 DEL R3583,R3587,R3586 FOR NV 15K/F_4: CS31502FB24 [RES CHIP 15K 1/16W +1% (0402)]
R73 I2CC_SCL_G I2CS_SDA GPIO14
(23) EV_LVDS_DDCCLK E3
I2CC_SCL GPIO15
L1 HDMI_HP_EV (24) 20K/F_4: CS32002FB29 RES CHIP 20K 1/16W +-1%(0402)
(23) EV_LVDS_DDCDAT R71 I2CC_SDA_G E4 L2 VGA_OVT# R90 SW @10K/F_4 30.1K/F_4: CS33012FB18 [RES CHIP 30.1K 1/16W +-1%(0402)]
SW @33_4 I2CC_SDA GPIO16 ALERT# R78 SW @10K/F_4
F4
I2CD_SCL/ NC GPIO17
L4 35.7K/F_4: CS33572FB13 [RES CHIP 35.7K 1/16W +-1%(0402)]
G5 M4 DGPU_IDLE_INT# 45.3K/F_4: CS34532FB18 [RES CHIP 45.3K 1/16W +-1% (0402)]
C I2CD_SDA/ NC GPIO18 JTAG_TRST# R422 SW @1K/F_4 C
D5 I2CE_SCL/ NC GPIO19 L7 10/16
E5 L5
+3V_GFX
10/20 STUFF
I2CE_SDA/ NC GPIO20
GPIO21 K6
L6
GPIO ASSIGNMENTS
GPIO22 HDMI_HP_EV R428 *SW @2.2K_4
M6 GPIO I/O ACTIVE USAGE
GPIO23
SW @4.7K_4 10/16
R83 EV_LVDS_DDCCLK
J26 BBIASN_NC ROM_CS* C3
ROM_SI EV_LVDS_BRIGHT R429 SW @10K/F_4
0 N/A N/A
J25 BBIASP_NC MISC2(ROM) ROM_SI D3
ROM_SO
ROM_SO
C4 A5 N.C due to N11X HAD 1 IN N/A Hot plug detect for IFP link C
R82 EV_LVDS_DDCDAT D7 D4 ROM_SCLK function is through EV_LVDS_VDDEN R430 SW @10K/F_4
SW @4.7K_4 HDA_BCLK/ NC ROM_SCLK
D6
C7
HDA_RST*/ NC
F6 HDCP_SCL PCI-E interface EV_LVDS_BLON R437 SW @10K/F_4
2 OUT HIGH PANEL BACKLIGHT PWM
HDA_SDI/ NC I2CH_SCL HDCP_SDA
B7
A7
HDA_SDO/ NC I2CH_SDA
G6 3 OUT HIGH PANEL POWER ENABLE
HDA_SYNC/ NC SPDIF_VGA
R53 SW @40.2K/F_4 STRAP_REF_3V3 N9
SPDIF A5 T25 4 OUT HIGH PANEL BACKLIGHT ENABLE
R60 SW @40.2K/F_4 STRAP_REF_MIOB M9
STRAP_REF_3V3/ MULTI_STRAP_REF0_GND
STRAP_REF_MIOB/ MULTI_STRAP_REF1_GND BUFRST* A4
C5
HDCP ROM (VGA) 5 OUT N/A NVVDD VID0
NC +3V_GFX +3V_GFX
AK14 U34
6 OUT N/A NVVDD VID1
GND C565 *SW @0.1u/10V_4
VGA Thermal(VGA) GND/ NC
K9 1
A0 VCC
8 7 OUT N/A NVVDD VID2 11/13
CSP@N11P-GE1-A3 R94 +3V_GFX R92 *SW @10K/F_4
ADDRESS: 9AH R129 *SW @0_4 *SW @10K_4
2
A1 WP
7 8 I/O LOW OVERT
10/20 +3V_GFX HDCP_SCL
3 A2 SCL 6
R439 SW @2.2K_4
9 I/O LOW ALERT
SMB_CLK_VGA Q10 VGA_ACIN HDCP_SDA
1 3 3 1 4 5 10 OUT N/A FBVREF SELECT
47K

MXM_SMCLK12 (20,34) GND SDA


2

SW @2N7002D R91 SW @2.2K_4


R128 Q8 SW @2N7002D *SW @AT24C16BN-SHBY-B
11 OUT N/A SLI SYNC0
10K

SW @4.7K_4 VGA_OVT# 1 3 VGA_THERM# (34) R127


(20) VGA_OVT#
2

R113 *SW @10K_4 +3V_GFX


D
*SW @0_4 Fill U36 to correct p/n as Top B/S P/N(AR0QT6VB002)
12 IN N/A PWR_LEVEL11/13 D
+3V_GFX
2

R131 R107 *SW @0_4


SW @4.7K_4 Q12
13 OUT N/A MEM_VID or power supply control
DHCP ROM
2

Q9 *SW @DTA114YUA
SW @2N7002D +3V_GFX 14 OUT N/A PS CONTROL
SMB_DATA_VGA
Low: Crypto ROM
1 3 MXM_SMDATA12 (20,34)
Q11
HDCP_SCL
2 Hi: I2C ROM
(34,38) ACIN
Quanta Computer Inc.
2

SW @2N7002D

R130 *SW @0_4 DGPU_IDLE_INT# 1 3 Q13


DGPU_IDLE# (34)
*SW @2N7002D HDCP ROM reserve , Due to N11x had PROJECT : ZQ3
1

Size Document Number Rev


R135 *SW @0_4
PU@EC 10/20
support internal HDCP function.
1A
N11P-GE (GPIO&STRAPS) 4/5
Date: Monday, March 29, 2010 Sheet 19 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

GPU_4(VGA)
U32F U32G
Thermal Sensor(VGA)
+VGPU_CORE fcbga973-nvidia-n11p-es-a1
+VGPU_CORE fcbga973-nvidia-n11p-es-a1
COMMON COMMON

AB11 P21 AA11 E15 +3V_GFX


VDD_001 VDD_057 GND_1 GND_096
AB13 VDD_002 VDD_058 P23 AA12 GND_2 GND_097 E18
AB15 VDD_003 NVVDD VDD_059 P25 AA13 GND_3 GND_098 E24 NS none
AB17 R11 AA14 E27
A
AB19
VDD_004 VDD_060
R12 AA15
GND_4 GROUND GND_099
E30 WINDBOND AL83L771K02
A
VDD_005 VDD_061 GND_5 GND_100 R88
AB21 VDD_006 VDD_062 R13 AA16 GND_6 GND_101 E6

2
AB23 R14 AA17 E9 *SW@10K_4 GMT AL000780003
VDD_007 VDD_063 GND_7 GND_102
AB25 VDD_008 VDD_064 R15 AA18 GND_8 GND_103 F2
AC11 VDD_009 VDD_065 R16 AA19 GND_9 GND_104 F31 (19,34) MXM_SMCLK12 3 1
AC12 VDD_010 VDD_066 R17 AA2 GND_10 GND_105 F34 1/12 modified
AC13 R18 AA20 F5 Q5
VDD_011 VDD_067 GND_11 GND_106 *SW@2N7002D
AC14 VDD_012 VDD_068 R19 AA21 GND_12 GND_107 J2
AC15 R20 AA22 J31 +3V_GFX
VDD_013 VDD_069 GND_13 GND_108
AC16 VDD_014 VDD_070 R21 AA23 GND_14 GND_109 J34
AC17 R22 AA24 J5 +3V_GFX
VDD_015 VDD_071 GND_15 GND_110 *SW@0.1u/10V_4
AC18 VDD_016 VDD_072 R23 AA25 GND_16 GND_111 L9
AC19 R24 AA34 M11 *SW@10K_4 C229
VDD_017 VDD_073 GND_17 GND_112 R89
AC20 VDD_018 VDD_074 R25 AA5 GND_18 GND_113 M13

2
AC21 VDD_019 VDD_075 T12 AB12 GND_19 GND_114 M15
AC22 T14 AB14 M17 U8
VDD_020 VDD_076 GND_20 GND_115
AC23 VDD_021 VDD_077 T16 AB16 GND_21 GND_116 M19 (19,34) MXM_SMDATA12 3 1
AC24 T18 AB18 M2 GPU_SMCLK 8 1
VDD_022 VDD_078 GND_22 GND_117 SCLK VCC GPU_D+ (19)
AC25 VDD_023 VDD_079 T20 AB20 GND_23 GND_118 M21
AD12 T22 AB22 M23 Q6 GPU_SMDATA 7 2 C196
VDD_024 VDD_080 GND_24 GND_119 *SW@2N7002D SDA DXP
AD14 VDD_025 VDD_081 T24 AB24 GND_25 GND_120 M25
AD16 V11 AC9 M31 6 3 *SW@2200p/50V_4
VDD_026 VDD_082 GND_26 GND_121 (19) ALERT# ALERT# DXN
AD18 VDD_027 VDD_083 V13 AD11 GND_27 GND_122 M34 GPU_D- (19)
AD22 VDD_028 VDD_084 V15 AD13 GND_28 GND_123 M5 (19) VGA_OVT# 4 OVERT# GND 5
AD24 VDD_029 VDD_085 V17 AD15 GND_29 GND_124 N11
L11 VDD_030 VDD_086 V19 AD17 GND_30 GND_125 N12 10/20 Modify
L12 V21 AD2 N13 *SW@G780-1P81U(MSOP)
VDD_031 VDD_087 GND_31 GND_126
L13 VDD_032 VDD_088 V23 AD21 GND_32 GND_127 N14 ADDRESS: 9AH
B L14 VDD_033 VDD_089 V25 AD23 GND_33 GND_128 N15 B
L15 VDD_034 VDD_090 W 11 AD25 GND_34 GND_129 N16
L16 VDD_035 VDD_091 W 12 AD31 GND_35 GND_130 N17
L17 VDD_036 VDD_092 W 13 AD34 GND_36 GND_131 N18
L18 VDD_037 VDD_093 W 14 AD5 GND_37 GND_132 N19
L19 VDD_038 VDD_094 W 15 AE11 GND_38 GND_133 N20
L20 VDD_039 VDD_095 W 16 AE12 GND_39 GND_134 N21
L21 VDD_040 VDD_096 W 17 AE13 GND_40 GND_135 N22
L22 VDD_041 VDD_097 W 18 AE14 GND_41 GND_136 N23
L23 VDD_042 VDD_098 W 19 AE15 GND_42 GND_137 N24
L24 VDD_043 VDD_099 W 20 AE16 GND_43 GND_138 N25
L25 VDD_044 VDD_100 W 21 AE17 GND_44 GND_139 P12
M12 VDD_045 VDD_101 W 22 AE18 GND_45 GND_140 P14
M14 VDD_046 VDD_102 W 23 AE19 GND_46 GND_141 P16
M16 VDD_047 VDD_103 W 24 AE20 GND_47 GND_142 P18
M18 VDD_048 VDD_104 W 25 AE21 GND_48 GND_143 P20
M20 VDD_049 VDD_105 Y12 AE22 GND_49 GND_144 P22
M22 VDD_050 VDD_106 Y14 AE23 GND_50 GND_145 P24
M24 VDD_051 VDD_107 Y16 AE24 GND_51 GND_146 R2
P11 VDD_052 VDD_108 Y18 AE25 GND_52 GND_147 R31
P13 VDD_053 VDD_109 Y20 AG2 GND_53 GND_148 R34
P15 VDD_054 VDD_110 Y22 AG31 GND_54 GND_149 R5
P17 VDD_055 VDD_111 Y24 AG34 GND_55 GND_150 T11
P19 VDD_056 AG5 GND_56 GND_151 T13
AK2 GND_57 GND_152 T15
CSP@N11P-GE1-A3 AK31 T17
GND_58 GND_153
AK34 GND_59 GND_154 T19
AK5 GND_60 GND_155 T21
AL12 GND_61 GND_156 T23
C AL15 GND_62 GND_157 T25 C
AL18 GND_63 GND_158 U11
AL21 GND_64 GND_159 U12
NVVDD Decoupling AL24 GND_65 GND_160 U13
AL27 GND_66 GND_161 U14
AL30 GND_67 GND_162 U15
+VGPU_CORE AL6 U16
GND_68 GND_163
AL9 GND_69 GND_164 U17
2/16 PLACE UNDER BALLS AN2 U18
C133 SW@0.01u/25V_4 GND_70 GND_165
AN34 GND_71 GND_166 U19
C90 SW@0.01u/25V_4 AP12 U20
C116 SW@0.01u/25V_4 GND_72 GND_167
AP15 GND_73 GND_168 U21
C115 SW@0.01u/25V_4 AP18 U22
C134 SW@0.01u/25V_4 GND_74 GND_169
AP21 GND_75 GND_170 U23
C151 SW@0.01u/25V_4 AP24 U24
C91 SW@0.022u/16V_4 GND_76 GND_171
AP27 GND_77 GND_172 U25
C105 SW@0.022u/16V_4 AP3 V12
C122 SW@0.022u/16V_4 GND_78 GND_173
AP30 GND_79 GND_174 V14
C152 SW@0.022u/16V_4 AP33 V16
C92 SW@0.047u/25V_4 GND_80 GND_175
AP6 GND_081 GND_176 V18
C117 SW@0.047u/25V_4 AP9 V2
C135 SW@0.047u/25V_4 GND_082 GND_177
B12 GND_083 GND_178 V20
C106 SW@0.22u/6.3V_4 B15 V22
C150 SW@0.22u/6.3V_4 GND_084 GND_179
B21 GND_085 GND_180 V24
C104 SW@1u/6.3V_4 B24 V31
C96 SW@4700p/25V_4 GND_086 GND_181
B27 GND_087 GND_182 V5
C86 SW@4700p/25V_4 12/9 ADD TWO 4700PF B3 V9
GND_088 GND_183
B30 GND_089 GND_184 Y11
PLACE NEAR BALLS B33 Y13
C93 SW@4.7u/6.3V_6 GND_090 GND_185
D B6 GND_091 GND_186 Y15 D
C82 SW@10u/6.3V_8 B9 Y17
C80 SW@10u/6.3V_8 GND_092 GND_187
C2 GND_093 GND_188 Y19
C34 GND_094 GND_189 Y21
E12 GND_095 GND_190 Y23
C126 SW@150u/6.3V_3528 Y25
C778+ SW@150u/6.3V_3528 GND_191
+ CSP@N11P-GE1-A3 Quanta Computer Inc.
1/27 modified PROJECT : ZQ3
(change to 3258) Size Document Number Rev
1A
N11P-GE (POWER & GND&THM) 5/5
Date: Monday, March 29, 2010 Sheet 20 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

VRAM_A(VGA) (17) VMA_DQ[63..0] (17,22,46) +1.5V_GFX

CHANNEL A: 256MB/512MB DDR3


(17) VMA_DM[7..0]
(17) VMA_WDQS[7..0]
(17) VMA_RDQS[7..0]

U4 U30 U29 U3

VREFC_VMA1 M8 E3 VMA_DQ19 VREFC_VMA1 M8 E3 VMA_DQ4 VREFC_VMA3 M8 E3 VMA_DQ57 VREFC_VMA3 M8 E3 VMA_DQ43


VREFD_VMA1 VREFCA DQL0 VMA_DQ21 VREFD_VMA1 VREFCA DQL0 VMA_DQ3 VREFD_VMA3 VREFCA DQL0 VMA_DQ59 VREFD_VMA3 VREFCA DQL0 VMA_DQ41
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 VMA_DQ18 F2 VMA_DQ5 F2 VMA_DQ61 F2 VMA_DQ45
DQL2 VMA_DQ22 VMA_CMD7 DQL2 VMA_DQ1 VMA_CMD22 DQL2 VMA_DQ60 VMA_CMD22 DQL2 VMA_DQ40
(17) VMA_CMD7 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
A P7 H3 VMA_DQ16 VMA_CMD20 P7 H3 VMA_DQ6 VMA_CMD4 P7 H3 VMA_DQ58 VMA_CMD4 P7 H3 VMA_DQ47 A
(17) VMA_CMD20 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
P3 H8 VMA_DQ23 VMA_CMD4 P3 H8 VMA_DQ2 VMA_CMD20 P3 H8 VMA_DQ62 VMA_CMD20 P3 H8 VMA_DQ42
(17) VMA_CMD4 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
N2 G2 VMA_DQ17 VMA_CMD14 N2 G2 VMA_DQ7 VMA_CMD9 N2 G2 VMA_DQ56 VMA_CMD9 N2 G2 VMA_DQ44
(17) VMA_CMD14 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6
P8 H7 VMA_DQ20 VMA_CMD17 P8 H7 VMA_DQ0 VMA_CMD6 P8 H7 VMA_DQ63 VMA_CMD6 P8 H7 VMA_DQ46
(17) VMA_CMD17 A4 DQL7 A4 DQL7 A4 DQL7 A4 DQL7
P2 VMA_CMD6 P2 VMA_CMD17 P2 VMA_CMD17 P2
(17) VMA_CMD6 A5 A5 A5 A5
R8 VMA_CMD26 R8 VMA_CMD3 R8 VMA_CMD3 R8
(17) VMA_CMD26 A6 A6 A6 A6
R2 D7 VMA_DQ31 VMA_CMD3 R2 D7 VMA_DQ12 VMA_CMD26 R2 D7 VMA_DQ51 VMA_CMD26 R2 D7 VMA_DQ35
(17) VMA_CMD3 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
T8 C3 VMA_DQ24 VMA_CMD1 T8 C3 VMA_DQ11 VMA_CMD1 T8 C3 VMA_DQ53 VMA_CMD1 T8 C3 VMA_DQ38
(17) VMA_CMD1 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
R3 C8 VMA_DQ27 VMA_CMD10 R3 C8 VMA_DQ15 VMA_CMD5 R3 C8 VMA_DQ50 VMA_CMD5 R3 C8 VMA_DQ32
(17) VMA_CMD10 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
L7 C2 VMA_DQ26 VMA_CMD21 L7 C2 VMA_DQ10 VMA_CMD19 L7 C2 VMA_DQ52 VMA_CMD19 L7 C2 VMA_DQ39
(17) VMA_CMD21 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
R7 A7 VMA_DQ29 VMA_CMD5 R7 A7 VMA_DQ13 VMA_CMD10 R7 A7 VMA_DQ48 VMA_CMD10 R7 A7 VMA_DQ36
(17) VMA_CMD5 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
N7 A2 VMA_DQ28 VMA_CMD22 N7 A2 VMA_DQ8 VMA_CMD7 N7 A2 VMA_DQ54 VMA_CMD7 N7 A2 VMA_DQ37
(17) VMA_CMD22 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
T3 B8 VMA_DQ30 VMA_CMD18 T3 B8 VMA_DQ14 VMA_CMD29 T3 B8 VMA_DQ49 VMA_CMD29 T3 B8 VMA_DQ34
(17) VMA_CMD18 A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
T7 A3 VMA_DQ25 VMA_CMD29 T7 A3 VMA_DQ9 VMA_CMD18 T7 A3 VMA_DQ55 VMA_CMD18 T7 A3 VMA_DQ33
(17) VMA_CMD29 A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 VMA_CMD30 M7 VMA_CMD13 M7 VMA_CMD13 M7
(17) VMA_CMD30 A15 A15 A15 A15

M2 B2 VMA_CMD12 M2 B2 VMA_CMD12 M2 B2 VMA_CMD12 M2 B2


(17) VMA_CMD12 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
N8 D9 VMA_CMD9 N8 D9 VMA_CMD14 N8 D9 VMA_CMD14 N8 D9
(17) VMA_CMD9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
M3 G7 VMA_CMD13 M3 G7 VMA_CMD30 M3 G7 VMA_CMD30 M3 G7
(17) VMA_CMD13 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#K8 K8 VDD#K8 K8 VDD#K8 K8
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
J7 N9 VMA_CLKP0 J7 N9 (17) VMA_CLKP1 J7 N9 VMA_CLKP1 J7 N9
(17) VMA_CLKP0 CK VDD#N9 CK VDD#N9 CK VDD#N9 CK VDD#N9
K7 R1 VMA_CLKN0 K7 R1 (17) VMA_CLKN1 K7 R1 VMA_CLKN1 K7 R1
(17) VMA_CLKN0 CK VDD#R1 +1.5V_GFX CK VDD#R1 CK VDD#R1 CK VDD#R1 +1.5V_GFX
K9 R9 VMA_CMD0 K9 R9 (17) VMA_CMD27 VMA_CMD27 K9 R9 VMA_CMD27 K9 R9
(17) VMA_CMD0 CKE VDD#R9 CKE VDD#R9 +1.5V_GFX CKE VDD#R9 +1.5V_GFX CKE VDD#R9

K1 A1 VMA_CMD25 K1 A1 (17) VMA_CMD16 VMA_CMD16 K1 A1 VMA_CMD16 K1 A1


(17) VMA_CMD25 ODT VDDQ#A1 ODT VDDQ#A1 ODT VDDQ#A1 ODT VDDQ#A1
B L2 A8 VMA_CMD2 L2 A8 (17) VMA_CMD11 VMA_CMD11 L2 A8 VMA_CMD11 L2 A8 B
(17) VMA_CMD2 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8
J3 C1 VMA_CMD24 J3 C1 VMA_CMD24 J3 C1 VMA_CMD24 J3 C1
(17) VMA_CMD24 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
K3 C9 VMA_CMD8 K3 C9 VMA_CMD8 K3 C9 VMA_CMD8 K3 C9
(17) VMA_CMD8 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
L3 D2 VMA_CMD19 L3 D2 VMA_CMD21 L3 D2 VMA_CMD21 L3 D2
(17) VMA_CMD19 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
VMA_WDQS2 F3 H2 VMA_WDQS0 F3 H2 VMA_WDQS7 F3 H2 VMA_WDQS5 F3 H2
VMA_RDQS2 DQSL VDDQ#H2 VMA_RDQS0 DQSL VDDQ#H2 VMA_RDQS7 DQSL VDDQ#H2 VMA_RDQS5 DQSL VDDQ#H2
G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9

VMA_DM2 E7 A9 VMA_DM0 E7 A9 VMA_DM7 E7 A9 VMA_DM5 E7 A9


VMA_DM3 DML VSS#A9 VMA_DM1 DML VSS#A9 VMA_DM6 DML VSS#A9 VMA_DM4 DML VSS#A9
D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3
VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1
VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
VMA_WDQS3 C7 J2 VMA_WDQS1 C7 J2 VMA_WDQS6 C7 J2 VMA_WDQS4 C7 J2
VMA_RDQS3 DQSU VSS#J2 VMA_RDQS1 DQSU VSS#J2 VMA_RDQS6 DQSU VSS#J2 VMA_RDQS4 DQSU VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 VSS#M1 M1
VSS#M9 M9 VSS#M9 M9 VSS#M9 M9 VSS#M9 M9
VSS#P1 P1 VSS#P1 P1 VSS#P1 P1 VSS#P1 P1
(17) VMA_CMD28 T2 P9 VMA_CMD28 T2 P9 VMA_CMD28 T2 P9 VMA_CMD28 T2 P9
RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
VMA_ZQ1 L8 T9 VMA_ZQ2 L8 T9 VMA_ZQ3 L8 T9 VMA_ZQ4 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
Should be 240 Should be 240 Should be 240 Should be 240
Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1
VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9
R24 D1 R394 D1 R403 D1 R17 D1
SW@243/F_4 VSSQ#D1 VSSQ#D1 VSSQ#D1 SW@243/F_4 VSSQ#D1
VSSQ#D8 D8 SW@243/F_4 VSSQ#D8 D8 SW@243/F_4 VSSQ#D8 D8 VSSQ#D8 D8
VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2
C J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 C
L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9

96-BALL 96-BALL 96-BALL 96-BALL


SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
CSP@VRAM _DDR3 CSP@VRAM _DDR3 CSP@VRAM _DDR3 CSP@VRAM _DDR3

+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX

:AKD5LGGT506
Samsung 1Gb:
VMA_CLKP0 R397 R23 R22 R396
SW@1.33K/F_4 SW@1.33K/F_4 :AKD5LZGTW04
Hynix 1Gb: VMA_CLKP1 SW@1.33K/F_4 SW@1.33K/F_4
R398
SW@243/F_4 R21
VREFC_VMA1 VREFD_VMA1 SW@243/F_4 VREFC_VMA3 VREFD_VMA3
VMA_CLKN0
VMA_CLKN1
R393 C526 C29 R18 R392
SW@1.33K/F_4 SW@0.1u/10V_4 R20 SW@0.1u/10V_4 SW@1.33K/F_4 C20 SW@1.33K/F_4 C516
12/9 NV recommend 0.1uf x 5, 1uf x 4 per DDR3 SW@1.33K/F_4 SW@0.1u/10V_4 SW@0.1u/10V_4

DEL C3627,C3684,C3681,C3662 ,C3678,C3692


10/21 Add for NV Request 10/21 Add for NV Request
C3690,C3695,C3685 FOR NV suggestion
+1.5V_GFX +1.5V_GFX
D D
+1.5V_GFX +1.5V_GFX

C24 SW@1u/6.3V_4 C524 SW@1u/6.3V_4


+1.5V_GFX C520 SW@0.1u/10V_4 C515 SW@0.1u/10V_4 C31 SW@1u/6.3V_4 C16 SW@1u/6.3V_4
C521 SW@0.1u/10V_4 C518 SW@0.1u/10V_4 C38 SW@1u/6.3V_4 C18 SW@1u/6.3V_4
C548 SW@0.1u/10V_4 C550 SW@0.1u/10V_4 C27 SW@1u/6.3V_4 C77 SW@1u/6.3V_4
C514
C26
SW@4.7u/6.3V_6
SW@0.1u/10V_4
C517
C549
SW@0.1u/10V_4
SW@0.1u/10V_4
C523
C25
SW@0.1u/10V_4
SW@0.1u/10V_4
C19
C39
SW@1u/6.3V_4
SW@1u/6.3V_4
C22
C41
SW@1u/6.3V_4
SW@1u/6.3V_4
Quanta Computer Inc.
C519 SW@0.1u/10V_4 C546 SW@0.1u/10V_4 C40 SW@0.1u/10V_4 C547 SW@1u/6.3V_4 C23 SW@1u/6.3V_4
C545 SW@0.1u/10V_4 C37 SW@0.1u/10V_4 C35 SW@0.1u/10V_4 C17 SW@1u/6.3V_4 C21 SW@1u/6.3V_4 PROJECT : ZQ3
C28 SW@0.1u/10V_4 C527 SW@0.1u/10V_4 C522 SW@0.1u/10V_4 Size Document Number Rev
1A
N11P-GE VRAM-1(DDR3 BGA96)
Date: Monday, March 29, 2010 Sheet 21 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

VRAM_C(VGA) (17) VMC_DQ[63..0]


(17) VMC_DM[7..0] (17,21,46) +1.5V_GFX
(17) VMC_WDQS[7..0]
(17) VMC_RDQS[7..0] CHANNEL B: 256MB/512MB DDR3
U7
U33 U5 U31
VREFC_VMC1 M8 E3 VMC_DQ15
VREFC_VMC1 VMC_DQ28 VREFD_VMC1 VREFCA DQL0 VMC_DQ12 VREFC_VMC3 VMC_DQ33 VREFC_VMC3 VMC_DQ58
M8 VREFCA DQL0 E3 H1 VREFDQ DQL1 F7 M8 VREFCA DQL0 E3 M8 VREFCA DQL0 E3
VREFD_VMC1 H1 F7 VMC_DQ27 F2 VMC_DQ14 VREFD_VMC3 H1 F7 VMC_DQ36 VREFD_VMC3 H1 F7 VMC_DQ60
VREFDQ DQL1 VMC_DQ30 VMC_CMD7 DQL2 VMC_DQ11 VREFDQ DQL1 VMC_DQ37 VREFDQ DQL1 VMC_DQ59
DQL2 F2 N3 A0 DQL3 F8 DQL2 F2 DQL2 F2
N3 F8 VMC_DQ24 VMC_CMD20 P7 H3 VMC_DQ10 VMC_CMD22 N3 F8 VMC_DQ32 VMC_CMD22 N3 F8 VMC_DQ63
(17) VMC_CMD7 A0 DQL3 A1 DQL4 A0 DQL3 A0 DQL3
P7 H3 VMC_DQ31 VMC_CMD4 P3 H8 VMC_DQ9 VMC_CMD4 P7 H3 VMC_DQ38 VMC_CMD4 P7 H3 VMC_DQ56
(17) VMC_CMD20 A1 DQL4 A2 DQL5 A1 DQL4 A1 DQL4
A P3 H8 VMC_DQ25 VMC_CMD14 N2 G2 VMC_DQ13 VMC_CMD20 P3 H8 VMC_DQ34 VMC_CMD20 P3 H8 VMC_DQ62 A
(17) VMC_CMD4 A2 DQL5 A3 DQL6 A2 DQL5 A2 DQL5
N2 G2 VMC_DQ29 VMC_CMD17 P8 H7 VMC_DQ8 VMC_CMD9 N2 G2 VMC_DQ39 VMC_CMD9 N2 G2 VMC_DQ57
(17) VMC_CMD14 A3 DQL6 A4 DQL7 A3 DQL6 A3 DQL6
P8 H7 VMC_DQ26 VMC_CMD6 P2 VMC_CMD6 P8 H7 VMC_DQ35 VMC_CMD6 P8 H7 VMC_DQ61
(17) VMC_CMD17 A4 DQL7 A5 A4 DQL7 A4 DQL7
P2 VMC_CMD26 R8 VMC_CMD17 P2 VMC_CMD17 P2
(17) VMC_CMD6 A5 A6 A5 A5
R8 VMC_CMD3 R2 D7 VMC_DQ20 VMC_CMD3 R8 VMC_CMD3 R8
(17) VMC_CMD26 A6 A7 DQU0 A6 A6
R2 D7 VMC_DQ3 VMC_CMD1 T8 C3 VMC_DQ21 VMC_CMD26 R2 D7 VMC_DQ42 VMC_CMD26 R2 D7 VMC_DQ48
(17) VMC_CMD3 A7 DQU0 A8 DQU1 A7 DQU0 A7 DQU0
T8 C3 VMC_DQ6 VMC_CMD10 R3 C8 VMC_DQ18 VMC_CMD1 T8 C3 VMC_DQ46 VMC_CMD1 T8 C3 VMC_DQ53
(17) VMC_CMD1 A8 DQU1 A9 DQU2 A8 DQU1 A8 DQU1
R3 C8 VMC_DQ0 VMC_CMD21 L7 C2 VMC_DQ19 VMC_CMD5 R3 C8 VMC_DQ41 VMC_CMD5 R3 C8 VMC_DQ50
(17) VMC_CMD10 A9 DQU2 A10/AP DQU3 A9 DQU2 A9 DQU2
L7 C2 VMC_DQ7 VMC_CMD5 R7 A7 VMC_DQ22 VMC_CMD19 L7 C2 VMC_DQ45 VMC_CMD19 L7 C2 VMC_DQ54
(17) VMC_CMD21 A10/AP DQU3 A11 DQU4 A10/AP DQU3 A10/AP DQU3
R7 A7 VMC_DQ1 VMC_CMD22 N7 A2 VMC_DQ17 VMC_CMD10 R7 A7 VMC_DQ44 VMC_CMD10 R7 A7 VMC_DQ51
(17) VMC_CMD5 A11 DQU4 A12/BC DQU5 A11 DQU4 A11 DQU4
N7 A2 VMC_DQ5 VMC_CMD18 T3 B8 VMC_DQ23 VMC_CMD7 N7 A2 VMC_DQ47 VMC_CMD7 N7 A2 VMC_DQ55
(17) VMC_CMD22 A12/BC DQU5 A13 DQU6 A12/BC DQU5 A12/BC DQU5
T3 B8 VMC_DQ2 VMC_CMD29 T7 A3 VMC_DQ16 VMC_CMD29 T3 B8 VMC_DQ40 VMC_CMD29 T3 B8 VMC_DQ49
(17) VMC_CMD18 A13 DQU6 A14 DQU7 A13 DQU6 A13 DQU6
T7 A3 VMC_DQ4 VMC_CMD30 M7 VMC_CMD18 T7 A3 VMC_DQ43 VMC_CMD18 T7 A3 VMC_DQ52
(17) VMC_CMD29 A14 DQU7 A15 A14 DQU7 A14 DQU7
M7 VMC_CMD13 M7 VMC_CMD13 M7
(17) VMC_CMD30 A15 A15 A15
VMC_CMD12 M2 B2
VMC_CMD9 BA0 VDD#B2 VMC_CMD12 VMC_CMD12
(17) VMC_CMD12 M2 BA0 VDD#B2 B2 N8 BA1 VDD#D9 D9 M2 BA0 VDD#B2 B2 M2 BA0 VDD#B2 B2
N8 D9 VMC_CMD13 M3 G7 VMC_CMD14 N8 D9 VMC_CMD14 N8 D9
(17) VMC_CMD9 BA1 VDD#D9 BA2 VDD#G7 BA1 VDD#D9 BA1 VDD#D9
M3 G7 K2 VMC_CMD30 M3 G7 VMC_CMD30 M3 G7
(17) VMC_CMD13 BA2 VDD#G7 VDD#K2 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K8 K8 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#N1 N1 VDD#K8 K8 VDD#K8 K8
N1 VMC_CLKP0 J7 N9 N1 N1
VDD#N1 VMC_CLKN0 CK VDD#N9 VDD#N1 VMC_CLKP1 VDD#N1
(17) VMC_CLKP0 J7 CK VDD#N9 N9 K7 CK VDD#R1 R1 (17) VMC_CLKP1 J7 CK VDD#N9 N9 J7 CK VDD#N9 N9
K7 R1 VMC_CMD0 K9 R9 (17) VMC_CLKN1 K7 R1 VMC_CLKN1 K7 R1
(17) VMC_CLKN0 CK VDD#R1 +1.5V_GFX CKE VDD#R9 +1.5V_GFX CK VDD#R1 +1.5V_GFX CK VDD#R1 +1.5V_GFX
K9 R9 (17) VMC_CMD27 VMC_CMD27 K9 R9 VMC_CMD27 K9 R9
(17) VMC_CMD0 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9
VMC_CMD25 K1 A1
VMC_CMD2 ODT VDDQ#A1 VMC_CMD16 VMC_CMD16
(17) VMC_CMD25 K1 ODT VDDQ#A1 A1 L2 CS VDDQ#A8 A8 (17) VMC_CMD16 K1 ODT VDDQ#A1 A1 K1 ODT VDDQ#A1 A1
L2 A8 VMC_CMD24 J3 C1 (17) VMC_CMD11 VMC_CMD11 L2 A8 VMC_CMD11 L2 A8
(17) VMC_CMD2 CS VDDQ#A8 RAS VDDQ#C1 CS VDDQ#A8 CS VDDQ#A8
B J3 C1 VMC_CMD8 K3 C9 VMC_CMD24 J3 C1 VMC_CMD24 J3 C1 B
(17) VMC_CMD24 RAS VDDQ#C1 CAS VDDQ#C9 RAS VDDQ#C1 RAS VDDQ#C1
K3 C9 VMC_CMD19 L3 D2 VMC_CMD8 K3 C9 VMC_CMD8 K3 C9
(17) VMC_CMD8 CAS VDDQ#C9 WE VDDQ#D2 CAS VDDQ#C9 CAS VDDQ#C9
L3 D2 E9 VMC_CMD21 L3 D2 VMC_CMD21 L3 D2
(17) VMC_CMD19 WE VDDQ#D2 VDDQ#E9 WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#F1 F1 VDDQ#E9 E9 VDDQ#E9 E9
F1 VMC_WDQS1 F3 H2 F1 F1
VMC_WDQS3 VDDQ#F1 VMC_RDQS1 DQSL VDDQ#H2 VMC_WDQS4 VDDQ#F1 VMC_WDQS7 VDDQ#F1
F3 DQSL VDDQ#H2 H2 G3 DQSL VDDQ#H9 H9 F3 DQSL VDDQ#H2 H2 F3 DQSL VDDQ#H2 H2
VMC_RDQS3 G3 H9 VMC_RDQS4 G3 H9 VMC_RDQS7 G3 H9
DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9
VMC_DM1 E7 A9
VMC_DM3 VMC_DM2 DML VSS#A9 VMC_DM4 VMC_DM7
E7 DML VSS#A9 A9 D3 DMU VSS#B3 B3 E7 DML VSS#A9 A9 E7 DML VSS#A9 A9
VMC_DM0 D3 B3 E1 VMC_DM5 D3 B3 VMC_DM6 D3 B3
DMU VSS#B3 VSS#E1 DMU VSS#B3 DMU VSS#B3
VSS#E1 E1 VSS#G8 G8 VSS#E1 E1 VSS#E1 E1
G8 VMC_WDQS2 C7 J2 G8 G8
VMC_WDQS0 VSS#G8 VMC_RDQS2 DQSU VSS#J2 VMC_WDQS5 VSS#G8 VMC_WDQS6 VSS#G8
C7 DQSU VSS#J2 J2 B7 DQSU VSS#J8 J8 C7 DQSU VSS#J2 J2 C7 DQSU VSS#J2 J2
VMC_RDQS0 B7 J8 M1 VMC_RDQS5 B7 J8 VMC_RDQS6 B7 J8
DQSU VSS#J8 VSS#M1 DQSU VSS#J8 DQSU VSS#J8
VSS#M1 M1 VSS#M9 M9 VSS#M1 M1 VSS#M1 M1
VSS#M9 M9 VSS#P1 P1 VSS#M9 M9 VSS#M9 M9
P1 VMC_CMD28 T2 P9 P1 P1
VSS#P1 RESET VSS#P9 VMC_CMD28 VSS#P1 VMC_CMD28 VSS#P1
(17) VMC_CMD28 T2 RESET VSS#P9 P9 VSS#T1 T1 T2 RESET VSS#P9 P9 T2 RESET VSS#P9 P9
T1 VMC_ZQ2 L8 T9 T1 T1
VMC_ZQ1 VSS#T1 ZQ VSS#T9 VMC_ZQ3 VSS#T1 VMC_ZQ4 VSS#T1
L8 ZQ VSS#T9 T9 L8 ZQ VSS#T9 T9 L8 ZQ VSS#T9 T9

Should be 240 Should be 240 VSSQ#B1 B1 Should be 240 Should be 240


Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B9 B9 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1
VSSQ#B9 B9 VSSQ#D1 D1 VSSQ#B9 B9 VSSQ#B9 B9
R413 D1 R48 D8 R37 D1 R409 D1
VSSQ#D1 VSSQ#D8 VSSQ#D1 VSSQ#D1
SNP@243/F_4 VSSQ#D8 D8 SNP@243/F_4 VSSQ#E2 E2 SNP@243/F_4 VSSQ#D8 D8 SNP@243/F_4 VSSQ#D8 D8
VSSQ#E2 E2 J1 NC#J1 VSSQ#E8 E8 VSSQ#E2 E2 VSSQ#E2 E2
J1 NC#J1 VSSQ#E8 E8 L1 NC#L1 VSSQ#F9 F9 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8
C L1 NC#L1 VSSQ#F9 F9 J9 NC#J9 VSSQ#G1 G1 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 C
J9 NC#J9 VSSQ#G1 G1 L9 NC#L9 VSSQ#G9 G9 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9
96-BALL
96-BALL SDRAM DDR3 96-BALL 96-BALL
SDRAM DDR3 SNP@CSP@VRAM _DDR3 SDRAM DDR3 SDRAM DDR3
SNP@CSP@VRAM _DDR3 SNP@CSP@VRAM _DDR3 SNP@CSP@VRAM _DDR3

+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX

VMC_CLKP0
VMC_CLKP1 R405 R27
R414 R411 R42
SNP@243/F_4 SNP@1.33K/F_4 SNP@1.33K/F_4 R31 SNP@1.33K/F_4 SNP@1.33K/F_4
SNP@243/F_4
VMC_CLKN0 VREFC_VMC1 VREFD_VMC1 VREFC_VMC3 VREFD_VMC3
VMC_CLKN1

R412 C558 C153 R406 R29


SNP@1.33K/F_4 SNP@0.1u/10V_4 R46 SNP@0.1u/10V_4 SNP@1.33K/F_4 C555 SNP@1.33K/F_4 C45
12/9 NV recommend 0.1uf x 5, 1uf x 4 per DDR3 SNP@1.33K/F_4 SNP@0.1u/10V_4 SNP@0.1u/10V_4

DEL C3585,C3637,C3653,C3655,C3665 FOR NV recommend


10/21 Add for NV Request 10/21 Add for NV Request

+1.5V_GFX +1.5V_GFX
D D
+1.5V_GFX +1.5V_GFX

+1.5V_GFX C69 SNP@1u/6.3V_4 C552 SNP@1u/6.3V_4


C544 SNP@0.1u/10V_4 C543 SNP@0.1u/10V_4 C158 SNP@1u/6.3V_4 C97 SNP@1u/6.3V_4
C561 SNP@0.1u/10V_4 C132 SNP@0.1u/10V_4 C51 SNP@1u/6.3V_4 C42 SNP@1u/6.3V_4
C537 SNP@4.7u/6.3V_6 C541 SNP@0.1u/10V_4 C169 SNP@0.1u/10V_4 C525 SNP@1u/6.3V_4 C63 SNP@1u/6.3V_4
C32
C46
SNP@0.1u/10V_4
SNP@0.1u/10V_4
C36
C553
SNP@0.1u/10V_4
SNP@0.1u/10V_4
C556
C34
SNP@0.1u/10V_4
SNP@0.1u/10V_4
C166
C164
SNP@1u/6.3V_4
SNP@1u/6.3V_4
C551
C30
SNP@1u/6.3V_4
SNP@1u/6.3V_4
Quanta Computer Inc.
C557 SNP@0.1u/10V_4 C540 SNP@0.1u/10V_4 C539 SNP@0.1u/10V_4 C128 SNP@1u/6.3V_4 C60 SNP@1u/6.3V_4
C554 SNP@0.1u/10V_4 C107 SNP@0.1u/10V_4 C542 SNP@0.1u/10V_4 C33 SNP@1u/6.3V_4 C112 SNP@1u/6.3V_4 PROJECT : ZQ3
C140 SNP@0.1u/10V_4 C538 SNP@0.1u/10V_4 Size Document Number Rev
1A
N11P-GE VRAM-2(DDR3 BGA96)
Date: Monday, March 29, 2010 Sheet 22 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CRT Switch(CRT) S Yn +5V CRT SWITCH (DOK) +5V


(CRT)
dGPU_SELECT# Output
dGPU_EDIDSEL# 3.3V or 5V level? U35
IV@ +5V 0 EV C208 VGA_RED VCC
16 C605
VGA_RED_SYS
0.1u/10V_4
L EV_LVDS/CRT U10
4
C_A A0
2
3 VGA_RED_PR

TO
SW@ 1 IV H INT_LVDS/CRT SW@0.22u/6.3V_4 16
VCC GND
8 VGA_GRE 7
C_B
A1
B0
5 VGA_GRE_SYS
VGA_GRE_PR
VGA_RED_PR (33)
6 VGA_GRE_PR (33)
C232 VGA_BLU B1 VGA_BLU_SYS
9 11
U12 EV_CRTDCLK C_C C0 VGA_BLU_PR
(18) EV_CRTDCLK 2 10 VGA_BLU_PR (33)
SW@0.22u/6.3V_4 EV_CRTDDAT IA0 CRTDCLK C1
16 8 (18) EV_CRTDDAT 5 4 12 14
VCC GND EV_LVDS_DDCDAT IB0 YA C_D D0
11 13

Po
(19) EV_LVDS_DDCDAT IC0 D1
EV_LVDS_DDCCLK 14 7 CRTDDATA 1
(19) EV_LVDS_DDCCLK ID0 YB (33) PR_INSERT_5V SE
2 15 8 1/27 change R443 to fuse C253 0.1u/10V_4 2/03 modify footprint
(18) EV_CRT_BLU IA0 EN# GND
5 4 VGA_BLU INT_CRT_DDCCLK 3 9 LCD_EDIDDATA
(18) EV_CRT_GRE IB0 YA (8) INT_CRT_DDCCLK IA1 YC
11 INT_CRT_DDCDAT 6 SN74CBT3257CPWR
(18) EV_CRT_RED IC0 (8) INT_CRT_DDCDAT IB1

rt
14 7 VGA_GRE INT_LVDS_EDIDDATA 10 12 LCD_EDIDCLK F1
A ID0 YB (8) INT_LVDS_EDIDDATA IC1 YD A
INT_LVDS_EDIDCLK CRTVDD5_R CRTVDD5 CN14

16
(8) INT_LVDS_EDIDCLK 13 +5V 1 2
VGA_RED ID1 D19 SSM22LLPT
(8) INT_CRT_BLU 3 9
IA1 YC SMD1206P110TFT CRT
(8) INT_CRT_GRE 6
IB1
(8) INT_CRT_RED 10 12 (10,24) dGPU_EDIDSEL# 1 15 6
IC1 YD S OE VGA_RED_SYS L22 BLM18BA750SN1D/300mA/75ohm_6 CRT_R1 CRT_11
13 1 11 T11
ID1

Re
SW@SN74CBT3257CPWR 7
VGA_GRE_SYS L21 BLM18BA750SN1D/300mA/75ohm_6 CRT_G1 2 12 DDCDAT_1
dGPU_SELECT# 1 15 8
S
SW@SN74CBT3257CPWR
OE
UMA INT_CRT_RED
INT_CRT_GRE
R134
R132
IV@0_4
IV@0_4
VGA_RED
VGA_GRE
VGA_BLU_SYS L20 BLM18BA750SN1D/300mA/75ohm_6 CRT_B1 3 13 CRTHSYNC

pl
9
INT_CRT_BLU R133 IV@0_4 VGA_BLU CRTVSYNC
only INT_VSYNC
INT_HSYNC
R97
R86
IV@0_4
IV@0_4
VSYNC
HSYNC
R447 R448 R445 C608 C609 C607 C259 C260 C262
4
10
5
14

15 DDCCLK_1
+5V INT_CRT_DDCDAT R99 IV@0_4 CRTDDATA 150/F_4 150/F_4 150/F_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4

i
INT_CRT_DDCCLK R87 IV@0_4 CRTDCLK
U9 INT_LVDS_EDIDDATA R104 IV@0_4 LCD_EDIDDATA

TO
c

17
C228 SW@0.22u/6.3V_4 16 8 INT_LVDS_EDIDCLK R98 IV@0_4 LCD_EDIDCLK
VCC GND
10/20 Del 10/20 Modify

at
CRT_VSYNC2 (33)
INT_LVDS_DIGON 1 2 LVDS_VDDEN
2 INT_LVDS_BLON 3 4 LVDS_BLON
(19) EV_LVDS_BLON IA0 +3V CRT_HSYNC2 (33)
5 4 LVDS_BLON_R RN1 IV@0_4P2R
(19) EV_LVDS_VDDEN IB0 YA
11 C256 U15

Po
(18) EV_HSYNC IC0

or
14 7 LVDS_VDDEN_R CRTVDD5 1 16 CRT_VSYNC2 R147 0_4 CRTVSYNC C244 *0.1u/10V_4 CRTVDD5
(18) EV_VSYNC ID0 YB VCC_SYNC SYNC_OUT2
0.1u/10V_4 14 CRT_HSYNC2 R150 0_4 CRTHSYNC
HSYNC SYNC_OUT1 C252 *10p/50V_4 CRTVSYNC
(8) INT_LVDS_BLON 3 9 7
IA1 YC C772 C773 CRT_BYP VCC_DDC
(8) INT_LVDS_DIGON 6 8
IB1 BYP

rt
10 12 VSYNC C254 0.22u/25V_6 15 VSYNC CRTVDD5 C255 *10p/50V_4 CRTHSYNC
(8) INT_HSYNC IC1 YD SYNC_IN2

*1000p/50V_4

*1000p/50V_4
13 2 13 HSYNC +3V
(8) INT_VSYNC ID1 +3V VCC_VIDEO SYNC_IN1 C249 10p/50V_4 DDCCLK_1
C257 R140 R141
dGPU_SELECT# 1 15 CRT_R1 3 10 CRTDCLK R151 2.7K_4 C250 10p/50V_4 DDCDAT_1
R106 100K_4 INT_LVDS_DIGON S OE 0.1u/10V_4 CRT_G1 VIDEO_1 DDC_IN1 CRTDDATA R152 2.7K_4 2.7K_4 2.7K_4
4 11
VIDEO_2 DDC_IN2

Re
SW@SN74CBT3257CPWR CRT_B1 5
R105 100K_4 INT_LVDS_BLON VIDEO_3 DDCCLK_1
9

TO
10/16 6
DDC_OUT1
12 DDCDAT_1
DDCCLK_1 (33)
GND DDC_OUT2 DDCDAT_1 (33)
1/22 add for EMI

pl
CM2009-02QR
B B

Po
10/20 Modify

i
LVDS Switch (LDS) U13
LVDS +3V VIN LCD Power(LDS)
S Yn dGPU_SELECT# Output

ca
+3V

rt
46 6 TXLCLKOUTP LVDS_VDDEN_R R386 SW@0_4 LVDS_VDDEN
(18) EV_TXLCLKOUTP A2P C2P TXLCLKOUTN L EV_LVDS C194 C12 C501
(18) EV_TXLCLKOUTN 45
A2N C2N
7 0 EV C502

to
44 9 TXLOUTP2 0.1u/10V_4 1000p/50V_4 C690 U26
(18) EV_TXLOUTP2 A1P C1P TXLOUTN2 H INT_LVDS 1000p/50V_4 4.7u/25V_8
(18) EV_TXLOUTN2 43
A1N IN_A OUT_C C1N
10 1 IV 1u/6.3V_4 6 1 LCDVCC
IN OUT

Re
41 15 TXLOUTP1
(18) EV_TXLOUTP1 A0P C0P

r
40 16 TXLOUTN1 4 2
(18) EV_TXLOUTN1 A0N C0N IN GND C503 C499 C504 C505 C500
39 18 TXLOUTP0 +1.8V +3V LVDS_VDDEN 3 5
(18) EV_TXLOUTP0 ACLKP CCLKP ON/OFF GND
TXLOUTN0 *0.1u/10V_4 *10u/10V_8 0.1u/10V_4 0.01u/25V_4 22u/6.3V_8

pl
(18) EV_TXLOUTN0 38 19
ACLKN CCLKN
AAT4280-4
R117 Q2 10/16 CN1

G_0
2

SW@10K_4 SW@2N7002D +3V LCDVCC

i
R12 1 +3V
35
(8) INT_TXLCLKOUTP
34
B2P
13 dGPU_SELECT_R 3 1 dGPU_SELECT_R1 2 10/16 *SW@0.1u/10V_4

c
(8) INT_TXLCLKOUTN B2N SEL dGPU_SELECT# (10) 3 G_1 C641
SW@0_4 R379 2.2K_4 LCD_EDIDCLK 4
33

at
(8) INT_TXLOUTP2

5
B1P R378 2.2K_4 LCD_EDIDDATA 5
(8) INT_TXLOUTN2 32 1 EV_LVDS_VDDEN (19)
B1N 6 R383 *SW@100K_4
1 4
VSS +3V *SW@0.1u/10V_4 TXLOUTN0 7
30 3 2
(8) INT_TXLOUTP1
29
B0P VSS
5
10/16 C15 TXLOUTP0 8 INT_LVDS_DIGON (8)
(8) INT_TXLOUTN1

3
B0N VSS 9

or
IN_B 8 U28
VSS TXLOUTN1 10 *SW@NL17SZ32DFT2G
(8) INT_TXLOUTP0 28 11
BCLKP VSS TXLOUTP1 11
(8) INT_TXLOUTN0 27 14
5

BCLKN VSS dGPU_SELECT# 12


17 1
VSS TXLOUTN2 13
48 20 4
C245 SW@1000p/50V_4 VDD VSS R14 EV_LVDS_BRIGHT# TXLOUTP2 14
36 22 2
C226 SW@1000p/50V_4 VDD VSS *SW@100K_4 15 G_2
25 24
Backlight Control (LDS)
3

C243 SW@0.22u/6.3V_4 VDD VSS U1 TXLCLKOUTN 16


23 26
C
C247 SW@0.1u/10V_4 VDD VSS *SW@NL17SZ32DFT2G TXLCLKOUTP 17 C
21 31
C234 SW@0.1u/10V_4 VDD VSS 18
12 37
VDD VSS 19
4 42 (34) PANEL_COLOR
C227 SW@2.2u/6.3V_6 VDD VSS 20
2 47
VDD VSS 21
22

+1.8V SW@TS3DV421DGVR +3V R9 *SW@10K_4 EV_LVDS_BRIGHT# LVDS_BRIGHT 23 10/20 Modify


BL_ON 24
3

VIN 25
(34) PANEL_ENG 26
27
LVDS_BLON_R R389 SW@0_4 LVDS_BLON LID591#,EC intrnal PU
UMA only (19) EV_LVDS_BRIGHT 2 R376
R377
*0/short_8
*0/short_8 INVCC0
28
29
G_4

30

G_3
INT_TXLCLKOUTN RN2 1 2 IV@0_4P2R TXLCLKOUTN Q1 0.8A LID591# (34,37)
INT_TXLCLKOUTP 3 4 TXLCLKOUTP *SW@2N7002D LVD-A30SFYG+ +3V
1

INT_TXLOUTN0 RN5 1 2 IV@0_4P2R TXLOUTN0 C774 C775


10/16

1
INT_TXLOUTP0 3 4 TXLOUTP0 *1000p/50V_4 0.1u/10V_4
INT_TXLOUTN1 RN4 1 2 IV@0_4P2R TXLOUTN1 D12
INT_TXLOUTP1 3 4 TXLOUTP1 BAS316
INT_TXLOUTN2 RN3 1 2 IV@0_4P2R TXLOUTN2 1/22 add for EMI
INT_TXLOUTP2 3 4 TXLOUTP2 1000p/50V_4 C3 PANEL_COLOR R382

2
1000p/50V_4 C2 PANEL_ENG R384 10K_4
CAMERA Module(CCD) BL_ON
10K_4
10/16

3
CN2
For EMI (12/22) (30) DMIC_DAT DMIC_DAT R435 *0/short_4 8 10

3
DMIC_CLK R436 *0/short_4 7 9
(30) DMIC_CLK
6 BL# 2
+3V 5 R385 *SW@100K_4 2 EC_FPBACK# (34)

3
USBP8+_R 4 Q29
USBP8-_R 3 2N7002D Q27
+3V 2 DTC144EUA

1
C14 +3V 1 LVDS_BLON 2

SW@0.22u/6.3V_4 U2 CCD&MIC CONN Q28


D C6 C7 C4 C5 2N7002D D
5 6 PWM_SELECT# (9,10)

1
VCC S
*0.1u/10V_4

*0.1u/10V_4

*0.1u/10V_4

*0.1u/10V_4

R11 *0_4 3 4 LVDS_BRIGHT


EMI addition
(19) EV_LVDS_BRIGHT B0 YA
+3V
1 2
10/16
(8) INT_LVDS_BRIGHT B1 GND C510 *SW@0.1u/10V_4
C776 R7 *0_4
5

R10 SW@0_4 SW@74LVC1G3157GW *1000p/50V_4 1


(34) CONTRAST
R15 IV@0_4
L1
USBP8-_R
4
EV_LVDS_BLON (19)
Quanta Computer Inc.
1/22 add for EMI (10) USBP8- 2
2 1
1 2 INT_LVDS_BLON (8)
3 4 USBP8+_R
(10) USBP8+ PROJECT : ZQ3
3

3 4 U27
10/18 R13 *EV@0_4 RFCMF1632100M3T/200mA/90ohm *SW@NL17SZ32DFT2G Size Document Number Rev
For EMI. (3/26) 1A
R6 *0_4 CRT/LVDS/CAMERA/LID
Date: Monday, March 29, 2010 Sheet 23 of 47
1 2 3 4 5 6 7 8
5 4 3 2 1

NV HDMI-detect(DOK)
I@ HDMI LEVEL SHIFTER(DOK) (34) HDMI_HPD_EC#
+3V_GFX

+3V +3V
+3V
HDMI_MB_HP To iGPU HPD R464
MB_HDMI_DDCDATA SW@10K_4 To NV HPD
MB_HDMI_DDCCLK R466
+3V R206 *IV@4.7K_4 +3V SW@10K_4 HDMI_HP_EV (19)
C343 C370 C319 C356 C371 +3V HDMI_HPD_EC# R480

3
DDCBUF_EN 10K_4
IV@2.2u/6.3V_6 IV@0.1u/10V_4 IV@0.1u/10V_4 IV@0.1u/10V_4 IV@0.1u/10V_4 CFG
INT_HDMI_HPD R465 SW@0_4
D Active Buffer HDMI_HPD_EC# 2 D

3
close to pin2/11/15/21/26/33/40/46 Q36 Q38
SW@2N7002D SW@2N7002D

36
35
34
33
32
31
30
29
28
27
26
25
U16
2 1/12 modified

1
+3V HDMI_MB_HP 2

CCT2
CCT1

OE#
HPD_SINK
SDA_SINK
SCL_SINK
GND

VCC
DDC_EN
GND

GND
VCC
10/16 Q37
from PCH 10/16 37 24 10/20 Add 1/12 modified 2N7002D

1
C348 C357 C347 GND GND HDMI_TXN0
(8) INT_HDMI_TXN0 38 23

1
IN_D1- OUT_D1- HDMI_TXP0
(8) INT_HDMI_TXP0 39 22 +5V
*IV@0.1u/10V_4 *IV@0.1u/10V_4 IV@0.1u/10V_4 IN_D1+ OUT_D1+ R477 *10K_4
+3V 40
VCC VCC
21
HDMI_TXN2
+3V OE# control for power saving
(8) INT_HDMI_TXN2 41 20
IN_D2- OUT_D2- HDMI_TXP2
(8) INT_HDMI_TXP2 42 19
IN_D2+ OUT_D2+
43 18
GND GND HDMI_TXN1
10/16 (8) INT_HDMI_TXN1 44
45
IN_D3- OUT_D3-
17
16 HDMI_TXP1 SDVO I2C Control(DOK)
(8) INT_HDMI_TXP1 IN_D3+ OUT_D3+
+3V 46 15 +3V
VCC VCC HDMI_CLKN
(8) INT_HDMI_TXCN 47 14
IN_D4- OUT_D4- HDMI_CLKP
(8) INT_HDMI_TXCP 48
IN_D4+ OUT_D4+
13
+5V Bypass(default)

HPDEN
49
Quick Display

HPD_S
SDA_S
SCL_S
GND

REXT
TRIM
GND

GND

GND
VCC

VCC
NC
MXM_DDCCK_C R498 *SW@0_4 MXM_DDCCK
MXM_DDCDAT_C R499 *SW@0_4 MXM_DDCDAT
+3V C640

1
2
3
4
5
6
7
8
9
10
11
12
IV@SN75DP139 U39 1/12 modified
R161 IV@4.7K_4 PC0 *SW@0.22u/6.3V_4
R166 *IV@4.7K_4 16 8 CS22202JB18 RES CHIP 2.2K 1/16W +-5%(0402)
VCC GND
+3V +3V CS24702JB38 RES CHIP 4.7K 1/16W +-5% (0402)

LS_REXT
R163 *IV@4.7K_4 PC1 PC0 2
(18) MXM_DDCCK_C IA0
C R160 IV@4.7K_4 PC1 5 4 MXM_DDCCK C
(18) MXM_DDCDAT_C IB0 YA
11
from PCH 14
IC0
ID0 YB
7 MXM_DDCDAT +5V D21 2 1 RB501V-40
R208 *IV@4.7K_4 DDCBUF_EN R159 IV@3.9K/F_4
R207 IV@4.7K_4 3 9 HDMI SDVO I2C
Control by pin4 HPDEN_R
(8) SDVO_CTRLCLK
(8) SDVO_CTRLDAT 6
IA1
IB1
YC SP@ For IV: 2.2K ohm
R485 NV suggestion near
R209 *IV@4.7K_4 CFG
R210 *IV@4.7K_4 INT_HDMI_HPD
10
13
IC1 YD
12 S Yn For SW:4.7K ohm
CSP@2.2K_4
HDMI connector
(8) INT_HDMI_HPD ID1

1 15
0 EV
(10,23) dGPU_EDIDSEL# S OE
R158 IV@0_4 HDMI_DDCDATA_SW MB_HDMI_DDCCLK R484 HDMI_DDCCLK_MB
(8) SDVO_CTRLDAT
SW@SN74CBT3257CPWR *0/short_6
R157 IV@0_4 HDMI_DDCCLK_SW
1 IV
(8) SDVO_CTRLCLK 10/16 +5V D20 2 1 RB501V-40 C643
Q39
2N7002D *0.1u/10V_4
R491
Equalization Control R501 IV@4.7K_4 MXM_DDCCK 1 3 MB_HDMI_DDCCLK CSP@2.2K_4
PC0 internal PD +3V R500 IV@4.7K_4 TI FAE recommend (12/10)
PC1 PC0 PC1 internal PD
PIN4 PIN3 EQ Control 1. Add R9795

2
DDCBUF_EN internal PD +3V MB_HDMI_DDCDATA R490 HDMI_DDCDATA_MB
L L 8dB CFG internal PD 2. Stuff R9790 *0/short_6

2
L H 4dB DDC_EN internal PU
H L 12dB 3. CHange R9801 from 499Ω to 3.9KΩ C649
H H 0dB MXM_DDCDAT 1 3 MB_HDMI_DDCDATA HDMI SDVO I2C
SP@ For IV: 2.2K ohm (CS22202JB18)
*0.1u/10V_4
Q40
2N7002D For SW:4.7K ohm (CS24702JB38)
B B

Switchable Graphic HDMI source(DOK) ESD Protect(DOK)


IV@
close to HDMI connector

(18) HDMITXN0
C364
C363
SW@0.1u/10V_4
SW@0.1u/10V_4
HDMI_TXN0
HDMI_TXP0 HDMI_CLKP
U37
HDMI_CLKP HDMI_TXP2
SW@
(18) HDMITXP0 1 10 HDMI_TXP2 (33)
HDMI_CLKN 1 10 HDMI_CLKN
2 9
SP@

TO
C355 SW@0.1u/10V_4 HDMI_TXN2 2 9 R179 *100/F_4
(18) HDMITXN2 3
C354 SW@0.1u/10V_4 HDMI_TXP2 HDMI_TXP0 GND_3/8 HDMI_TXP0
(18) HDMITXP2 4 7
HDMI_TXN0 4 7 HDMI_TXN0 HDMI_TXN2
5 6 HDMI_TXN2 (33)
C346 SW@0.1u/10V_4 HDMI_TXP1 5 6
(18) HDMITXP1
C351 SW@0.1u/10V_4 HDMI_TXN1 *RClamp0524P HDMI_TXP1
(18) HDMITXN1 HDMI_TXP1 (33)
C337 SW@0.1u/10V_4 HDMI_CLKP R171 *100/F_4
(18) HDMICLKP
C342 SW@0.1u/10V_4 HDMI_CLKN U38

Po
(18) HDMICLKN
HDMI_TXN2 1 10 HDMI_TXN2 HDMI_TXN1
1 10 HDMI_TXN1 (33)
HDMI_TXP2 2 9 HDMI_TXP2 HDMI_DDCCLK_MB
2 9 HDMI_DDCCLK_MB (33)
R456 R455 R459 R458 R460 R461 R462 R463 3 HDMI_TXP0 HDMI_DDCDATA_MB
To Discrete HDMI_TXN1 4
GND_3/8
4 7
7 HDMI_TXN1
HDMI_TXP0 (33) HDMI_DDCDATA_MB (33)
SW@499/F_4

SW@499/F_4

SW@499/F_4

SW@499/F_4

SW@499/F_4

SW@499/F_4

SW@499/F_4

SW@499/F_4

HDMI_TXP1 5 6 HDMI_TXP1 R189 *100/F_4 HDMI_MB_HP R184 HP_DET


5 6 HP_DET (33)

rt
*0/short_4
*RClamp0524P HDMI_TXN0
HDMI_TXN0 (33)
HDMI_CLKP R454 0_6 R178
HDMI_CLKP (33)
U17 L40 C779 100K_4
A
HDMI_DDCCLK_MB 1 10 HDMI_DDCCLK_MB R168 *100/F_4 2 1 *1u/6.3V_4
A
HDMI_DDCDATA_MB 1 10 HDMI_DDCDATA_MB 2 1
2 9 3 4
3

2 9 HDMI_CLKN 3 4
3 HDMI_CLKN (33)
GND_3/8

R
HDMI_MB_HP 4 7 HDMI_MB_HP R457 0_6
Q17 4 7
5
5 6
6 2/2 modified
+5V 2 *WCM2012-90

e
*RClamp0524P

R220 2N7002D Quanta Computer Inc.

pl
SW@100K_4
1

PROJECT : ZQ3
Size Document Number Rev
1A
DVI (PS8101)

i
Date: Monday, March 29, 2010 Sheet 24 of 47
5 4 3 2 1

cat
o
A B C D E

Cardreader(MMC)
R278 2.2/F_6 +3V_VDD
+3V

R553 *0/short_4 XTALSEL C743 close PIN46, 47


+1.8V_VDD
Clock input selection +3V_VDD C708 close PIN48, 47

XD_WE#/SD_CD#
'1' for 48MHz input [Default]

XD_CLE/SD_WP
'0' for 12MHz input C705 C714 Main DFHD36MS006
0.1u/16V_4 0.1u/16V_4

XTALSEL
4 4

DATA1
DATA0
DATA7
DATA6
8/14 ZH7 remove R136, R591 and C775
Second DFHD36MS012
R595 *100K_4 +3V_VDD

R589 *0/short_4 CARD_RST#

48
47
46
45
44
43
42
41
40
39
38
37
(4,10,11,16,26,28,31,34) PLTRST# U42
1 2 CTRL0, CRTL 1 trace length shorter ,

GND
VDD

NBMD
VDDHM

TRIST
XTALSEL

CTRL1
CTRL3
DATA1
DATA0
DATA7
DATA6
C734 *0.47u/10V_6 and surround with GND.
+3V_VDD
C712 1 36 XD_ALE/MS_BS
GPON7 CTRL0 DATA5
2 EXT48IN DATA5 35
4.7u/10V_6 3 34 XD_RDY/SD_CMD
R596 330_4 RSTN CTRL2
4 33

USBP12+_R
5
REXT
VD33P
GPI4
DATA4 32 DATA4
DATA3
10/19
6 DP DATA3 31
USBP12-_R 7 AU6437-GBL 30 DATA2
DM DATA2 XD_WP#
8 VS33P XDWPN 29
R658 *0/short_4 XI 9 28
XO XI GPI2 XD_CE#
10 XO XDCEN 27
L57 11 26
*DLW21HN900SQ2L/330mA/90ohm VDD EEPDATA
+1.8V_VDD 12 VDD GPI1 25
2 2 USBP12-_R
1 1

SDWPEN
(10) USBP12-

AGND5V

EEPCLK
CF_V33

VDDHM
USBP12+_R 8/14 C707 close PIN11, 12

XDCDN
3 3 4 4

VCC33

CTRL4
(10) USBP12+

GND
VDD
V18

V33
3 3
R659 *0/short_4
For EMI. (3/26)

13
14
15
16
17
18
19
20
21
22
23
24
crystal trace width needs at least 10 mils.
8/14 pin13 output 20mils C735
C743 18p/50V_4 XI
4.7u/10V_6
R534 *0_4

VCC_XD
Y5 R590
12MHz 270K_4
XD_CD#
C742 18p/50V_4 XO
XD_RE#/MS_INS#
SD write protect
+1.8V_VDD 1:decided by SDWP[Default]
0:letting SD always
+3V_VDD +3V_VDD
write-able

C713 C699

4.7u/10V_6 0.1u/16V_4

2 2

4 IN 1 CARD READER (MMC)


VCC_XD Close to CN14 pin 14 & pin23
4.7u CAP close to pin23
VCC_XD VCC_XD

CN11 R529 C720 C684


21 SD-VCC
DATA0 31 *5.1K_4 4.7u/10V_6 0.1u/16V_4
DATA1 SD-DAT0
34 SD-DAT1
DATA2 9 38
DATA3 SD-DAT2 XD-VCC
11 SD-DAT3
SD_CLK 25 2 XD_CD#
XD_RDY/SD_CMD SD-CLK XD-CD XD_RDY/SD_CMD
XD_WE#/SD_CD#
15
39
SD-CMD XD-R/B 3
4 XD_RE#/MS_INS#
Close to connector
XD_CLE/SD_WP SD-C/D XD-RE XD_CE#
41 SD-WP XD-CE 5
6 XD_CLE/SD_WP XD_ALE/MS_BS R527 SD_CLK C683 *10p/50V_4
XD-CLE XD_ALE/MS_BS SBY100505T-121Y-N
19 SD-VSS1 XD-ALE 7
29 8 XD_WE#/SD_CD#
SD-VSS2 XD-WE XD_WP# XD_CLE/SD_WP R548 MS_SCLK C696 *10p/50V_4
40 SD-GND XD-WP 13
SBY100505T-121Y-N
12 23 DATA0
DATA0 MS-VCC XD-D0 DATA1
22 MS-DATA0 XD-D1 27
DATA1 24 30 DATA2
1 DATA2 MS-DATA1 XD-D2 DATA3 1
20 MS-DATA2 XD-D3 32
DATA3 16 33 DATA4
MS_SCLK MS-DATA3 XD-D4 DATA5
14 MS-SCLK XD-D5 35
XD_RE#/MS_INS# 18 36 DATA6
XD_ALE/MS_BS MS-INS XD-D6 DATA7
26 MS-BS XD-D7 37

10 MS-VSS1 XD-GND1 1 Quanta Computer Inc.


28 MS-VSS2 XD-GND2 17
42 GND1 GND2 43 PROJECT : ZQ3
Size Document Number Rev
CARD_READER-CM4R-115 1/14 modify footprint. 1A
AU6437 CardReader
Date: Monday, March 29, 2010 Sheet 25 of 47
A B C D E
5 4 3 2 1

Giga-LAN BCM57760(LAN)

+3V_S5 R279 2.2/F_6 +3V_LAN C240 4.7u/10V_6


D D
C238 0.1u/10V_4

LAN PN U11

56
61

19
20
38
52
55
68
DC
DC
DC
DC
DC
DC
VDDO
VDDO
15mil
11 36 BIASVDD L5 BLM18AG601SN1/200mA/600ohm_6 +3V_LAN
VAUX_12 VDDC BIASVDDH
34 C182 0.1u/10V_4
VDDC
60
C239 4.7u/10V_6 VDDC
C237 0.1u/10V_4 23 XTALVDD L18 BLM18AG601SN1/200mA/600ohm_6
C223 0.1u/10V_4 XTALVDDH C230 0.1u/10V_4
C225 0.1u/10V_4

48 AVDDH L6 BLM18AG601SN1/200mA/600ohm_6
AVDDH
42
AVDDH C190 0.1u/10V_4

L9 BLM18AG601SN1/200mA/600ohm_6 15mil AVDDL


BCM57760 C192 0.1u/10V_4
VAUX_12
C191 4.7u/10V_6
39
AVDDL 10mm x 10mm
45
C181 0.1u/10V_4 AVDDL
51
AVDDL 68-Pin QFN

49
15mil TRD3_N
50
TXN3 (27)
TRD3_P TXP3 (27)
L10 BLM18AG601SN1/200mA/600ohm_6 GPHY_PLLVDD 35
C201 4.7u/10V_6 GPHY_PLLVDDL
C 47 TXN2 (27)
C
C193 0.1u/10V_4 TRD2_N
46 TXP2 (27)
TRD2_P
43
15mil TRD1_N
44
TXN1 (27)
TRD1_P TXP1 (27)
L12 BLM18AG601SN1/200mA/600ohm_6 PCIE_PLLVDD 30
PCIE_PLLVDDL
27 41 TXN0 (27)
C207 4.7u/10V_6 PCIE_PLLVDDL TRD0_N
40 TXP0 (27)
C213 0.1u/10V_4 TRD0_P
2 LAN_LINKLED#
LINKLED#
SPD100LED#
1
LAN_LINKLED# (27)
Flash (1M) for ASF2.0
67
SPD1000LED# LAN_ACTLED#
33 66 LAN_ACTLED# (27)
DC TRAFFICLED# +3V_LAN
VAUX_12 24
VDDC
6
GPIO2 R122 *4.7K_4 +3V_LAN
10
MODE R123 *4.7K_4 +3V_LAN

5 LAN_SERIAL_DI R118 R112


0.1u/10V_4 C220 PCIE_RXP1_C GPIO1_SERIALDI LAN_SERIAL_DO 1K_4 *1K_4
(10) PCIE_RXP1 26 4
0.1u/10V_4 C221 PCIE_RXN1_C PCIE_TXD_P GPIO0_SERIALDO U14
(10) PCIE_RXN1 25
PCIE_TXD_N
31 5 6
(10) PCIE_TXP1 PCIE_RXD_P WP# VCC
32 3
(10) PCIE_TXN1 PCIE_RXD_N RST# C224
(8) PCIE_WAKE# 9
WAKE# BCM_EEC
7 2
(4,10,11,16,25,28,31,34) PLTRST# PERST# BCM_EEC BCM_SI SCK *0.1u/16V_4
29 65 8
(10) CLK_PCIE_LOMP PCIE_REFCLK_P SCLK_EECLK BCM_SI BCM_EED SO
28 63 1
(10) CLK_PCIE_LOMN PCIE_REFCLK_N SI BCM_EED BCM_CS# SI
64 4 7
SO_EEDATA BCM_CS# CS# GND
62
+3V_LAN R126 10K_4 PCIE_WAKE# CS# AT45DB011D-SH-T

R114 R110
*1K/F_4 1K/F_4

59
NC

B VAUX_12 B
+3V_LAN R77 1K/F_4 VAUX_PRSNT 54
R72 1K/F_4 VMA_PRES VAUX_PRSNT
1/21 modified +3V 53
VMAIN_PRSNT
R121 4.7K_4 LOW_PWR 3
LOW_PWR L19 4.7uH/680mA
18
SR_LX
58 13
(3,10,28) ICH_SMBCLK SMB_CLK SR_VFB
57
(3,10,28) ICH_SMBDATA SMB_DATA
C222 33p/50V_4 R103 200_4 XTALO 22
XTALI XTALO
21 17 +3V_LAN
XTALI SR_VDDP
1

16
Y1 R69 1.2K/F_4 RDAC SR_VDDP
1.2H 37
RDAC SR_VDDP
15
25MHz 14 C241 C99 C242
SR_VDD 0.1u/10V_4
2

C231 33p/50V_4 2/24 modified 4.7u/10V_6 C236 10u/6.3V_6

0.1u/10V_4

2/10 modified

12
+3V_LAN R125 10K_4 NC
8
CLK_REQ#

R124 *0/short_4 BCM_CLKREQ#


(10) CLK_PCIE_LAN_REQ#
Package Body
69

A A

Quanta Computer Inc.


PROJECT : ZQ3
Size Document Number Rev
1A
LAN (AR8151)
Date: Monday, March 29, 2010 Sheet 26 of 47
5 4 3 2 1
1 2 3 4 5 6 7 8

LAN SWITCH (DOK) TRANSFORMER (LAN)

+3V_LAN

10
18
27
38
50
56
4

1
6
9
U6

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7

GND11
GND12
GND13
TXP3
T
(26) TXP3 2 A0 0B1 48 TXP3_PR (33) O
A
1B1 47 TXN3_PR (33) A
TXN3 3
(26) TXN3 A1 P
2B1 43 TXP2_PR (33) o
3B1 42 TXN2_PR (33) r
TXP2
(26) TXP2 7 37 TXP1_PR (33)
t
A2 4B1
5B1 36 TXN1_PR (33)
TXN2 8
R 1/19 modify footprint
(26) TXN2 A3
32 TXP0_PR (33)
e
6B1
PI3L500 7B1 31 TXN0_PR (33)
p
l U25
TXP1 11 22 C498 0.1u/10V_4 1 24
(26) TXP1 A4 0LED1 D_ACTLED# (33) TCT1 MCT1
i TXP0_MB X-TXP0
23 D_LINKLED# (33) 2 23
1LED1 TD1+ MX1+
TXN1 12 52
c TXN0_MB 3 22 X-TXN0
(26) TXN1 A5 2LED1 a TD1- MX1-
46 TXP3_MB
t C506 0.1u/10V_4 4 21
0B2 TXN3_MB
o TXP1_MB TCT2 MCT2 X-TXP1
45 5 20
TXP0 1B2 r TXN1_MB TD2+ MX2+ X-TXN1
(26) TXP0 14 A6 6 TD2- MX2- 19
41 TXP2_MB
TXN0 2B2 TXN2_MB C509 0.1u/10V_4
(26) TXN0 15 A7 3B2 40 7 TCT3 MCT3 18
TXP2_MB 8 17 X-TXP2
+3V_LAN TXP1_MB TXN2_MB TD3+ MX3+ X-TXN2
4B2 35 9 TD3- MX3- 16
2/11 modified 34 TXN1_MB
LAN_ACTLED# 5B2 C507 0.1u/10V_4
(26) LAN_ACTLED#
19 LED0 10 TCT4 MCT4 15
30 TXP0_MB TXP3_MB 11 14 X-TXP3
R56 LAN_LINKLED# 6B2 TXN0_MB TXN3_MB TD4+ MX4+ X-TXN3
(26) LAN_LINKLED# 20 29 12 13
*10K_4 LED1 7B2 TD4- MX4-
54 25 MB_LAN_ACTLED# 9/16 modify TRANSFORMER
LED2 0LED2 MB_LAN_LINKLED#
26
LAN_DOCKIN# 1LED2
(30,33,34) DOCKIN# 17 51
R656 *0/short_4 SEL 2LED2 R2 R3 R4 R5
B 75/F_8 75/F_8 75/F_8 75/F_8 B

GND00
GND01
GND02
GND03
GND04
GND05
GND06
GND07
GND08
GND09
GND10
GND10
5 NC
SEL Function Delta LFE9276C-R (DB0ZR1LAN00)
FCE NS892407 (DB0LL1LAN00)
13
16
21
24
28
33
39
44
49
53
55
57
LOW Dock side TS3L500 C13
1500p/3KV_18
HIGH M/B side

+3V_LAN

C155 C170 C142 C111 C168

10u/6.3V_8 0.1u/10V_4 0.1u/10V_4 *0.1u/10V_4 0.1u/10V_4

C C

RJ45(LAN)
+3V_S5 CN12
MB_LAN_ACTLED# 9
R8 220_8 MB_LAN_ACTLED_PW R YELLOW_N
10 YELLOW_P
14
X-TXP0 GND2
1 13
X-TXN0 0+ GND1
2 0-
X-TXP1 3
X-TXP2 1+
4
X-TXN2 2+
5
X-TXN1 2- MB_LAN_ACTLED#
6
X-TXP3 1-
7 3+
X-TXN3 8 MB_LAN_LINKLED#
3-
+3V_S5
MB_LAN_LINKLED# 11
R387 220_8 LAN_LNK_LED_PW R GREEN_N
12
GREEN_P C11 C513
D D
RJ45 CONN *0.1u//50V_8 *0.1u//50V_8

9/21 modify

Quanta Computer Inc.


PROJECT : ZQ3
Size Document Number Rev
1A
LAN SWITCH/TRANSFORMER/RJ45/BT
Date: Monday, March 29, 2010 Sheet 27 of 47
1 2 3 4 5 6 7 8
5 4 3 2 1

+3.3V: 1000mA
+3.3Vaux:330mA MINI-CARD WLAN/WMAX(MPC)
+1.5V:500mA 1/21 modify (R281,R291 no stuff)
+WL_VDD +3V
R291 *0_4 CL_DATA1_WLAN 1/21 modify to NMOS
(10) PCI_RST#
(10) CLK_LPC_DEBUG
R281 *0_4 CL_CLK1_WLAN H=5.6mm R540 R573 *0_4
R286 *0/short_8 +WL_VDD
CN20 RF_LED_EN# (34)
51 52 +WL_VDD *10K_4
R283 *0_4 CL_RST1#_WLAN Reserved +3.3V C424 C716 C723 C721
(10) CL_RST1# 49 50

2
R282 *0_4 CL_DATA1_WLAN Reserved GND R657 0_4 3G_LED# 10u/10V_8 0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
(10) CL_DATA1
R290 *0_4 CL_CLK1_WLAN
47
Reserved +1.5V
48 +1.5V Active Low
(10) CL_CLK1 45 46
Reserved LED_WPAN# RF_LED#_R
43 44 1 3 RF_LED# (34,36)
Reserved LED_WLAN# Q26 2N7002D
+WL_VDD 41 42
Reserved LED_WWAN#
39 40
D Reserved GND 9/10 modify D
37 38 USBP13+ (10)
Reserved USB_D+
35 36 USBP13- (10)
GND USB_D-
(10) PCIE_TXP6 33 34
PETp0 GND R572 *0_4
(10) PCIE_TXN6 31 32 CLK_SDATA (3,14,15)
PETn0 SMB_DATA R571 *0_4
29 30 CLK_SCLK (3,14,15)
GND SMB_CLK
27 28 +1.5V
GND +1.5V +1.5V
(10) PCIE_RXP6 25 26
PERp0 GND
(10) PCIE_RXN6 23 24 +WL_VDD
PERn0 +3.3Vaux
21 22 PLTRST# (4,10,11,16,25,26,31,34)
GND PERST#
19 20 RF_EN (34)
UIM_C4 W_DISABLE#
17 18
UIM_C8 GND
15 16 A_LFRAME#_R R566 *0/short_4
GND UIM_VPP LPC_LFRAME# (9,31,34)
13 14 A_LAD3_R R567 *0/short_4 C724 C722 C437
8/12 modify (10) CLK_PCH_SRC2P REFCLK+ UIM_RST LPC_LAD3 (9,31,34)
11 12 A_LAD2_R R568 *0/short_4 1000p/50V_4 0.1u/10V_4 10u/6.3V_8
(10) CLK_PCH_SRC2N REFCLK- UIM_CLK LPC_LAD2 (9,31,34)
9 10 A_LAD1_R R569 *0/short_4
GND UIM_DATA LPC_LAD1 (9,31,34)
7 8 A_LAD0_R R570 *0/short_4
(10) CLK_PCIE_WLAN# CLKREQ# UIM_PWR LPC_LAD0 (9,31,34)
5 6 +1.5V
9/2 modify Reserved +1.5V
3 4

GND

GND
WLAN_WAKE# Reserved GND
T60 1 2 +WL_VDD
WAKE# +3.3V
MINI-CARD 5.6H CONN

53

54
9/4 modify 9/22 modify

C C

MINI-CARD 3G(MNC)Reserve for JV41-CP +3G_VDD


+1.5V +3G_VDD +3G_VDD
+1.5V +3G_VDD
+3G_VDD H=7.0mm R489

4
2
CN17 10K_4
51 52 C645 C647 C380 R488
Reserved +3.3V *0.1u/10V_4 *0.47u/10V_6 *10u/6.3V_8
49 50 Active Low

2
Reserved GND Q19 *4.7K_4P2R
47 48

2
Reserved +1.5V *2N7002D
T59 45 46
Reserved LED_WPAN# RF_LED#
43 44

3
1
9/4 modify Reserved LED_WLAN# 3G_LED#_R 3G_LED# 3G_SMDATA
41 42 3G_LED# (36) (3,10,26) ICH_SMBDATA 3 1
Reserved LED_WWAN#
39 40
Reserved GND 9/10 modify
37 38 USBP10+ (10)
Reserved USB_D+ +3G_VDD R234 *0_4
35 36 USBP10- (10)
GND USB_D-
(10) PCIE_TXP2 33 34
PETp0 GND 3G_SMDATA +3G_VDD
(10) PCIE_TXN2 31 32
PETn0 SMB_DATA 3G_SMCLK
29 30
GND SMB_CLK C373 C382 Q20
27 28 1/13 modified

2
GND +1.5V *2N7002D
(10) PCIE_RXP2 25 26
PERp0 GND 0.1u/10V_4 *10u/6.3V_8
(10) PCIE_RXN2 23 24
PERn0 +3.3Vaux PLTRST#_3G 3G_SMCLK
21 22 (3,10,26) ICH_SMBCLK 3 1
GND PERST# R486 *0/short_4
19 20 3G_EN (34)
UIM_C4 W_DISABLE#
17 18
B UIM_C8 GND R487 *0_4 RF_EN R235 *0_4
B

15 16 UIM_VPP
GND UIM_VPP UIM_RST
(10) CLK_PCH_SRC1P 13 14
REFCLK+ UIM_RST UIM_CLK
(10) CLK_PCH_SRC1N 11 12
REFCLK- UIM_CLK UIM_DATA L25 0_8 100mil
9 10 +3V
GND UIM_DATA UIM_PWR
(10) CLK_PCIE_REQ1#_R 7 8
CLKREQ# UIM_PWR L24 *0_8 +3G_VDD
5 6 +3VSUS
Reserved +1.5V
3 4
GND

GND

1
Reserved GND
T58 1 2
WAKE# +3.3V 9/10 modify C379 C646 C372 C642 C383 C644
9/4 modify MINI-CARD 7.0H CONN 10u/6.3V_8 0.1u/10V_4 0.1u/10V_4
53

54

2
0.1u/10V_4 0.47u/10V_6 10p/50V_4

9/22 modify
A:(10/17)FAE confirm:
3G module need +3VSUS and no need +1.5V and no need SMBUS

SIM CARD FFC connector(RFM) C141 *3G@10u/6.3V_8

+3G_VDD
UIM_PWR C123 3G@27p/50V_4
CN4 U20
UIM_PWR 1 UIM_DATA C110 3G@10p/50V_4 *3G@SN74AHC1G32DCKR

5
1
2
2
3
R44 *3G@0_4 USBP5-_R 3 UIM_RST C136 3G@27p/50V_4
A
(10) USBP5- 4 2 3G_RESET (34) A
R43 *3G@0_4 USBP5+_R 4 PLTRST#_3G
(10) USBP5+ 5 4
5 PLTRST#
6 1 PLTRST# (4,10,11,16,25,26,31,34)
UIM_VPP 6
7
UIM_RST 7 C147 *3G@10u/6.3V_8
8
UIM_CLK 8
9 11

3
UIM_DATA 9 11
10 12
10
3G@SIM_CARD FFC CONN
12 UIM_VPP C137 2 1 3G@33p/50V_4
R233 3G@0_4
Quanta Computer Inc.
UIM_CLK C120 2 1 3G@10p/50V_4
PROJECT : ZQ3
Size Document Number Rev
1A
Mini-Card/WL/3G/SIM
Date: Monday, March 29, 2010 Sheet 28 of 47
5 4 3 2 1
1 2 3 4

SATA HDD(HDD) SATA ODD (ODD)

CN18
GND23 23
CN15
GND1 1 GND14 14
RXP 2 SATA_TXP0 (9)
A A
RXN 3 SATA_TXN0 (9) GND 1
GND2 4 A+ 2 SATA_TXP1 (9)
5 SATA_RXN0_C C689 0.01u/16V_4 3 SATA_TXN1 (9)
TXN SATA_RXN0 (9) A-
6 SATA_RXP0_C C688 0.01u/16V_4 4
TXP SATA_RXP0 (9) GND
7 5 SATA_RXN1_C C279 0.01u/16V_4
GND3 B- SATA_RXN1 (9)
6 SATA_RXP1_C C267 0.01u/16V_4
B+ SATA_RXP1 (9)
GND 7
8 +5V_ODD
3.3V
3.3V 9
10 8 SATA_DP R146 1K_4 1.8A (MAX.)
3.3V DP +5V_ODD
GND 11 5V 9
GND 12 5V 10

+
13 11 C572 C597 C585 C594 C603
GND +5V_HDD MD C567
5V 14 GND 12
15 13 0.01u/16V_4 0.01u/16V_4 *0.1u/10V_4 *0.1u/10V_4 *10u/6.3V_6 100u/6.3V_3528
5V 9/2 modify GND
5V 16
GND 17 GND15 15
RSVD 18
19 ODD CONN
GND
12V 20
12V 21 1/19 modify footprint
12V 22 1A (MAX.)
R495 *0/short_8 +5V_HDD
+5V
B GND24 24 B
+
C651 C656 C654 C652 C655
C390
HDD CONN 10u/6.3V_6 0.1u/10V_4 *0.1u/10V_4 0.01u/16V_4 0.01u/16V_4
9/1 modify 100u/6.3V_3528

ODD POWER(ODD)

Q32
+5V AO6402A +5V_ODD +5V
+3VPCU
6 R442
5 4
2

1
C 1 *0_8 C
R446
100K_4 R444

3
+15V 2 1 MOD_EN_5V
100K_4

3
2

3
Q33

1
DMN601K-7
C606

1
(34) ODD_POWER R450 *0/short_4 ODD_EN 2 0.1u/25V_6

2
1
(9) PCH_ODD_EN R451 *0_4 Q34
DMN601K-7
R452

1
*100K_4

2
D D

Connect to PCH(GPIO21) pin Y9


and EC pin28(GPIO53) Quanta Computer Inc.
PROJECT : ZQ3
Size Document Number Rev
1A
SATA-HDD/ODD/HOLE
Date: Monday, March 29, 2010 Sheet 29 of 47
1 2 3 4
5 4 3 2 1

Codec(ADO)
1000p/50V_4 C738 +5V

EXTERNAL MIC (AMP)


For EMI (12/22)

conn and 線線follow ZQ1 and Z06, 但C and R值follow conexant 1/22 modify footprint.
2/10 modify for vendor comment Black
internal LDO from 5v to 3.3v for analog power 2/10 modify for EMI
1 CN21 7
MIC1_L1 C739 2.2u/6.3V_6 MIC1_L2 R581 100_4 MIC1_L3 L49 BLM11A601S/200mA/600ohm_6 MIC1_L 2
+3AVDD 6
MIC1_R1 C728 2.2u/6.3V_6 MIC1_R2 R561 100_4 MIC1_R3 L46 BLM11A601S/200mA/600ohm_6 MIC1_R 3
D C740 C719 C456 C448 4 D
MIC1_JD# 8
1u/16V_6 0.1u/16V_4 10u/6.3V_6 0.1u/16V_4 5
Max. 100mVrms input for Mic-IN JA6331-0230T3B-8H 9/3 modify
C708 C741
470p/50V_4 470p/50V_4
Normal OPEN Jack
+3V R557 *0/short_6 +AZA_VDD
+5AVDD R584 *0/short_6 +5V
9/16 modify
*0/short_6 C707 C442 C443
+3V R522 VDD_IO
10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 R550 C729 C715
C668 C673
10u/6.3V_6 0.1u/16V_4

0.1/F_1206
1u/16V_6 0.1u/16V_4 MIC1_JD#

1
VAUX_3.3 Layout Note: Path from +5V to LPWR_5.0 and D11
RPWR_5.0 must be very low resistance (<0.01ohms)
C669 C674 Press bypass caps very close to device Docking MIC-IN(DOK) *VPORT_6 Near CN28

2
+3V R520 *0/short_4
10u/6.3V_6 0.1u/16V_4 only needed if supply to VAUX_3.3 +5AVDD_AMP MIC1_L3 L48 BLM11A601S/200mA/600ohm_6 AU_MIC_IN_L
R511 *0_4 is removed during system restart

TO
+3V_S5
MIC1_R3 L47 BLM11A601S/200mA/600ohm_6 AU_MIC_IN_R

C670 C675 C703 2/10 modify for EMI


R521
10K_4 10u/6.3V_6 0.1u/16V_4

CLASSDREF 0.1u/16V_4
C692 C693 C695 C694

Po
0.1u/16V_4

0.1u/16V_4

10u/6.3V_6

10u/6.3V_6
18
26

29

27

28

12

15

17
3

2
7
在page9已已已已已RC了.. U40
不不不codec這這這這這,

FILT_1.8

VAUX_3.3
VDD_IO
DVDD_3.3
AVDD_HP

FILT_1.65

AVDD_3.3

AVDD_5V

LPWR_5.0

RPWR_5.0

rt
或這這page9那那

(9) PCH_AZ_CODEC_RST# 9
use as needed for EMI RESET#
C672 *22p/50V_4
(9) PCH_AZ_CODEC_BITCLK 5
BIT_CLK SENSE_A
36 SENSE_A LINE-OUT/SPDIFO(AMP)

Re
(9) PCH_AZ_CODEC_SYNC 8
R524 33_4 ACZ_SDIN0_R SYNC
(9) PCH_AZ_CODEC_SDIN0 6
SDATA_IN
(9) PCH_AZ_CODEC_SDOUT 4
C SDATA_OUT C
1/26 for EMI

pl
+3V C671 C680 C777 35 LINE1-R conn and 線線follow ZQ1, 但C值follow conexant 1/22 modify footprint.
*22p/50V_4 *22p/50V_4 *22p/50V_4 PORTB_R LINE1-L
2/11 modified PORTB_L
34
33
R538 B_BIAS

i
R531 33_4 C685 0.1u/10V_4 10 32 MIC1-VREFO R558 2.2K_4 MIC1_R3 2/10 modify for EMI
(9) SPKR PC_BEEP C_BIAS
100K_4 31 MIC1_R1 1 CN22 7

ca
SPDIF_OUT PORTC_R MIC1_L1 R654 2.2K_4 MIC1_L3 HPL R616 39/F_4 HPL-1 L55 BLM11A601S/200mA/600ohm_6 HPL_SYS
39 30 2
D10 SPDIF PORTC_L
6
(27,33,34) DOCKIN# EAPD# 38 CX20672-11Z 2/3 modified HPR R607 39/F_4 HPR-1 L52 BLM11A601S/200mA/600ohm_6 HPR_SYS 3
PD# GPIO0/EAPD# HP_JD#
37 4

to
BAS316 GPIO1/SPK_MUTE# R614 R622 C754 C767 8
25 5 D34
NC_DR *1K_4 *1K_4 2200p/50V_4 2200p/50V_4 JA6331-0230T3B-8H
24
NC_DL HPL_SYS 1 2

r
23 HPR *Uclamp0511P_4_ESD
R532 0_6 DMIC_CLK_R PORTA_R HPL
(23) DMIC_CLK 40 22
R526 0_6 DMIC_DAT_R DMIC_CLK PORTA_L
(23) DMIC_DAT 1
DMIC_1/2
AVEE
21 Normal OPEN Jack
20
FLY_N HP_JD# D33
19
FLY_P C726 1u/16V_6
EP_GND
RIGHT+

C686 C677 HPR_SYS


RIGHT-

1 2
LEFT+

1
LEFT-

100p/50V_4 100p/50V_4 C727 C725 *Uclamp0511P_4_ESD


0.1u/16V_4 10u/6.3V_6 D32
Near CN25
*VPORT_6
11

13

14

16

41

2
2/10 modify for EMI
Docking LINE OUT/SPDIF (DOK)
HPL-1 L54 BLM11A601S/200mA/600ohm_6 AU_LINEOUT_L

TO
HPR-1 L53 BLM11A601S/200mA/600ohm_6 AU_LINEOUT_R
R_SPK+
SBY100505T-121Y-N/300mA/120ohm_4 2/10 modify for EMI
SPDIF_OUT L28 R_SPK-
SPDIF_DOCK (33)
TO

Po
C420
B *33p/50V_4 L_SPK- B

rt
L_SPK+
Po
rt

C784 C785 C786 C787


+3V

Re
*1000p/50V_4 *1000p/50V_4 *1000p/50V_4 *1000p/50V_4

pl
R525
Re

10K_4

TO
PD# BAS316 D31 PCH_AZ_CODEC_RST# Docking LINE-IN (DOK)

i
p

2/10 modify for EMI


Jack Detect Resistor(ADO) conn and 線線follow ZQ1

c
*BAS316 D30 EAPD#
l

at

Po
LINE1-L C709 10u/6.3V_6 R301 100_4 LINE1-L_1 L31 BLM11A601S/200mA/600ohm_6 AU_LINEIN_L
ic

BAS316 D28 VAUX_3.3


AMP_MUTE# (34)
LINE1-R C704 10u/6.3V_6 R312 100_4 LINE1-R_1 L35 BLM11A601S/200mA/600ohm_6 AU_LINEIN_R
or

rt
C453 C450
at

R544 *0.1u/10V_4 *0.1u/10V_4


5.11K/F_4
INT SPEAKER CONN(AMP)
or

Re
conn and 線線follow ZR7, 但C值follow conexant
R543 39.2K/F_4 HP_JD#
40mil for each signal 1/27 modified
SENSE_A R293 10K/F_4 MIC1_JD# 1/27 modified
CN10

pl
TO

R_SPK- R577 BLM18PG471SN1D0/1A/470ohm_6 R_SPK-_1 R287 20K/F_4 LINEIN_JD#


R_SPK+ R578 BLM18PG471SN1D0/1A/470ohm_6 R_SPK+_1 1 CN25
L_SPK- R579 BLM18PG471SN1D0/1A/470ohm_6 L_SPK-_1 25
1
L_SPK+ R580 BLM18PG471SN1D0/1A/470ohm_6 L_SPK+_1 36 AU_LINEOUT_R

i
2
4 AU_LINEOUT_L 3
C780 C781 C782 C783 SPEAKER CONN HP_JD# 4

c
Po

A
5 A
2200p/50V_6 2200p/50V_6 2200p/50V_6 2200p/50V_6 MIC1_JD# 6

at
AU_MIC_IN_R 7
1/27 modified AU_MIC_IN_L 8
rt

LINEIN_JD# 9
AU_LINEIN_R 10 13
or
AU_LINEIN_L 11 14
12
R361 0_6
R545 0_6 SW/B FFC CONN
Re

R583 0_6
R362 0_6
AGND R562 *0/short_8

Quanta Computer Inc.


pl

PROJECT : ZQ3
Size Document Number Rev
ic

1A
CX20672-11Z/ AMP / SPK
Date: Monday, March 29, 2010 Sheet 30 of 47
5 4 3 2 1
5 4 3 2 1

(TPM) Resiger Base Address


+3V R330 *0/short_6 R593 *0/short_6 +3V_S5
BADD=0 2E / 2F
C480 TPM@0.1u/10V_4
C483 TPM@0.1u/10V_4 C744 TPM@0.1u/10V_4
C489 TPM@0.1u/10V_4 BADD=1 (default) 4E / 4F
+3V

24
19

5
U46

VSB
VDD
VDD
D D
R329
TPM@4.7K_4 TPM@4.7K_4
26 28 TPM_PD# R597 +3V
(9,28,34) LPC_LAD0 LAD0 LPCPD#
23 9 TPM_BADD
(9,28,34) LPC_LAD1 LAD1 TESTB1/BADD
(9,28,34) LPC_LAD2 20 8
LAD2 TEST1
(9,28,34) LPC_LAD3 17
LAD3 TPM_XTALO R326
14
XTALO TPM_XTALI *TPM@4.7K_4
13
TPM XTALI

TPM_XTALO
TPM_XTALI
21 SLB 9635 TT 1.2
(10) CLK_LPC_TPM LCLK
(9,28,34) LPC_LFRAME# 22 2 TP82
LFRAME# GPIO2
(4,10,11,16,25,26,28,34) PLTRST# 16 6 TP81
LRESET# GPIO
(9,34) IRQ_SERIRQ 27
R609 *0/short_4 SERIRQ R605
(8,34) CLKRUN# 15
TPM_PP CLKRUN#
7 1
R591 TPM@4.7K_4 PP NC
3
NC *TPM@4.7K_4
12

GND
GND
GND
GND
NC
10
NC Y7 C338 *0.1u/10V_4
TPM@SLB9635TT_TSSOP28 1 4

4
11
18
25
+1.5V_SUS C269 *0.1u/10V_4
+1.5V_CPUVDDQ
C756 C765 C312 *0.1u/10V_4
TPM@32.768KHz TPM@15p/50V_4
TPM@15p/50V_4 C322 *0.1u/10V_4
CLK_LPC_TPM
2/24 modified

C R599 C
*TPM@22_4 TPM_PD# R598 *TPM@0_4
TPM_LPC_PD# (34)

C748
*TPM@10p/50V_4

S3 leakage solution(CLG) +3V_S5


+3V_S5 +1.5V_SUS

R149
R231
5

*10K/F_4 U19 *1K_4


R230 2 R212
DDR3_DRAMRST# (14,15)
*10K/F_4 4 PM_DRAM_PWRGD (4,8)
3

3
1 Q15
Q22 *1.5K/F_4
B B
+1.5V_CPUVDDQ *RHU002N06T106 *TC7SH08FU
3

2 R192 (11) RST_GATE# RST_GATE# 2


*750/F_4 R148
3

*0/short_4
*BSS138
2 Q21
1

1
*PDTC143TT

PWRGD_1.5VCPU (4) CPU_DDR3_DRAMRST#


1

+1.5V_SUS +1.5V_SUS

R142 R116
*1K/F_4 *1K/F_4

+SMDDR_VREF_DQ0 (14) +SMDDR_VREF_DQ1 (15)


3

Q14 Q7
A R137 R115 A
RST_GATE# 2 *1K/F_4 RST_GATE# 2 *1K/F_4

*A03402 *A03402
1

(7,14) VREF_DQ_DIMM0 (7,15) VREF_DQ_DIMM1


Quanta Computer Inc.
PROJECT : ZQ3
Size Document Number Rev
1A
Mini-Card/WL/3G/SIM
Date: Monday, March 29, 2010 Sheet 31 of 47
5 4 3 2 1
5 4 3 2 1

+5V_S5

+5V_S5
C681
R308 *0_4 C687 2.2u/6.3V_6
*0.01u/16V_4
C391 L32
U21 3 4 USBP11-_R
(10) USBP2- 3 4
1u/10V_6 2 8 USBPWR1 2 1 USBP11+_R
IN1 OUT3 (10) USBP2+ 2 1
3 IN2 OUT2 7
D RFCMF1632100M3T/200mA/90ohm D
OUT1 6
4 EN#
(33,34) USBON# R309 *0_4 CN8
1 GND
OC# 5 USB_OC0# (10) 16 18
+5V_S5 15 17
G547G2P81U 2/10 modify for EMI 14
13
12
11
(10) USB_OC1# 10
USBPWR1 USBON# 9
8
R310 *0_4 USBP11-_R 7
C657 + C658 USBP11+_R 6
330u/6.3V_6.3X5.8 0.1u/10V_4 L33 5
4

C691

C697

C702
3 4 USBP3-_R USBP3-_R
(10) USBP3- 3 4 3
2 1 USBP3+_R USBP3+_R
(10) USBP3+ 2 1 2
R508 *0_4
RFCMF1632100M3T/200mA/90ohm 1
CN19

*0.01u/16V_4

*0.01u/16V_4

*0.01u/16V_4
L43 1 8 USB_DB FFC CONN
USBP1-_R 1 8 R311 *0_4
(10) USBP1- 1 1 2 2 2 2 7 7
(10) USBP1+ 4 3 USBP1+_R 3 6
4 3 3 6
C 4 4 5 5 C
RFCMF1632100M3T/200mA/90ohm 2/10 modify for EMI
USB_MB
1

R516 *0_4 1

RV3 RV4
2/10 modify for EMI *EGA10402V05AH_4 *EGA10402V05AH_4
2

B CN9 B
+3V_S5 1 3 BT_POWER
1
Q25 USBP4+_R 2
C410 R251 + USBP4-_R 3
2

0.33u/10V_6 47K_4 AO3413 C413 C418 BT_LED 4


2.2u/10V_6 TP31 5
1000P/50V_4 BT_CONN

1/22 modify footprint.


R254 4.7K_4 Remove BT LED from TM series.
(34) BT_POWERON#
(12/15)
R299 *0/short_4

L29
(10) USBP4- 3 4 USBP4-_R
3 4 USBP4+_R
(10) USBP4+ 2 2 1 1

*RFCMF1632100M3T/200mA/90ohm

R296 *0/short_4

A A

Quanta Computer Inc.


PROJECT : ZQ3
Size Document Number Rev
1A
eSATA/USB
Date: Monday, March 29, 2010 Sheet 32 of 47
5 4 3 2 1
5 4 3 2 1

CABLE DOCK(DOK) C302 C313


100p/50V_4 100p/50V_4

CN16 1/27 modified


33 DOCK_LINEIN_JD#
LIN_IN_DT# DOCK_LINE_I_L R155 AU_LINEIN_L_DOCK
(24) HDMI_CLKP 2 DVI_CLK LIN_IN_L 34 1 2 0_4
3 35 DOCK_LINE_I_R R156 1 2 0_4 AU_LINEIN_R_DOCK
(24) HDMI_CLKN DVI_CLK# LIN_IN_R
(24) HDMI_TXP0 5 DVI_TX0
(24) HDMI_TXN0 6 36 DOCK_MIC1_JD#
D DVI_TX0# MIC_DT# DOCK_MIC_L R165 AU_MIC_IN_L_DOCK D
(24) HDMI_TXP1 8 DVI_TX1 MIC_L 37 1 2 0_4
R177 100K_4 9 38 DOCK_MIC_R R164 1 2 0_4 AU_MIC_IN_R_DOCK
(24) HDMI_TXN1 DVI_TX1# MIC_R
(24) HDMI_TXP2 11 DVI_TX2
12 41 C339 C318
(24) HDMI_TXN2 DVI_TX2# SPDIF SPDIF_DOCK (30)
(24) HP_DET 25 DVI_DT

100p/50V_4

100p/50V_4
(24) HDMI_DDCDATA_MB 26 DVI_DDCDT LAN_0 56 TXP0_PR (27)
(24) HDMI_DDCCLK_MB 27 DVI_DDCCK LAN_0# 57 TXN0_PR (27)
LAN_1 59 TXP1_PR (27)
VGA_RED_PR 14 60
(23) VGA_RED_PR VGA_R LAN_1# TXN1_PR (27)
VGA_GRE_PR 16 43 +5V
(23) VGA_GRE_PR VGA_G LAN_2 TXP2_PR (27)
VGA_BLU_PR 18 44
(23) VGA_BLU_PR VGA_B LAN_2# TXN2_PR (27)
CRT_VSYNC1 28 62
(23) CRT_VSYNC2 VGA_VS LAN_3 TXP3_PR (27)
CRT_HSYNC1 29 63 +3V_S5 R449
(23) CRT_HSYNC2 VGA_HS LAN_3# TXN3_PR (27)
(23) DDCCLK_1 30 VGA_DDCCK LAN_PWR 52 TP4
31 53 10K_4
(23) DDCDAT_1 VGA_DDCDT LAN_ACT D_ACTLED# (27)
LAN_LINK 54 D_LINKLED# (27)
DOCK_HP_JD# 23 R453 PR_INSERT_5V
HP_DT# PR_INSERT_5V (23)
AU_LINEOUT_L_DOCK R170 1 2 0_4 DOCK_HP_L 21 64
HP_L GND

3
AU_LINEOUT_R_DOCK R175 1 2 0_4 DOCK_HP_R 22 1 100K_4
HP_R GND
GND 4
DOCKIN# 40 7
(27,30,34) DOCKIN# DOCK_DT1# GND
R169 100_4 DOCKIN2# 20 10 DOCKIN# 2 Q35
DOCK_DT2# GND
Connect to EC. GND 13
C 15 C624 2N7002D C
GND
1/27 modified 51 VGA_DT# GND 17
1/27 modified 19 0.1u/10V_4

1
GND C345 100p/50V_4 DOCK_HP_L
(32,34) USBON# 49 USB_EN# GND 42
DK_USB_D# 48 45
F2 1 DK_USB_D USB# GND DOCK_HP_R
+5V 2 SMD1206P110TFT 47 USB GND 46 C352 100p/50V_4
+5V_S5 1 2 1812L300MR 55
F3 +5V_DOCK GND
32 5V_S0 GND 58
+5V_S5_DOCK 68 61 C366 *33p/50V_4 CRT_VSYNC1
VA_DOCK P3-5V_USB, 3A GND
(38) DCIN 1 2 67 P4-19V, 5A GND 69
D13 SW1010CPT 70 C365 *33p/50V_4 CRT_HSYNC1
GND
GND 71 1/27 modified
1 GND 72
VA2 3 C10 C9 C8 24
GNDA CN24
2 GNDA 39
0.1u/25V_4 0.1u/25V_4 *10u/25V_8 65 +5V_S5_DOCK +5V_DOCK 1
D4 SBR1045SP5-13 P1-GND AU_LINEIN_L_DOCK
50 RESERVED P2-GND 66 2
73 AU_LINEIN_R_DOCK 3
GND DOCK_LINEIN_JD#
1/19 modify parts. GND 74 4
2/10 modified C377 C378 C367 AU_MIC_IN_L_DOCK 5
(Same as PD8) JAE CONN AU_MIC_IN_R_DOCK 6
VA_DOCK 1/22 modify footprint 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 DOCK_MIC1_JD# 7
8
ADOGND_2 DOCK_HP_JD# 9
B AU_LINEOUT_L_DOCK 10 13 B
C258 AU_LINEOUT_R_DOCK 11 14
EC3 12
0.1u/25V_4 22U/25V_1210 1/21 modified
SW/B FFC CONN
R652 1 2 *0_4 1/21 modified
For EMI 1/27 modified for EMI
L23
(12/24) DLW21HN900SQ2L/330mA/90ohm
1 1 DK_USB_D#
(10) USBP0- 2 2 DK_USB_D
(10) USBP0+ 4 4 3 3 ADOGND_2

R653 1 2 *0_4

MDC(MDM)
C368 MDC@0.1u/10V_4
CN7
1 2 C369 MDC@0.1u/10V_4
PCH_AZ_MDC_SDOUT GND RSV
(9) PCH_AZ_MDC_SDOUT 3 AC_SDO RSV 4
5 6 R205 *0/short_4
GND 3.3V +3V_S5
A PCH_AZ_MDC_SYNC 7 8 A
(9) PCH_AZ_MDC_SYNC AC_SYNC GND
R493 MDC@33_4 MDC_SDIN1 9 10
(9) PCH_AZ_MDC_SDIN1 AC_SDI GND
(9) PCH_AZ_MDC_RST# 11 AC_RST# AC_BCLK 12 PCH_AZ_MDC_BITCLK (9)
MDC@MDC CONN Quanta Computer Inc.
C648 R478
*MDC@10p/50V_4 C638 7/9 modify :change to +3V_S5 due to cost down
7/17 modify *MDC@33p/50V_4 +3V_SUS power cirucit if non-3G SKU PROJECT : ZQ3
*MDC@33_4 Size Document Number Rev
1A
Docking
Date: Monday, March 29, 2010 Sheet 33 of 47
5 4 3 2 1
5 4 3 2 1

EC (KBC) L30 BK1608HS220/1A/22ohm_6 +A3VPCU


+3V
C430 C435
30mil
0.1u/16V_4
4.7u/6.3V_6
+3VPCU E775AGND
D29 C661 C665
R250 2.2/F_6 +3VPCU_EC 0.03A(30mils)
BAS316 4.7u/6.3V_6 0.1u/16V_4
C388 C408 C409 C676 C431 C433 3G_EN R517 10K_4

115

102
U22

19
46
76
88

4
4.7u/6.3V_6 *0.1u/10V_4 *0.1u/10V_4
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4

AVCC

VDD
VCC1
VCC2
VCC3
VCC4
VCC5
E775AGND C440 10u/6.3V_8 ICMNT
D D
C436 0.01u/16V_4

CLK_PCI_775
(9,28,31) LPC_LFRAME# 3 LFRAME GPI90/AD0 97
WMAX_SW
TEMP_MBAT (38)
SM BUS PU(KBC)
(9,28,31) LPC_LAD0 126 LAD0 GPI91/AD1 98 WMAX_SW (36)
127 99 +3VPCU
(9,28,31) LPC_LAD1 LAD1 GPI92/AD2 SML1ALERT# (10,11,37)
128 A/D 100 ICMNT
(9,28,31) LPC_LAD2 LAD2 GPI93/AD3 ICMNT (38)
1 108 T18 MBCLK R504 10K_4
(9,28,31) LPC_LAD3 LAD3 GPIO05/AD4
R530 CLK_PCI_775 2 96 MBDATA R502 10K_4
(10) CLK_PCI_775 LCLK GPIO04/AD5 VGA_THERM# (19)
*22_4 8
(8,31) CLKRUN# GPIO11/CLKRUN
101 PowerSave_SW
GPI94/DA0 PowerSave_SW (36)
121 105 +3V_GFX
(11) SIO_A20GATE GA20 GPI95/DA1 DGPU_IDLE# (19)
C682
D/A GPI96/DA2 106
R655 *0_4
T17
(11) SIO_RCIN# 122 KBRST GPI97/DA3 107 DOCKIN# (27,30,33)
*10p/50V_4 MXM_SMCLK12 R297 10K_4
29 LPC MXM_SMDATA12 R298 10K_4
(11) SIO_EXT_SCI# ECSCI/GPIO54
64 ACIN (19,38)
EC_FPBACK# GPIO01/TB2
(23) EC_FPBACK# 6 95 NBSWON# (36)
GPIO24/LDRQ GPIO03/AD6 +3V
93 LID591# (23,37)
3G_RESET GPIO06
follow ZH7 for 3G use (28) 3G_RESET 124
GPIO10/LPCPD GPIO07/AD7
94 SUSB# (8)
119 MXM_SMCLK12
GPIO23/SCL3 MXM_SMCLK12 (19,20)
PLTRST# 7 109 T20 ODD_POWER R247 10K_4
(4,10,11,16,25,26,28,31) PLTRST# LREST GPIO30/CIRTX2
120 MXM_SMDATA12
GPIO31/SDA3 MXM_SMDATA12 (19,20)
USBON# 123 65 WMAX_SW R402 100K_4
(32,33) USBON# GPIO67/PWUREQ GPIO32/D_PWM BATLED0# (36)
GPIO33/H_PWM 66 BATLED1# (36)
IRQ_SERIRQ 125 15 Eject_Button R399 100K_4
(9,31) IRQ_SERIRQ SERIRQ GPIO36/TB3 VRON (40)
16 SUSLED# (36)
GPIO40/F_PWM PowerSave_SW R315 100K_4
(11) SIO_EXT_SMI# 9 17 T16
GPIO65/SMI GPIO42/TCK AMP_MUTE#
GPIO GPIO43/TMS
20 AMP_MUTE# (30) 0831:Reversed
21 T14
MX0 GPIO44/TDI
(35) MX0 54 22 CPUFAN# (37)
MX1 KBSIN0 GPIO45/E_PWM
(35) MX1 55 KBSIN1 GPIO46/CIRRXM/TRST 23 PANEL_COLOR (23)
MX2 56 24
(35) MX2 KBSIN2 GPO47/SCL4 VIN_ON (38)
MX3 57 25
C (35) MX3 KBSIN3 GPIO50/TDO D/C# (38) C
MX4 58 26 11/25 Modify unstuff.
(35) MX4 KBSIN4 GPIO51/TA3 S5_ON (39,47)
MX5 59 27 +3V
(35) MX5 KBSIN5 GPIO52/CIRTX2/RDY HDMI_HPD_EC# (24)
MX6 60 28
(35) MX6 KBSIN6 GPIO53/SDA4 ODD_POWER (29)
MX7 61 91 2ND_MBCLK R246 *10K_4
(35) MX7 KBSIN7 GPIO81 DNBSWON# (8)
110 CL_RST_OUT T23 2ND_MBDATA R248 *10K_4
MY0 GPO82/TRIS
(35) MY0 53 112 RF_LED_en# (28)
MY1 KBSOUT0/JENK GPO84/BADDR0
(35) MY1 52 80 PANEL_ENG (23)
MY2 KBSOUT1/TCK GPIO41
(35) MY2 51
KBSOUT2/TMS 12/04 Modify.
MY3 50
(35) MY3 KBSOUT3/TDI
MY4 49 KB 31 T12 DGPU_IDLE# R539 SW@10K_4
(35) MY4 KBSOUT4/JEN0 GPIO56/TA1
MY5 48 117 VGA_THERM# R535 SW@10K_4
(35) MY5 KBSOUT5/TDO GPIO20/TA2 SUSON (43,46)
MY6 47 63
(35) MY6 KBSOUT6/RDY GPIO14/TB1 FANSIG (37)
MY7 43
(35) MY7 KBSOUT7
MY8 42 TIMER 32
(35) MY8 KBSOUT8 GPIO15/A_PWM CONTRAST (23)
MY9 41 118
(35) MY9 KBSOUT9 GPIO21/B_PWM NUMLED# (36)
MY10 40 62
(35) MY10 KBSOUT10 GPIO13/C_PWM PWRLED# (36)
MY11 39 81
(35) MY11 KBSOUT11 GPIO66/G_PWM CAPSLED# (36)
MY12 38
(35) MY12 KBSOUT12/GPIO64
MY13 37
(35)
(35)
MY13
MY14
MY14
MY15
36
KBSOUT13/GPIO63
KBSOUT14/GPIO62 GPIO77/SPI_DI
84 Eject_Button
SHBM_R
Eject_Button (36)
SPI FLASH(KBC) +3VPCU
(35) MY15
MY16
35
KBSOUT15/GPIO61/XOR_OUT SPI GPO76/SPI_DO/SHBM
83
R263 *0_4
3G_EN (28)
U41
(35) MY16 34 82 RF_LED# (28,36)
MY17 GPIO60/KBSOUT16 GPIO75/SPI_SCK SPI_SDI_uR R547 22_4 SPI_SDI_uR_R
(35) MY17 33 2 8
GPIO57/KBSOUT17 SO VDD
75 RSMRST#_uR R252 *0/short_4 SPI_SDO_uR 5 7 C706
GPIO72/IRRX1/SIN2 ICH_RSMRST# (8) SI HOLD
MBCLK 70 73
(38) MBCLK GPIO17/SCL1 GPIO70/IRRX2_IRSL0 SUSC# (8)
MBDATA 69 74 PWROK_EC_uR R249 *0/short_4 SPI_SCK_uR 6 3 0.1u/16V_4
(38) MBDATA GPIO22/SDA1 GPIO71/IRTX/SOUT2 PWROK_EC (8) SCK WP
(10) 2ND_MBCLK 2ND_MBCLK 67 SMB IR 113
GPIO73/SCL2 GPIO87/CIRRXM/SIN_CR RF_EN (28)
(10) 2ND_MBDATA 2ND_MBDATA 68 14 T15 +3VPCU R552 10K_4 SPI_CS0#_uR 1 4
GPIO74/SDA2 GPIO34/CIRRXL HWPG CE VSS
114
GPIO16/CIRTX BADDR1_EC_R R305 10_6 W25Q16BVSSIG
111 PowerSave_LED (36)
TPCLK GPO83/SOUT_CR/BADDR1
(35) TPCLK 72 GPIO37/PSCLK1
TPDATA 71 1/13 Comfirm by vendor mail : At 11/24 add
(35) TPDATA GPIO35/PSDAT1
B PCH_ACIN 10 86 SPI_SDI_uR R523 100K_4 If the Southbridge enables 'Long Wait Abort' by Winbond W25X16AVSSIG AKE38ZP0N01 B
(8) PCH_ACIN GPIO26/PSCLK2 F_SDI
11 PS/2 87 SPI_SDO_uR_R R528 22_4 SPI_SDO_uR MXIC MX25L1605AM2C-15G AKE37FP0Z13
(32) BT_POWERON# GPIO27PSDAT2 F_SDO default, the flash device should be 50MHz (or faster)
12 FIU 90 SPI_CS0#_uR EON EN25F16-100HIP AKE38ZA0Q00
(41,42,43,46,47) MAINON GPIO25/PSCLK3 F_CS0
for TPM power down (31) TPM_LPC_PD# 13 92 SPI_SCK_uR_R R533 22_4 SPI_SCK_uR AMIC A25L016 AKE38ZN0800
GPIO12/PSDAT3 F_SCK
(8) ICH_SUSCLK R256 0_6 E775_32KX1 77 30 ECDB_CLOCK T13
32KX1/32KCLKIN GPIO55/CLKOUT +3V
VCC_POR
85 VCC_POR# R264 47K_4 +3VPCU HWPG(KBC)
VCORF
AGND
GND1
GND2
GND3
GND4
GND5
GND6

R255 *20M_6 E775_32KX2 79 104 VREF_uR R546 *0/short_4 +A3VPCU R503


32KX2 VREF

R261 NPCE781 10K_4


5
18
45
78
89
116

103

VCORF_uR 44

*33K/F_4 D26 BAS316 HWPG


Y4 SM BUS ARRANGEMENT TABLE (46) HWPG_1.8V
1 4 D22 BAS316
(42) HWPG_1.05V
SM Bus 1 Battery R507
L34 D25 BAS316
(43) HWPG_VDDR
BK1608HS220/1A/22ohm_6 *0/short_4
C679 *32.768KHz C678 C389 SM Bus 2 PCH D23 BAS316
(39) SYS_HWPG
*15p/50V_4 *15p/50V_4
MPWROK (4)
1u/10V_4 D24 BAS316
(45) HWPG_GFX
E775AGND SM Bus 3 MMB3 and EEPROM
D27 BAS316
(41) HWPG_VTT
E775AGND SM Bus 4 HDMI Controller, MMB1, MMB2 and VGA Thermal

A
INTERNAL KEYBOARD STRIP SET(KBC) A
+3VPCU

MY0 R239 10K_4

Quanta Computer Inc.


PROJECT : ZQ3
Size Document Number Rev
1A
WPCE775C_0DG & FLASH
Date: Monday, March 29, 2010 Sheet 34 of 47
5 4 3 2 1
5 4 3 2 1

INT K/B (KBC) MY0


CN5 TOUCHPAD & Finger-Printer CONN.(TPD) +5V
(34) MY0 1
7 8 MX3 MY1 2
(34) MY1 +5V
5 6 MX2 MY2 3 L3
(34) MY2 +3VPCU
3 4 MX1 MY3 4 BLM21P300S/3A/30ohm_8
(34) MY3
1 2 MX0 MY4 5
(34) MY4
CP2 *100p/8P4C MY5 6
(34) MY5
7 8 MX7 MY6 7
(34) MY6
5 6 MX6 MY7 8 10 1 MX3 C145
(34) MY7
D 3 4 MX5 MY8 9 MX4 9 2 MX2 R418 R419 0.1u/16V_4 D
(34) MY8 CN6
1 2 MX4 MY9 10 MX5 8 3 MX1 10K_4 10K_4 20mil
(34) MY9
CP1 *100p/8P4C MY10 11 MX6 7 4 MX0 1
(34) MY10 1
7 8 MY3 MY11 12 MX7 6 5 +TPVDD 2
(34) MY11 2
5 6 MY2 MY12 13 L38 LZA10-2ACB104MT/100mA TPDATA_R 3 RV1 *EGA10402V05AH_4
(34) MY12 (34) TPDATA 3
3 4 MY1 MY13 14 RP1 10K/10P8R L39 LZA10-2ACB104MT/100mA TPCLK_R 4 USBP11- 1 2
(34) MY13 (34) TPCLK 4
1 2 MY0 MY14 15 5
(34) MY14 5
CP3 *100p/8P4C MY15 16 (10)USBP11+ USBP11+ 6 RV2 *EGA10402V05AH_4
(34) MY15 6
7 8 MY7 MY16 17 C563 (10) USBP11- USBP11- 7 USBP11+ 1 2
(34) MY16 7
5 6 MY6 MY17 18 0.01u/25V_4 C562 8
(34) MY17 8
3 4 MY5 MX7 19 0.01u/25V_4 9 11
(34) MX7 9 11
1 2 MY4 MX6 20 10 12
(34) MX6 10 12
CP4 *100p/8P4C MX5 21
(34) MX5
7 8 MY11 MX4 22 TP+FP FFC CONN
(34) MX4
5 6 MY10 MX3 23 For EMI. (3/26)
(34) MX3
3 4 MY9 MX2 24 27
(34) MX2
1 2 MY8 MX1 25 28
(34) MX1
CP5 *100p/8P4C MX0 26
(34) MX0
7 8 MY15
5 6 MY14 KB CONN
3 4 MY13
1 2 MY12
CP6 *100p/8P4C 1/22 modify footprint.
C C559 *100p/50V_4 MY16 C
C560 *100p/50V_4 MY17

HOLE1 HOLE2 HOLE28 HOLE7 HOLE5 HOLE12 HOLE10


*HG-C276D118P2 *HG-C315D118P2 *HG-C276D118P2 *HG-C276D118P2 *HG-TC276BC315D118P2 *HG-C197D118P2 *HG-TC315BC276D118P2
7 6 7 6 7 6 7 6 7 6 7 6 7 6 +3V
8 5 8 5 8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4 9 4 9 4
1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

1
2
3
EC4 EC5 EC6
*0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4

HOLE16 HOLE23 HOLE21 HOLE24 HOLE22 HOLE14


*HG-C276D118P2 *HG-C276D118P2 *HG-C236D118P2 *HG-C236D118P2 *HG-C315D118P2 *HG-C315D118P2
7 6 7 6 7 6 7 6 7 6 7 6
8 5 8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4 9 4
B B
+5V_S5
1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

EC7 EC8 EC9


HOLE3 HOLE4 HOLE9 HOLE11 HOLE15 HOLE18 HOLE17 HOLE20 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
*H-C276D142P2 *H-C217D146P2 *H-C217D146P2 *H-TC276BC256D146P2 * H-C197D59P2 * H-C197D59P2 *H-TC276BC217D146P2 *H-TC276BC217D146P2

2/8 modified for EMI


1

HOLE25 HOLE26 HOLE27 ZQ3_BKT


*H-C197D87P2 *H-C197D87P2 * H-C197D51P1 1
HOLE6 HOLE8 HOLE19 2
*H-C94D94N *O-ZQ3-2 *O-ZQ3-1 3
A A

*Intel_CPU_BKT
1

Quanta Computer Inc.


1

PROJECT :ZQ3
Size Document Number Rev
1A
KB/TP+FP/CIR/BT/TPScreen
Date: Monday, March 29, 2010 Sheet 35 of 47
5 4 3 2 1
5 4 3 2 1

+3V
M/B LED(UIF) SW BOARD CONNECTOR(UIF)
+3V
R373
Blue

5
10K/F_4 1
4 SATA_LED#_R R371 100_4 +3V
2 LED5 SATA_LED
(9) SATA_ACT#
U48

3
*TC7SH08FU 1/14 modify PN. C376
D D
R372 0_4 *0.1u/10V_4 +3V CN3
1
PWR_LED 2
Remove BT LED from TM series. (34) NUMLED# 3
(12/15) 4
(28,34) RF_LED# 5
(28) 3G_LED# 6
(34) PowerSave_LED 7
+3V_S5 R401 10K/F_4 8
(34) WMAX_SW
9
R400 10K/F_4 10 13
(34) Eject_Button

1
11 14
(34) PowerSave_SW 12

2 NBSWON# D14 BAS316 SW/B FFC CONN


(34) SUSLED# (34) NBSWON#

C528

C529

C530

C531

C532

C533

C534

C535

C536
D18

D17

D16

D15
Q45

2
BSS84
Amber

3
(34) PWRLED# 2

0.01u/16V_4

0.01u/16V_4

0.01u/16V_4

0.01u/16V_4

0.01u/16V_4

0.01u/16V_4

0.01u/16V_4

0.01u/16V_4

0.01u/16V_4
*VPORT_6

*VPORT_6

*VPORT_6

*VPORT_6
EMI addition

1
C
Q44 LED3 C
BSS84 SUS_LED 2 4 R375 330_4
3

PWR_LED 1 3 R369 100_4

LED_A/B
1/14 modify symbol pin definition.

Blue For EMI. (3/26)


+3VPCU

+3VPCU
R650 R651 1/14 modify symbol pin definition.
1M_4 1M_4

R374 330_4 4 2
Amber
(34) BATLED1#
R370 100_4 3 1
(34) BATLED0#
LED4 LED_A/B
Blue
B B

M/B LED(UIF)
SW1
Blue
(34) NBSWON# NBSWON# D2 NBSWON_R# 2 3
(34) CAPSLED# R75 100_4 1 3 +3V 1 4
CAPS_LED LED2 BAS316 5

2
6
C160

C1 D3
D6

C209
2

BXP@0.1u/10V_4 *VPORT_6 TME-533B-Q-T/

EMI addition

1
*0.01u/16V_4
*VPORT_6

*0.01u/16V_4
1

PWR_LED R1 BXP@100_4
LED1 BXP@PWR_LED

A A

2
D1

*VPORT_6 Quanta Computer Inc.

1
PROJECT : ZQ3
Size Document Number Rev
1A
POWER/MMB/LAUNCH/LED
Date: Monday, March 29, 2010 Sheet 36 of 47
5 4 3 2 1
1 2 3 4 5

CPU FAN(THM)
+3V +3V +5V +3V +5V

R391 R381 R380


R388
10K_4 10K_4 10K_4
R390 10K_4
A *10K_4 A
FAN_PWM_E
CN13
(34) FANSIG
4

2
3

3
Q31 FAN_PWM_CN 2
2 1 3 1
(10,11,34) SML1ALERT#
MMBT3904

C512

C508

C511
Q30 30mil FAN CONN

1
MMBT3904
(34) CPUFAN#

*0.01u/16V_4

*0.01u/16V_4

*0.01u/16V_4
EMI addition

HALL SENSOR(HSR) +3VPCU R238 100K_4


B B

H=1.4mm

1 2 LID591# LID591# LID591# (23,34)

2
C386 D7

0.1u/10V_4 *VPORT_6
3

MR1

1
PLC-PT3661-BB

C C

D D

Quanta Computer Inc.


PROJECT : ZQ3
Size Document Number Rev
1A
FAN/Thermal Protection
Date: Monday, March 29, 2010 Sheet 37 of 47
1 2 3 4 5
5 4 3 2 1

VA1 PD8 VA2


EC1 PL6 SBR1045SP5-13 PQ43 VIN_SRC PQ38
PJ2 22U/25V_1210 HI0805R800R-10/5A/80ohm_8 1 FDD6685 FDD6685
4 VA 3 VA2 3 4 1 2 3 4
3 2
2
1

1
PC126 PC127 PC15 PR25 PR139 VIN_SRC PC7 PC8 PR17
20277-04XX-4P-L 2200p/50V_6 PL5 0.1u/50V_6 0.1u/50V_6 220K/F_4 0.01/F_7520 0.1u/50V_6 2200p/50V_6 33K/F_4

1
HI0805R800R-10/5A/80ohm_8 CSIP_1
D D
PC125 EC2
0.1u/50V_6 22U/25V_1210 PD9 1 6
PD7 SMAJ20A PR20 PR16

2
SW1010CPT PR21 2 5 10K_4
D/C# (34)
220K/F_4 SHORT_PAD_4
For EMI (01/27) 3 4

3
B-Test change PQ13
IMD2AT108
B-Test change
VIN_SRC 2

PQ11
CSIP_1 DMN601K-7

1
VIN_SRC

PC20
PR153 PR152 1u/10V_4
10/F_4 10/F_4

PC124 PC118
0.1u/25V_4 PR33 1u/25V_6
4.7_6 PC18
1u/10V_4

27 CSIN
28 CSIP
ISL88731_VDDP
C-Test change

5
6
7
8
33
32
31
30

26

21
C C

1
+3VPCU PD2 PC13
*RB500V-40 4 2200p/50V_6

CSSP

VDDP
NC
GND
GND
GND
GND

CSSN

VCC
1/22 modify footprint.
PC19 PR28 PC17
0.1u/25V_4 2.7_6 0.1u/50V_6
+3VPCU 11 25 88731B_2 88731B_1 PQ42 0.01/F_3720
VDDSMB BOOT AO4468 PR133
PL4

3
2
1
(34) MBDATA 9 24 ISL88731_UGATE 6.8uH/6.5A
PR32 SDA UGATE BAT-V
1 2
100K_4

5
6
7
8
(34) MBCLK 10 23 ISL88731_PHASE
SCL PHASE

13 20 ISL88731_LGATE 4 PR18
(19,34) ACIN ACOK LGATE *4.7_6

PR150 PC123 19
49.9/F_4 PGND PQ41
(33) DCIN 0.1u/25V_4
DCIN 22 AO4710 CSOP_1
DCIN PR148 PC107 PC102

3
2
1
PR35 10/F_4 PC12 BAT-V 2200p/50V_6 10u/25V_1206
82.5K/F_4 PU8
CSOP 18 CSOP CSOP_1 *680p/50V_6 PC101
PC108 88731ACSET 2 ISL88731A 10u/25V_1206
0.1u/25V_4 ACIN
PC121
3 VREF 0.1u/25V_4
PC104 PR34 17 CSON BAT-V VIN_SRC VIN
B CSON B
100p/50V_4 PL1 22K/F_4 PQ12
1/19 modify footprint HI0805R800R-10/5A/80ohm_8 4 PR30 PR147 AOL1413
ICOMP 10/F_4
NC 16 1
MBAT+ BAT-V 2 5
SHORT_PAD_4
C114F3-108A1-L_Batt_Conn
PL2
5 NC B-Test change 3

PC109 HI0805R800R-10/5A/80ohm_8 15 BAT-V


10 1 100p/50V_4 PR134 VBF PR15
6

4
2 100_4 VCOMP PR11 PC9
3 GND 29 150K/F_4
TEMP_MBAT 100_4 1u/25V_6

GND
4 TEMP_MBAT (34)

ICM
NC

NC
5
6 PR36
+3VPCU
7

14

12
7 2.21K/F_4
9 8 PR135
PR131
PJ1 SHORT_PAD_4 100K_4 PR14
PC103 PC106 39K/F_4
47p/50V_4 47p/50V_4 PC24 PC21
*1u/10V_4 0.01u/25V_4
ISL88731 thermal pad

3
ICMNT
tie to Pin12
B-Test change ICMNT (34)
PR130 PR132 2
(34) VIN_ON
100_4 100_4
PC23 PC22 PQ10
MBCLK (34) 0.01u/25V_4 *0.01u/25V_4 VIN DMN601K-7

1
PU7
A MBDATA (34) CM1293A-04SO A

1 6 MBDATA
CH1 CH4
2 VN VP 5 +3VPCU
EC10 EC11
TEMP_MBAT 3 4 MBCLK 0.1u/50V_6 0.1u/50V_6
CH2 CH3
For EMI (12/24) Quanta Computer Inc.
1

Add ESD diode base on EC FAE suggestion PC105


*0.22u/10V_4 PROJECT : ZQ3
2

Size Document Number Rev


1A
For EMI. (3/26)
Charger(ISL88731A)
Date: Monday, March 29, 2010 Sheet 38 of 47
5 4 3 2 1
5 4 3 2 1

MAIND
MAIND (43,47) *1u/25V_6 PC120 VIN_SRC

*1u/25V_6 PC119
B-Test change C-Test change
VL
PR84
(4,47) SYS_SHDN# For EMI (12/22)
B-Test change SHORT_PAD_4

B-Test change
B-Test change

1
D VIN_SRC VIN_SRC D
PR68
39K/F_4 VL

+ PC39 PC139 +

2
PC147 PC44 1u/25V_6 PC49 1u/25V_6 PC202
100u/25V_6.3X5.8 *1u/25V_6 3V5V_EN 4.7u/6.3V_6 100u/25V_6.3X5.8
PR50
B-Test change 0_4
PR183
C-Test change PR69 PR70 SHORT_PAD_4
C-Test change

1
SHORT_PAD_4 SHORT_PAD_4 PC148
PR60 1u/10V_4 PR42 PC140 OCP:16A
PC153 390K/F_4 PC48 C-Test change *0_4 2200p/50V_4

5V_EN

3V_EN
2200p/50V_4 0.1u/50V_6
12.58A

5
PC150 PC144

2
0.01u/25V_4 0.1u/25V_4 +3VPCU

OCP:16A 8206_ONLDO REF 4


13.126A 1 2 3V_DH C-Test change

5
PQ54

1
2
3
+5VPCU PR54 PR46 AOL1448
150K/F_4 *0_4

8
7
6
5
4
3
2
1
PQ55 4 5V_DH
AOL1448 PL8
C-Test change

LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF
1.5uH/16A

3
2
1
+3VPCU
PR180 3V_LX

5
+5VPCU 9 32 REFIN2 127K/F_4
PL11 BYP REFIN2
10 OUT1 ILIM2 31 1 2
C 1.5uH/16A 11 30 PR39 PC141 C
+5VPCU 5V_LX FB1 PU3 OUT2 SKIP PD10 *4.7_6
1 2 12 ILIM1 SKIP# 29 4

1
PR187 DDPWRGD_R 13 RT8206B 28 DDPWRGD_R SX34 PC28
PGOOD1 PGOOD2
5 121K/F_4 5V_EN 14 27 3V_EN + +

1
2
3
EN1 EN2 PQ52 PC27
15 DH1 DH2 26
1

PC175 PC164 PR185 PR66 AOL1718 PC26 0.1u/50V_6

330u/6.3V_6X5.7
16 25

2
*0_4 *4.7_6 5V_DL LX1 LX2 *680p/50V_6

150u/6.3V_3528
+ + 4 37
PD6 PAD
36 PAD

PGND
PVCC
330u/6.3V_6X5.7

PC65 PC77 SX34


150u/6.3V_3528

BST1

BST2
GND
PAD
PAD
PAD
2

3
2
1

DL1

DL2
1u/25V_6 0.1u/50V_6 PQ56 PC46 PC31 PR44

NC
PC47 AOL1718 0.1u/50V_6 0.1u/50V_6 1 2 *0_4
*680p/50V_6 PR48 PR45 0_4

35
34
33

17
18
19
20
21
22
23
24
PR186 PR63 1_6 +3VPCU_OUT 1 2
0_4 1_6 1 2 PR49 *0_4
C-Test change 1 2 3V_DL

2
PR62 VL SKIP 1 2 REF PR178
+5VPCU_FB *0_6 PR179 *0_4
PC45 PC36 SHORT_PAD_6 PR47
2 0.1u/50V_6 1u/10V_4 *0_4

1
PD5
CHN217 3 PR181
SHORT_PAD_4
1 B-Test change +3VPCU
B-Test change
PC38 2 B-Test change
1u/25V_6 PD3 PR182
OCP:16A CHN217 3 SHORT_PAD_6 OCP:16A PR67
B B
L(ripple current) PC37 L(ripple current) 100K_4
1 0.1u/50V_6
=(9-5)*5/(1.5u*0.4M*9) =(9-3.3)*3.3/(1.5u*0.5M*9)
~3.7A +15V_ALWP 1 2 ~2.79A
+15V
DDPWRGD_R
SYS_HWPG (34)

1
Iocp=16-(3.7/2)=14.15A PR55 PR57 Iocp=16-(2.79/2)=14.605A
22_8 *200K/F_4 PR184 PR83
Vth=14.15A*4.3mOhm=60.845mV PC35 *39K/F_4 Vth=14.605A*4.3mOhm=62.802mV SHORT_PAD_4
R(Ilim)=(60.845mV*10)/5uA 1u/25V_6 R(Ilim)=(62.802mV*10)/5uA
~121.7K ~125.6K

2
B-Test change

VIN_SRC +3V_S5 +5V_S5 +15V VIN_SRC +5VPCU +5VPCU +3VPCU +3VPCU


B-Test change
PR125 PR124 PR127 PR128 PR126

3
1M/F_6 22_8 22_8 1M_6 *1M_6
5

5
6
7
8

5
6
7
8
S5D 2
S5D 4 MAIND 4 MAIND 4
PQ60
3

AOL1448 PQ20
1
2
3

A PQ61 PQ19 AO3404 A

1
2 AO4468 AO4468
(34,47) S5_ON
2 2 2 +5V_S5 +3V_S5 0.74A
3
2
1

3
2
1

PR123 PQ33 PQ35


1

PQ32 1M/F_6 DMN601K-7 DMN601K-7


DTC144EUA PQ34 PC95
9.578A
Quanta Computer Inc.
1

DMN601K-7 *2200p/50V_4
+5V +3V
PROJECT : ZQ3
3.55A 3.17A Size Document Number Rev
1A
SYSTEM 5V/3V (RT8206)
Date: Monday, March 29, 2010 Sheet 39 of 47
5 4 3 2 1
5 4 3 2 1

[PWM] B-Test Modify


VR_PWRGD_CK505# (3) VIN
VID 1.2875V
H_VID0 DELAY_VR_PWRGOOD (4,8)
+3VPCU PR82 *0_4

1
+
PC174 PC183 PC177 +
PR81 *0_4 H_VID1 0.1u/50V_6 PC184 1u/25V_6 100u/25V_6.3X5.8 PC203

2
PQ64 *1u/25V_6 100u/25V_6.3X5.8

5
AOL1448
PR80 *0_4 H_VID2
C-Test change
62882_UG1 4
C-Test change
D
PR79 *0_4 H_VID3 20A D

1
2
3
PL13 +VCC_CORE
PR78 *0_4 H_VID4 VIN +3V 0.36uH/30A
+3VPCU B-Test change
62882_PH1 1 2
PR77 *0_4 H_VID5
PR207 PQ62 PQ63

4
5

5
SHORT_PAD_6 AOL1718 AOL1718 PR104
PR76 *0_4 H_VID6 + PC78
PR72 PR71 *2.2_6
+5V_S5 1.91K/F_4 1.91K/F_4 62882_LG1A 4 4 330u/2V_7343
B-Test change PC73
B-Test Modify

1
2
3

1
2
3
PR202 0.22u/25V_6 PC85
PR189 10_6 *1000p/50V_6
SHORT_PAD_6
PR105 PR106
SHORT_PAD_4 SHORT_PAD_4

16

17

40

1
PC76

CLK_EN#
VDD

VIN

PGOOD
1u/10V_4 62882_LG1B

41 PAD
+1.1V_VTT
UGATE1 20
62882_ISEN1 PR97 10K/F_4
BOOT1 19
PR188
*499/F_4 PR85 10K_4 2 PR93 62882_VSUM+ PR214 3.65K/F_4 62882_ISEN_1
(6) H_PSI# PSI# 2.2_6 PC63
PR190 147K/F_4 3 0.22u/25V_6
RBIAS 62882_VSUM- PR208 1/F_4 62882_ISEN_2
21
PHASE1
(4) H_PROCHOT# 4
VR_TT#
23 B-Test Modify
PR223 PR89 LGATE1a 62882_ISEN2 PR94 10K/F_4
C Close to Phase 1 Inductor *470K_4_NTC *4.02K/F_4 C
5 VIN
NTC
PC159
*0.01u/25V_4 24
LGATE1b

1
22 +
VSSP1 PC68 PC69 PC170
11 0.1u/50V_6 1u/25V_6 PC70 100u/25V_6.3X5.8

2
H_VID0 ISEN1 *1u/25V_6
(6) H_VID0 31 VID0

1
H_VID1 32
(6) H_VID1 VID1 PC74
B-Test Modify PQ57
C-Test change

5
H_VID2 33 0.22u/10V_4 AOL1448
(6) H_VID2
2
VID2 62882_VSUM-
H_VID3 34
(6) H_VID3 VID3 62882_UG2 4
H_VID4 35 PU4 25 PR200 SHORT_PAD_4
(6) H_VID4 VID4 ISL62882 VCCP +5V_S5
20A

1
2
3
H_VID5 36
(6) H_VID5 VID5 +VCC_CORE
PC59 1u/10V_4
H_VID6 37 PL10
(6) H_VID6 VID6 0.36uH/30A
VR_ON 38 PC56 1u/10V_4 62882_PH2 1 2
(34) VRON VR_ON PQ58 PQ59

5
DPRSLPVR 39 29 AOL1718 AOL1718
(6) H_DPRSLPVR

4
DPRSLPVR UGATE2
PR191 PR75 30 PR209
100K_4 499/F_4 BOOT2 62882_LG2 + PC71
4 4
PR88 2.2_6
2.2_6 PC53
B-Test Modify 330u/2V_7343

1
2
3

1
2
3
62882_FB 8 0.22u/25V_6
FB
28
PHASE2 PR73 PR74
PR196 PC62 26 SHORT_PAD_4 SHORT_PAD_4
*10K/F_4 22p/50V_4 LGATE2 PC173
9 27 2200p/50V_6
FB2 VSSP2
B B
PR193 10
412K/F_4 ISEN2
2 1
1

PC157 7 PC166
150p/50V_4 COMP 0.22u/10V_4
2

62882_COMP
62882_VSUM-
B-Test change
PC60 PR91
10p/50V_4 8.06K/F_4 6 VW
18 I_MON (6)
IMON
62882_ISEN2 PR92 10K/F_4
PR95 PC72
PC57 9.76K/F_4 33n/25V_4
1000P/50V_4 62882_VSUM+ PR205 3.65K/F_4 62882_ISEN_3
ISUM+
ISUM-
VSEN

VSSSENSE (6)
RTN

PR195 62882_VSUM- PR213 1/F_4 62882_ISEN_4


12

13

14

15

2.8K/F_4 62882_ISEN1 PR96 10K/F_4

PC168 PC169
PR199 PC160 0.22u/10V_4 0.068u/10V_4
562/F_4 390p/50V_4 62882_VSUM+
62882_RTN

PR201 *27.4/F_4 62882_VSEN PR100 PR203


+VCC_CORE
82.5/F_4 2.61K/F_4
2

PC163
330p/50V_4 PC172 PR217
PR98 SHORT_PAD_4 11K/F_4
(6) VCCSENSE
Parallel PC64 PR219
2700P/50V_4

A PR99 SHORT_PAD_4 330p/50V_4 10K_6_NTC Panasonic A


(6) VSSSENSE
PC161 PC75
0.01u/25V_4 PR204 ERT-J1VR103J
PR198 1000P/50V_4 0_4
*27.4/F_4
62882_VSUM-
C-Test change
PR216
1.24K/F_4 PC162
0.1u/25V_4 Close to Phase 1 Inductor
Quanta Computer Inc.
PC171 PR215 Load Line setting to 2mV/A
*1000P/50V_4 *100/F_4
PROJECT : ZQ3
Size Document Number Rev
1A
CPU Core ( ISL62882)
Date: Monday, March 29, 2010 Sheet 40 of 47
5 4 3 2 1
5 4 3 2 1

[PWM]

D D

VTT_SENSE-
PR171
0_4
OE_1.1
MAINON (34,42,43,46,47)

PR174

PR170

PR172

PC143
1

2
PC142
0.01u/16V_4

2200p/50V_4
2

1
44.2K/F_4

5.76K/F_4

40.2K/F_4
2

2
OCP:16A

R_SEL_1.1

VDES_1.1
BIAS_1.1
1.1V/13.6A
+1.1V_VTT
+3V
B-Test change
C C

A1

A2

A3

A5
PR173 PU10
SHORT_PAD_6 F1
B-Test change

R_SEL
BIAS

VDES

OE
VX
VX F2
PR175 PR176 F3
10K_4 IRIPL_1.1 VX
1 2 B2 IRIPL VX F4
VX F5
40.2K/F_4 B4 D1 PL9
TEMP VX 0.22uH_PCMC063T-R22MN
PR177 VX D2
(34) HWPG_VTT STAT_1.1 B5 VT358 D3 LX_1.1 1 2
STAT VX
SHORT_PAD_4 VX D4
E5 D5 PR56 SHORT_PAD_4
+5V_S5 VDD VX
B-Test change C5
C4
VDD
A4
VDD VSENSE+
E4 VDD B-Test change

AGND
AVDD
G4 PC145 PC34 PC152 PC43 PC146 PC154 PC155

GND
GND
GND
GND
GND
GND
GND
GND
GND
VDD

6800p/25V_4
22u/6.3V_8

0.1u/10V_4
*22u/6.3V_8

*22u/6.3V_8

*22u/6.3V_8

*22u/6.3V_8
G5 VDD
PC40 PC41 PC149 PC151 PC42
PR51
VTT_SENSE-

B3

B1
C1
C2
C3
E1
E2
E3
G1
G2
G3
SHORT_PAD_4
1u/6.3V_4

0.1u/10V_4

0.1u/10V_4

22u/6.3V_8

22u/6.3V_8

PR59
B 10_6 B

AVDD_1.1

PC33
0.22u/6.3V_4

A A

Quanta Computer Inc.


PROJECT : ZQ3
Size Document Number Rev
1A
+VTT (UP6111A)
Date: Monday, March 29, 2010 Sheet 41 of 47
5 4 3 2 1
5 4 3 2 1

1.05V_SENSE-
PR247
0_4
OE_1.05
MAINON (34,41,43,46,47)
D D

PR248

PR251

PR246

PC220
1

2
PC221
0.01u/16V_4

2200p/50V_4
2

1
44.2K/F_4

5.76K/F_4

38.3K/F_4
2

R_SEL_1.05 2

2
VDES_1.05
OCP:12A

BIAS_1.05
1.05V/8.2A
B-Test change
+1.05V
+3V PR250

A1

A2

A3

A5
SHORT_PAD_6
B-Test change

BIAS

R_SEL

VDES

OE
PR244
PR242 IRIPL_1.05 B2
C
10K/F_4
1 2 IRIPL C-Test change C
34.8K/F_4
B4 D1 PL15
TEMP VX 0.22uH_PCMC063T-R22MN
PR243
STAT_1.05
PU12 VX D2
LX_1.05 1
(34) HWPG_1.05V B5 STAT VX D3 2
SHORT_PAD_4 VT357 VX D4
E5 VDD VX D5
+5V_S5
B-Test change C5
C4
VDD
A4 VSENSE_1.05 PR245 SHORT_PAD_4
VDD VSENSE+
E4 VDD

AGND
AVDD
PC218 PC217 PC216 PC215 PC210 PC209 PC208 PC219 PC206 PC207

GND
GND
GND
GND
GND
GND

6800p/25V_4
22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

0.1u/10V_4
B-Test change

*22u/6.3V_8

*22u/6.3V_8
2

PC214 PC213 PC211 PC212 PR129


10_6 PR249

B3

B1
C1
C2
C3
E1
E2
E3
1.05V_SENSE-
1
0.1u/10V_4

10u/6.3V_8

10u/6.3V_8
0.01u/16V_4

SHORT_PAD_4
AVDD_1.05

PC100
B B
0.22u/6.3V_4

A A

Quanta Computer Inc.


PROJECT : ZQ3
Size Document Number Rev
1A
VCCP 1.05V(UP6111A)
Date: Monday, March 29, 2010 Sheet 42 of 47
5 4 3 2 1
5 4 3 2 1

[PWM]

1.5V_SENSE-

PR211

PR212

PR206

PC167
2

1
2200p/50V_4
D PR197 D
SUSON (34,46)
0_4

2
44.2K/F_4

5.76K/F_4

57.6K/F_4
PC165

2
0.01u/16V_4

R_SEL_1.5
OCP:16A

VDES_1.5

1
BIAS_1.5

OE_1.5
11.5A
B-Test change +1.5V_SUS

A1

A2

A3

A5
+3V PR218 PU11
SHORT_PAD_6 F1

R_SEL
BIAS

VDES

OE
VX
F2
VX
PR210 F3
VX
PR192 1 2 IRIPL_1.5 B2 IRIPL VX F4 C-Test change
100K_4 34.8K/F_4 F5
VX PL12
B4 TEMP VX D1
D2 0.22uH_PCMC063T-R22MN
PR194 VX
STAT_1.5 B5 VT358 D3 LX_1.5V 1 2
(34) HWPG_VDDR STAT VX
SHORT_PAD_4 D4
VX
E5 VDD VX D5
+3VPCU PR101
B-Test change C5
C4
VDD
A4 VSENSE_1.5
VDD VSENSE+ SHORT_PAD_4
E4 VDD

AGND
AVDD
G4 PC178 PC80 PC182 PC179 PC83 PC79 PC176 PC180 PC82 PC81 PC84 PC181

GND
GND
GND
GND
GND
GND
GND
GND
GND
VDD

6800p/25V_4
22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

0.1u/10V_4

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

*22u/6.3V_8

*22u/6.3V_8
G5
VDD 1.5V_SENSE- PR102
SHORT_PAD_4

B3

B1
C1
C2
C3
E1
E2
E3
G1
G2
G3
PC55 PC158 PC52 PC156 PC51
PR90
C C
10_6 B-Test change
1u/6.3V_4

0.1u/10V_4

0.1u/10V_4

22u/6.3V_8

22u/6.3V_8

AVDD_1.5

PC61
0.22u/6.3V_4

+1.5V_SUS

3
MAIND 2
B (39,47) MAIND B

PQ29
SMDDR_VTERM AO3404

1
0.75V (0.45A) +1.5V_SUS +5VPCU

+0.75V_DDR_VTT
+1.5V
PC54 0.1u/10V_4
PC58 1.38A
PU5
*10u/6.3V_8

1 10
VDDSSNS VIN
2 9 51100_S5 PR86 SUSON
VLDOIN S5 0_4
3 8
VTT GND
4 7 51100_S3 PR87
PGND S3 MAINON (34,41,42,46,47)
0_4
PC66 PC67 5 6
GND

VTTSNS VTTREF +SMDDR_VREF


S3 S5 VTT REF +1.5VSUS
10u/6.3V_8

10u/6.3V_8

TPS51100DGQR PC50 0.75V (10mA)


11

0.1u/10V_4

S0 1 1 ON ON ON

S3 0 1 ON ON OFF

A
S4/S5 0 0 OFF OFF OFF A

Quanta Computer Inc.


PROJECT : ZQ3
Size Document Number Rev
1A
DDR 1.5V(TPS51116)
Date: Monday, March 29, 2010 Sheet 43 of 47
5 4 3 2 1
1 2 3 4 5

B-Test change
+5V_S5
VIN

C-Test change
PC110 OCP=31A
PR144 PC5
A +3V *SW @0_4 PC111 PC6 25A A
PR136 PQ40 SW @2200p/50V_4 *SW @1u/25V_6 SW @1u/25V_6

5
SW @200K/F_4 SW @AOL1448 PQ39 +VGPU_CORE
B-Test change PC10 SW @1u/10V_4 2 7 8792TON SW @AOL1448 *SW @1u/25V_6
VDD TON
PR19 5 8792DH 4 4
SW @10K/F_4 PC14 SW @1u/10V_4 8792VCC DH
13 VCC

1
2
3

1
2
3
6 8792BST PR137 PC114
BST SW @1_6 SW @0.22u/25V_6
(46) VGA_PG 14 PGOOD PL3
8792EN 1 PU2 SW @0.68uH/34A_13*13*5
(11) dGPU_VRON EN
4 8792LX +VGPU_CORE
C-Test change
*SW @0_4 PR138 LX
SW @MAX8792ETD+T
8792SKIP# 12
SKIP# 8792DL
+3V_GFX DL 3

5
PC11 PR143 *SW @0_4
SW @0_4 PR37 SW @0.1u/10V_4 8792REFIN 10
REFIN PR13
FB 8
4 4 *SW @2.2_6 + + +
PR141 REF-2V
*SW @100K_4 8792REF 11 9 8792ILIM PC113

1
2
3

1
2
3
REF ILIM *SW @330u/2V_7343
PC4

EP
*SW @1000p/50V_4
B B-Test change B
B-Test change C-Test change

15
PR24
SW @34K/F_4 PR145 PC116
SW @30K/F_4 PR140 PC2 SW @330u/2V_7343 PC115
+3V_GFX SW @SHORT_PAD_6 *SW @4700p/25V_4 PQ37 PQ36 PC112 SW @330u/2V_7343
SW @AOL1718 SW @AOL1718 SW @0.1u/50V_6
Place near GND pin15
PC117
B-Test change
R13042 R431 PR22
B-Test change
3

SW@1000P/50V_4
Stuff for N11P SNP@10K/F_4 SW @196K/F_4
PR142
SW @100K_4
(19) GPU_VID1 2
Frequency(PR220=200K) 300K
PQ14
SW @DMN601K-7 VIN +VGPU_CORE
PR27
1

SNM@100K_4 PR23
PR3015 SW @36.5K/F_4 GPU_VID1 GPU_VID2 +VGPU_CORE
Stuff for N11P
0 0 1.035V PR26 PR29
PC16 SW @1M/F_6 SW @22_8
SW @0.01u/16V_4 1 0 0.95V
C C
0 1 0.85V

3
+3V_GFX
1 1 0.8V

3
2
For N11P-GE1, please have HW default to 0.95V for NVVDD. 8792EN 2
R432 PR146 For N11M-GE1, please have HW default to 1.035V for NVVDD. PQ15
3

*SNP@10K/F_4 SW @82.5K/F_4 PR31 SW @DMN601K-7


PQ16 SW @1M/F_6

1
SW @DTC144EUA
(19) GPU_VID2 2

PQ44
SW @DMN601K-7
PR149
1

SW @100K_4

PC122
SW @0.01u/16V_4

D D

12/9 R13042,R13043 move to PWM IC circut page

Quanta Computer Inc.


PROJECT : ZQ3
Size Document Number Rev
1A
GPU CORE(MAX8792)
Date: Monday, March 29, 2010 Sheet 44 of 47
1 2 3 4 5
A B C D E F G H

Int_VGA [PWM]

(6) GFX_VID0

(6) GFX_VID1 +1.1V_VTT +1.1V_VTT


(6) GFX_VID2

(6) GFX_VID3

1 PR108 PR110 PR221 PR109 PR222 PR111 PR112 1


(6) GFX_VID4
*0_6 *0_6 *0_6 *0_6 *0_6 *0_6 *0_6
(6) GFX_VID5

(6) GFX_VID6
PC185
*0.01u/25V_4 GFX_VID6 GFX_VID5 GFX_VID4 GFX_VID3 GFX_VID2 GFX_VID1 GFX_VID0
62881_GND 2 1

B-Test change PR227 100K_4

PR220 0_4
(6) GFX_ON

PR224 0_4
(6) GFX_DPRSLPVR
B-Test change
VIN

PR226

62881_GND
short

62881DPRSLPVR
62881_GND

62881VR_ON

1
GFX_VID6

GFX_VID5

GFX_VID4

GFX_VID3

GFX_VID2
PC94 PC201 PC200 PC93
1u/25V_6 *1u/25V_6 2200p/50V_4

2
+3V 0.1u/50V_6

B-Test change

29

28

27

26

25

24

23

22
C-Test change

5
PR225

VID6

VID5

VID4

VID3

VID2
GND

DPRSLPVR

VR_ON

GFX_VID1

GFX_VID0
100K_4
B-Test change 1
CLK_EN#
2 4 2
PR228 62881PGOOD 2 21 +5V_S5
(34) HWPG_GFX PGOOD VID1
SHORT_PAD_4 17A

1
2
3
PQ67
PR229 47K/F_4 62881RBIAS 3 20 AOL1448 +VGFX_AXG
62881_GND RBIAS VID0
PC186
PR231 *150K/F_4 PR230 8.06K/F_4 62881VW 4 19 1 2
C-Test change
62881_GND VW VCCP
PC187 4.7u/6.3V_6 62881_GND
18 62881LGATE
1000P/50V_4 62881COMP 5 LGATE PL14
COMP PU6 0.56uH/25A
PR232 PC190 ISL62881HRZ-T 17 +VGFX_AXG
820K/F_4 22p/50V_4 VSSP
62881FB 6
FB
16 62881PHASE
B-Test change
PC189 PHASE PQ66 PQ65
100p/50V_4 PR234 AOL1718 AOL1718

5
8.87K/F_4 15 62881UGATE
62881VSEN UGATE PR121 PR116 + +
7
VSEN 2.2/F_4 3.65K/F_4
ISUM+

BOOT
ISUM-

IMON PC199
4 4
VDD
RTN

VIN

PR235 PC194 PC197 PC195 10u/6.3V_8


PR117 PR241 560u/2.5V 560u/2.5V

1
2
3

1
2
3
PR233 PC193 2.61K/F_4 10K_6_NTC
8

10

11

12

13

14
17.8K/F_4 150p/50V_4 PC191 1_6 0.22u/25V_6 PC89
PC188 330p/50V_4 62881BOOT 1 2
62881VDD
62881ISUM+
62881ISUM-

62881VIN

330p/50V_4 2200p/50V_4
62881RTN PR120
GFX_IMON
GFX_IMON (6)
PC192 11K/F_4
2
62881_GND PR114
1000P/50V_4 *10K/F_4 PC86
*0.22u/10V_4
1

PC87 PC196
3 0.15u/10V_4 0.1u/10V_4 3
VSS_AXG_SENSE (6)
62881_GND
PR122
VIN
SHORT_PAD_4
PC92 62881_GND
PC90
B-Test change *0.1u/10V_4
0.22u/25V_6

62881_GND
+5V_S5
PC198
*180p/50V_4
PR238
PR239 2.49K/F_4
PC91 10_6
1u/10V_4
PR240
*100/F_4
62881_GND

2 1

PR119 PC88
82.5/F_4 0.01u/25V_4

B-Test change Parallel


PR115 10/F_4

PR236
VSS_AXG_SENSE (6)
4 SHORT_PAD_4 4

PR113 10/F_4

PR237
VCC_AXG_SENSE (6)
SHORT_PAD_4

Quanta Computer Inc.


PROJECT : ZQ3
Size Document Number Rev
1A
1.Level 1 Environment-related Substances Should NEVER be Used. +VGFX_AXG (ISL62881)
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners. Date: Monday, March 29, 2010 Sheet 45 of 47
A B C D E F G H
5 4 3 2 1

+3VPCU 1.55A

+1.8V
PC134
B-Test change PC132 0.1u/25V_4
10u/10V_8
PU9 HPA00835RTER
DCR(max)=10mohm
16
VIN PH
10 C-Test change
1 11 PL7
VIN PH 1uH/11A_7X7X3
D B-Test change 2 12 D
VIN PH
MAINON PR160
15 13 PR161 0_6
EN BOOT
SHORT_PAD_4
54418-1.8_VFB 6 14 PC129 0.1u/50V_6 PR168
VSNS PWRGD 51.1/F_4
PC128 7 3
COMP GND
1000P/50V_4
8 RT/CLK GND 4 R1

PAD
PAD
PAD
PAD
PAD
PAD
HWPG_1.8V (34)
9 SS AGND 5
PR166 PR167 PR165
8.06K/F_4 182K/F_4 PR159 100K/F_4 PC137 PC130 PC131

22
21
20
19
18
17
100K_4 0.1u/25V_4 10u/10V_8 10u/10V_8
PC135 +3V
*100p/50V_4 PC138
MAINON 0.01u/25V_4 54418-1.8_VFB
MAINON (34,41,42,43,47)

PC136
2700p/50V_4 V0=0.8*(R1+R2)/R2
R2 PR164
78.7K/F_4

VIN_SRC +3VSUS +15V +3VPCU

C B-Test change C

PR43 PR103 PR61

3
*1M/F_6 *22_8 *1M_6

SUSON_R 2

3
PQ18
3

*DTC144EUA PQ28
*AO3404
1.5A

1
2 2 2
(34,43) SUSON PR40 PC32
+3VSUS
1

*1M/F_6 PQ27 PQ22 *2200p/50V_4


PR38 *DMN601K-7 *DMN601K-7
1

*100K_4
1

1
2

+1.5V_SUS
VIN_SRC +1.5V_GFX +1.8V_GFX +15V +1.8V

PR52 PR64 PR65 PR53


B-Test change

5
6
7
8
SW@1M/F_6 SW@22_8 SW@22_8 SW@1M_6
B B

dGPU_D1 2 dGPU_D1 4
3

3
3

PQ21 PQ53 PQ46


PR41 SW@DMN601K-7 SW@AO3404 SW@AO4468 +1.5V_GFX

1
SW@0_4 2 2 2
2 PR58 PC30

3
2
1
(44) VGA_PG +1.8V_GFX
SW@1M/F_6 PQ23 PQ25 PQ24 *SW@2200p/50V_4
1

SW@DMN601K-7 SW@DMN601K-7 SW@DMN601K-7


PR252 0.23A(MAX 0.3A)
4.29A(MAX 5.72A)
1

PC29 SW@100K_4
1

SW@1u/10V_4
2

VIN_SRC +3V_GFX +1.05V_GFX +15V +1.1V_VTT +3VPCU

PR5 PR8 PR12


5
6
7
8

SW@1M/F_6 SW@22_8 SW@22_8 PR10

3
SW@1M_6
dGPU_D 4
PQ1 dGPU_D 2
3

SW@DTC144EUA PQ17
3

SW@AO4468 PQ5
A SW@AO3404 A

2 2 2 2

1
(11) dGPU_PWR_EN PR6 PC25 +1.05V_GFX +3V_GFX
3
2
1

SW@1M/F_6 PQ4 PQ7 PQ6 *SW@2200p/50V_4


1

SW@DMN601K-7 SW@DMN601K-7 SW@DMN601K-7


1

PR4
1

*SW@100K_4
2.87A(MAX 3.83A) 1.04A(MAX 1.38A)
Quanta Computer Inc.
2

PROJECT : ZQ3
Size Document Number Rev
1A
(GPU_Power/1.8V)
Date: Monday, March 29, 2010 Sheet 46 of 47
5 4 3 2 1
1 2 3 4 5

VIN

PD1
SW1010CPT
5 +
7 NC_TEMP T1
6 -
A A
PU1B
LM393
PR7
For EC control thermal protection (output 3.3V)
1M_6

1
PQ2
AO3409
TH_ON 2

3
Thermal protection

3
S5_ON 2

PQ8

1
VL VL DTC144EUA

+1.5V_SUS
SYS_SHDN# (4,39)
PR3 PR2 1/13 modified
? 1K/F_4 200K/F_4 PR9
B 200K_6 B

5
6
7
8
PC3
note placement area 0.1u/50V_6 PQ26

3
*AO4468

8
PR169 4 R153 R154
(39,43) MAIND
10K _6_NTC 2.469V 3 +
1 2
NTC 2 0_1206 0_1206
- PQ9
PU1A DMN601K-7

4
LM393 PC1

3
2
1
3

0.1u/50V_6

PR1
+1.5V_CPUVDDQ
S5_ON 2 200K/F_4
(34,39) S5_ON
PQ3 3A/maximum
DMN601K-7
1

+3V +5V
VIN_SRC +1.8V +1.5V +15V +1.5V_CPUVDDQ
C C

1/13 modified
Add it for S3 leakage circuit PR155 PR151
PR158 22_8 22_8 PR154 PR163
MAINON_DIS_G 1M/F_6 22_8 22_8 PR162 PR107
1M_6 22_8
+0.75V_DDR_VTT
MAINON_DIS_G MAIND
MAIND (39,43)

3
3

3
3

PR157 PR118
2 1M/F_6 2 22_8
(34,41,42,43,46) MAINON PC133
2 2 MAINON_DIS_G 2
2 2 PQ51 *2200p/50V_4
1

PQ49 DMN601K-7 PQ30


1

PR156 DTC144EUA PQ48 DMN601K-7


1

3
*100K_4 PQ45 PQ47 PQ50
1

1
DMN601K-7
1

DMN601K-7 DMN601K-7 DMN601K-7


2

MAINON_DIS_G 2

PQ31
DMN601K-7

1
D D

Quanta Computer Inc.


PROJECT : ZQ3
Size Document Number Rev
1A
Thermal Protection
Date: Monday, March 29, 2010 Sheet 47 of 47
1 2 3 4 5

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