Colour Television Chassis

QM14.3E
LA

Contents Page
1. Revision List 2
2. Technical Specs, Diversity, and Connections 2
3. Precautions, Notes, and Abbreviation List 5
4. Mechanical Instructions 9
5. Service Modes, Error Codes, and Fault Finding 13
6. Alignments 22
7. Circuit Descriptions 24
8. IC Data Sheets 30
9. Block Diagrams 35
10. Circuit Diagrams and PWB Layouts Drawing PWB
715RLPCB0000000213 SSB 40 90-91
715RLPCB0000000094 AmbiLight 92
715RLPCB0000000103 AmbiLight 94
11. Styling Sheets
7809 series 42" 96
7809 series 49" 97
7809 series 55" 98

Published by PvH/EL 1416 Quality Printed in the Netherlands Subject to modification EN 3122 785 19580
2014-Apr-17

©
2014 TP Vision Netherlands B.V.
All rights reserved. Specifications are subject to change without notice. Trademarks are the
property of Koninklijke Philips Electronics N.V. or their respective owners.
TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjust
earlier supplies accordingly.
PHILIPS and the PHILIPS’ Shield Emblem are used under license from Koninklijke Philips Electronics N.V.
 EN 2 1. QM14.3E LA Revision List

1. Revision List
Manual xxxx xxx xxxx.0
• First release.

2. Technical Specs, Diversity, and Connections

Index of this chapter:
2.1 Technical Specifications
2.2 Directions for Use
2.3 Connections 2.1 Technical Specifications
2.4 Chassis Overview For on-line product support please use the CTN links in Table
2-1. Here is product information available, as well as getting
Notes: started, user manuals, frequently asked questions and
• Figures can deviate due to the different set executions. software & drivers.
• Specifications are indicative (subject to change).

Table 2-1 Described Model Numbers and Diversity

2 4 7 9 10 11
Mechanics Descr. Block Diagrams Schematics Styling

(Wireless LAN USB, Light Sensor, IR/LED Module)

General Power Architecture

(Keyboard Control Module)

Amplifier control module
Connection Overview

Assembly Removal

(Sensor Module)
Control & Clock
Wiring Diagram
Cable Dressing

Power Supply

Power Supply
Supply lines

(AmbiLight)

Styling
Audio
Video

SSB
I2C

CTN
42PUK7809/12 2.3 4-1 4.3 7.3 7.3 9.1 - - - - 9.5 - 10.1 - - - - 10.2 11.1
4-2
42PUS7809/12 2.3 4-1 4.3 7.3 7.3 9.1 - - - - 9.5 - 10.1 - - - - 10.2 11.1
4-2
42PUS7809/60 2.3 4-1 4.3 7.3 7.3 9.1 - - - - 9.5 - 10.1 - - - - 10.2 11.1
4-2
49PUK7809/12 2.3 4-3 4.3 7.3 7.3 9.2 - - - - 9.5 - 10.1 - - - - 10.2 11.2
4-4
49PUS7809/12 2.3 4-3 4.3 7.3 7.3 9.2 - - - - 9.5 - 10.1 - - - - 10.2 11.2
4-4
49PUS7809/60 2.3 4-3 4.3 7.3 7.3 9.2 - - - - 9.5 - 10.1 - - - - 10.2 11.2
4-4
55PUK7809/12 2.3 4-5 4.3 7.3 7.3 9.3 - - - - 9.5 - 10.1 - - - - 10.3 11.3
4-6
55PUS7809/12 2.3 4-5 4.3 7.3 7.3 9.3 - - - - 9.5 - 10.1 - - - - 10.3 11.3
4-6
55PUS7809/60 2.3 4-5 4.3 7.3 7.3 9.3 - - - - 9.5 - 10.1 - - - - 10.3 11.3
4-6

2.2 Directions for Use

You can download this information from the following websites:
http://www.philips.com/support
http://www.p4c.philips.com

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 Technical Specs, Diversity, and Connections QM14.3E LA 2. EN 3

2.3 Connections

Rear Connectors Side Connectors

13 14 15 16 17 18

SERVICE
AUDIO IN
1
COMMON
Y INTERFACE

NETWORK
Pb L

Pr R
SCART 2
USB

Bottom Connectors USB 3

AUDIO OUT ANTENNA SAT

OPTICAL USB HDMI 1 HDMI 2 HDMI 4 4

HDMI 3 5

12 11 10 9 8 7 6
(optional)

19580_141_140401.eps
14-04-01

Figure 2-1 Connection overview

Note: The following connector colour abbreviations are used 1 - D2+ Data channel j
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= 2 - Shield Gnd H
Grey, Rd= Red, Wh= White, Ye= Yellow. 3 - D2- Data channel j
4 - D1+ Data channel j
2.3.1 Connections 5 - Shield Gnd H
6 - D1- Data channel j
7 - D0+ Data channel j
1 - Common Interface
68p - See Figure 10-1-26 jk 8 - Shield Gnd H
9 - D0- Data channel j
10 - CLK+ Data channel j
2, 3 and 8 - USB2.0
11 - Shield Gnd H
12 - CLK- Data channel j
1 2 3 4 13 - Easylink/CEC Control channel jk
10000_022_090121.eps 14 - ARC Audio Return Channel k
090121 15 - DDC_SCL DDC clock j
16 - DDC_SDA DDC data jk
Figure 2-2 USB (type A) 17 - Ground Gnd H
18 - +5V j
1 - +5V k 19 - HPD Hot Plug Detect j
2 - Data (-) jk 20 - Ground Gnd H
3 - Data (+) jk
4 - Ground Gnd H 9 - SAT - In (optional)
- - F-type Coax, 75 ohm D
4, 5, 6 and 7 - HDMI 4, 3, 2, 1
Digital Video - In, Digital Audio with ARC - In/Out 10 - Antenna - In
19 1 - - IEC-type (EU) Coax, 75 ohm D
18 2

10000_017_090121.eps 11 - Head phone (Output)

090428
Bk - Head phone 32 - 600 ohm / 10 mW ot
Figure 2-3 HDMI (type A) connector

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 EN 4 2. QM14.3E LA Technical Specs, Diversity, and Connections

12 - Audio - Out: S/PDIF - Out 17 - Cinch: Audio - In

- - Optical kq Rd - Audio - R 0.5 VRMS / 10 kohm jq
Wh - Audio - L 0.5 VRMS / 10 kohm jq
13 - RJ45: Ethernet
18 - Video RGB - In, CVBS - In/Out, Audio - In/Out
20 2

10000_025_090121.eps 21 1
10000_001_090121.eps
120320 090121

Figure 2-4 Ethernet connector Figure 2-5 SCART connector

1 - TD+ Transmit signal k 1 - n.c.

2 - TD- Transmit signal k 2 - Audio R 0.5 VRMS / 10 kohm j
3 - RD+ Receive signal j 3 - n.c.
4 - CT Centre Tap: DC level fixation 4 - Ground Audio Gnd H
5 - CT Centre Tap: DC level fixation 5 - Ground Blue Gnd H
6 - RD- Receive signal j 6 - Audio L 0.5 VRMS / 10 kohm j
7 - GND Gnd H 7 - Video Blue 0.7 VPP / 75 ohm jk
8 - GND Gnd H 8 - Function Select 0 - 2 V: INT
4.5 - 7 V: EXT 16:9
14 - Cinch: Video YPbPr - In 9.5 - 12 V: EXT 4:3 j
Gn - Video Y 1 VPP / 75 ohm jq 9 - Ground Green Gnd H
Bu - Video Pb 0.7 VPP / 75 ohm jq 10 - n.c.
Rd - Video Pr 0.7 VPP / 75 ohm jq 11 - Video Green 0.7 VPP / 75 ohm j
12 - n.c.
13 - Ground Red Gnd H
15 - Service
14 - Ground P50 Gnd H
1 - Ground Gnd H
15 - Video Red 0.7 VPP / 75 ohm j
2 - UART_TX Transmit k
16 - Status/FBL 0 - 0.4 V: INT
3 - UART_RX Receive j
1 - 3 V: EXT / 75 ohm j
17 - Ground Video Gnd H
16 - Audio - In: Left/Right (VGA/DVI) 18 - Ground FBL Gnd H
Bu - Audio L/R in 0.5 VRMS / 10 kohm jq 19 - n.c.
20 - Video CVBS 1 VPP / 75 ohm j
21 - Shield Gnd H

2.4 Chassis Overview

Refer to chapter 9. Block Diagrams for PWB/CBA locations.

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 Precautions, Notes, and Abbreviation List
3. Precautions, Notes, and Abbreviation List
Index of this chapter:
3.1 Safety Instructions
3.2 Warnings
3.3 Notes
3.4 Abbreviation List
3.1 Safety Instructions
Safety regulations require the following during a repair:
• Connect the set to the Mains/AC Power via an isolation
transformer (> 800 VA).
• Replace safety components, indicated by the symbol h,
only by components identical to the original ones. Any
other component substitution (other than original type) may
increase risk of fire or electrical shock hazard.
Safety regulations require that after a repair, the set must be
returned in its original condition. Pay in particular attention to
the following points:
• Route the wire trees correctly and fix them with the
mounted cable clamps.
• Check the insulation of the Mains/AC Power lead for
external damage.
• Check the strain relief of the Mains/AC Power cord for
proper function.
• Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the “on” position
(keep the Mains/AC Power cord unplugged!).
3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the
tuner or the aerial connection on the set. The reading
should be between 4.5 M and 12 M.
4. Switch “off” the set, and remove the wire between the
two pins of the Mains/AC Power plug.
• Check the cabinet for defects, to prevent touching of any
inner parts by the customer.
3.2 Warnings
• All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD w). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential.
• Be careful during measurements in the high voltage
section.
• Never replace modules or other components while the unit
is switched “on”.
• When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.
3.3 Notes
3.3.1 General
• Measure the voltages and waveforms with regard to the
chassis (= tuner) ground (H), or hot ground (I), depending
on the tested area of circuitry. The voltages and waveforms
shown in the diagrams are indicative. Measure them in the
Service Default Mode with a colour bar signal and stereo
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and
picture carrier at 475.25 MHz for PAL, or 61.25 MHz for
NTSC (channel 3).
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QM14.3E LA 3. EN 5
• Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the
voltages in the power supply section both in normal
operation (G) and in stand-by (F). These values are
indicated by means of the appropriate symbols.
3.3.2 Schematic Notes
• All resistor values are in ohms, and the value multiplier is
often used to indicate the decimal point location (e.g. 2K2
indicates 2.2 k).
• Resistor values with no multiplier may be indicated with
either an “E” or an “R” (e.g. 220E or 220R indicates 220 ).
• All capacitor values are given in micro-farads (  10-6),
nano-farads (n  10-9), or pico-farads (p  10-12).
• Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).
• An “asterisk” (*) indicates component usage varies. Refer
to the diversity tables for the correct values.
• The correct component values are listed on the Philips
Spare Parts Web Portal.
3.3.3 Spare Parts
For the latest spare part overview, consult your Philips Spare
Part web portal.
3.3.4 BGA (Ball Grid Array) ICs
Introduction
For more information on how to handle BGA devices, visit this
URL: http://www.atyourservice-magazine.com. Select
“Magazine”, then go to “Repair downloads”. Here you will find
Information on how to deal with BGA-ICs.
BGA Temperature Profiles
For BGA-ICs, you must use the correct temperature-profile.
Where applicable and available, this profile is added to the IC
Data Sheet information section in this manual.
3.3.5 Lead-free Soldering
Due to lead-free technology some rules have to be respected
by the workshop during a repair:
• Use only lead-free soldering tin. If lead-free solder paste is
required, please contact the manufacturer of your soldering
equipment. In general, use of solder paste within
workshops should be avoided because paste is not easy to
store and to handle.
• Use only adequate solder tools applicable for lead-free
soldering tin. The solder tool must be able:
– To reach a solder-tip temperature of at least 400°C.
– To stabilize the adjusted temperature at the solder-tip.
– To exchange solder-tips for different applications.
• Adjust your solder tool so that a temperature of around
360°C - 380°C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400°C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.
To avoid wear-out of tips, switch “off” unused equipment or
reduce heat.
• Mix of lead-free soldering tin/parts with leaded soldering
tin/parts is possible but PHILIPS recommends strongly to
avoid mixed regimes. If this cannot be avoided, carefully
clear the solder-joint from old tin and re-solder with new tin.
3.3.6 Alternative BOM identification
It should be noted that on the European Service website,
“Alternative BOM” is referred to as “Design variant”.
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 EN 6 3. QM14.3E LA Precautions, Notes, and Abbreviation List

The third digit in the serial number (example: 3.4 Abbreviation List
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the 0/6/12 SCART switch control signal on A/V
specific TV set. In general, it is possible that the same TV
board. 0 = loop through (AUX to TV),
model on the market is produced with e.g. two different types
6 = play 16 : 9 format, 12 = play 4 : 3
of displays, coming from two different suppliers. This will then format
result in sets which have the same CTN (Commercial Type
AARA Automatic Aspect Ratio Adaptation:
Number; e.g. 28PW9515/12) but which have a different B.O.M.
algorithm that adapts aspect ratio to
number. remove horizontal black bars; keeps
By looking at the third digit of the serial number, one can
the original aspect ratio
identify which B.O.M. is used for the TV set he is working with.
ACI Automatic Channel Installation:
If the third digit of the serial number contains the number “1” algorithm that installs TV channels
(example: AG1B033500001), then the TV set has been
directly from a cable network by
manufactured according to B.O.M. number 1. If the third digit is
means of a predefined TXT page
a “2” (example: AG2B0335000001), then the set has been ADC Analogue to Digital Converter
produced according to B.O.M. no. 2. This is important for
AFC Automatic Frequency Control: control
ordering the correct spare parts!
signal used to tune to the correct
For the third digit, the numbers 1...9 and the characters A...Z frequency
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
AGC Automatic Gain Control: algorithm that
indicated by the third digit of the serial number.
controls the video input of the feature
box
Identification: The bottom line of a type plate gives a 14-digit
AM Amplitude Modulation
serial number. Digits 1 and 2 refer to the production centre (e.g.
AP Asia Pacific
SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M. AR Aspect Ratio: 4 by 3 or 16 by 9
code, digit 4 refers to the Service version change code, digits 5
ASF Auto Screen Fit: algorithm that adapts
and 6 refer to the production year, and digits 7 and 8 refer to
aspect ratio to remove horizontal black
production week (in example below it is 2010 week 10 / 2010 bars without discarding video
week 17). The 6 last digits contain the serial number.
information
ATSC Advanced Television Systems
Committee, the digital TV standard in
the USA
ATV See Auto TV
Auto TV A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way
AV External Audio Video
AVC Audio Video Controller
AVIP Audio Video Input Processor
B/G Monochrome TV system. Sound
carrier distance is 5.5 MHz
BDS Business Display Solutions (iTV)
BLR Board-Level Repair
BTSC Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
countries
B-TXT Blue TeleteXT
10000_053_110228.eps
110228
C Centre channel (audio)
CEC Consumer Electronics Control bus:
Figure 3-1 Serial number (example) remote control bus on HDMI
connections
3.3.7 Board Level Repair (BLR) or Component Level Repair CL Constant Level: audio output to
(CLR) connect with an external amplifier
CLR Component Level Repair
If a board is defective, consult your repair procedure to decide ComPair Computer aided rePair
if the board has to be exchanged or if it should be repaired on CP Connected Planet / Copy Protection
component level. CSM Customer Service Mode
If your repair procedure says the board should be exchanged CTI Color Transient Improvement:
completely, do not solder on the defective board. Otherwise, it manipulates steepness of chroma
cannot be returned to the O.E.M. supplier for back charging! transients
CVBS Composite Video Blanking and
3.3.8 Practical Service Precautions Synchronization
DAC Digital to Analogue Converter
• It makes sense to avoid exposure to electrical shock. DBE Dynamic Bass Enhancement: extra
While some sources are expected to have a possible low frequency amplification
dangerous impact, others of quite high potential are of DCM Data Communication Module. Also
limited current and are sometimes held in less regard. referred to as System Card or
• Always respect voltages. While some may not be Smartcard (for iTV).
dangerous in themselves, they can cause unexpected DDC See “E-DDC”
reactions that are best avoided. Before reaching into a D/K Monochrome TV system. Sound
powered TV set, it is best to test the high voltage insulation. carrier distance is 6.5 MHz
It is easy to do, and is a good service precaution. DFI Dynamic Frame Insertion

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 Precautions, Notes, and Abbreviation List QM14.3E LA 3. EN 7

DFU Directions For Use: owner's manual SDI), is a digitized video format used
DMR Digital Media Reader: card reader for broadcast grade video.
DMSD Digital Multi Standard Decoding Uncompressed digital component or
DNM Digital Natural Motion digital composite signals can be used.
DNR Digital Noise Reduction: noise The SDI signal is self-synchronizing,
reduction feature of the set uses 8 bit or 10 bit data words, and has
DRAM Dynamic RAM a maximum data rate of 270 Mbit/s,
DRM Digital Rights Management with a minimum bandwidth of 135
DSP Digital Signal Processing MHz.
DST Dealer Service Tool: special remote iTV Institutional TeleVision; TV sets for
control designed for service hotels, hospitals etc.
technicians LS Last Status; The settings last chosen
DTCP Digital Transmission Content by the customer and read and stored
Protection; A protocol for protecting in RAM or in the NVM. They are called
digital audio/video content that is at start-up of the set to configure it
traversing a high speed serial bus, according to the customer's
such as IEEE-1394 preferences
DVB-C Digital Video Broadcast - Cable LATAM Latin America
DVB-T Digital Video Broadcast - Terrestrial LCD Liquid Crystal Display
DVD Digital Versatile Disc LED Light Emitting Diode
DVI(-d) Digital Visual Interface (d= digital only) L/L' Monochrome TV system. Sound
E-DDC Enhanced Display Data Channel carrier distance is 6.5 MHz. L' is Band
(VESA standard for communication I, L is all bands except for Band I
channel and display). Using E-DDC, LPL LG.Philips LCD (supplier)
the video source can read the EDID LS Loudspeaker
information form the display. LVDS Low Voltage Differential Signalling
EDID Extended Display Identification Data Mbps Mega bits per second
(VESA standard) M/N Monochrome TV system. Sound
EEPROM Electrically Erasable and carrier distance is 4.5 MHz
Programmable Read Only Memory MHEG Part of a set of international standards
EMI Electro Magnetic Interference related to the presentation of
EPG Electronic Program Guide multimedia information, standardised
EPLD Erasable Programmable Logic Device by the Multimedia and Hypermedia
EU Europe Experts Group. It is commonly used as
EXT EXTernal (source), entering the set by a language to describe interactive
SCART or by cinches (jacks) television services
FDS Full Dual Screen (same as FDW) MIPS Microprocessor without Interlocked
FDW Full Dual Window (same as FDS) Pipeline-Stages; A RISC-based
FLASH FLASH memory microprocessor
FM Field Memory or Frequency MOP Matrix Output Processor
Modulation MOSFET Metal Oxide Silicon Field Effect
FPGA Field-Programmable Gate Array Transistor, switching device
FTV Flat TeleVision MPEG Motion Pictures Experts Group
Gb/s Giga bits per second MPIF Multi Platform InterFace
G-TXT Green TeleteXT MUTE MUTE Line
H H_sync to the module MTV Mainstream TV: TV-mode with
HD High Definition Consumer TV features enabled (iTV)
HDD Hard Disk Drive NC Not Connected
HDCP High-bandwidth Digital Content NICAM Near Instantaneous Compounded
Protection: A “key” encoded into the Audio Multiplexing. This is a digital
HDMI/DVI signal that prevents video sound system, mainly used in Europe.
data piracy. If a source is HDCP coded NTC Negative Temperature Coefficient,
and connected via HDMI/DVI without non-linear resistor
the proper HDCP decoding, the NTSC National Television Standard
picture is put into a “snow vision” mode Committee. Color system mainly used
or changed to a low resolution. For in North America and Japan. Color
normal content distribution the source carrier NTSC M/N= 3.579545 MHz,
and the display device must be NTSC 4.43= 4.433619 MHz (this is a
enabled for HDCP “software key” VCR norm, it is not transmitted off-air)
decoding. NVM Non-Volatile Memory: IC containing
HDMI High Definition Multimedia Interface TV related data such as alignments
HP HeadPhone O/C Open Circuit
I Monochrome TV system. Sound OSD On Screen Display
carrier distance is 6.0 MHz OAD Over the Air Download. Method of
I 2C Inter IC bus software upgrade via RF transmission.
I2D Inter IC Data bus Upgrade software is broadcasted in
I2S Inter IC Sound bus TS with TV channels.
IF Intermediate Frequency OTC On screen display Teletext and
IR Infra Red Control; also called Artistic (SAA5800)
IRQ Interrupt Request P50 Project 50: communication protocol
ITU-656 The ITU Radio communication Sector between TV and peripherals
(ITU-R) is a standards body PAL Phase Alternating Line. Color system
subcommittee of the International mainly used in West Europe (colour
Telecommunication Union relating to carrier = 4.433619 MHz) and South
radio communication. ITU-656 (a.k.a. America (colour carrier

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 EN 8 3. QM14.3E LA Precautions, Notes, and Abbreviation List

PAL M = 3.575612 MHz and SVGA 800 × 600 (4:3)

PAL N = 3.582056 MHz) SVHS Super Video Home System
PCB Printed Circuit Board (same as “PWB”) SW Software
PCM Pulse Code Modulation SWAN Spatial temporal Weighted Averaging
PDP Plasma Display Panel Noise reduction
PFC Power Factor Corrector (or SXGA 1280 × 1024
Pre-conditioner) TFT Thin Film Transistor
PIP Picture In Picture THD Total Harmonic Distortion
PLL Phase Locked Loop. Used for e.g. TMDS Transmission Minimized Differential
FST tuning systems. The customer Signalling
can give directly the desired frequency TS Transport Stream
POD Point Of Deployment: a removable TXT TeleteXT
CAM module, implementing the CA TXT-DW Dual Window with TeleteXT
system for a host (e.g. a TV-set) UI User Interface
POR Power On Reset, signal to reset the uP uP Microprocessor
PSDL Power Supply for Direct view LED UXGA 1600 × 1200 (4:3)
backlight with 2D-dimming V V-sync to the module
PSL Power Supply with integrated LED VESA Video Electronics Standards
drivers Association
PSLS Power Supply with integrated LED VGA 640 × 480 (4:3)
drivers with added Scanning VL Variable Level out: processed audio
functionality output toward external amplifier
PTC Positive Temperature Coefficient, VSB Vestigial Side Band; modulation
non-linear resistor method
PWB Printed Wiring Board (same as “PCB”) WYSIWYR What You See Is What You Record:
PWM Pulse Width Modulation record selection that follows main
QRC Quasi Resonant Converter picture and sound
QTNR Quality Temporal Noise Reduction WXGA 1280 × 768 (15:9)
QVCP Quality Video Composition Processor XTAL Quartz crystal
RAM Random Access Memory XGA 1024 × 768 (4:3)
RGB Red, Green, and Blue. The primary Y Luminance signal
color signals for TV. By mixing levels Y/C Luminance (Y) and Chrominance (C)
of R, G, and B, all colors (Y/C) are signal
reproduced. YPbPr Component video. Luminance and
RC Remote Control scaled color difference signals (B-Y
RC5 / RC6 Signal protocol from the remote and R-Y)
control receiver YUV Component video
RESET RESET signal
ROM Read Only Memory
RSDS Reduced Swing Differential Signalling
data interface
R-TXT Red TeleteXT
SAM Service Alignment Mode
S/C Short Circuit
SCART Syndicat des Constructeurs
d'Appareils Radiorécepteurs et
Téléviseurs
SCL Serial Clock I2C
SCL-F CLock Signal on Fast I2C bus
SD Standard Definition
SDA Serial Data I2C
SDA-F DAta Signal on Fast I2C bus
SDI Serial Digital Interface, see “ITU-656”
SDRAM Synchronous DRAM
SECAM SEequence Couleur Avec Mémoire.
Colour system mainly used in France
and East Europe. Colour
carriers = 4.406250 MHz and
4.250000 MHz
SIF Sound Intermediate Frequency
SMPS Switched Mode Power Supply
SoC System on Chip
SOG Sync On Green
SOPS Self Oscillating Power Supply
SPI Serial Peripheral Interface bus; a
4-wire synchronous serial data link
standard
S/PDIF Sony Philips Digital InterFace
SRAM Static RAM
SRP Service Reference Protocol
SSB Small Signal Board
SSC Spread Spectrum Clocking, used to
reduce the effects of EMI
STB Set Top Box
STBY STand-BY

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 Mechanical Instructions QM14.3E LA 4. EN 9

4. Mechanical Instructions
Index of this chapter: Notes:
4.1 Cable Dressing • Figures below can deviate slightly from the actual situation,
4.2 Service Positions due to the different set executions.
4.3 Assy/Panel Removal
4.4 Set Re-assembly

4.1 Cable Dressing

19580_013_140128.eps
140128

Figure 4-1 Cable dressing 42" 7809 series

19580_015_140206.eps
140206

Figure 4-2 Cable dressing back cover 42" 7809 series

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 EN 10 4. QM14.3E LA Mechanical Instructions

19580_017_140206.eps
140206

Figure 4-3 Cable dressing 49"7809 series

19580_016_140206.eps
140206

Figure 4-4 Cable dressing back cover 49" 7809 series

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 Mechanical Instructions QM14.3E LA 4. EN 11

19580_018_140206.eps
140206

Figure 4-5 Cable dressing 55" 7809 series

Figure 4-6 Cable dressing back cover 55" 7809 series

4.2 Service Positions
For easy servicing of a TV set, the set should be put face down
on a soft flat surface, foam buffers or other specific workshop
tools. Ensure that a stable situation is created to perform
measurements and alignments. When using foam bars take
care that these always support the cabinet and never only the
display.
Caution: Failure to follow these guidelines can seriously
damage the display!
Ensure that ESD safe measures are taken.

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 EN 12 4. QM14.3E LA Mechanical Instructions

4.3 Assy/Panel Removal

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before removing Some SSBs have a dedicated LVDS connector, requiring
the rear cover. pressing two catches as indicated in the figure, before
Attention: For Ambilight sets, the leading edge cover has to be removing the LVDS cable.
removed.

It is mandatory to remove the leading edge cover and

disconnect the cables prior to removal of the rear cover!
See Figure 4-7 and Figure 4-8 for details.
1. For sets equipped with Ambilight: remove the stand and
swivel block [1].
2. Remove the leading edge hatch that covers the Ambilight
connector [2].
3. Unplug the Ambilight connectors located underneath the
hatch [3].
4. Lift the rear cover from the TV. Make sure that wires and
flat foils are not damaged while lifting the rear cover from
19054_001_111010.eps
the set. 111010

Figure 4-9 SSB LVDS connector catches (optional) -1-

Upon re-connecting the LVDS cable, ensure the catches are

1
3
locked after having inserted the LVDS cable.

1
3
2 2
Click!

19370_080_130208.eps
130208

Figure 4-7 Rear cover removal Ambilight models -1-

LVDS flat foil

Click!

3 3 19222_001_120626.eps
120626

Figure 4-10 SSB LVDS connector catches (optional) -2-

19370_081_130208.eps
130208 4.4 Set Re-assembly
To re-assemble the whole set, execute all processes in reverse
Figure 4-8 Rear cover removal Ambilight models -2- order.

4.3.2 Ambilight units in Rear Cover Notes:

• While re-assembling, make sure that all cables are placed
and connected in their original position.
The Ambilight units are affixed in the rear cover and will
• Pay special attention not to damage the EMC foams in the
self-destruct upon removal.
set. Ensure that EMC foams are mounted correctly.

Attention: it is of the utmost importance to remove all remains

of any adhesive that might be left on the inside of the rear
cover.

The new units come with double-sided adhesive tape. Ensure

a correct mounting to avoid uneven light emission of the units.

4.3.3 SSB

Refer to Figure 4-9 and Figure 4-10 for details.

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 Service Modes, Error Codes, and Fault Finding
5. Service Modes, Error Codes, and Fault Finding
Index of this chapter:
5.1 Test Points
5.2 Service Modes
5.3 Stepwise Start-up
5.4 Service Tools
5.5 Software Upgrading
5.6 Error Codes
5.7 The Blinking LED Procedure
5.8 Fault Finding and Repair Tips
5.1 Test Points
As most signals are digital, it will be difficult to measure
waveforms with a standard oscilloscope. However, several key
ICs are capable of generating test patterns. In this way it is
possible to determine which part is defective.
5.2 Service Modes
The Service Mode feature is split into three parts:
• Service Alignment Mode (SAM).
• Factory Mode.
• Customer Service Mode (CSM).
SAM and the Factory mode offer features, which can be used
by the Service engineer to repair/align a TV set. Some features
are:
• Make alignments (e.g. White Tone), reset the error buffer
(SAM and Factory Mode).
• Display information (“SAM” indication in upper right corner
of screen, error buffer, software version, operating hours,
options and option codes, sub menus).
The CSM is a Service Mode that can be enabled by the
consumer. The CSM displays diagnosis information, which the
customer can forward to the dealer or call centre. In CSM
mode, “CSM”, is displayed in the top right corner of the screen.
The information provided in CSM and the purpose of CSM is to:
• Increase the home repair hit rate.
• Decrease the number of nuisance calls.
• Solve customer problems without home visit.
Note: For the new model range, a new remote control (RC) is
used with some renamed buttons. This has an impact on the
activation of the Service modes. For instance the old “MENU”
button is now called “HOME” (or is indicated by a “house” icon).
5.2.1 General
Next items are applicable to all Service Modes or are general.
Life Timer
During the life time cycle of the TV set, a timer is kept (called
“Op. Hour”). It counts the normal operation hours (not the
Stand-by hours). The actual value of the timer is displayed in
SAM in a decimal value. Every two soft-resets increase the
hour by + 1. Stand-by hours are not counted.
Software Identification, Version, and Cluster
The software ID, version, and cluster will be shown in the main
menu display of SAM and CSM.
The screen will show: “AAAAAAB-XXX.YYY.MMM.TTT”,
where:
• AAAAAA is the chassis name: QN143.
• B is the region indication: E = Europe, A = AP/China, U =
NAFTA, L = LATAM.
• XXX is the main version number: this is updated with a
major change of specification (incompatible with the
previous software version). Numbering will go from 0- 255.
• YYY is the sub version number: this is updated with a minor
change of specification (incompatible with the previous
versions). Numbering will go from 0- 255.
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QM14.3E LA 5. EN 13
• MMM is the number of the mandatory (upgrade) release in
association with the area of the mandatory (upgrade)
release. Numbering will go from 0 - 255.
• TTT bit 7 to 1 is the area of the mandatory (upgrade)
release where 0 - none, 1 - Netflix, rest reserved.
• TTT bit 0 : 0 = development release, 1 = production
release.
Display Option Code Selection
After an SSB or display exchange, the display option code is
not set properly, this can result in a TV with “no display”.
Therefore, it is required to set this display option code after
such a repair.
To do so, press the following key sequence on a standard RC
transmitter: “062598” directly followed by MENU and “xxx”,
where “xxx” is a 3 digit decimal value of the panel type: see
column “Display Code” in Table 6-3. When the value is
accepted and stored in NVM, the set will switch to Stand-by, to
indicate that the process has been completed.
During this algorithm, the NVM-content must be filtered,
because several items in the NVM are TV-related and not SSB
related (e.g. Model and Prod. S/N). Therefore, “Model”
and “Prod. S/N” data is changed into “See Type Plate”. In case
a call centre or consumer reads “See Type Plate” in CSM
mode.
5.2.2 Service Alignment Mode (SAM)
Purpose
• To modify the NVM.
• To display/clear the error code buffer.
• To perform alignments.
Specifications
• Operation hours counter (maximum five digits displayed).
• Software version, error codes, and option settings
displayed.
• Error buffer clearing.
• Option settings.
• Software alignments (White Tone).
• NVM Editor.
• Set screen mode to full screen.
How to Activate SAM
To activate SAM, use one of the following methods:
• Press the following key sequence on the remote control
transmitter: “062596”, directly followed by the “INFO” or
“OK” button. Do not allow the display to time out between
entries while keying the sequence.
After entering SAM, the following items are displayed,
with “SAM” in the upper right corner of the screen to indicate
that the television is in Service Alignment Mode.
2014-Apr-17
 EN 14 5. QM14.3E LA Service Modes, Error Codes, and Fault Finding

Table 5-1 SAM mode overview

Main Menu Sub-menu 1 Sub-menu 2 Description

System Information Op Hour e.g. 00003 This represents the life timer. The timer counts normal operation hours, but does not
count Stand-by hours.
Main SW ID e.g. “QN143E_014.001.166.1” See paragraph Software Identification, Version, and Cluster for the software name
definition.
ERR e.g. “000 000 000 000 000” Shows all errors detected since the last time the buffer was erased. Five errors
possible.
OP1 e.g. “000 224 032 000 038 192 192 Used to read-out the option bytes. See paragraph 6.4 Option Settings in the
015” Alignments section for a detailed description. Ten codes are possible.
OP2 e.g. “159 255 127 061 011003 000
000”
Clear Codes Press [OK] to clean the Error Codes Erases the contents of the error buffer. Select this menu item and press the MENU
immediately RIGHT key on the remote control. The content of the error buffer is cleared.
Options OP#1-OP#16 e.g. “032” Option code
Alignments Warm R Gain To align the White Tone. See
G Gain paragraph 6.3 Software Alignments in the Alignments section for a detailed description

B Gain
Normal R Gain
G Gain
B Gain
Cool R Gain
G Gain
B Gain
Store Store the RGB value
NVM Editor NVM Editor Address Select and fill in the NVM address
NVM Editor Value Select and fill in the NVM value
NV Editor Store Store the value in the address
Service Data Type Number Select and fill in the NVM Type Number value
Service Data Production Number Select and fill in the NVM Type Production Number value
Service Data 18AC SSB Select and fill in the NVM 18AC SSB
Service Data 18AC PSU Select and fill in the NVM 18AC PSU
Service Data 18AC Display Select and fill in the NVM 18AC Display
Upload to USB Channel List To upload several settings from the TV to an USB stick
NVM Copy
Readable Info
EDID Copy
Download from USB Channel List To download several settings from the USB stick to the TV
NVM Copy
EDID Copy
Initialize NVM Press [OK] to Initialize NVM To initialize a (corrupted) NVM. Be careful, this will erase all settings.
immediately
Dealer Options Set Virgin mode Virgin mode:Off Set Virgin mode
Store Press [OK] to store virgin mode Store the virgin mode in the address
immediately
RF4CE Clear Press [OK] to clear the RF4CE pairing Enable to clear the pairing table of Redio Frequency for Consumer Electronics
table

How to Navigate soon as the power is supplied again. The error buffer will not be
• In the SAM menu, select menu items with the UP/DOWN cleared.
keys on the remote control transmitter. The selected item
will be indicated. When not all menu items fit on the screen, 5.2.3 Contents of the Factory mode:
use the UP/DOWN keys to display the next/previous menu
items.
Purpose
• With the “LEFT/RIGHT” keys, it is possible to:
• To perform extended alignments.
– (De) activate the selected menu item.
– (De) activate the selected sub menu.
Specifications
– Change the value of the selected menu item.
• Displaying and or changing Panel ID information.
• When you press the MENU button once while in top level
SAM, the set will switch to the normal user menu (with the • Displaying and or changing Tuner ID information.
• Error buffer clearing.
SAM mode still active in the background).
• Various software alignment settings.
• Testpattern displaying.
How to Store SAM Settings • Public Broadcasting Service password Reset.
To store the settings changed in SAM mode, leave the top level
• etc.
SAM menu by using the POWER button on the remote control
transmitter or the television set. Exceptions must be stored
separately via the STORE button. How to Activate the Factory mode
To activate the Factory mode, use the following method:
• Press the following key sequence on the remote control
How to Exit SAM
transmitter: from the “Menu/Home screen” press “1999”,
Use one of the following methods: directly followed by the “Back” button. Do not allow the
• Switch the set to STANDBY by pressing the mains button
display to time out between entries while keying the
on the remote control transmitter or the television set.
sequence.
• Via a standard RC-transmitter, key in “00” sequence. After entering the Factory mode, the following items are
Note: When the TV is switched “off” by a power interrupt while
displayed,
in SAM, the TV will show up in “normal operation mode” as

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 Service Modes, Error Codes, and Fault Finding QM14.3E LA 5. EN 15

Table 5-2 Factory mode overview

Default value
Item Item value 32" 40" 42" 47" 48" 55" 65" Description
0 F/W VERSION Press OK Displays the software versions of the supplier, Flash PQ, Smart Picture,
BL Dimming, Source Meter, the Picture Quality checksum, the Dimming library, the
Source meter library, the Flash AQ, the MTK, MCU and OAD software versions.
1 PANEL_ID See table 6-3 Display code overview Displays and changes the Panel ID with the left and right cursor; be careful
changing this, it can result in not correct displaying the screen!
2 TUNER_ID 5 5 5 5 5 5 3 Displays and changes the Tuner ID with the left and right cursor. Not to be changed
when the tuner is replaced with the correct service part.
3 DEMOD_TYPE 3 0 3 3 3 3 4 Choose demod type.
4 ERR Code: xxx xxx xxx 000 000 000 000 000 Values showing the last 5 errors during the last 50 hours of operation, according to
xxx xxx table 5-4 Error code overview
5 CLEAR ERROR BUFFER Press OK Selecting this clear all current error codes.
6 NVM ADDRESS 0 NVM address 0 to 8191, Use Item 6 to change and 7 to store the data to the correct
NVM address
7 NVM VALUE 0 Displays the value at the NVM address of item 5
8 NVM STORE Press OK Use this option to save the data of item 6 to NVM address of item 5
9 NVM COPY TV to USB Press OK Use this to store the NVM data to the REPAIR folder of a FAT formatted USB
memory stick. The TV will write two files in the REPAIR folder of the memory stick.
It will create this folder if it does not exist. The items are “Channel list”, “Personal
settings”, “Option codes”, “Display-related alignments” and “History list”. In case the
download to the USB stick was not successful “Failure” will appear. In this case,
check if the USB stick is connected properly. Now the settings are stored onto the
USB stick and can be used to download onto another TV or other SSB. Uploading
is of course only possible if the software is running and if a picture is available. This
method is created to be able to save the customer’s TV settings and to store them
into another SSB.
10 NVM READ USB to TV Press OK Use this to store the NVM data from the USB memory stick to the TV. The TV will
save the two files which were created in item 8 to the NVM of the set. Use these
options when replacing a SSB. When “USB to TV Success” is displayed remove the
power and restart the TV
11 RESET_PBS_PWD Press OK Use this to reset the Child Lock
12 DIM_LIB RESET Press OK Reset the Dimming
13 SRC_METER RESET Press OK Reset the Source meter
14 AMBLIGHT RESET Press OK Reset Ambilight
15 ACFG RESET Press OK Reset ACFG
16 CIPLUS QUERY Press OK Shows the Validity of the CI+ key and the supplier information
17 CIPLUS UPDATE Press OK Used to enter a new CI+ code into the NVM. This can only be used when no CI+
code exists in the NVM
18 EDID UPDATE Press OK Used to enter a new EDID codes into the NVM
19 TEST PATTERN Press OK With the “left” and “right” keys of the remote control various test patterns can be
chosen
20 VIRGIN_MODE Off Use this to return the set to virgin mode. Depends whether the set has been used
already.
21 E-Fuse On E-fuse mode
22 ORT_MODE Off ORT mode
23 VGA_UART_SWITCH Off When switched “on” the VGA port can be used for UART logging.
24 DRMWARNING Off Off Off On On On On Warning the data rights management
25 AGEING MODE Off Use this for aging a new LCD panel
26 CLR_TEMP_R 255 Red colour temperature setting
27 CLR_TEMP_G 255 Green colour temperature setting
28 CLR_TEMP_B 255 Red colour temperature setting
29 AUTO_COLOR Press OK PC: any pattern that has black and white, YPbPr: SMPTE bar (colour bar), any
timing.
30 ADC_GAIN_R 146 0 0 83 0 0 0 Red ADC gain
31 ADC_GAIN_G 145 0 0 81 0 0 0 Green ADC gain
32 ADC_GAIN_B 138 0 0 80 0 0 0 Blue ADC gain
33 ADC_OFFSET_R 134 128 128 88 128 128 128 Red ADC offset
34 ADC_OFFSET_G 132 128 128 81 128 128 128 Green ADC offset
35 ADC_OFFSET_B 200 128 128 86 128 128 128 Blue ADC offset
36 YPBPR_PHASE 20 InValid InValid InValid InValid InValid InValid Not available for this chassis
37 AUD_GAIN_LINEIN 0 Line-in audio gain
38 AUD_GAIN_HDMI 0 HDMI audio gain
39 AUD_GAIN_ATV 0 Analogue TV audio gain
40 AUD_GAIN_DTV 0 Digital TV audio gain
41 AUD_GAIN_USB 0 USB audio gain
42 AQ_INDEX 11 9 3 3 9 4 5 Audio Quality index
43 AUDIO TEST MODE Off Used for audio testing during production
44 AUDIO CHANNEL TYPE 2.0 2.0 0.0 0.0 2.0 2.0 0.0 Defines the installed speaker system
45 AUDIO SRS Off Audio SRS
46 DUMP PQ FROM TV Press OK Saves the picture quality data to a file “pq.bin” to the root of a FAT formatted USB
memory stick
47 LOAD PQ to TV Press OK Loads the picture quality data from a file “pq.bin” in to the TV
48 DUMP AQ FROM TV Press OK Saves the audio quality data to a file “AQ.bin” to the root of a FAT formatted USB
memory stick

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 EN 16 5. QM14.3E LA Service Modes, Error Codes, and Fault Finding

Default value
Item Item value 32" 40" 42" 47" 48" 55" 65" Description
49 LOAD AQ to TV Press OK Loads the audio quality data from a file “AQ.bin” in to the TV
50 COPY BIN CHL to TV - - - Press - - - COPY BIN CHL to TV
OK
51 COPY BIN CHL to USB - - - Press - - - COPY BIN CHL to USB
OK
52 FEF CHECK Off FEF Check
53 PANEL FLIP Off Off Off Off On Off Off Flip panel
54 VGA_SOURCE Off Enable/Disable VGA source
55 HDMI2 - Off On - - Off - Enable/Disable HDMI2 source
56 HDMI3 Off On On On Off On On Enable/Disable HDMI3 source
57 HDMI4 On Enable/Disable HDMI4 source
58 USB2 On Enable/Disable USB2 source
59 USB3 Off Off On On Off Off Off Enable/Disable USB3 source
60 KEYBOARD CONFIG On Enable/Disable HDMI3 source
61 LIGHT SENEOR TUNING 1 1 2 3 1 3 1 Light sensor
62 LIGHT SENSOR TYPE 0 Light sensor
63 TEMP SENSOR TYPE 3 Tempreture sensor
64 AMBILIGHT_DRIVER 0 0 2 0 0 0 0 Drive the Ambient light
65 AMBILIGHT TYPE 1 1 2 1 1 1 1 The type of Ambient light
66 LED TYPE 2 The type of LED
67 MHP APP Off MHP APP
68 3D 1 3 1 1 3 1 3 3D on/off
69 SMALL SCREEEN Off - - Off Off - On Small screen
70 BLUETOOTH - - - Off - - Off Bluetooth on/off
71 EXIT_FACTORY Press OK Exits the Factory mode

How to Exit the Factory mode
Use one of the following methods:
• Select EXIT_FACTORY from the menu and press the “OK”
button.
Note: When the TV is switched “off” by a power interrupt, or
normal switch to “stand-by” while in the factory mode, the TV
will show up in “normal operation mode” as soon as the power
is supplied again. The error buffer will not be cleared.
5.2.4 Customer Service Mode (CSM)
Purpose
The Customer Service Mode shows error codes and
information on the TV operation settings.The call centre can
instruct the customer (by telephone) to enter CSM in order to
identify the status of the set.This helps the call centre to
diagnose problems and failures in the TV set before making a
service call.
The CSM is a read-only mode; therefore, modifications are not
possible in this mode.
Specifications
• Ignore “Service unfriendly modes”.
• Line number for every
line (to make CSM language independent).
• Set the screen mode to full
screen (all contents on screen is visible).
• After leaving the Customer Service Mode, the original
settings are restored.
• Possibility to use “CH+” or “CH-” for channel surfing, or
enter the specific channel number on the RC.
How to Activate CSM
To activate CSM, press the following key sequence on a
standard remote control transmitter: “123654” (do not allow the
display to time out between entries while keying the sequence).
After entering the Customer Service Mode, the following items
are displayed.
Note: Activation of the CSM is only possible if there is no (user)
menu on the screen!
Contents of CSM
• 1.1 Set Type This information is very helpful for a
helpdesk/workshop as reference for further diagnosis. In
this way, it is not necessary for the customer to look at the
rear of the TV-set. Note that if an NVM is replaced or is
initialized after corruption, this set type has to be re-written
to NVM.
• 1.2 Production code Displays the production
code (the serial number) of the TV. Note that if an NVM is
replaced or is initialized after corruption, this production
code has to be re-written to NVM.
• 1.3 Installation date Indicates the date of the first
installation of the TV. This date is acquired via time
extraction.
• 1.4a Option Code 1 Gives the option codes of option
group 1 as set in SAM.
• 1.4b Option Code 2 Gives the option codes of option
group 2 as set in SAM.
• 1.5 SSB Gives an identification of the SSB as stored in
NVM. Note that if an NVM is replaced or is initialized after
corruption, this identification number has to be re-written to
NVM. This identification number is the 12NC number of the
SSB.
• 1.6 Display 12NC NVM read/write.
• 1.7 PSU 12NC NVM read/write.
• 1.8 RF4CE SW version release.
• 2.1 Current Main SW Displays the built-in main software
version. In case of field problems related to software,
software can be upgraded. As this software is consumer
upgradeable, it will also be published on the internet.
• 2.2 Standby SW Displays the built-in stand-by processor
software version. Upgrading this software will be possible
via USB.
• 2.3 Panel Code Displays the Display Code number.
• 2.4 Bootloader ID ID of Bootloader.
• 2.5 NVM version Detects and displays NVM version.
• 2.6 Flash ID ID of flash model.
• 2.7 e-UM version eDFU (help) version.
• 2.8 Channel Table Structure Version version of channel
table structure.
• 2.9 Error Codes Detects and displays errors.
• 2.10 Sil Drv Version
• 3.1 Signal Quality Analog/digital signal strength.
• 3.2 Child lock Not active / active. This is a combined item
for locks. If any lock (channel lock, parental lock) is active,
it is indicated as “active”.
• 3.3 HDCP keys Indicates the validity of the HDMI keys (or
HDCP keys). In case these keys are not valid and the
customer wants to make use of the HDMI functionality, the
SSB has to be replaced.

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 Service Modes, Error Codes, and Fault Finding QM14.3E LA 5. EN 17

• 3.4 Ethernet MAC address A Media Access Control
address (MAC address) is a unique identifier assigned to
network interfaces for communications on the physical
network segment.
How to Navigate
By means of the “CURSOR-DOWN/UP” knob (or the scroll
wheel) on the RC-transmitter, can be navigated through the
menus.
How to Exit CSM
To exit CSM, use one of the following methods.
• Press the MENU/HOME button on the remote control
transmitter.
• Press the POWER button on the remote control
transmitter.
• Press the POWER button on the television set.

5.3 Stepwise Start-up

Standby Soft Mode

Command Received,
previously in Standby Switch
Soft Mode (Power tact Off(Mains
Standby Power Plug)
switch)

Digital Digital
background background
TV Wakeup tasks started tasks completed
commands
Received
(TV Wakeup Standby
keys) commands Swith On,
Semi-
previously in
Received (RC Standby Standby/Semi-
Standby key) Standby (Mains
Power Plug)

Standby
Standby Soft Mode Soft Mode
Command Received, Command Switch Off (Mains
previously in Standby Received Power Plug)
TV Wakeup Soft Mode (Power (Power tact
commands tact switch) switch)
Received
(TV Wakeup Switch Off
keys) (Mains Power
Switch On, previously Plug)
in Power On Mode Standby Power Off
Power On (Power tact switch) Soft Mode Swith On,
previously in
Standby Soft Mode Standby Soft Mode
Command Received, (Mains Power Plug)
(Power tact switch)

Switch Off (Mains

Switch On,previously in
Power Plug)
TV Operation Mode
(Mains Power Plug)
19080_206_110323.eps
120224

Figure 5-1 Stepwise Start-up

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 EN 18 5. QM14.3E LA Service Modes, Error Codes, and Fault Finding

5.4 Service Tools 5.5 Software Upgrading

5.4.1 ComPair 5.5.1 Description

Introduction It is possible for the user to upgrade the main software via the
ComPair (Computer Aided Repair) is a Service tool for Philips USB port. This allows replacement of a software image in a
Consumer Electronics products and offers the following: stand alone set. A description on how to upgrade the main
1. ComPair helps to quickly get an understanding on how to software can be found in the DFU or on the Philips website.
repair the chassis in a short and effective way.
2. ComPair allows very detailed diagnostics and is therefore 5.5.2 Introduction
capable of accurately indicating problem areas. No
knowledge on I2C or UART commands is necessary,
Philips continuously tries to improve its products, and it’s
because ComPair takes care of this.
recommend that the TV software is updated when updates are
3. ComPair speeds up the repair time since it can available. Software update files can be obtained from the
automatically communicate with the chassis (when the
dealer or can be downloaded from the following websites:
micro processor is working) and all repair information is
http://www.philips.com/support
directly available.
4. ComPair features TV software up possibilities.
Preparing a portable memory for software upgrade
The following requirements have to be met:
Specifications
1. A personal computer connected to the internet.
ComPair consists of a Windows based fault finding program 2. An archive utility that supports the ZIP-format (e.g. WinZip
and an interface box between PC and the (defective) product.
for Windows or Stufflt for Mac OS).
The ComPair II interface box is connected to the PC via an
3. A FAT formatted USB memory stick (preferably empty).
USB cable. For the TV chassis, the ComPair interface box and
the TV communicate via a bi-directional cable via the service
Note:
connector(s).
1. Only FAT/DOS-formatted memory sticks are supported.
Important remark: Currently, for this chassis, dedicated
ComPair functionality is not supported. 2. Only use software update files that can be found on the
http://www.philips.com/support web site.
Still, the interface box can be used as level shifter between the
TV set and PC.
5.5.3 Check the current TV software version
How to Connect
This is described in the chassis fault finding database in Before starting the software upgrade procedure, it is advised to
ComPair. check that what the current TV software:
1. Press the “1 2 3 6 5 4” button on the remote control to enter
TO TV
the CSM mode.
2. Use the up/down cursor keys to select “Current Main
TO TO TO
UART SERVICE
CONNECTOR
I2C SERVICE
CONNECTOR
UART SERVICE
CONNECTOR
Software”.
If the current software version of the TV is the same as the
latest update file found on http://www.philips.com/support, it is
ComPair II
Multi
function
not necessary to update the TV software.
RC in RC out

Optional Power Link/ Mode

5.5.4 Download the latest software
Switch Activity I2C RS232 /UART

1. Open the internet page http://www.philips.com/support.

2. Find information and software related to the TV.
PC
3. Select the latest software update file and download it to the
PC.
4. Insert the USB memory stick into one of the USB ports of
the PC.
5. Decompress the downloaded ZIP file and copy it to the root
ComPair II Developed by Philips Brugge directory of the USB flash drive.
Optional power
HDMI 5V DC
I2C only 5.5.5 Update the TV software

10000_036_090121.eps
091118 1. Turn the TV on and wait for it to boot completely.
2. Insert the USB memory stick that contains the software
Figure 5-2 ComPair II interface connection update files in one of the USB ports of the TV.
3. The TV will automatically detect the USB memory stick.
Caution: It is compulsory to connect the TV to the PC as Then a window jumps out as Figure 5-3.
shown in the picture above (with the ComPair interface in Note: If the USB flash drive is not detected after power up,
between), as the ComPair interface acts as a level shifter. If disconnect it and re-insert it.
one connects the TV directly to the PC (via UART), ICs can be 4. Select [Update] and press OK. See Figure 5-3.
blown! 5. To proceed, In next menu select [Start] and press OK to
start software updates. See Figure 5-4.
6. Upgrading will now begins and the status of the updating
How to Order
progress will be displayed.
ComPair II order codes:
7. When the TV software is updated. Remove your USB flash
• ComPair II interface: 3122 785 91020.
drive, then select [Restart] and press OK to restart the
• Software is available via the Philips Service web portal.
TV.See Figure 5-5.
• ComPair/UART interface cable for QM14.3x xx.
(using 3.5 mm Mini Jack connector): 3138 188 75051.
Note: When you encounter problems, contact your local
support desk.

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 Service Modes, Error Codes, and Fault Finding
19080_207_110324.eps
110324
Figure 5-3 Update the TV software [1/3]
19080_208_110324.eps
110324
Figure 5-4 Update the TV software [2/3]
19080_209_110324.eps
110324
Figure 5-5 Update the TV software [3/3]
Note:
• Do not remove the USB flash drive during the software
update.
• If a power failure occurs during the update, do not remove
the USB flash drive from the TV. The TV will continue the
software update as soon as the power comes up again.
• If an error occurs during the update retry the procedure or
contact the dealer.
• We do not recommend downgrading to an older version.
• Once the upgrade is finished, use the PC to remove the TV
software from the USB portable memory.
5.5.6 Content and Usage of the One-Zip Software File
Below you find a content explanation of the One-Zip file, and
instructions on how and when to use it. Only files that are
relevant for Service are mentioned here.
• EDID_clustername.zip: Contains the EDID content of the
different EDID NVMs.
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QM14.3E LA 5. EN 19
• FUS_clustername_version.zip: Contains the
“autorun.upg” which is needed to upgrade the TV main
software and the software download application.
• NVM_clustername_version.zip: Dedicated default NVM
content.
5.5.7 How to Copy NVM Data to/from USB
When copying data to/and from a USB memory stick, the folder
“PhilipsChannelMaps” is used. When inserting an empty USB
memory stick, and downloading data to the stick, the TV will
create this folder. When sending data from a USB memory
stick to a TV, the intended data must be available in the
“PhilipsChannelMaps” folder.
Note that when copying EDID data to the TV, all necessary
EDID files must be in this folder.
Service mode overview for your reference.
Table 5-3 Service mode overview
Service Modes Description
SAM Service alignment mode
Factory Mode Used for extended alignments
CSM 3-page compact CSM pages. There will be CSM dump to
USB-stick upon entering CSM-mode
USB SW upgradeable SW-upgrading of flash memories can be done via USB.
The main SW can be upgraded via the ZIP
NVM-Editor in SAM NVM-editor will function as in the past: Address and Value
field is a decimal value via digit entry
Service Data New Service data in SAM for CTN, Prod. no., 18AC
programming with virtual keyboard
USB copy/paste in Channel list, NVM data, Readable info, EDID
SAM
UART logging There will be printout available in UART. No specifications
of the printout, per MTK provision/definition.
Blind SAM RC sequence “062598” + “Menu” + “Panel code”
5.6 Error Codes
5.6.1 Introduction
Error codes are required to indicate failures in the TV set. In
principle a unique error code is available for every:
• Activated (SW) protection.
• Failing I2C device.
• General I2C error.
The last five errors, stored in the NVM, are shown in the
Service menu’s. This is called the error buffer.
The error code buffer contains all errors detected since the last
time the buffer was erased. The buffer is written from left to
right. When an error occurs that is not yet in the error code
buffer, it is displayed at the left side and all other errors shift one
position to the right.
An error will be added to the buffer if this error differs from any
error in the buffer. The last found error is displayed on the left.
An error with a designated error code never leads to a
deadlock situation. It must always be diagnosable (e.g. error
buffer via OSD or blinking LED or via ComPair).
In case a failure identified by an error code automatically
results in other error codes (cause and effect), only the error
code of the MAIN failure is displayed.
5.6.2 How to Read the Error Buffer
You can read the error buffer in three ways:
• On screen via the SAM/CSM (if you have a picture).
Example:
– ERROR: 000 000 000 000 000: No errors detected
– ERROR: 013 000 000 000 000: Error code 13 is the
last and only detected error
– ERROR: 034 013 000 000 000: Error code 13 was
detected first and error code 34 is the last detected
(newest) error
2014-Apr-17
 EN 20 5. QM14.3E LA Service Modes, Error Codes, and Fault Finding

• Via the blinking LED procedure (when you have no
picture). See paragraph 5.7 The Blinking LED Procedure.
• Via ComPair.
5.6.3 Error codes
Take notice that some errors need several minutes before they
start blinking or before they will be logged. So in case of
problems wait 2 minutes from start-up onwards, and then
check if the front LED is blinking or if an error is logged.
In this chassis only “layer 2” error codes are available and point
to problems on the SSB. They are triggered by LED blinking
when CSM is activated. Only the following layer 2 errors are
defined:

Table 5-4 Error code overview

Monitored Error/ Error Buffer/

Description Layer 1 Layer 2 by Prot Blinking LED Device Defective Board
FE-bus 2 11 SOC E BL / EB SSB SSB
BE -bus 2 13 SOC E BL / EB SSB SSB
SRF-bus 2 14 SOC E BL / EB SSB SSB
12V 3 16 Stby µP/SOC P BL / Supply
Display supply 3 17 SOC E BL / Supply
HDMI mux 2 23 SOC E EB SiI9287/9573 SSB
I2C switch 2 24/25 SOC E EB PCA954X SSB
Channel decoder 1 2 27 SOC E EB CXD2834 SSB
Channel decoder 2 2 28 SOC E EB CXD2834 SSB
Rogue HDCP2.2 2 29 SOC E EB SiI9679 SSB
Lnb controller Single/dual 2 31 SOC E EB LNBH25/26 SSB
Hybrid Tuner 2 34 SOC E EB SUT-PEZ SSB
Class-D 2 37 SOC E EB / SSB
Light sensor 6 43 SOC E EB / Set
RF4CE 6 46 SOC E EB CC2533 Set
NT72314 9 61 SOC E BL NT72314 SSB
Splash error 2 65 SOC P BL NT314-SOC SSB

5.6.4 How to Clear the Error Buffer

The error code buffer is cleared in the following cases:

• By using the CLEAR command in the SAM menu
• By using the CLEAR command in the Factory mode:
• If the content of the error buffer have not changed for 50
hours, the error buffer resets automatically.

Note: If you exit SAM by disconnecting the mains from the

television set, the error buffer is not reset.

5.7 The Blinking LED Procedure

5.7.1 Introduction

The software is capable of identifying different kinds of errors.

Because it is possible that more than one error can occur over
time, an error buffer is available, which is capable of storing the
last five errors that occurred. This is useful if the OSD is not
working properly.
Errors can also be displayed by the blinking LED procedure.
The method is to repeatedly let the front LED pulse with as
many pulses as the error code number, followed by a period of
1.5 seconds in which the LED is “off”. Then this sequence is
repeated.
Example (1): error code 4 will result in four times the sequence
LED “on” for 0.25 seconds / LED “off” for 0.25 seconds. After
this sequence, the LED will be “off” for 1.5 seconds. Any RC
command terminates the sequence. Error code LED blinking is
in red color.
Example (2): the content of the error buffer is “12 9 6 0 0” After
entering SDM, the following occurs.
• 1 long blink of 5 seconds to start the sequence.
• 12 short blinks followed by a pause of 1.5 seconds.
• 9 short blinks followed by a pause of 1.5 seconds.
• 6 short blinks followed by a pause of 1.5 seconds.
• 1 long blink of 1.5 seconds to finish the sequence.
• The sequence starts again with 12 short blinks.

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 Service Modes, Error Codes, and Fault Finding QM14.3E LA 5. EN 21

5.8 Fault Finding and Repair Tips

Note:
• It is assumed that the components are mounted correctly
with correct values and no bad solder joints.
• Before any fault finding actions, check if the correct options
are set.

5.8.1 NVM Editor

In some cases, it can be convenient if one directly can change

the NVM contents. This can be done with the “NVM Editor” in
SAM mode. With this option, single bytes can be changed.

Caution:
• Do not change these, without understanding the function of
each setting, because incorrect NVM settings may
seriously hamper the correct functioning of the TV set!
• Always write down the existing NVM settings, before
changing the settings. This will enable you to return to the
original settings, if the new settings turn out to be incorrect.

5.8.2 No Picture

When you have no picture, first make sure you have entered
the correct display code. See paragraph 6.4 Option Settings for
the instructions. See also Table 6-3.

5.8.3 Unstable Picture via HDMI input

Check if HDMI EDID data is properly programmed.

5.8.4 No Picture via HDMI input

Check if HDCP key is valid. This can be done in CSM.

5.8.5 TV will not start-up from Stand-by

Possible Stand-by Controller failure. Re-flash the software.

5.8.6 CSM

When CSM is activated and there is a USB memory stick

connected to the TV, the software will dump the complete CSM
content to the USB memory stick. The file (Csm.txt) will be
saved in the root of the USB memory stick.

5.8.7 Loudspeakers

Make sure that the volume is set to minimum during

disconnecting the speakers in the ON-state of the TV. The
audio amplifier can be damaged by disconnecting the speakers
during ON-state of the set!

5.8.8 Display option code

Attention: In case the SSB is replaced, always check the Panel

Code in CSM, even when picture is available. Performance
with the incorrect display option code can lead to unwanted
side-effects for certain conditions.

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 EN 22 6. QM14.3E LA Alignments

6. Alignments
Index of this chapter: In case you have a colour analyser:
6.1 General Alignment Conditions • Measure with a calibrated (phosphor- independent) color
6.2 Hardware Alignments analyser (e.g. Minolta CA-210) in the centre of the screen.
6.3 Software Alignments Consequently, the measurement needs to be done in a
6.4 Option Settings dark environment.
6.5 Reset of Repaired SSB • Adjust the correct x, y coordinates (while holding one of the
White point registers R, G or B on max. value) by means of
6.1 General Alignment Conditions decreasing the value of one or two other white points to the
Perform all electrical adjustments under the following correct x, y coordinates (see Table 6-1 White D alignment
conditions: values). Tolerance: dx:  0.003, dy:  0.003.
• Power supply voltage: 90 - 264 VAC, 50/ 60  3 Hz. • Repeat this step for the other colour Temperatures that
• Connect the set to the mains via an isolation transformer need to be aligned.
with low internal resistance. • When finished return to the SAM root menu and press
• Allow the set to warm up for approximately 15 minutes. STANDBY on the RC to store the aligned values to the
• Measure voltages and waveforms in relation to correct NVM.
ground (e.g. measure audio signals in relation to
AUDIO_GND). Table 6-1 White D alignment values
Caution: It is not allowed to use heat sinks as ground.
• Test probe: Ri > 10 M, Ci < 20 pF. Value Cool (11000 K) Normal (9000 K) Warm (6500 K)
• Use an isolated trimmer/screwdriver to perform x 0.276 0.287 0.313
alignments. y 0.282 0.296 0.329

6.2 Hardware Alignments If you do not have a colour analyser, you can use the default
Not applicable.
values. This is the next best solution. The default values are
average values coming from production (statistics).
6.3 Software Alignments
Put the set in SAM mode (see Chapter 5. Service Modes, Error
6.3.2 Display Adjustment
Codes, and Fault Finding). The SAM menu will now appear on
the screen. Select RGB Align and go to one of the sub menus.
The alignments are explained below. You can use the default values. The default values are average
values coming from production.
The following items can be aligned:
• Enter SAM mode.
• White point.
• Select a colour temperature (e.g. COOL, NORMAL, or
To store the data: WARM).
• Set the RED, GREEN and BLUE default values according
• Press OK on the RC before the cursor is moved to the
to the values in Table 6-2.
left.
• Select “Store” and press OK on the RC. • When finished press OK on the RC, then press STORE to
store the aligned values to the NVM.
• Switch the set to stand-by mode.
• Restore the initial picture settings after the alignments.
For the next alignments, supply the following test signals via a
video generator to the RF input: Table 6-2 White tone default settings
• EU/AP-PAL models: a PAL B/G TV-signal with a signal
strength of at least 1 mV and a frequency of 475.25 MHz Colour temperature
• US/AP-NTSC models: an NTSC M/N TV-signal with a Picture mode Screen size Red Green Blue
signal strength of at least 1 mV and a frequency of Normal (9000K) 42PUx7809/xx 255 228 196
61.25 MHz (channel 3). 49PUx7809/xx 205 254 204
• LATAM models: an NTSC M TV-signal with a signal 55PUx7809/xx 197 255 206
strength of at least 1 mV and a frequency of Cool (11000K) 42PUx7809/xx 252 241 252
61.25 MHz (channel 3). 49PUx7809/xx 192 255 244
55PUx7809/xx 182 255 241

6.3.1 RGB Alignment Warm (6500K) 42PUx7809/xx 255 202 111

49PUx7809/xx 239 254 142
55PUx7809/xx 236 255 146
Before alignment, set the picture as follows:
Picture Setting
Dynamic backlight Off
This group setting of colour temperature will be applied
Dynamic Contrast Off
automatically to the TV / VGA / HDMI / AV sources.
Color Enhancement Off
Picture Format Unscaled
Light Sensor Off
Brightness 50
Color 0
Contrast 100

White Tone Alignment:

• Activate SAM.
• Select “RGB Align.” and choose a color temperature.
• Use a 100% white screen as input signal and set the
following values:
– “Red BL Offset” and “Green BL Offset” to “7” (if
present).
– All “White point” values initial to “128”.

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 Alignments QM14.3E LA 6. EN 23

6.4 Option Settings 6.5 Reset of Repaired SSB

6.4.1 Introduction
The microprocessor communicates with a large number of I2C
ICs in the set. To ensure good communication and to make
digital diagnosis possible, the microprocessor has to know
which ICs to address. The presence / absence of these
MT5591 ICs is configured by the option codes.
A very important issue towards a repaired SSB from a Service
repair shop (SSB repair on component level) implies the reset
of the NVM on the SSB.
A repaired SSB in Service should get the service Set type
“00PF0000000000” and Production code “00000000000000”.
Also the virgin bit is to be set. To set all this, you can use the
use the “NVM editor” and “Dealer options” items in SAM (do not
forget to “store”).

Notes: After a repaired SSB has been mounted in the set (set repair
• After changing the option(s), save them by pressing the OK on board level), the type number (CTN) and production code of
button on the RC before the cursor is moved to the left, the TV has to be set according to the type plate of the set. For
select STORE and press OK on the RC. this, you can use the NVM editor in SAM.
• The new option setting is only active after the TV is
switched “off” / “stand-by” and “on” again with the mains 6.5.1 SSB Identification
switch (the NVM is then read again).
SSB’s of this chassis are identified by a “715” code on the SSB.
6.4.2 Option Code Overview 715Axxxx-Nnn-MMM-OOOO
• 715 main category, Printed Wiring Board
Enter SAM mode to check the option codes. they could be • Axxxx sub category, sequential coding number
edited in the NVM. • Nnn Version code
• N Development number
6.4.3 Display Code Overview • nn Production number
• MMM Mounting variation code
• OOOO Optional variation code
Press the following key sequence on a standard RC
Make sure when replacing an SSB the SSB identification codes
transmitter: “062598” directly followed by MENU and “xxx”, match the replacement panel.
where “xxx” is a 3 digit decimal value of the panel type: see
column “Display Code” in Table 6-3. After resetting the Display
Code, restart the set immediately.

Table 6-3 Display code overview

CTN_ALT BOM# Panel Type Display Code

42PUK7809/12 TFT-LCD LC420EQE-PGF1 471
42PUS7809/12 TFT-LCD LC420EQE-PGF1 471
42PUS7809/60 TFT-LCD LC420EQE-PGF1 471
49PUK7809/12 TFT-LCD LC490EQE-XGF1 470
49PUS7809/12 TFT-LCD LC490EQE-XGF1 470
49PUS7809/60 TFT-LCD LC490EQE-XGF1 470
55PUK7809/12 TFT-LCD LC550EQE-PGF1 469
55PUS7809/12 TFT-LCD LC550EQE-PGF1 469
55PUS7809/60 TFT-LCD LC550EQE-PGF1 469

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 EN 24 7. QM14.3E LA Circuit Descriptions

7. Circuit Descriptions
Index of this chapter: 7.1 Introduction
7.1 Introduction The QM14.3E LA chassis is a new platform launched in Europe
7.2 MTK platform in 2014. This chassis contains the MT5591. The major deltas
7.3 Power Supply versus its predecessor are DVB-TC; DVB-TC/T2, DVB-TC/S2
with also multimedia, 3D, AmbiLight, WiFi, Smart TV and Light
Notes: Sensor functionality.
• Only new circuits that are not published recently) are
described. The QM14.3E LA covers sets in the 78xx-range (42”, 49”, 55”).
• Figures can deviate slightly from the actual situation, due
to different set executions. 7.2 MTK platform
• For a good understanding of the following circuit
descriptions, please use the wiring-, block- (see chapter 7.2.1 Architecture
9. Block Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts). Where
Figure 7-1 gives an overview of the architecture.
necessary, you will find a separate drawing for clarification.
Refer to chapter 9. Block Diagrams for a detailed diagram.

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Figure 7-1 Architecture of the MT5591 platform

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 Circuit Descriptions QM14.3E LA 7. EN 25

7.2.2 MTK Copper Layout Refer to chapter 9. Block Diagrams for a detailed diagram.

Figure 7-2 gives the SSB layout and shows the location of parts
and principal components.

COMMON INTERFACE
POWER

CI2 (optional)

BACK-END
SOC2
(optional)

DDR CI1

FRC
N314

MT5591
I/O

SOC1

Audio Class-D SERVICE

USB 2x
SCART

FRONT-END
LAN ANALOG

Class-D
STA381
HDMI 2x

Channel decoders
CXD2842 Rogue
Tuner SiL9679
HDCP 2.2

USB HDMI 2x
Headphone SPDIF

Hybrid Satellite

19580_138_140331.eps
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Figure 7-2 MTK MT5591 layout

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 EN 26 7. QM14.3E LA Circuit Descriptions

7.3 Power Supply fuse with one with the correct specifications! This part is
available in the regular market.
7.3.1 Power Supply Unit Consult the Philips Service web portal for the order codes of the
boards.
All power supplies are a black box for Service. When any of
these power supplies is defective, a new board must be 7.3.2 Power Architecture
ordered and the defective one must be returned, unless the
main fuse of the board is broken. Always replace a defective For the power architecture, refer to figure 7-3

Fully integrated PSLS

AMP LVDS AMP
Display
interfacing
Platform power +12 V +12 V

Display power BL-ON/OFF

DIM
+12 V
+3V5 Stby
Platform
Low Stby MTK5591
power
AC-input
PFC
+
Mainsfilter AC-in 1 power-PCB

19580_132_140318.eps
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Figure 7-3 Power Architecture

U028B

+1V0-M Novatek
72314
+12V
Dual
DC/DC
Novatek
+1V5-M

Novatek
DDR’s

U026B

+2V5-M
LDO Novatek

+3V3
U025B

+3V3-NVT
IO supply
Switch voltages
Novatek

19580_135_140320.eps
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Figure 7-4 Power PSU-Connector

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 Circuit Descriptions QM14.3E LA 7. EN 27

U005F

USB to back end

+V-LNB 1,2&3
DC/DC LNB

Thermal
sensor
U010U
CI

+5V
DC/DC
IR key
board
Skype
U007U

TUNER
+1V2-MTK MTK IO
+12V
DC/DC MTK 3D
emitter
+3V3-TUNER
-
MTK
analog Ethernet
LDO +3V3-DVBT

U003F Nand
MTK flash,
U011U eeprom
DDR’s

+1V5-MTK
AmbiLight
+1V0-HDMI HDCP IC
LDO Rogue
Sil9679
Dual U021C
Audio
+12V
DC/DC amplifier
+1V1-DVBT2 Channel
LDO
decoder
U002F
+3V3 Spdif optical
output

19580_134_140320.eps
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Figure 7-5 Power Front-end

U028B

+1V0-M Novatek
72314
+12V
Dual
DC/DC
Novatek
+1V5-M

Novatek
DDR’s

U026B

+2V5-M
LDO Novatek

+3V3
U025B

+3V3-NVT
IO supply
Switch voltages
Novatek

19580_135_140320.eps
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Figure 7-6 Power Back-end

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 EN 28 7. QM14.3E LA Circuit Descriptions

7.3.3 Power Layout

Amblight fuse
(2 sides)

Dual switching converter +1V0-M

and +3V3-M
LNB supply
switching converter

+1V5-MTK to +1V2-DVBT2
LDO External Mosfet and +2V5-M LDO
coil for +1V2-MTK
switching controller

+3V3-STANDBY
LDO

+5V to +3V3-DVBT LDO

Dual switching
converter +1V5-MTK
and +3V3

Switching converter
+5V

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Figure 7-7 Power Top View

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 Circuit Descriptions QM14.3E LA 7. EN 29

AMBILIGHT PROTECTION
(3/4 sides ambilight)
Vishay (and alternative
Alpha & Omega )

Back end power +3V3-NVT

sequencer switch
+3V5-STANDBY to +3V3-LAN
LDO

+1V2-MTK
Switching
controler

Front end power

sequencer
U021C
+1V0-HDMI
LDO

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Figure 7-8 Power Bottom View

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 EN 30 8. QM14.3E LA IC Data Sheets

8. IC Data Sheets
This chapter shows the internal block diagrams and pin electrical diagrams (with the exception of “memory” and “logic”
configurations of ICs that are drawn as “black boxes” in the ICs).

8.1 Diagram, B, CXD2842

For Circuit Diagrams refer to:
10-1-11 B, DVB CHANNEL DECODER 1,and
10-1-15 B, DVB CHANNEL DECODER 2.

Block diagram

Pinning information

Exposed-Pad
(49: AVSS)

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Figure 8-1 Internal block diagram and pin configuration

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 IC Data Sheets QM14.3E LA 8. EN 31

8.2 Diagram, B, MT5591

For Circuit Diagrams refer to 10. Circuit Diagrams and PWB
Layouts.

Block diagram
MT5591IVDJ
S Input
ATSC/ TS JPEG/M P2/M P4/ L VDS/min-LVS/
DVB-T/ Demux DivX/H.264/VC-1/ V-by-One/ Panel
DVB-C RM /AVS/VP6/VP8 EPI
DTD H.264 Decoder s OD, TCON
Encoder
Tuner Input

NTSC/
PAL / PI P M JC-FRC
SECAM De-
Vplane 2D/3D Conver ter
ATD inter lace
scaler Post Pr ocessing
TV
Decoder
CVBS/YC
Input
Video Video 2D/3D OSD
Component ADCx4 I nput Graphic scaler
Analog input

HDMI HDM I Rx
Input

Audio SPDIF Out, I²S

SIF
Demod Audio ADACC L/R x3
Input Audio DSP Audio DAC
I /F

Audio Audio
ADC I nput
Audio 48/32-bit
Input Dual Cor e
DDR3 DDR3
SPDI F ARM CA9
Contr oller
In L 2 Cache

JTAG I r DA I 2C USB2.0 PWM Watchdog Ser ial Flash Ser vo ADC T8032
Smar t
PCR RTC UART SDI O Ether net NAND Flash CK GEN
Car d

19580_139_140401.eps
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Figure 8-2 Internal block diagram

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 EN 32 8. QM14.3E LA IC Data Sheets

Pinning Information
MT5591IVDJ
758 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

A ARDQ24 ARDQ30 ARDQM2 ARDQS3 ARCLK1# ARDQ29 ARDQ20 ARDQ10 ARDQS1 ARCLK0# ARDQ13 ARDQ11

ARDQS3 ARDQS1
B ARDQ19 ARDQ17 ARDQ28 ARCLK1 ARDQ25 ARDQ5 ARDQ8 ARCLK0 ARDQ9 ARDQ0
# #
RVREF_ ARDQS2 ARDQS0
C ARDQ21 ARDQ23 ARDQ26 ARDQM3 ARDQ27 ARDQ18 ARDQ22 ARDQ3 ARDQ14 ARDQ12 DVSS ARDQM1 ARDQ15 ARDQ2
C # #

D BRDQ4 BRDQ6 BRCAS# BRCS# ARDQS2 DVSS ARDQ31 ARA12 ARDQ7 ARDQ1 ARA14 ARDQM0 DDRV ARDQS0 ARBA0 DVSS DDRV

E BRDQ2 BRDQ0 BRODT BRBA2 BRA0 ARDQ16 DDRV ARA4 ARA11 ARRAS# ARA3 ARA9 ARA5

F BRDQ11 BRDQ9 BRDQ13 BRA9 DDRV ARBA1 ARA6 ARA8 ARODT ARCSX# ARA13 ARA2

BRRESE ARRESE
G BRDQ15 BRA13 BRA2 ARCKE ARA10 ARA1 DDRV ARCAS# ARCS# ARA7
T T
BRDQS0 AVSS33_
H BRDQS0 BRDQM1 BRA7 DDRV
# MEMPLL

J BRCLK0# BRCLK0 BRA15 BRBA0

BRDQS1
K BRDQS1 DDRV BRWE# BRA3 BRA5
#

L BRDQM0 BRDQ12 DVSS BRRAS# BRA10 BRCKE DDRV VCCK VCCK VCCK VCCK VCCK VCCK VCCK

M BRDQ10 BRDQ14 BRA4 BRBA1 DDRV VCCK VCCK

VC DVSS DVSS DVSS DVSS DVSS

N BRDQ3 BRDQ7 BRDQ1 BRDQ8 BRA1 DDRV VCCK VCCK

VC DVSS DVSS DVSS DVSS DVSS

P BRDQ5 BRA6 BRA8 BRA14 BRA11 BRA12 DDRV VCCK VCCK DVSS DVSS DVSS DVSS DVSS

R DDRV DDRV DDRV DDRV DDRV DDRV DDRV DDRV VCCK VCCK DVSS DVSS DVSS DVSS DVSS

REXT_V VCC3IO_
T BE4P BE4N DDRV DDRV DDRV DDRV VCCK VCCK DVSS DVSS DVSS DVSS DVSS
PLL C

U BE3P BE3N TCON3 TCON4 TCON9 TCON10 VCCK VCCK DVSS DVSS DVSS DVSS DVSS

AVSS33_
V BECKP BECKN BE2P BE2N TCON6 TCON12 TCON5 TCON11 VCCK VCCK DVSS DVSS DVSS DVSS DVSS
LVDS

W BE1P BE1N TCON2 TCON8 VCCK VCCK DVSS DVSS DVSS DVSS DVSS

VCC3IO_
Y BE0P BE0N BO4P BO4N VCCK VCCK DVSS DVSS DVSS DVSS DVSS
B
VCC3IO_
AA BO3P BO3N GPIO50 TCON0 TCON1 VCCK VCCK DVSS DVSS DVSS DVSS DVSS
B

AB BOCKP BOCKN BO2P BO2N GPIO54 TCON7 GPIO49 VCCK VCCK DVSS DVSS DVSS DVSS DVSS

AVSS33_ AVSS33_ AVSS33_

AC BO1P BO1N GPIO55 GPIO53 GPIO52 VCCK VCCK VCCK DVSS DVSS DVSS
LVDS COM LD

AD BO0P BO0N AE4P AE4N GPIO51 VCCK VCCK VCCK VCCK VCCK VCCK

AVSS33_ AVSS33_ AVSS33_ POR_BN OPCTRL

AE AE3P AE3N VCCK VCCK VCCK VCCK D
LVDS USB_P3 ELDO 9
AVSS12_ PHYLED LED_PW
AF AECKP AECKN AE2P AE2N VCCK VCCK VCCK VCCK AOMCLK OSDA1 OIRI
LVDS_3 1 M1
LED_PW OPCTRL
AG AE1P AE1N VCCK VCCK VCCK VCCK ALIN ASPDIF0 OSCL1 U1RX
M0 3
AOSDAT AOSDAT OPCTRL
AH AE0P AE0N AO4P AO4N VCCK VCCK VCCK OSCL0 OSDA0 U1TX U0RX U0TX
A1 A4 7
AOSDAT AOSDAT PHYLED OPCTRL
AJ AO3P AO3N VCCK VCCK VCCK AOLRCK JTMS JTRST#
A2 A0 0 2
AOSDAT STB_SD OPCTRL AVSS12_
AK AOCKP AOCKN AO2P AO2N VCCK VCCK VCCK AOBCK JTCK JTDI
A3 A 4 RGB
AVSS33_
OPCTRL
AL AO1P AO1N VCCK VCCK VCCK OPWM2 JTDO RXVP_1 TXVP_0 STB_SCL OPWRSB VGA_ST
11
B
AVSS12_ AVSS12_ USB_DM OPCTRL AVDD10_
AM AO0P AO0N VCCK VCCK VCCK OPWM1 OPWM0 RXVN_1 TXVN_0
LVDS_2 LVDS_1 _P3 10 LDO
AVDD33_
AVDD12_ AVDD12_ AVDD12_ AVDD33_ AVDD33_ USB_DP_ AVDD33_ AVDD10_
AN VCCK VCCK VCCK REXT VGA_ST
LVDS_1 LVDS_2 LVDS_3 LVDS USB_P3 P3 ETH ELDO
B

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

19610_302.eps

Figure 8-3 Pin configuration [1/2]

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 IC Data Sheets QM14.3E LA 8. EN 33

Pinning Information
MT5591IVDJ
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33

AVDD33_
DDRV PDD5 PDD3 POCE0# PACLE SD_CMD GPIO26 GPIO1 GPIO3 GPIO5 A
MEMPLL

DDRV PDD6 PDD2 POOE# PAALE GPIO42 GPIO0 GPIO2 GPIO6 GPIO25 B

FSRC_W EMMC_C
ARDQ4 DDRV PDD7 PDD4 PDD0 PARB# SD_D3 SD_D1 GPIO47 GPIO28 GPIO4 GPIO7 GPIO12 GPIO24 C
R LK
VCC3IO_
RVREF_A DDRV DDRV GPIO45 PDD1 POWE# POCE1# SD_D2 SD_D0 GPIO36 GPIO35 GPIO15 GPIO21 GPIO16 GPIO22 D
A
VCC3IO_
ARDQ6 DDRV DDRV SD_CLK GPIO44 GPIO34 GPIO27 GPIO23 GPIO8 GPIO19 GPIO20 E
A

ARA0 DDRV DDRV GPIO48 GPIO10 GPIO11 GPIO9 GPIO13 GPIO17 GPIO14 GPIO18 F

ARBA2 DDRV DDRV GPIO46 GPIO33 GPIO41 GPIO39 GPIO32 GPIO40 G

AVSS33_ USB_DP_ USB_DM_

ARWE# GPIO37 GPIO30 H
CPUPLL P0 P0
USB_DM_ USB_DP_
MEMTP GPIO31 GPIO38 GPIO29 J
P1 P1
CI_TSDA USB_DM_ USB_DP_ AVDD33_US
MEMTN DVSS DVSS SPI_CLE GPIO43 K
TA0 P2 P2 B_P0P1P2

PVR_TSS SPI_DAT
VCCK VCCK DVSS CI_INT IF_AGC SPI_CLK1 SPI_CLK L
YNC A
AVSS33_ PVR_TSV PVR_TSD PVR_TSD PVR_TSC
DVSS DVSS DVSS DVSS DVSS RF_AGC M
USB_P1 AL ATA0 ATA1 LK
CI_TSSY CI_TSVA DEMOD_ CI_TSCL
DVSS DVSS DVSS DVSS DVSS OSDA2 OSCL2 N
NC L TSCLK K
DEMOD_ DEMOD_ DEMOD_ AVDD12_H AVDD12_H
DVSS DVSS DVSS DVSS DVSS P
TSDATA3 TSVAL RST DMI_3_RX DMI_2_RX

DEMOD_ DEMOD_ DEMOD_ DEMOD_

DVSS DVSS DVSS DVSS DVSS VCCK R
TSDATA7 TSDATA0 TSDATA4 TSSYNC
AVSS33_ DEMOD_ DEMOD_ HDMI_3_ HDMI_3_ HDMI_3_ HDMI_3_
DVSS DVSS DVSS DVSS DVSS T
HDMI_RX TSDATA1 TSDATA2 RX_2 RX_2B RX_1 RX_1B
DEMOD_ DEMOD_ HDMI_3_ HDMI_3_
DVSS DVSS DVSS DVSS DVSS U
TSDATA6 TSDATA5 RX_0 RX_0B
HDMI_CE HDMI_3_ HDMI_3_ HDMI_3_ HDMI_3_
DVSS DVSS DVSS DVSS DVSS VCCK DVSS ASPDIF1 V
C PWR5V HPD RX_C RX_CB
AVSS33_ HDMI_3_ HDMI_3_ HDMI_2_ HDMI_2_ HDMI_2_ HDMI_2_
DVSS DVSS DVSS DVSS DVSS DVSS W
HDMI_RX SDA SCL RX_2 RX_2B RX_1 RX_1B
HDMI_2_ HDMI_1_ HDMI_2_ HDMI_2_
DVSS DVSS DVSS DVSS DVSS DVSS Y
SDA PWR5V RX_0 RX_0B
HDMI_2_ HDMI_1_ HDMI_2_ HDMI_2_ HDMI_2_ HDMI_2_ AVDD12_H AVDD12_H
DVSS DVSS DVSS DVSS DVSS DVSS AA
SCL HPD PWR5V HPD RX_C RX_CB DMI_1_RX DMI_0_RX

AVSS33_ AVSS33_ HDMI_1_ HDMI_1_

DVSS DVSS DVSS DVSS AB
CVBS_1 CVBS_2 SDA SCL
AVSS33_
AVSS33_ AVSS33_ AVSS33_ HDMI_0_ HDMI_0_ HDMI_1_ HDMI_1_ HDMI_1_ HDMI_1_
DVSS VDAC_B DVSS DVSS AC
PLLGP ADAC AADC SDA SCL RX_2 RX_2B RX_1 RX_1B
G
AVSS33_ ADIN3_S HDMI_0_ HDMI_1_ HDMI_1_
DVSS AD
HDMI_RX RV HPD RX_0 RX_0B
AVSS33_ AVSS33_ ADIN2_S HDMI_0_ HDMI_1_ HDMI_1_ HDMI_0_ HDMI_0_
OPCTRL6 AE
VDAC HDMI_RX RV PWR5V RX_C RX_CB RX_2 RX_2B
ADIN4_S HDMI_0_ HDMI_0_
OPCTRL1 AF
RV RX_1 RX_1B
VGA_SD ADIN6_S HDMI_0_ HDMI_0_ HDMI_0_ HDMI_0_
OPCTRL8 AG
A RV RX_0 RX_0B RX_C RX_CB
ADIN1_S VDACX_ AL2_ADA AVDD33_
OPCTRL5 VGA_SCL MPXP CVBS1P AH
RV OUT C HDMI
ADIN0_S VDACY_ CVBS_C AL0_ADA AR2_ADA AR1_ADA AVDD33_ AVDD33_
OPCTRL0 LOUTN AJ
RV OUT OM C C C AADC ADAC
ORESET ADIN5_S AL1_ADA AR0_ADA AIN3_L_A
HSYNC SOG PB1P SOY0 CVBS0P CVBS3P LOUTP AK
# RV C C ADC
AVDD33_ AVSS12_ AVSS33_ AVSS33_XT AIN1_R_A AIN4_R_A
VSYNC BP RP COM1 PR1P PB0P PR0P AL
PLL DEMOD DEMOD AL_STB ADC ADC
ADIN7_S AVDD33_ ADCINP_ AIN2_L_A AIN3_R_A AIN2_R_A
GP Y1P COM0 CVBS2P XTALO AM
RV CVBS DEMOD ADC ADC ADC
AVDD12_ AVDD33_ AVDD33_ ADCINN_ AVDD12_ AVDD33_XT VMID_AA AIN1_L_A AIN4_L_A
COM SOY1 Y0P XTALI AN
RGB VIDEO DEMOD DEMOD DEMOD AL_STB DC ADC ADC

18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33

19610_303.eps

Figure 8-4 Pin configuration [2/2]

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div. table
 EN 34 8. QM14.3E LA IC Data Sheets

8.3 Diagram 10-1-29 B, AUDIO AMPLIFIER, B, STA381

Block diagram
STA381BW

4 OUT 1A
2.1 Channel OUT 1B
Half
MCLK Audio Processor OUT 2A
Bridges
FFXTM OUT 2B
STAudioFx TM Modulator FFX3A
LRCKI STSpeakerSafe TM
BICKI Parametric EQ FFX3B
Binary
Volume FFX4A
Ternary
SDI Bass and Treble
Speaker Compensation FFX4B
Stereo Widening F3XL
F3XR

LINEINL LINEHPOUT_L

LINEINR LINEHPOUT_R

Headph one
SOFT_MUTE
TESTMODE (2Vrms)
PWDN
Control logic
INTLINE
& -3.3V CPVSS
RESET
Protections
Negative
SA Charge
SDA IIC Pump CPP
SCL
PLL CPM
REG_M3
VDD3V3CHP
F3X_FILT
GNDPSUB
2 x GNDDIG

AGNDPLL
2 x VCC
VDD_REG

VCC_REG

VSS_REG
2 x GND

2 x VDDDIG

GNDA
GND_REG

VREGFILT

Pinning information
TESTMODE
GNDDIG2
VDDDIG2

INTLINE

RESET
PWDN

LRCKI

BICKI
SDA
SCL

SDI
SA
48

47

46

45

44

43

42

41

40

39

38

37

VCC_REG 1 36 MCLK

VSS_REG 2 35 AGNDPLL

OUT2B 3 34 VREGFILT

GND2 4 33 TWARNEXT/FFX4B

VCC2 5 32 EAPD/FFX4A

OUT2A 6 31 FFX3B

OUT1B 7
STA381BW 30 FFX3A

VCC1 8 29 GNDDIG1

GND1 9 28 VDDDIG1

OUT1A 10 27 VDD3V3CHP

VDD_REG 11 26 CPP

GND_REG 12 25 GNDPSUB
13

14

15

16

17

18

19

20

21

22

23

24
F3X_FILT

VDD3V3

CPVSS
GNDA
F3XR

LINEINL

LINEINR

SOFTMUTE
LINEHPOUT_L

LINEHPOUT_R

CPM
F3XL

19240 300 120221 eps

Figure 8-5 Internal block diagram and pin configuration

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 Block Diagrams QM14.3E LA 9. EN 35

9. Block Diagrams
9.1 Wiring Diagram 7809 series 42"

Wiring diagram 42" 78xx series

8AL02

8PS90

42PUS7809

8CA26

8TC51

8AL01

8CA31

PHILIPS

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 Block Diagrams QM14.3E LA 9. EN 36

9.2 Wiring Diagram 7809 series 49"

Wiring diagram 49" 78xx series

8AL02

8PS90

49PUS7809

8TC51

8AL01

8CA31
8CA26

PHILIPS

19580_020_140207.eps
140207

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 Block Diagrams QM14.3E LA 9. EN 37

9.3 Wiring Diagram 7809 series 55"

Wiring diagram 55" 78xx series

8AL02

8PS90

55PUS7809

8TC51

8AL01

8CA31

8CA26

PHILIPS

19580_021_140207.eps
140207

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 Block Diagrams QM14.3E LA 9. EN 38

9.4 Block Diagram Architecture

MTK Architecture

PCDDR3 PCDDR3 eMMC

NVM
8Gb-1600 1Gb-1600 4GB
DDR3
32 16

Skype
2x1Gb-1600

WiFI
32
Cell
LVDS LVDS/Vx1 QFHD
USB-HUB Video @50/60
USB2
3D-LR
TCON-ON BLU
W-2Ddirr
GPIO
Splash
FRC RGB-2Ddirr

Screen N314
HDMI Rx BL-ON
SiI9679 BLU
=Rogue
8xPWM
SPDIF /BOOST

Analogue
MT5591 GPIO
SPI switch
component SOC1 SPI
AL
Analog: temperature AL mods.
GPIO
IF1
DVB-C/T
Hybrid
Analog SPDIF
Tuner 1
SPDIF SPDIF
DVB-T2/C2 TS Audio
Sat Tuner TS-in I2S
S/S2 I2S CLASS-D
CA
I2C Light
LAN
Sensor

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 Block Diagrams QM14.3E LA 9. EN 39

9.5 Block Diagram Connections

DDR3-1600

DDR3-1600

DDR3-1600
1-2Gbit
4Gbit

4Gbit
Buon
x32 x16 X400
DDR3
MTK-RESET-INn Reset

X301
JTAG-MTK JTAG RESET
Generator
BE-RESETn X020-X025-X026

DDR3-1600

DDR3-1600
AUDIO-RESETn

SPI-AMBI
MT5591

1Gbit

1Gbit
X310 DEMOD-RESETn
Mini-Jack UART-SERVICE RF4CE-RESETn

X206
UART0
eMMC-RESETn
X311
115kBaud HDCP-RESETn
UART-RF4CE
X027

CC2533

X027
UART1 x16 x16
RF4CE QC-SPI-AMBI SPI-Switch DDR3

NT72314
X313
TI-RF4CE-DEBUG UART1
RF4CE-RESETn

Temp-Sensor

X314
0x98 SPI
X303 NT-SPI-AMBI

X312
AUDIO-RESETn X323 100kHz UART2
Class D Amplifier 400kHz
0x38 I²C-BE
I²C-MCU I²C-S I²C-M
400kHz X320 BE-RESETn
I²C-SSB SPI 0x34
EEPROM I2C0
Ethernet

X342
0xA0
Ethernet X296 RJ45 SPI
X321 USB1 Skype Serial Flash
X020-X025-

X020-X025-

100kHz USB1 X029/X030 5/8pins 5V

SRF-Bus I²C-SRF-Bus 16Mbit=2MB
X026

X026

Light Sensor I2C1

0x52 USB3 USB3 Wifi
100kHz X031 6pins 3V3-WOLAN

Reset BE-RESETn
SRF-Bus Generator
Set Temp RC
X071

IR
X071

Sensor 0x98 Receiver

100kHz
USB2 USB2
DEMOD-RESETn
X322 USB0 USB0
DVBS2-Tuner 400kHz 400kHz I²C-FE-Bus
0xC6 I²C-TUNER DVB-T/C/S/T2/C2/S2
DVB-T/C/S/T2/C2/S2
0xCC I2C2
Channel
Channel
Decoder
Decoder
0xC8
Default in
For /K

X340
Hybrid-Tuner SD(x8)
0xC0
EMMC-RESETn eMMC (x8)
X335 4GByte X280 USB-type A
EDID EEPROM HDCP 2.2 0x70
0xA0 I²C-HDCP 0x64 USB HUB X281 USB-type A
USB
X346

SPI switch
HDCP-RESETn X282
not used USB-type A
Serial Flash
1Mbit=128kByte
X374

Legend
Not used
Bypass
opon
X324
Locaon Opons

X0..

X0..
1 I²C-BL-Bus
I2C Diversity Opons Connectors - Applicationata BackLight

PCA9540
100kHz

I2C MPX
UART Customer Connectors
Position Application

X051 -1G55

X051 -1G55
RESET Producon Connectors X325
X000 - X099 Internal connectors 0 I²C-DISP-Bus
USB-Eth Debug Connectors Display
X100 - X199 Internal connectors (spare)
Power
100kHz
RESET X200 - X299 User connectors

BE-RESETn
Flash
I2C X300 - X399 Debug connectors
UART X300 - X309 (E)JTAG (incl. µP-debug-IF)
DDR SPI X310 - X319 UART
Flash X320 - X329 I²C
Level Shi
EJTAG X330 - X339 I²C (spare)
GPIO USB&Ethernet
X340 - X349 SPI
Power
ADC X350 - X359 CTRL
GPIO X360 - X369 UART (spare)
8bits I2C address ADC X370 - X379 USB
Other
X380 - X389 Other

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 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 40

10. Circuit Diagrams and PWB Layouts

10.1 715RLPCB0000000213 SSB
10-1-1 B, DDR3 INTERFACE - 16 bits

DDR3 INTERFACE - 16 bits

B B
+1V5-MTK

+1V5-MTK
100nF

1K

1%
16V
C013T

R087T

F006T

K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9
B2
D9
G7
U002T
100nF

H5TQ4G63AFR-PBCR
1K

1%
16V

D046T VDD VDDQ

BRA0
C014T

N3 0
U005T +1V5-MTK BRA1 BRDQ8
R086T

P7 1 0 D7
TYPE BRA2 P3 C3 BRDQ9
2 1
DDR_B BRA3 N2 3 2 C8 BRDQ10
C2 L1 BRDQM0 BRA4 P8 C2 BRDQ11

100nF
RVREF_C BRDQM0 4 3

1K
BRDQS0 H2 BRDQS0 BRA5 P2 5
DQU
4 A7 BRDQ12

1%
BRCLK0 BRDQS0n BRA6 BRDQ13

16V
J2 BRCLK0 BRDQS0# H1 R8 6 5 A2
BRCLK0n BRDQ0 BRA7 BRDQ14

C001T
J1 BRCLK0# BRDQ0 E2 R2 7 A 6 B8
BRDQ1 BRA8 BRDQ15

R083T
BRDQ1 N3 T8 8 7 A3
BRCKE L6 BRCKE BRDQ2 E1 BRDQ2 BRA9 R3 9
BRDQ3 N1 BRDQ3 F008T
BRA10 L7 10 DQSU B7 BRDQS1n
BRODT E3 D1 BRDQ4 BRA11 R7 C7 BRDQS1

100nF
BRODT BRDQ4 11 DQSU

1K
BRRASn L4 BRRAS# BRDQ5 P1 BRDQ5 BRA12 D047T N7
12 D052T

1%
BRCASn BRDQ6 BRA13 BRDQS0

16V
D3 BRCAS# BRDQ6 D2 T3 DQSL F3
13
BRCSn BRDQ7 BRA14 BRDQS0n

C002T
D4 BRCS# BRDQ7 N2 T7 DQSL G3
14
BRA15

R082T
M7 15 D053T
BRBA0 J4 BRBA0 BC 0 E3 BRDQ0
BRBA1 M6 BRBA1
S001T RES AP 1 F7 BRDQ1
BRBA2 E4 BRBA2 BRDQM1 H3 BRDQM1 2 F2 BRDQ2
BRDQS1 K1 D042T BRDQS1 H1 VREFDQ 3 F8 D054T BRDQ3
BRWEn K4 BRWE# BRDQS1# K2 BRDQS1n +1V5-MTK M8 VREFCA
DQL
4 H3 BRDQ4
N4 D043T BRDQ8 H8 D055T BRDQ5
BRDQ8 5
BRA15 J3 BRA15 BRDQ9 F2 D044T BRDQ9 R104T 240 A-ZQ3 A-ZQ3 L8 ZQ 6 G2 BRDQ6
BRA14 P4 M3 BRDQ10 H7 BRDQ7

100nF
BRA14 BRDQ10 1% 7

1K
BRA13 G5 BRA13 BRDQ11 F1 BRDQ11 BRBA0 M2 0

1%
BRA12 BRDQ12 BRBA1

16V
P6 BRA12 BRDQ12 L2 N8 1 BA J1
BRA11 BRDQ13 BRBA2

C003T
P5 BRA11 BRDQ13 F3 M3 2 J9
NC
BRA10 BRDQ14

R085T
L5 BRA10 BRDQ14 M4 L1
D048T
BRA9 F4 BRA9 BRDQ15 G3 BRDQ15 BRCLK0 BRRASn J3 RAS L9
BRA8 BRODT

100
P3 BRA8 D045T K1 ODT
BRA7 H4 BRCASn D049T K3

100nF
BRA7 F009T CAS

1K

1%
BRA6 P2 BRA6
BRCLK0 J7 CK

1%
BRA5 BRCLK0n

16V
K6 BRA5 K7 CK
BRA4 BRCKE D050T

C004T

R101T
M5 BRA4 K9 CKE
BRA3 BRRESET BRCLK0n BRCSn

R084T
K5 BRA3 BRRESET G4 L2 CS
BRA2 G6 BRA2
BRWEn L3 WE
BRA1 N5 BRA1
BRRESET T2 RESET
BRA0 E5 BRA0 D051T
BRDQM0 E7 DML
+1V5-MTK B19 DDRV_1
BRDQM1 D3 DMU
C19 DDRV_2 VSS VSSQ
D19 DDRV_3
E19 DDRV_4
F19 DDRV_5

B1
B9
D1
D8
E2
E8
F9
G1
G9
P9
T1
T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
G19 DDRV_6 D061T D062T D063T D064T D065T
F5 DDRV_7
H5 DDRV_8
N8 DDRV_9
P8 DDRV_10
D13 DDRV_11
E8 DDRV_12
G11 DDRV_13
D20 DDRV_14
E20 +1V5-MTK
DDRV_15
F20 DDRV_16
G20 DDRV_17
R7

4.7uF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF
DDRV_18

10uF
1uF
R8

100uF 16V
DDRV_19

C090T

6.3V

6.3V

6.3V
16V

16V

16V

16V

16V

16V

16V

16V
T5 DDRV_20

C088T

C074T

C012T

C011T

C010T

C009T

C008T

C007T

C006T

C005T

C079T
T6 DDRV_21

RES
T7 DDRV_22
T8 DDRV_23 D056T D057T D058T D059T D060T

X004T
1

X005T
1

3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

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 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 41

10-1-2 B, DDR3 INTERFACE - 32 Bits

DDR3 INTERFACE - 32 bits

B B

+1V5-MTK
+1V5-MTK U005T +1V5-MTK +1V5-MTK
TYPE
R1 D12 ARDQM0
100nF

DDRV_1 ARDQM0
1K

R2
DDR_A D14 ARDQS0
DDRV_2 ARDQS0
1%

ARDQS0n
16V

R3 DDRV_3 ARDQS0# C14

ARDQ0
C042T

R4 DDRV_4 ARDQ0 B17

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9
ARDQ1
R097T

R5 DDRV_5 ARDQ1 D10 U004T U003T

F010T R6 DDRV_6 ARDQ2 C17 ARDQ2 H5TQ4G63AFR-PBCR H5TQ4G63AFR-PBCR
K3 DDRV_7 ARDQ3 C10 ARDQ3
L8 C18 ARDQ4
100nF

DDRV_11 ARDQ4 VDD VDDQ D021T VDD VDDQ

1K

M8 DDRV_10 ARDQ5 B9 ARDQ5 +1V5-MTK ARA0 D009T N3 0

+1V5-MTK ARA0 N3 0
D015T D027T
1%

ARDQ6 ARA1 ARDQ8 ARA1 ARDQ24

16V

D17 DDRV_9 ARDQ6 E18 P7 1 0 D7 P7 1 0 D7

ARDQ7 ARA2 ARDQ9 ARA2 ARDQ25
C043T

A19 DDRV_8 ARDQ7 D9 P3 2 1 C3 P3 2 1 C3

ARA3 ARDQ10 ARA3 ARDQ26
R096T

N2 C8 N2 C8

100nF

100nF
3 2 3 2

1K

1K
D001T
I001T J22 MEMTP ARDQM1 C15 ARDQM1 ARA4 P8 4 3 C2 ARDQ11 ARA4 P8 4 3 C2 ARDQ27

1%

1%
+VTT I002T ARDQS1 ARA5 DQU ARDQ12 ARA5 DQU ARDQ28

16V

16V
K22 MEMTN ARDQS1 A13 P2 5 4 A7 P2 5 4 A7
D002T ARDQS1n ARA6 D016T ARDQ13 ARA6 ARDQ29

C045T

C015T
ARDQS1# B13 R8 6 5 A2 R8 6 5 A2
ARDQ8 ARA7 ARDQ14 ARA7 D022T D028T ARDQ30

R089T

R093T
D18 RVREF_A ARDQ8 B11 R2 7 A 6 B8 R2 7 A 6 B8
ARDQ9 B16 ARDQ9 F011T ARA8 T8 8 7 A3 ARDQ15 F013T ARA8 T8 8 7 A3 ARDQ31
R054T 47 ARCKE ARCKE G8 ARCKE ARDQ10 A11 ARDQ10 ARA9 R3 9
ARA9 R3 9
D017T D029T
A17 D004T ARDQ11 ARA10 L7 B7 ARDQS1n ARA10 L7 B7 ARDQS3n

100nF

100nF
ARDQ11 10 DQSU 10 DQSU

1K

1K
ARCLK1 B5 ARCLK1 ARDQ12 C12 ARDQ12 ARA11 R7 11 DQSU C7 ARDQS1 ARA11 R7 11 DQSU C7 ARDQS3

1%

1%
ARCLK1n ARDQ13 ARA12 ARA12

16V

16V
A5 ARCLK1# ARDQ13 A16 N7 D018T N7 D030T
12 12
ARDQ14 ARA13 ARDQS0 ARA13 ARDQS2

C046T

C016T
ARDQ14 C11 T3 DQSL F3 T3 DQSL F3
13 13
ARCLK0 ARDQ15 ARA14D011T ARDQS0n ARA14 ARDQS2n

R088T

R092T
B14 ARCLK0 ARDQ15 C16 T7 DQSL G3 T7 DQSL G3
14 14
ARCLK0n A14 ARCLK0# M7 15 D023T M7 15
D005T
ARDQM2 A3 ARDQM2 S002T RES BC 0 E3 ARDQ0 S003T RES BC 0 E3 ARDQ16
R055T 47 ARODT ARODT F13 ARODT ARDQS2 D5 ARDQS2 AP 1 F7 ARDQ1 AP 1 F7 ARDQ17
R056T 47 ARRASn ARRASn E13 ARRAS# ARDQS2# C5 D006T ARDQS2n 2 F2 ARDQ2 2 F2 ARDQ18
R057T 47 ARCASn ARCASn G13 E7 ARDQ16 +1V5-MTK H1 F8 D020T ARDQ3 +1V5-MTK H1 F8 ARDQ19
ARCAS# ARDQ16 VREFDQ 3 VREFDQ 3
R058T 47 ARCSn ARCSn G15 ARCS# ARDQ17 B2 ARDQ17 M8 VREFCA
DQL
4 H3 ARDQ4 M8 VREFCA
DQL
4 H3 ARDQ20
R059T 47 ARWEn ARWEn H18 ARWE# ARDQ18 C8 ARDQ18 5 H8 ARDQ5 5 H8 ARDQ21
B1 ARDQ19 R105T 240 A-ZQ1 A-ZQ1 L8 G2 D019T ARDQ6 R106T 240 A-ZQ2 A-ZQ2 L8 G2 D031T ARDQ22
100nF

100nF
ARDQ19 ZQ 6 ZQ 6
1K

1K
R060T 47 ARRESET ARRESET G16 ARRESET ARDQ20 A9 D007T ARDQ20 1% 7 H7 ARDQ7 1% 7 H7 ARDQ23
1%

1%
ARDQ21 ARBA0 ARBA0
16V

16V
ARDQ21 C1 M2 0 M2 0
R061T 47 ARBA0 ARBA0 ARDQ22 ARBA1 ARBA1
C047T

C017T
D15 ARBA0 ARDQ22 C9 N8 1 BA J1 N8 1 BA J1
R062T 47 ARBA1 ARBA1 ARDQ23 ARBA2 ARBA2
R091T

R095T
F9 ARBA1 ARDQ23 C3 M3 2 J9 M3 2 J9
NC NC
R063T 47 ARBA2 ARBA2 G18 ARBA2 D008T L1 D024T L1
ARDQM3 C6 ARDQM3 F012T
ARCLK0 ARRASnD012T J3 RAS L9 F014T
ARCLK1 ARRASn J3 RAS L9
R064T 47 ARCSXn ARCSXn ARDQS3 100 ARODT ARODT

100
F15 A4 K1 K1
100nF

100nF
ARCSX# ARDQS3 ODT ODT
1K

1K
ARDQS3# B4 ARDQS3n ARCASnD013T K3 CAS
ARCASn K3 CAS
1%

1%

1%

1%
R065T 47 ARA14 ARA14 ARDQ24 ARCLK0 ARCLK1 D025T J7
16V

16V
D11 ARA14 ARDQ24 A1 J7 CK CK
R066T 47 ARA13 ARA13 ARDQ25 ARCLK0n ARCLK1n
C048T

C018T
F16 ARA13 ARDQ25 B7 K7 CK K7 CK
R067T 47 ARA12 ARA12 ARDQ26 ARCKE ARCKE
R090T

R102T

R094T

R103T
D8 ARA12 ARDQ26 C4 K9 CKE K9 CKE
R068T 47 ARA11 ARA11 E11 ARA11 ARDQ27 C7 ARDQ27 ARCLK0n ARCSn L2 CS
ARCLK1n ARCSXn L2 CS
R069T 47 ARA10 ARA10 G9 ARA10 ARDQ28 B3 ARDQ28 ARWEn D014T L3 WE
ARWEn L3 WE
R070T 47 ARA9 ARA9 E16 ARA9 ARDQ29 A7 ARDQ29 ARRESET T2 RESET
ARRESET D026T T2
RESET
R071T 47 ARA8 ARA8 F11 ARA8 ARDQ30 A2 ARDQ30
R072T 47 ARA7 ARA7 G17 ARA7 ARDQ31 D7 ARDQ31 ARDQM0 E7 DML
ARDQM2 E7 DML
R073T 47 ARA6 ARA6 F10 ARA6 L005T
ARDQM1 D3 DMU
ARDQM3 D3 DMU
R074T 47 ARA5 ARA5 E17 ARA5 AVDD33_MEMPLL A20 I038T
+3V3-A VSS VSSQ VSS VSSQ
R075T 47 ARA4 ARA4 E10 H9
100nF

ARA4 AVSS33_MEMPLL 30H

R076T 47 ARA3 ARA3
1uF

E15 ARA3
6.3V

R077T 47 ARA2 ARA2

16V

F17 ARA2

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9
A9
R078T 47 ARA1 ARA1
C044T

C076T

G10 ARA1
R079T 47 ARA0 ARA0 F18 ARA0

RES

+1V5-MTK +1V5-MTK +1V5-MTK

4.7uF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF
10uF

10uF
1uF
100uF 16V

D039T D040T D041T D036T

C091T

D037T D038T D032T D033T D034T D035T

6.3V

6.3V

6.3V

6.3V
16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V
C089T

C075T

C041T

C040T

C039T

C038T

C037T

C036T

C035T

C026T

C025T

C024T

C023T

C022T

C021T

C020T

C019T

C080T

C034T

C033T

C032T

C031T

C030T

C029T

C028T

C027T

C081T
+VTT +VTT
100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF
16V

16V

16V

16V

16V

16V

16V

16V

16V

16V
C109T

C108T

C107T

C106T

C105T

C114T

C113T

C112T

C111T

C110T
RES
RES

RES
RES

RES
RES
RES
RES

RES
RES

+1V5-MTK

RES

1 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

19580_083_140313.eps
26-03-13

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 42

10-1-3 B, EMMC

EMMC
B B

AH11
AH9
AH6
AH4
AG13
AG2
AE14
AE1
AA14
AA13
AA12
AA11
AA9
AA8
AA2
AA1
Y14
Y13
Y12
Y11
Y10
Y9
Y8
Y7
Y6
Y3
Y1
W14
W13
W12
W11
W10
W9
W8
W7
W3
U007T
TYPE
+3V3 +3V3

NC122
NC121
NC120
NC119
NC118
NC117
NC116
NC115
NC114
NC113
NC112
NC111
NC110
NC109
NC108
NC107
NC106
NC105
NC104
NC103
NC102
NC101
NC100
NC99
NC98
NC97
NC96
NC95
NC94
NC93
NC92
NC91
NC90
NC89
NC88
NC87
H6 RFU1 NC86 W2
H7 W1

100nF
RFU2 NC85

10uF

10uF
+3V3 K5 RFU3 NC84 V14

6.3V

6.3V
16V
M5 RFU4 NC83 V13

1K

5% 1K

5% 1K

5% 1K
5

C049T

C082T

C083T
M8 RFU5 NC82 V12

5%
M9 RFU6 NC81 V3
M10 RFU7 NC80 V2 +3V3

R157T

R157T

R157T

R157T
N10 V1

1
RFU8 NC79
P3 RFU9 NC78 U14
P10 RFU10 NC77 U13
R5 U12

100nF

100nF

100nF
RFU11 NC76
T5 RFU12 NC75 U3
U005T

16V

16V

16V
U6 RFU13 NC74 U2
R158T 10K F040T MTK-EJTAG-TRSTn TYPE

C050T

C051T

C052T
U7 RFU14 NC73 U1
AK10 JTCK MISC U0TX AH15
R166T 10 MTK-TX-SERVICE U10 RFU15 NC72 T14
AL9 JTDO U0RX AH14
R167T 10 MTK-RX-SERVICE AA7 RFU16 NC71 T13
AK11 JTDI AA10 RFU17 NC70 T12
AJ11 JTMS U1TX AH13
R168T 10 MTK-TX-RF4CE NC NC69 T3
MTK-EJTAG-TRSTn R144T 10 AJ12 JTRST# U1RX AG13
R169T 10 MTK-RX-RF4CE A4 NC1 NC68 T2
A6 NC2 NC67 T1

10uF

10uF

10uF
R174T 2.2K SDA-SSB SDA-SSB R153T 10 AH11 OSDA0 D24 R243T 10 EMMC-CMD A9 R14
+3V3 POWE# NC3 NC66

6.3V

6.3V

6.3V
R175T 2.2K SCL-SSB SCL-SSB R154T 10 AH10 OSCL0 POOE# B25 A11 NC4 NC65 R13

C084T

C085T

C086T
POCE1# D25 B2 NC5 NC64 R12
R176T 2.2K SDA-SRF SDA-SRF R151T 10 AF11 OSDA1 POCE0# A25 B13 NC6 NC63 R3
R177T 2.2K SCL-SRF SCL-SRF R152T 10 AG11 OSCL1 PDD7 C22 EMMC-D7 D1 NC7 NC62 R2
PDD6 B22 EMMC-D6 D14 NC8 NC61 R1
C149T 10pF AN29 XTALI PDD5 A22 EMMC-D5 H1 NC9 NC60 P14
AM29 XTALO PDD4 C23 EMMC-D4 H2 NC10 NC59 P13
X321 A23 EMMC-D3 H8 P12

100nF

100nF

100nF
PDD3 NC11 NC58
1 SCL-SRF PDD2 B23 EMMC-D2 H9 NC12 NC57 P2
3

F032T

16V

16V

16V
2 AN30 AVDD33_XTAL_STB D23 H10 P1
SDA-SRF +3V3-STANDBY PDD1 NC13 NC56

C053T

C054T

C055T
3 X002T AL29 AVSS33_XTAL_STB PDD0 C24 H11 NC14 NC55 N14
4 5 4 C25 H12 N13
PARB# NC15 NC54
2 A26 EMMC-D1 H13 N12
1

PACLE NC16 NC53

TYPE AN17 AVDD33_VGA_STB B26 EMMC-D0 N3
X320
+3V3-STANDBY PAALE
R244T 10 EMMC-CLK
NC52
AL17 AVSS33_VGA_STB EMMC_CLK C21
F035T

NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
NC25
NC26
NC27
NC28
NC29
NC30
NC31
NC32
NC33
NC34
NC35
NC36
NC37
NC38
NC39
NC40
NC41
NC42
NC43
NC44
NC45
NC46
NC47
NC48
NC49
NC50
NC51
1 SCL-SSB C150T 10pF
2 F036T
OPWRSB AL15
R170T 10 STANDBYn
3 F037T SDA-SSB AL26 AVDD33_PLL
+3V3-A

H14

J10
J11
J12
J13
J14

K10
K11
K12
K13
K14

L12
L13
L14

M12
M13
M14
J1
J7
J8
J9

K1
K3
K7
K8
K9

L1
L2
L3
L4

M1
M2
M3

N1
N2
4 5 AC21 AVSS33_PLLGP ORESET# AK20
R172T 10 MTK-RESET-INn

100nF

100nF

100nF
H21 AVSS33_CPUPLL
TYPE
OIRI AF17
R171T 10 RC

C170T

C169T

C168T
AM17 AVDD10_LDO C20 R163T 4.7K
FSRC_WR

STB_SCL AL14
R161T 47 SCL-BE
AN16 AVDD10_ELDO STB_SDA AK15
R162T 47 SDA-BE
+3V3 +3V3 +3V3

4.7uF

4.7uF
POR_BND AE14
R164T 4.7K RES
R165T 4.7K +3V3-STANDBY

C176T

C177T

10K

10K

10K

10K

10K

10K

10K

10K

10K
M6
N5
T10
U9

K6
W4
Y4
AA3
AA5
U007T
TYPE

R001T

R002T

R003T

R004T

R005T

R006T

R007T

R008T

R009T
VCC_1
VCC_2
VCC_3
VCC_4

VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
X001T EMMC-CMD F020T W5 H3 R294T 33 EMMC-D0
CMD DAT0
+3V3 +3V3-STANDBY DBG 1 S034T EMMC-D3 DAT1 H4 R295T 33 F001T EMMC-D1
2 50m EMMC-CLK F021T W6 CLK DAT2 H5 R296T 33 F002T EMMC-D2
S033T EMMC-D4 R297T 33 F003T EMMC-D3

10K
3 J2
+3V3 MAIN DAT3
50m R239T 33 EMMC-D4
50m RES

4 U5 J3 F004T
RST DAT4
5 S027T EMMC-D0 DAT5 J4 R240T 33 F005T EMMC-D5

4.7K
S014T

S009T

50m F045T R241T 33 F015T EMMC-D6

50m

6 K2 VDDI DAT6 J5
EMMC-D1 R242T 33 EMMC-D7

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
S026T F016T

R010T
7 J6

100nF

VSS_1
VSS_2
VSS_3
VSS_4
DAT7
8 50m F017T
S035T EMMC-D2

16V
9
R189T 10K 50m

R081T

C056T
10

R10

AA4
AA6
M7
P5

U8

K4
Y2
Y5
11 S029T EMMC-D6
3

U001T 12 50m EMMC-RESETn

13 S028T EMMC-D7 F019T F018T

10uF
VCC 14 50m

RES S004T

6.3V
RESET 2 MTK-RESET-INn 15 S031T EMMC-D5
16 50m

C087T
GND F070T 17 S032T EMMC-CMD
18 50m
S030T EMMC-CLK
100

19
1

20 50m
+3V3
21 22
100nF

TYPE
R245T

X007T
16V

3 1
C178T

4 2

+3V3 +3V3

I036T C175T 100nF

10K

16V
8
RES

U008T

F076T
VDD SYS-EEPROM-WP SYS-EEPROM-WP R025T 10K
R232T

WP|WC 7

EEPROM
I035T
1 0 SCL 6 R233T 47 SCL-SSB
2 1 ADDR
3 2 SDA 5 R234T 47 SDA-SSB
VSS
10K

F031T
R011T

1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_084_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 43

10-1-4 B, ETHERNET

ETHERNET
B B

RES C064T 10nF

16V
X296
U005T I011T
C057T 100nF 1
TYPE
TXP F061T 16V 2
ETHERNET TXN F060T 3
TXVP_0 AL13
RXP F059T 4
TXVN_0 AM13
RXN F058T 5
RES C065T 10nF 6

15pF

15pF

15pF

15pF
F022T
RXVP_1 AL12 D003T 16V I012T 7 8
+3V3-LAN +3V3 +3V3-STANDBY TYPE RES

50V

50V

50V

50V
RXVN_1 AM12
C058T 100nF

C095T

C094T

C093T

C092T
RES

S008TRES

RES

RES

RES

RES
PHYLED0 AJ13 I003T 1 TMDS_CH1- TMDS_CH1+ 2 16V CHASSIS-GND CHASSIS-GND
PHYLED1 AF13 I004T
S005T

S007T

I009T 3 GND1
R107T 24K
REXT AN12 8 GND2
1% I010T TMDS_CH2- 4
S006T
AVDD33_ETH AN14 5 TMDS_CH2+
AVSS33_ELDO AE13
100nF

NC4
NC3
NC2
NC1
16V

CHASSIS-GND
AVSS33_LD AC16

10
C059T

AVSS33_COM AC15

9
7
6

1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_085_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 44

10-1-5 B, AUDIO/VIDEO

AUDIO / VIDEO
B IF-N-DVBT2 C078T 10nF R247T 220 R099T
L001T

4.7uH
1K C100T 10pF
B

680
50V 50V
U005T
TYPE
L002T
VIDEO

R114T
L003T 4.7uH R137T 100 AN27 ADCINN_DEMOD AK18
I026T HSYNC
+3V3-A +3V3-VIDEO IF-P-DVBT2 C077T 10nF R246T 220 R100T 1K R138T AM27 ADCINP_DEMOD AL18
VSYNC
30H C101T 10pF AL20
50V 100 RP
L004T 50V AN26 AVDD33_DEMOD AM20
I037T +3V3-A GP
+1V2-A +1V2-VIDEO C172T 100nF AL19
BP
30H AN28 AVDD12_DEMOD AN20
+1V2-A 16V
C171T 100nF
COM
SOG AK19
X322 AL28 AVSS33_DEMOD AG22
16V VGA_SDA
1 SCL-FE AL27 AVSS12_DEMOD VGA_SCL AH22
2
3 SDA-FE COM1 AL21 C066T 10nF R016T 100 AV-COM_S
4 5 IF-AGC-DVBT2 R013T 10K L26 IF_AGC PB1P AK22 16V
C067T 10nF R017T 100 AV-SCART-G
M28 RF_AGC PR1P AL22 C068T 10nF
16V
R018T 100 AV-SCART-R
TYPE C098T 100nF
Y1P AM21 16V
C069T 10nF R019T 100 AV-SCART-B
16V
I024T AJ27 LOUTN SOY1 AN21 16V
R020T 100 AV-SCART-BLK
I025T AK27 LOUTP COM0 AM23 C070T 10nF R021T 100 AV-COM_Y
PB0P AL23 C071T 10nF
16V
R022T 100 AV-YPBPR-PB
R119T 2.2K SCL-FE SCL-FE R230T 10 N27 AL24 C072T 10nF R023T 100 AV-YPBPR-PR
+3V3 R120T 2.2K SDA-FE SDA-FE R231T 10
OSCL2 PR0P 16V
C073T 10nF R024T 100 AV-YPBPR-Y
N26 AN23
+3V3 OSDA2 Y0P 16V
C099T 1nF AV-YPBPR-S
SOY0 AK23 16V
I022T 50V
AK26 R124T 75
CVBS3P VDACX_OUT AH24
AV-SCART-CVBS R014T 100 C096T 47nF AM25 CVBS2P VDACY_OUT AJ24
R125T 75

16V AH26 CVBS1P I023T

AV-CVBS_Y R015T 100 C097T 47nF AK25 CVBS0P AVDD33_VIDEO AN25 +3V3-VIDEO
C139T 1uF AJ26

100nF
16V CVBS_COM

1uF
6.3V AVDD12_RGB AN18 +1V2-VIDEO

6.3V
16V
AM26 AVDD33_CVBS

100nF
+3V3-VIDEO

C145T

C140T
AVSS33_VDAC_BG AC19

100nF

16V
AB20 AVSS33_CVBS_1 AVSS12_RGB AK17

16V

C146T
AB22 AVSS33_CVBS_2 AVSS33_VDAC AE20

C144T
U005T
TYPE

AUDIO
AV-YPBPR-LIN R108T 30K AN32 AIN1_L_AADC AR0_ADAC AK30
AUDIO-AR0
AV-YPBPR-RIN R109T 30K AL32 AIN1_R_AADC AL0_ADAC AJ29
AUDIO-AL0
AV-SCART-LIN R110T 30K AM31 AIN2_L_AADC
AV-SCART-RIN R111T 30K AM33 AIN2_R_AADC AR1_ADAC AJ31
AV-DVI-LIN R112T 30K AK33 AIN3_L_AADC AL1_ADAC AK29
AV-DVI-RIN R113T 30K AM32 AIN3_R_AADC
AN33
+3V3-A
AR2_ADAC AJ30

100nF
AIN4_L_AADC I015T

10uF
1uF
AL33 AIN4_R_AADC AL2_ADAC AH28 I016T

6.3V

6.3V
C151T

C137T

AJ32 AVDD33_AADC
+3V3-A
AC24 AVSS33_AADC
C143T
AVDD33_ADAC AJ33
AVSS33_ADAC AC23

100nF
10uF
SPDIFO

1uF
ASPDIF0 AG10

6.3V

6.3V
ASPDIF1 V27
HDMI-ARC
R028T 33 I2S-BICKI STRAP OPTION LED1 LED2 STRAP AUDIO-ENABLE

C134T

C132T

C133T
AN31 VMID_AADC AOBCK AK9
AOLRCK AJ9
R122T 33 I2S-LRCKI

100nF
R271T 33 I2S-MCLK

1uF
AH25 MPXP AOMCLK AF10

6.3V
AOSDATA4 AH9
LED_PWM0 LED_PWM1 OPCTRL3 OPCTRL7

C138T

C152T
AOSDATA3 AK8
AOSDATA2 AJ8 5%
AOSDATA1 AH8
ICE mode + 27M + serial boot 1 0 0 0
AOSDATA0 AJ10
R289T 33 I2S-SDI
ALIN AG9

33pF

33pF

33pF

33pF
ICE mode + 27M + ROM to Nand boot 1 0 0 1

50V

50V

50V

50V
C060T

C102T

C103T

C104T
U005T ICE mode + 27M + ROM to eMMC boot
TYPE from eMMC pins (share pins w/s NAND) 1 0 1 1
GPIO
CA-A00 R268T 22 B30 GPIO0 DEMOD_RST P30 R287T 22 DEMOD-RESETn ICE mode + 27M + ROM to eMMC boot
CA-A01 6 3 R268T 22 A31 N32 TS-CLK from SDIO pins 1 1 0 0
5% GPIO1 DEMOD_TSCLK
CA-A02 R267T 22 5 4 B31 P27 TS-VALID
5% GPIO2 DEMOD_TSVAL
CA-A03 8 1 R267T 22 A32 R29 TS-SYNC
GPIO3 DEMOD_TSSYNC
CA-A04 R264T 5% 22 7 2 C30 R27 TS-DATA0
5% GPIO4 DEMOD_TSDATA0
CA-A05 R267T 22 A33 GPIO5 DEMOD_TSDATA1 T26 TS-DATA1
CA-A06 R267T 22 5 4 B32 T27 TS-DATA2
GPIO6 DEMOD_TSDATA2
CA-A07 6 3 R261T 5% 22 C31 P26 TS-DATA3
GPIO7 DEMOD_TSDATA3
CA-A08 R260T 5% 22 E30 R28 TS-DATA4
GPIO8 DEMOD_TSDATA4
CA-A09 R259T 22 F29 GPIO9 DEMOD_TSDATA5 U27 TS-DATA5
CA-A10 R258T 22 F27 GPIO10 DEMOD_TSDATA6 U26 TS-DATA6
CA-A11 R257T 22 F28 GPIO11 DEMOD_TSDATA7 R26 TS-DATA7
CA-A12 R256T 22 C32 GPIO12
CA-A13 R255T 22 F30 GPIO13 CI_INT L25 R278T 22 CA-REGn
CA-A14 R254T 22 F32 GPIO14 CI_TSCLK N33 R277T 22 CA-CE1n
CA-MICLK R249T 47 D30 K26 R252T 47 CA-MOSTRT
GPIO15 CI_TSDATA0
CA-MIVAL R249T 47 8 1 D32 N30 R282T 22 1 8 CA-WEn
5% GPIO16 CI_TSSYNC 5% 22
CA-MISTRT 6 3 R251T 47 F31 N31 R281T CA-OEn
5% GPIO17 CI_TSVAL
CA-MDI0 R248T 47 8 1 F33
5% GPIO18
CA-MDI1 5 4 R248T 47 E31 M31 R250T 47 CA-MOVAL
5% GPIO19 PVR_TSCLK
CA-MDI2 R248T 47 7 2 E32 M27 R286T 22 4 5 CA-VS1n
5% GPIO20 PVR_TSVAL
CA-MDI3 6 3 R248T 47 D31 L27 R250T 47 CA-MOCLK
5% GPIO21 PVR_TSSYNC
CA-MDI4 R249T 47 8 1 D33 M29 R288T 22 3 6 CA-RDY
5% GPIO22 PVR_TSDATA0
CA-MDI5 5 4 R249T 47 E29 M30 R285T 5% 22 CA-WAITn
5% GPIO23 PVR_TSDATA1
CA-MDI6 R250T 47 7 2 C33 GPIO24
CA-MDI7 7 2 R250T 5% 47 B33
5% GPIO25
CA-D00 R268T 22 8 1 A30 L30 R280T 22 CA-CD2n
5% 22 GPIO26 SPI_CLK1
CA-D01 7 2 R270T E28 L33 R279T 22 CA-CD1n
5% GPIO27 SPI_CLK
CA-D02 R268T 22 C29 GPIO28 SPI_DATA L32 R284T 22 CA-IORDn
CA-D03 8 1 R272T 22 J28 K27 R283T 22 CA-IOWRn
GPIO29 SPI_CLE
CA-D04 R273T 5% 22 H29 GPIO30
CA-D05 R274T 22 J26 GPIO31
CA-D06 R275T 22 G30 GPIO32 OPWM2 AL8 R185T 10 ARC4-EN ARC4-EN R050T 10K
+3V3
CA-D07 R276T 22 G27 GPIO33 OPWM1 AM8 R186T 10 BL-DIMn BL-DIMn R051T 10K
CA-MDO0 R252T 47 E27 GPIO34 OPWM0 AM9 R187T 10 MTK-BL-I-CTRLn MTK-BL-I-CTRLn R052T 10K
CA-MDO1 7 2 R252T 47 D29
5% GPIO35
CA-MDO2 R252T 47 5 4 D28 GPIO36
CA-MDO3 6 3 R253T 5% R291T 10 MTK-AMBI-SPI-MOSI MTK-AMBI-SPI-MOSI
*
R149T 10K

*
47 H28 D27
5% 5 4
GPIO37 SD_D0 +3V3
R237T 10K DIVERSITY DIVERSITY R238T 6.8K
+3V3-STANDBY CA-MDO4 R253T 47 J27 GPIO38 SD_D1 C27 I006T
CA-MDO5 6 3 R253T 5% 47 G29 D26 R292T 10 MTK-AMBI-SPI-CLK MTK-AMBI-SPI-CLK R150T 10K
5%
7 2
GPIO39 SD_D2 +3V3
R235T 10KMTK-3D-GOGGLES MTK-3D-GOGGLES R236T 10K
+3V3 CA-MDO6 R253T 47 G31 GPIO40 SD_D3 C26 I008T
RES CA-MDO7 8 1 R251T 5% 47 G28 A28
5% GPIO41 SD_CMD I014T
5 4 B28 E24
5% GPIO42 SD_CLK I017T
EMMC-RESETn R262T 10K
+3V3-STANDBY K28 GPIO43
RES 3D-ENABLE R118T 10 E25 GPIO44 F072T
R263T 10K EMMC-RESETn EMMC-RESETn R121T 10K
+3V3 EMMC-RESETn R265T 10 D21 GPIO45 LED_PWM1 AF15
R041T 10 LED2 10K R179T LED2 LED2 RES R037T 10K
+3V3-STANDBY
RES SYS-EEPROM-WP R026T 10 G23 GPIO46 LED_PWM0 AG15
R042T 10 LED1 RES 10K R180T LED1 LED1 R036T 10K
+3V3-STANDBY
R115T 10K CA-ENABLE CA-ENABLE R012T 10K RES +3V3 CA-RESET R222T 10 C28 GPIO47 F073T
CA-ENABLE R116T 10 F24 GPIO48
R098T 10K CA-OC CA-OC R080T 10K
+3V3 CA-OC R117T 10 AB8 GPIO49 OPCTRL11 AL16 R203T 10 BE-RESETn R219T 10K BE-RESETn BE-RESETn RES R207T 10K
+3V3-STANDBY
ARC1-EN R223T 10 AA7 GPIO50 OPCTRL10 AM16 R204T 10 BE-ENABLE R213T 10K BE-ENABLE BE-ENABLE RES R206T 10K
+3V3-STANDBY
RES AV-YPBPR-DETECTn R136T 10 AD6 GPIO51 OPCTRL9 AE17 R043T 10 MTK-LCD-PWR-ON R212T 10K MTK-LCD-PWR-ON MTK-LCD-PWR-ON RES R035T 10K
+3V3-STANDBY
MTK-3D-LR R228T 10 AC8 GPIO52 OPCTRL8 AG19 R188T 10 AUDIO-RESETn R211T 10K AUDIO-RESETn AUDIO-RESETn RES R205T 10K
+3V3-STANDBY
ARC2-EN R224T 10 AC7 GPIO53 OPCTRL7 AH17 R178T 10 AUDIO-ENABLE RES R181T 10K AUDIO-ENABLE AUDIO-ENABLE R053T 10K
+3V3-STANDBY
ARC3-EN R225T 10 AB6 GPIO54 OPCTRL6 AE19 R220T 10 OPCTRL6 R210T 10K OPCTRL6 OPCTRL6 F074T RES R208T 10K
+3V3-STANDBY
MTK-3D-GOGGLES R226T 10 AC6 GPIO55 OPCTRL5 AH19 R221T 10 DETECT12V RES R214T 10K DETECT12V DETECT12V RES R209T 10K
+3V3-STANDBY
OPCTRL4 AK16 R044T 10 SPLASH-ON R215T 10K SPLASH-ON SPLASH-ON RES R034T 10K
+3V3-STANDBY
R029T 4.7K AJ23 ADIN0_SRV OPCTRL3 AG17 R183T 10 OPCTRL3 RES R182T 10K OPCTRL3 OPCTRL3 R184T 10K
+3V3-STANDBY
AV-SCART-STATUS R227T 10 AH23 ADIN1_SRV OPCTRL2 AJ17 R045T 10 RF4CE-RESETn RES R216T 10K RF4CE-RESETn RF4CE-RESETn F075T R032T 10K
+3V3-STANDBY
+3V3-STANDBY
R048T 100K KEYBOARD KEYBOARD R038T 10 AE28 ADIN2_SRV OPCTRL1 AF19 R046T 10 WOLAN-ENABLE RES R217T 10K WOLAN-ENABLE WOLAN-ENABLE R033T 10K
+3V3-STANDBY
R049T 100K POWER-OK POWER-OK R039T 10 AD28 ADIN3_SRV OPCTRL0 AJ19 R047T 10 WOLAN-IRQn RES R218T 10K WOLAN-IRQn WOLAN-IRQn R031T 10K
+3V3-STANDBY
+3V3 DIVERSITY R027T 10 AF22 ADIN4_SRV
R269T 100K LNB-SENSE LNB-SENSE R266T 10 AK21 ADIN5_SRV
+3V3 RES R290T 4.7K AG24 ADIN6_SRV
R030T 10K AMBI-TEMP AMBI-TEMP R040T 10 AM18 ADIN7_SRV
+3V3 RES
100nF

100nF
16V

16V
C188T

C189T

1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_086_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 45

10-1-6 B, HDMI

HDMI
B B

U005T
TYPE
HDMI-CEC V26 HDMI_CEC HDMI HDMI_0_RX_0 AG30 RX0-0+
HDMI_0_RX_0B AG31 RX0-0-
HDMI0-SCL AC27 HDMI_0_SCL HDMI_0_RX_1 AF30 RX0-1+
HDMI1-SCL AB27 HDMI_1_SCL HDMI_0_RX_1B AF31 RX0-1-
HDMI2-SCL AA26 HDMI_2_SCL HDMI_0_RX_2 AE32 RX0-2+
HDMI3-SCL W27 HDMI_3_SCL HDMI_0_RX_2B AE33 RX0-2-
HDMI_0_RX_C AG32 RX0-C+
HDMI0-SDA AC26 HDMI_0_SDA HDMI_0_RX_CB AG33 RX0-C-
HDMI1-SDA AB26 HDMI_1_SDA
HDMI2-SDA Y26 HDMI_2_SDA HDMI_1_RX_0 AD30 RX1-0+
HDMI3-SDA W26 HDMI_3_SDA HDMI_1_RX_0B AD31 RX1-0-
HDMI_1_RX_1 AC32 RX1-1+
HDMIA-5V AE29 HDMI_0_PWR5V HDMI_1_RX_1B AC33 RX1-1-
HDMIB-5V Y27 HDMI_1_PWR5V HDMI_1_RX_2 AC30 RX1-2+
HDMIC-5V AA28 HDMI_2_PWR5V HDMI_1_RX_2B AC31 RX1-2-
HDMID-5V V28 HDMI_3_PWR5V HDMI_1_RX_C AE30 RX1-C+
HDMI_1_RX_CB AE31 RX1-C-
HPD0 AD29 HDMI_0_HPD
HPD1 AA27 HDMI_1_HPD HDMI_2_RX_0 Y30
RX2-0+
HPD2 AA29 HDMI_2_HPD HDMI_2_RX_0B Y31
RX2-0-
HPD3 V29 HDMI_3_HPD HDMI_2_RX_1 W32
RX2-1+
HDMI_2_RX_1B W33
RX2-1-
+1V2-A AA33 AVDD12_HDMI_0_RX HDMI_2_RX_2 W30
RX2-2+
AA32 AVDD12_HDMI_1_RX HDMI_2_RX_2B W31
RX2-2-
+1V2-A P33 AVDD12_HDMI_2_RX HDMI_2_RX_C AA30
RX2-C+
P32 AVDD12_HDMI_3_RX HDMI_2_RX_CB AA31
RX2-C-
100nF

100nF

F034T
AH33 AVDD33_HDMI HDMI_3_RX_0 U30 RX3-0+
U31 RX3-0-

100nF
HDMI_3_RX_0B
RX3-1+
C063T

C062T

T25 AVSS33_HDMI_RX_1 HDMI_3_RX_1 T32

W25 AVSS33_HDMI_RX_2 HDMI_3_RX_1B T33 RX3-1-
C061T
AD27 AVSS33_HDMI_RX_3 HDMI_3_RX_2 T30 RX3-2+
AE27 AVSS33_HDMI_RX_4 HDMI_3_RX_2B T31 RX3-2-
HDMI_3_RX_C V30 RX3-C+
HDMI_3_RX_CB V31 RX3-C-

S015T
RES 50m
+3V3-A
2

3
100nF

16V

U006T
RES
C179T

AO3414

I018T
R293T

10K

+5V
1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

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14-03-26

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div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 46

10-1-7 B, LVDS

LVDS
B B

U005T
TYPE

LVDS BE0P Y1 TX-BE0P

BE0N Y2 TX-BE0N
BE1P W3 TX-BE1P
BE1N W4 TX-BE1N
BE2P V3 TX-BE2P
BE2N V4 TX-BE2N
BECKP V1 TX-BECLKP
F057T BECKN V2 TX-BECLKN
BE3P U3 TX-BE3P
BE3N U4 TX-BE3N
R190T 10 AA8 TCON0 BE4P T3 TX-BE4P
CTRL-DISP1 R191T 10 AA9 TCON1 BE4N T4 TX-BE4N
CTRL-DISP2 R192T 10 W6 TCON2
CTRL-DISP3 R193T 10 U6 TCON3 BO0P AD1 TX-BO0P
CTRL-DISP4 R194T 10 U7 TCON4 BO0N AD2 TX-BO0N
I027T R195T 10 V8 TCON5 BO1P AC3 TX-BO1P
EDID-WEn I028T R196T 10 V6 TCON6 BO1N AC4 TX-BO1N
I029T R197T 10 AB7 TCON7 BO2P AB3 TX-BO2P
HDCP-RESETnI030T R198T 10 W9 TCON8 BO2N AB4 TX-BO2N
I031T R199T 10 U8 TCON9 BOCKP AB1 TX-BOCLKP
HDCP-IRQn I032T R200T 10 U9 TCON10 BOCKN AB2 TX-BOCLKN
I033T R201T 10 V9 TCON11 BO3P AA3 TX-BO3P
I034T R202T 10 V7 TCON12 BO3N AA4 TX-BO3N
BO4P Y3 TX-BO4P
BO4N Y4 TX-BO4N
+1V2-A
AN1 AH1 TX-AE0P
100nF

100nF

AVDD12_LVDS_1 AE0P
TX-AE0N
1uF

AN2 AVDD12_LVDS_2 AE0N AH2

AN3 AVDD12_LVDS_3 AE1P AG3 TX-AE1P
TX-AE1N
C142T

C155T

C154T

AN4 AVDD33_LVDS AE1N AG4

AE2P AF3 TX-AE2P
AM4 AVSS12_LVDS_1 AE2N AF4 TX-AE2N
AM3 AVSS12_LVDS_2 AECKP AF1 TX-AECLKP
AF5 AVSS12_LVDS_3 AECKN AF2 TX-AECLKN
+3V3-A AE3P AE3 TX-AE3P
V5 AE4 TX-AE3N
100nF

AVSS33_LVDS_1 AE3N
TX-AE4P
1uF

AC5 AVSS33_LVDS_2 AE4P AD3

AE5 AVSS33_LVDS_3 AE4N AD4 TX-AE4N
TO NT72314
C141T

C153T

I019T T1 REXT_VPLL AO0P AM1 TX-AO0P

TX-AO0N
24K

AO0N AM2
AO1P AL3 TX-AO1P
AO1N AL4 TX-AO1N
AO2P AK3 TX-AO2P
TX-AO2N
R123T

AO2N AK4
AOCKP AK1 TX-AOCLKP
AOCKN AK2 TX-AOCLKN
AO3P AJ3 TX-AO3P
AO3N AJ4 TX-AO3N
AO4P AH3 TX-AO4P
AO4N AH4 TX-AO4N

1 2014-02-14

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715RLPCB000000037
7800

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2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 47

10-1-8 B, MTK POWER

MTK POWER
B U005T
B
TYPE
C13 DVSS_1 DVSS DVSS_64 K25
D6 L24 GND
GND DVSS_2 DVSS_65
D16 DVSS_3 DVSS_66 M18
L3 DVSS_4 DVSS_67 M19
M13 DVSS_5 DVSS_68 M20
M14 DVSS_6 DVSS_69 M21
M15 DVSS_7 DVSS_70 M22
M16 DVSS_8 DVSS_71 N18
M17 N19 +1V2-MTK U005T +1V2-MTK
DVSS_9 DVSS_72
N13 N20 TYPE
DVSS_10 DVSS_73
N14 DVSS_11 DVSS_74 N21 VCCK
N15 DVSS_12 DVSS_75 N22 L11 VCCK_1 VCCK_40 AE8
N16 DVSS_13 DVSS_76 P18 L12 VCCK_2 VCCK_41 AE9
N17 P19 L13 VCCK_42 AE10

100nF

100nF

100nF
DVSS_14 DVSS_77 VCCK_3

10uF

10uF

10uF

10uF

10uF
220uF 2.5V
P13 DVSS_15 DVSS_78 P20 L14 VCCK_4 VCCK_43 AF6

C128T
P14 DVSS_16 DVSS_79 P21 L15 VCCK_5 VCCK_44 AF7

C126T

C127T

C120T

C121T

C122T

C190T

C191T

C192T
P15 DVSS_17 DVSS_80 P22 L16 VCCK_6 VCCK_45 AF8
P16 R18 L17 VCCK_46 AF9

RES
DVSS_18 DVSS_81 VCCK_7
P17 DVSS_19 DVSS_82 R19 M11 VCCK_8 VCCK_47 AG5
R13 DVSS_20 DVSS_83 R20 M12 VCCK_9 VCCK_48 AG6
R14 DVSS_21 DVSS_84 R21 N11 VCCK_10 VCCK_49 AG7
R15 DVSS_22 DVSS_85 R22 N12 VCCK_11 VCCK_50 AG8
R16 DVSS_23 DVSS_86 T18 P11 VCCK_12 VCCK_51 AH5
R17 DVSS_24 DVSS_87 T19 P12 VCCK_13 VCCK_52 AH6
T13 DVSS_25 DVSS_88 T20 R11 VCCK_14 VCCK_53 AH7
T14 DVSS_26 DVSS_89 T21 R12 VCCK_15 VCCK_54 AJ5
T15 DVSS_27 DVSS_90 T22 T11 VCCK_16 VCCK_55 AJ6
CHIP BOTTOM
T16 DVSS_28 DVSS_91 U18 T12 VCCK_17 VCCK_56 AJ7
X006T SENSE+1V2-MTK
T17 DVSS_29 DVSS_92 U19 U11 VCCK_18 VCCK_57 AK5
U13 U20 U12 VCCK_58 AK6

100nF

100nF

100nF
DVSS_30 DVSS_93 VCCK_19

10uF
U14 DVSS_31 DVSS_94 U21 V11 VCCK_20 VCCK_59 AK7
U15 DVSS_32 DVSS_95 U22 V12 VCCK_21 VCCK_60 AL5

C117T

C118T

C119T

C125T
U16 DVSS_33 DVSS_96 V18 W11 VCCK_22 VCCK_61 AL6
U17 DVSS_34 DVSS_97 V19 W12 VCCK_23 VCCK_62 AL7
V13 DVSS_35 DVSS_98 V20 Y11 VCCK_24 VCCK_63 AM5
V14 DVSS_36 DVSS_99 V21 Y12 VCCK_25 VCCK_64 AM6
V15 DVSS_37 DVSS_100 V22 AA11 VCCK_26 VCCK_65 AM7
V16 DVSS_38 DVSS_101 V24 AA12 VCCK_27 VCCK_66 AN5
V17 DVSS_39 DVSS_102 W18 AB11 VCCK_28 VCCK_68 AN7
W13 DVSS_40 DVSS_103 W19 AB12 VCCK_29 VCCK_69 L18
W14 DVSS_41 DVSS_104 W20 AC10 VCCK_30 VCCK_70 L19
W15 DVSS_42 DVSS_105 W21 AC11 VCCK_31 VCCK_71 R23
W16 AC12
+3V3
DVSS_43 DVSS_106 W22 VCCK_32 VCCK_72 V23
W17 DVSS_44 DVSS_107 W23 AD8 VCCK_33 VCCK_67 AN6
Y13 DVSS_45 DVSS_108 Y18 AD10 VCCK_34
Y14 Y19 AD11 T9
DVSS_46 DVSS_109 VCCK_35 VCC3IO_C +3V3
Y15 DVSS_47 DVSS_110 Y20 AD13 VCCK_36 VCC3IO_B_1 Y10
Y16 Y21 AD14 VCC3IO_B_2 AA10

100nF

100nF
DVSS_48 DVSS_111 VCCK_37 +3V3

10uF

10uF
Y17 DVSS_49 DVSS_112 Y22 AD17 VCCK_38 VCC3IO_A_1 D22
AA13 Y23 AE7 VCC3IO_A_2 E22
DVSS_50 DVSS_113 VCCK_39 +3V3

C123T

C115T

C116T

C124T
AA14 AA18

RES
DVSS_51 DVSS_114
AA15 DVSS_52 DVSS_115 AA19
AA16 DVSS_53 DVSS_116 AA20
AA17 DVSS_54 DVSS_117 AA21
AB13 DVSS_55 DVSS_118 AA22
AB14 DVSS_56 DVSS_119 AA23
AB15 DVSS_57 DVSS_120 AB18
AB16 DVSS_58 DVSS_121 AB19
AB17 DVSS_59 DVSS_122 AB21
AC13 DVSS_60 DVSS_123 AB23
AC14 DVSS_61 DVSS_124 AC18
AC17 DVSS_62 DVSS_125 AC20
K24 DVSS_63 DVSS_126 AC22
DVSS_127 AD20
1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_089_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 48

10-1-9 B, USB

USB
B B

X030
1
U005T 2
TYPE 3
USB 4
USB-DP-P0
USB-DM-P0
H32
H33
USB_DP_P0 X003T ! I041T 5
6
USB_DM_P0 +12V 2A 63V
T 7
+3V3-STANDBY
USB-DP-P1 J32 USB_DP_P1 8
USB-DM-P1 J31 10 9

100nF

100nF
USB_DM_P1

16V

16V
USB-DP-P2 K32 USB_DP_P2
TYPE
USB-DM-P2 K31 USB_DM_P2
100nF C180T

C183T

C184T
16V
USB-WIFI-DP AN10 USB_DP_P3
USB-WIFI-DM AM10 USB_DM_P3 X029
F048T 1
+5V
K33 USB-DM-P1 F049T 2
+3V3-A AVDD33_USB_P0P1P2
AN8 AVDD33_USB_P3
USB-DP-P1 F050T 3
LED2 R140T 10 F052T 4
100nF

100nF
1uF

M25 AVSS33_USB_P1 5
6.3V

RES
16V

16V

AE11 AVSS33_USB_P3 F051T 7 6

S016T
50m
C129T

C130T
C131T

TYPE

RES
R141T
+5V X280
+T 750mA
6V F038T 1
DT-USB-SWITCHED-DM2 F047T 2
DT-USB-SWITCHED-DP2 F046T 3
4

100nF
5 6 F052C

16V
C181T
R142T
+5V X281
+T 750mA
6V F041T 1
DT-USB-SWITCHED-DM1 F043T 2
DT-USB-SWITCHED-DP1 F044T 3
4

100nF
5 6

16V
F042T

C182T
R143T
+5V X282
+T 750mA
6V F053T 1
DT-USB-SWITCHED-DM3 F055T 2
DT-USB-SWITCHED-DP3 F056T 3
4

100nF
5 6

16V
F054T

C185T
1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

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14-03-26

2014-Apr-17 back to
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 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 49

10-1-10 B, SENSOR BOARD CONNECTION

SENSOR BOARD CONNECTION

B B

TYPE
RES X026
41 F023T
X025
13 12 42 40 F024T R126T 10 SDA-SRF
1
11 39
2
10 38 F025T R127T 10 SCL-SRF
3
9 37 I013T R135T
4 +5V
8 36 F026T 750mA R132T 10 RC RC R229T 10K
5 +T +3V3-STANDBY
7 35
6 +3V3-STANDBY
6 34 F027T R133T 10 KEYBOARD
7
5 33 F071T R134T 100 LED2
8
4 32 F028T R130T 100 LED1
9
3 31 F029T R131T 1K 3D-GOGGLES
10
2 30 RES S010T
11 AMBI-POWER
1 29 I020T S025T
12 +3V3
X020 28 F030T R128T 47 AMBI-SPI-MOSI
13
RES 27
14
15
26 GND-AL F033T R129T 47 AMBI-SPI-CLK
25
16
17
24 GND-AL F007T R139T 100
23 AMBI-TEMP
18

100pF

100pF

100pF

100pF

100pF

100pF

100pF
GND-AL

10pF

10pF

10pF
22

1uF

1uF

1uF

1uF
19 AMBI-POWER
21

50V

50V
20
21 20

C167T

C166T

C174T

C173T

C156T

C158T

C157T

C159T

C162T

C160T

C161T

C136T

C147T

C148T
22 19

RES
23 18
24 17
25 16 GND-AL
15 +3V3-STANDBY
26
14
28 27 AMBI-POWER
13
100nF

F039T
10uF
TYPE 12
11

16V
10
C135T

C164T

9
RES

RES

8
7
6

2.7K
5 C163T 100nF
4 GND-AL GND-AL +3V3
RES

10uF
3

RES
2 GND-AL

6.3V
1 GND-AL

C165T

R146T
2
GND-AL RES RES I007T
BC857BW(COL) I040T R156T 3.3K
U010T 1
2 RES
3
BC857BW(COL) I042T R155T 1K RC

1uF
U011T 1

RES

10V
RES

C187T
3 I005T 3
I039T

U009T I021T
1 R147T 100
BC847BW(COL) R148T 100K
RES RES
2

C186T
RES

10K
10V
1uF

RES
R145T
1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_091_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 50

10-1-11 B, DVB CHANNEL DECODER 1

DVB CHANNEL DECODER 1

B +3V3-DVBT2-D
B
+1V1-DVBT2 +3V3-DVBT2-A

100nF

100nF

100nF

100nF

100nF

100nF

100nF
22uF

22uF

16V

16V
16V
1uF

16V

16V

16V
16V
6.3V

6.3V

6.3V
C023F

C013F

C066F

C007F

C006F

C005F

C004F

C003F

C002F

C001F
R020F 47 DVBS-QP
5%

10
22
28
44

7
19
42

32
U001F
CXD2834ER C030F 22pF

CVDD1
CVDD2
CVDD3
CVDD4

DVDD1
DVDD2
DVDD3

PVDD
50V
LNB-ENABLE S020F 1 GPIO0
LNB-VH S013F 50m 47 GPIO1
LNB-LINEDROP S015F 50m 2 GPIO2
50m C046F 2.2nF
I014F
S003F 24
50V TESTMODE DB003F
R019F
50m
TSVALID 4 R016F 47 TS-VALID
DVBS-AGC 10K I058F 25 SLVADR0 R005F
C026F 10pF
DB004F
5% TSCLK 5 RES 50V TS-CLK
L001F I009F
DEMOD-RESETn R046F 22 S002F 26 OSCEN_X 47 DB005F
50m 3 R072F 47 TS-SYNC

220pF
+3V3-DVBT +3V3-DVBT2-X TSSYNC

12pF

12pF
30H R045F 29 RST_X
I060F I2C R032F 47 TS-DATA0
1uF

50V

50V

50V
8
+3V3 TSDATA0

C037F
4 5 5%
6.3V

S014F address 47 R032F TS-DATA1

C028F
30 9

C027F
10K SLVADR3 TSDATA1
50m = R032F 47 3 6 5% TS-DATA2
C022F

X001F TSDATA2 12
1 3 35 0XD8 13 2 7 5% 47 R032F TS-DATA3
XTALI TSDATA3
1 8 5%
DB002F
14 R010F 47 TS-DATA4

2
4
TSDATA4
15 4 5 5% 47 R010F TS-DATA5
R014F DB001F TSDATA5
1K 34 16 R010F 47 3 6 5% TS-DATA6
L005F I008F XTALO TSDATA6
C014F 22pF 17 2 7 5% 47 R010F TS-DATA7
+3V3-DVBT +3V3-DVBT2-A R091F R008F TSDATA7
1 8 5%
30H
IF-N-DVBT2 F001F 47 C009F 10nF 50V 47 37 TAINM R006F
IF-P-DVBT2 F002F 47 C010F 10nF 16V SCL-FE
1uF

38 TAINP SCL 20
6.3V

R092F 16V
C015F 22pF
R009F 47 SDA 21 47 R007F F009F SDA-FE
50V 47 F010F
C025F

41 RFAIN
C011F 10nF 33
R001F NC1 +3V3-DVBT2-X
IF-AGC-DVBT2 F005F 16V 48 40 S004F SDA-TUNER

100nF
TIFAGC NC2
10K 50m
R017F
3,3K

16V
45
+3V3-DVBT2-D TTUSDA
S005F SCL-TUNER

C008F
L004F I007F 46 TTUSCL
50m
+3V3-DVBT +3V3-DVBT2-D R018F 3,3K

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
30H
SDA-TUNER F006F

HS
SCL-TUNER F007F
1uF

6.3V

11
18
23
27
31
36
39
43

49
C024F

6
I013F I012F
22KHz S006F
C031F 22pF 50m
DVBS-IP R021F 47 50V
5%

S001F
50m
F032F
4

U002F

VDD
I002F
3 6
+1V5-MTK VIN VOUT +1V1-DVBT2 U003F
10uF

22uF

R025F 1
1nF

2 7
+5V EN ADJ
6.3V

6.3V

50V

5% I001F L002F I005F OUT_1 2 F004F

1uF

82K
C041F

C034F

C032F

1 3 4
PGOOD +5V IN OUT_2 +3V3-DVBT
6.3V

100nF
I003F 30H
1%

GND
GND_HS
C044F

22uF 16V
NC

C047F
16V
GND

22K

RES
R029F

C035F

1
5%
R022F
8

F003F
R028F 82K SENSE+1V1 SENSE+1V1 X003F
+1V1-DVBT2
220K
680K

I004F 1%
5%

1%
RES
R027F

R026F

1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_092_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 51

10-1-12 B, DVB DUAL TUNER

DVB DUAL TUNER

B B

C017F 10pF
L007F
+3V3-DVBT SDA-TUNER R002F 47 50V
30H C018F 10pF
L008F
SCL-TUNER R003F 47 50V
30H L011F
IF-N-DVBT2
1KH

22uF 16V
L012F
L006F

C029F
IF-P-DVBT2
30H 1KH

10pF

10pF
50V

50V
F050F

C019F

C020F
+3V3-TUNER
100nF
10pF

F039F
R004F
IF-AGC-DVBT2
50V

16V

22K
C016F

C012F

1K

10pF
50V
R015F

C021F
U012F

F023F F036F
F022F 1 3
+3V3-DT VIN1 VOUT1 +2V5-TUNER F037F
47K

22K

F035F
10uF

10uF

2 VIN2 VOUT2 4
F038F
R097F

R095F

F040F
C043F

C049F

NC 7
DVBS-IP C038F 100nF I2C
8 5 16V X292 address
EN BP|ADJ F031F F034F
10nF

SUT-PEX31ZX =
GND GND_HS F041F S012F 0XC0
16V

1 ANT_5V/GND
DVBS-QP C039F 100nF 50m
C050F

2
16V
+3V3-TUNER VCC
3
6

SDA
4 SCL
F030F F011F 5 IF_N
470K

DVBS-AGC
33K

6
F024F IF_P SUT-PE231ZN
7 AGC_T SUT-PE531Z
1%

8 IOUT

10pF

10pF

10pF
COMMON

50V

50V

50V
9 QOUT
R099F

R096F

10 AGC_S

C051F

C052F

C054F
11 LNB_IN
12 RES_1
13 RES_2
14
F043F
+1V8-TUNER VCC_2

15 SDA_2
16 SCL_2
C033F 1nF 17 IF_N_2
F042F 18
50V IF_P_2
X002F TUNER-LNB TUNER-LNB 19
+V-LNB AGC_T_2
SUT-PE531Z only
20
F044F +2V5-TUNER 2.5V
21 IOUT_2
U011F C048F 10pF 22
L013F QOUT_2
DT-SDA-TUNER R023F 47 50V 23 AGC_S_2
30H C053F 10pF 24
L020F LNB_IN_2
L023F I059F OUT_1 2 F025F
DT-SCL-TUNER R024F 47 50V
+3V3-DT 3 4
+1V8-TUNER 30H

MT_17
MT_16
MT_15
MT_14
MT_13
MT_12
MT_11
MT_10
IN OUT_2

MT_9
MT_8
MT_7
MT_6
MT_5
MT_4
MT_3
MT_2
MT_1
F045F
100nF

30H L024F
GND DT-IF-N-DVBT2
22uF 16V
C055F

1KH F046F
16V

L025F

25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
DT-IF-P-DVBT2
C042F

1KH

10pF

10pF
50V

50V
F052F

C082F

C101F
F047F
R030F
DT-IF-AGC-DVBT2

22K
1K

10pF
50V
R031F

C110F
F048F
DT-DVBS-IP C036F 100nF
16V

F049F
DT-DVBS-QP C045F 100nF
16V

F029F
DT-DVBS-AGC
10pF

10pF

10pF
50V

50V

50V
C120F

C121F

C122F

C123F 1nF
F051F
50V
X008F DT-TUNER-LNB DT-TUNER-LNB
+V-LNB-DT

1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_093_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 52

10-1-13 B, LNB SUPPLY 1

LNB SUPPLY 1
B B

L010F

1uH

L016F L009F I024F D001F I016F L003F I027F

I025F
+12V 22uH

100nF
30H B230LA-M3 30H

10uF

10uF

10uF

10uF

10uF

10uF

10uF

10uF
RES

16V

16V

16V

16V

25V

25V

25V

25V

25V
C040F

C056F

C057F

C059F

C067F

C068F

C069F

C070F

C061F
RES
GND-LNB

I006F R034F I017F

10K
3

39K
I018F
U004F 1

3
BC847BW(COL)

R042F
U005F
MP8126

1%
VDD
I030F 2
I028F
C063F

33K
2 BYPASS SW 15

10K
50V 220nF

R047F

1%
R035F 4.7K C060F 47nF 11
GND-LNB ILIMIT
GND-LNB 16V
I026F
C064F 470pF

R048F
4 COMP VBOOST 13
50V
I043F
GND-LNB GND-LNB GND-LNB
+3V3
R011F 10K LNB-ENABLE LNB-ENABLE 5 EN I019F

D003F
C058F 100nF

S1D
BST 14
F016F
R013F 10K LNB-LINEDROP LNB-LINEDROP 6 LINEDROP 16V
RES R036F I022F F012F
+12V 7 12
POK VOUT +V-LNB

33K
100nF
F026F 100K

32V
BAT54 COL
R033F 10K LNB-VH LNB-VH 8 13V/18V

D002F

D004F
50V
R041F I021F I020F
22KHz C062F 22nF

C065F
9 EXTM TCAP 10

SM15T

R044F
SGND

PGND

33 16V
HS

GND-LNB
100K

100K

100K

100K

I029F
16

17

LNB-SENSE
1
R040F

R039F

R038F

R037F

2.4V
10K

10K
RES

RES

RES

D005F
GND-LNB

R012F

R043F
GND-LNB GND-LNB GND-LNB X004F

GND-LNB

GND-LNB

1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_094_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 53

10-1-14 B, LNB SUPPLY 2

LNB SUPPLY 2
B B

L022F

1uH

L014F L021F I032F D006F I031F L015F I034F

I033F
+12V 22uH

100nF
30H B230LA-M3 30H

10uF

10uF

10uF

10uF

10uF

10uF

10uF

10uF
RES

16V

16V

16V

16V

25V

25V

25V

25V

25V
C071F

C089F

C090F

C091F

C116F

C117F

C118F

C119F

C111F
RES
GND-LNB-DT

I036F R054F I037F

10K
3

39K
I038F
U006F 1

3
BC847BW(COL)

R087F
U010F
MP8126

1%
VDD
I046F 2
I045F
C113F

33K
2 BYPASS SW 15

10K
50V 220nF

R088F

1%
R058F 4.7K C098F 47nF 11
16V
GND-LNB-DT ILIMIT
I044F
GND-LNB-DT C114F 470pF

R089F
4 COMP VBOOST 13
50V
I051F
GND-LNB-DT GND-LNB-DT
+3V3-DT
R051F 10K DT-LNB-ENABLE DT-LNB-ENABLE 5 EN I039F GND-LNB-DT

D010F
C072F 100nF

S1D
BST 14
F028F
R052F 10K DT-LNB-LINEDROP DT-LNB-LINEDROP 6 LINEDROP 16V
RES R059F I042F F008F
+12V 7 12
POK VOUT +V-LNB-DT

33K
100nF
F027F 100K

32V
BAT54 COL
R053F 10K DT-LNB-VH DT-LNB-VH 8 13V/18V

D009F

D007F
50V
R074F I041F I040F
DT-22KHz C112F 22nF

C115F
9 EXTM TCAP 10

SM15T

R086F
SGND

PGND

33 16V
HS
100K

100K

100K

100K

I035F
16

17

GND-LNB-DT DT-LNB-SENSE
1
R063F

R062F

R061F

R060F

2.4V
10K

10K
RES

RES

RES

D008F
GND-LNB-DT

R049F

R050F
GND-LNB-DT
GND-LNB-DT GND-LNB-DT X005F

GND-LNB-DT

GND-LNB-DT

1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_095_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 54

10-1-15 B, DVB CHANNEL DECODER 2

DVB CHANNEL DECODER 2

B B
+3V3-DVBT2-D-DT

+1V1-DVBT2-DT +3V3-DVBT2-A-DT

100nF

100nF

100nF

100nF

100nF

100nF

100nF
22uF

22uF

16V

16V
16V
1uF

16V

16V

16V
16V
6.3V

6.3V

6.3V
C085F

C104F

C105F

C079F

C078F

C077F

C076F

C075F

C074F

C073F
R069F 47 DT-DVBS-QP
5%

10
22
28
44

7
19
42

32
U007F
CXD2834ER C106F 22pF

CVDD1
CVDD2
CVDD3
CVDD4

DVDD1
DVDD2
DVDD3

PVDD
50V
DT-LNB-ENABLE S023F 1 GPIO0
DT-LNB-VH S024F 50m 47 GPIO1
DT-LNB-LINEDROP S025F 50m 2 GPIO2
50m C102F 2.2nF
I057F
S017F 24
50V TESTMODE DB008F
R056F
50m
TSVALID 4 R073F 47 DT-TS-VALID
DT-DVBS-AGC 10K I061F 25 SLVADR0 R064F
C094F 10pF
DB009F
5% TSCLK 5 RES 50V DT-TS-CLK
L017F I054F
DT-DEMOD-RESETn R075F 22 S016F 26 OSCEN_X 47 DB010F
50m 3 R076F 47 DT-TS-SYNC

220pF
+3V3-DVBT +3V3-DVBT2-X-DT TSSYNC

12pF

12pF
30H R057F 29 RST_X
I062F I2C R077F 47 DT-TS-DATA0
1uF

50V

50V

50V
8
+3V3-DT TSDATA0

C099F
4 5
6.3V

S022F address R077F 47 DT-TS-DATA1

C109F
30 9

C108F
10K SLVADR3 TSDATA1 5% 47 3
50m = R077F 6 DT-TS-DATA2
C088F

X007F TSDATA2 12
2 7 5% 47
1 3 35 XTALI
0XD8 TSDATA3 13 R077F DT-TS-DATA3
5% 1 8
DB007F 5%
14 R090F 47 DT-TS-DATA4

2
4
TSDATA4
15 4 5
R090F 47 DT-TS-DATA5
R071F DB006F TSDATA5 5% 47 3
1K 34 16 R090F 6 DT-TS-DATA6
L019F I053F XTALO TSDATA6 5% 47
C092F 22pF 17 2 7
R090F DT-TS-DATA7
+3V3-DVBT +3V3-DVBT2-A-DT R093F R067F TSDATA7 5% 1 8
30H
DT-IF-N-DVBT2 F013F 47 C096F 10nF 50V 47 37 TAINM R065F 5%
DT-IF-P-DVBT2 47 C097F 10nF 16V DT-SCL-FE
1uF

38 TAINP SCL 20
6.3V

F014F
R094F 16V
C093F 22pF
R068F 47 SDA 21 47 R066F F020F DT-SDA-FE
50V 47 F021F
C087F

41 RFAIN
C081F 10nF 33
R055F NC1 +3V3-DVBT2-X-DT
DT-IF-AGC-DVBT2 F017F 16V 48 40

100nF
TIFAGC NC2
10K
R079F
3,3K

16V
45
+3V3-DVBT2-D-DT TTUSDA

C080F
L018F I052F 46 TTUSCL
+3V3-DVBT +3V3-DVBT2-D-DT R080F 3,3K

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
30H
DT-SDA-TUNER F018F

HS
DT-SCL-TUNER F019F
1uF

6.3V

11
18
23
27
31
36
39
43

49
C086F

6
I056F I055F
DT-22KHz S021F
C107F 22pF 50m
DT-DVBS-IP R070F 47 50V
5%

S011F
50m
F033F
4

U008F

VDD
I048F
3 6
+1V5-MTK-DT VIN VOUT +1V1-DVBT2-DT
10uF

22uF

R081F 1
1nF

2 7
+5V EN ADJ
6.3V

6.3V

50V

5% I047F
1uF

82K
C083F

C103F

C095F

PGOOD 1
6.3V

I049F
1%
GND_HS
C084F

NC 5
GND

22K

RES
R085F
5%
R078F
8

F015F
R084F 82K SENSE+1V1-DT SENSE+1V1-DT X006F
+1V1-DVBT2-DT
220K
680K

I050F 1%
5%

1%
RES
R083F

R082F

1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_096_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 55

10-1-16 B, POWER CONNECTOR

POWER CONNECTOR
B +3V5-STANDBY
B

10uF
330uF 6.3V
C020U
4 S001U 5 RES

C007U
RES

RES
2 S001U 7
F001U
+12V-AL
3 S001U 6 RES

100nF
1uF
1 S001U 8 RES

C011U

C001U
U003U
F002U
RT9193
F004U
F003U 1 5
X090
VIN VOUT +3V3-STANDBY
X090
GND-AL GND-AL I001U
PIN 1 GND-AL 1 3 INH BYP 4 +3V3-STANDBY
PIN 2 +12V-AL 2
GND-AL
F009U

22nF
F010U GND

1uF

1uF
PIN 3 +12V 3
+12V

6.3V

6.3V
PIN 4 +12V 4
F013U

100nF
2

10K
1uF

C013U

C019U

C014U
PIN 5 +12V-Audio 5

2
+12V-AUDIO

C012U

C002U
PIN 6 +12V-Audio 6
F026U
PIN 7 GND 7 PDTA114EU
PIN 8 GND 8 U016U 1
F014U F012U
RES

R066U
PIN 9 GND-AUDIO 9
F011U
PIN 10 GND-AUDIO 10 3
I050U
PIN 11 PWR-ON-STBY 11 F015U R034U 100 I047U PWR-ON S003U
PIN 12 PWM-2 12 F016U R053U 100 BL-DIM2 50m
R054U 100 BL-DIM1

10K
PIN 13 BL-BRI-ADJ 13 F017U
PIN 14 BL-ON-OFF 14 F018U R055U 100 BL-ON

RES
PIN 15 +3V5-SB 15
PIN 16 BL-I-CTRL 16 F019U R056U 100 BL-I-CTRL

R063U
PIN 17 +12V 17
PIN 18 +12V 18 I048U
PIN 19 GND-AL 19 +12V I049U R064U 220K POWER-OK
PIN 20 +12V-AL 20
GND-AL
PIN 21 GND 21 R065U 220K
PIN 22 GND 22 STANDBYn
PIN 23 PWM-3 23 F020U R057U 100 BL-DIM3
PIN 24 PWM-4 24 F021U R058U 100 BL-DIM4
PIN 25 PWM-5 25 F022U R059U 100 BL-DIM5
PIN 26 PWM-6 26 F023U R060U 100 BL-DIM6
PIN 27 PWM-7 27 F024U R061U 100 BL-DIM7 +5V
PIN 28 PWM-8 28 F025U R062U 100 BL-DIM8
29 30

22K
TYPE

RES
R018U
100pF

100pF

100pF

100pF

100pF

100pF

100pF

100pF

100pF

100pF

100pF
100uF 16V

100uF 16V

100uF 16V

100uF 16V
C156U

C155U

C159U

C158U

50V

50V

50V

50V

50V

50V

50V

50V

50V

50V

50V
2.2K I042U
RES

RES

RES

RES
R026U

C085U

C086U

C087U

C088U

C089U

C090U

C091U

C092U

C093U

C094U

C095U
+12V 2 U006U
BC857BW(COL)

1.5K

10K
+3V3-STANDBY

220K
1

RES
3

R033U

RES
R113U
I043U

R013U

22K
I097U

R012U
+12V
R104U 22K DETECT12V F035U
RES POWER SEQUENCER

100K

1MEG
2 U019U
10K R042U 1V2-OK BC857BW(COL)
+5V RES

RES
X003U
1

R021U

R019U
3
ENABLE+1V5+3V3
I044U

10K
DETECT12V S006U
50m
ENABLE+1V2-MTK

RES
R105U
+12V +12V
+5V +3V3
22K

22K

22K
RES

RES
R106U

R107U

R115U
6
I090U
2 U030U
BC847BS(COL)
I099U
4
1
I091U BC847BPN(COL) 3
5 U028U
RES 1V2-OK R114U 100K 5 U030U
3 BC847BS(COL)
I098U
I092U ENABLE+1V2-MTK
4
22K

22K

47K
RES
RES

RES
R110U

R108U

R109U

X003

I093U

EMC 6

U028U 2 R111U 22K DETECT12V

BC847BPN(COL)
I094U RES
RES
1

1
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 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 56

10-1-17 B, WIFI SUPPLY

WIFI SUPPLY
B B
4 S002U 5 RES

3 S002U 6 RES

2 S002U 7 RES
F027U
1 S002U 8 RES
+3V3-LAN

10uF
U001U
RT9187GSP

C009U

1MEG
68K
1 3
+3V5-STANDBY VIN1 VOUT1

1%
10uF
2 VIN2 VOUT2 4

RES
R008U

R004U
C008U
NC 7

8 EN BP|ADJ 5 I002U

470K
GND GND_HS

22K

1%
6

9
R103U 10K

R009U

R005U
+3V3 F054U

WOLAN-ENABLE
+3V5-STANDBY

R002U I005U
C017U 47nF 22K 1 U002U
BC847BW(COL)
I003U

22K
R003U

RES
120K

1%
I004U

10nF
RES
R010U

RES
C010U
I006U
R007U 47K C003U 100nF
100K

5% 16V

X001U
5%
R006U

+3V3-LAN
RES X031
F028U C004U 100nF 1
USB-WIFI-DM 2
USB-WIFI-DP F029U 3
4
WOLAN-IRQn F030U 5
6
8 7
F031U

R001U 10K
+3V3-LAN
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 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 57

10-1-18 B, AMBILIGHT PROTECTION

AMBILIGHT PROTECTION
B B

* X011U !
T 2A 63V

U004U
SIP32429DN-GE4 **
F032U 2-SIDED AMBILIGHT 3- or 4- SIDED AMBILIGHT
1 9 AMBI-POWER
+12V-AL VIN1 VOUT1
2 10
VIN2 VOUT2 * **
1uF

1uF

C018U
I009U 4 EN U004U

22uF
C016U

C015U
I008U 5 ILIM FLG 8 X011U R050U
I007U C016U R011U

RES
GND_HS
3 SS PG 7 F033U
GND-AL

GND
R050U 10K C018U C016U
1.8K

+3V3
100nF

100nF
GND-AL GND-AL
** C006U

11
**

6
C050U
**
C006U

C005U

**
R011U

C018U
GND-AL

GND-AL GND-AL GND-AL

U029U

1 9 AMBI-POWER
+12V-AL IN_1 OUT_1
2 IN_2 OUT_2 10
OUT_PAD 11
6 EN I096U
I095U SET 7
GND_PAD

5 SS RES
NC_1
NC_2

47K U012U S004U

GND
47nF

RES 50m
I088U
16V

U023U
12
C157U

2 SI2304DDS
4

3
8

OUT_1 F036U
RES
R112U

3 4
+5V IN OUT_2 +3V3-A

2
100nF
GND

22uF 16V
+12V +5V +5V

C081U
RES 16V
GND-AL GND-AL GND-AL

C080U

RES

100K

100K
10K
R098U

R044U

R099U
RES

RES

RES
I082U

100K
3

100nF
C072U 100nF
RES 1

RES 16V
16V I083U
U025U

R097U

C150U
RES
GND-AL 2
BC847BW(COL)
RES
3V3-OK
I086U

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 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 58

10-1-19 B, SUPPLY 1

SUPPLY 1
B B

L001U I011U
+12V
30H

10
10uF

10uF

10uF

2
3
4
+5V +12V
I039U U009U
1
C033U

C032U

C031U

AON7932
9

RES
2.2K

10uF
R022U 10 8

3.3
16V

5
6
7
L005U

C030U
220K

RES
3

R028U
30H
1
I033U L004U
U005U 1

R031U
BC847BW(COL)
+12V
I045U

100nF
30H

10uF

10uF

10uF
RES R047U 22
R014U

R025U

I016U

D002U

5.6V
I034U 2 4 5

16V
5% 22 L010U F005U
R046U 120K C042U 1nF C041U 1nF R047U

C148U

C064U

C063U

C057U
+5V

220pF
I038U +5V
10uF

RES
1% 3 6 3.3uH
5% 22 I020U
6.3V

R047U

50V
I021U

22uF

22uF

22uF
C071U 2 7
C029U

C036U

100uF 16V
5% 22

C069U
6.3V
RES 100pF R047U

470K
1 8

22K

C048U

C049U

C068U
RES
5%

10

10

10

10
5

8
7

R045U

R036U
U007U I046U

B340A-M3
D003U

R017U

R017U

R017U

R017U
RT8228DGQW

1%
VCC
I012U

8
5 C028U 100nF R030U 3.3 U010U

1
I010U BOOT I017U

RES
14 C022U 1nF C023U 1nF TPS54527DDA
TON I015U I013U

VIN
UGATE 4 I019U
I035U
1V2-OK 12 PGOOD I014U L009U
2 VFB VBST 7 C058U 100nF
3 F040U
PHASE
1uH
+1V2-MTK
I036U 4 SS SW 6
R029U 100K
LGATE 2 I018U

22uF

22uF

22uF

22uF
220uF 2.5V
1% 13 CS
DETECT12V 1 EN VREG5 3 C056U 1uF

C037U
8

3.3nF
GND+1V2M FB 16V
ENABLE+1V2-MTK R027U 10

GND_HS
1nF
C024U

C025U

C026U

C027U
11 EN

RES
RES
RES

50V

50V
10

RES

GND
I037U MODE

C040U

C149U
R049U 10 1 9
+5V NC1 NC3 GND+1V2M
6 16

9
NC2 NC4
1nF

GND GND_HS C021U 22pF CORE VOLTAGE SUPPLY MTK 1

50V

RES I040U
C034U

I041U
15

17
RES

R016U
22K R023U 220 F039U SENSE+1V2-MTK
1%
1MEG

56K

22K

R024U 10 F034U
GND+1V2M +1V2-MTK
1%

1%

RES
RES

C035U 1uF
R020U

R032U

R015U

X005U

GND+1V2M GND+1V2M GND+1V2M

GND+1V2M

L008U
+1V2-MTK
30H
U015U
RES

OUT_1 2
3 4 F038U
+3V3 IN OUT_2 +1V2-A
100nF

GND
100uF 16V
C084U
RES
RES

16V
C083U

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 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 59

10-1-20 B, DDR I/O SUPPLY MTK 1

DDR I/O SUPPLY MTK 1

B B

L006U I028U
+12V

100nF
30H

10uF

10uF

100nF
16V 10uF
16V

16V

16V
C066U

C059U

C065U

C067U

C062U
RES

16V
U011U
TPS54494PWP

1 VIN1 VIN2 16

L002U I024U L003U

F006U C060U 100nF 2 15 C061U 100nF F008U
+1V5-MTK VBST1 VBST2 +3V3
1.5uH 2,2uH
16V I031U 16V
22uF

22uF

22uF

22uF

22uF

22uF
3 SW1 SW2 14
6,3V

6,3V

6,3V

6,3V

6,3V

6,3V
RES

RES
C052U

C051U

C050U

C053U

C054U

C055U
4 PGND1 PGND2 13
I032U
ENABLE+1V5+3V3 5 EN1 EN2 12 ENABLE+1V5+3V3
D001U
R067U 1K I027U 6 11 3V3-OK
+5V PG1 PG2
I029U R048U
R039U 22K I022U 7 10 68K
+1V5-MTK RED VFB1 VFB2 +3V3
1% 1%
R040U 10 9 I023U R041U 10

GND_HS
VREG5
4 5 C038U RES C039U RES 4 5

GND
470K
50V 22pF 50V 22pF

270K
R040U 10 R041U 10 C046U 1nF C047U 1nF
1nF

22K

1uF

22K
I025U

R043U
3 6 3 6

17
50V

16V
8
I030U 50V 50V

1%

1%
C043U

C070U
10 10
RES
R040U R041U
2 7 2 7

RES
R037U

R035U

R038U
F007U C045U 1nF C044U 1nF R040U 10 GND-D1
1 8 R041U 10
50V 50V I026U
GND-D1 1 8

GND-D1 GND-D1 GND-D1 GND-D1

X010U

GND-D1

RES U013U
L007U
TPS51200DRC F037U
+3V3 +3V3-A
F041U 30H
2 3

100uF 16V
+1V5-MTK VLDO_IN VO +VTT

C082U
R051U RES 10K
I051U
1 5
+1V5-MTK REFIN VOSNS

RES
F042U
10K

+3V3 10 6
VIN REFOUT VTT-REF
1nF

GND_HS
50V

+3V3 7 EN PGOOD 9
PGND
C078U

100nF
GND

10uF

10uF

10uF
RES

RES
R052U

6,3V

6,3V

6,3V
16V
11

RES
C079U

C075U

C076U

C077U
8

4
10uF

RES

RES

RES
6,3V
C096U
10uF

10uF
6,3V

6,3V
C073U

C074U
RES

RES

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 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 60

10-1-21 B, SUPPLY 2

SUPPLY 2
B B

L011U I053U
+12V
30H

10
10uF

10uF

10uF

2
3
4
+5V +12V
I066U U020U
1

C114U

C115U

C116U
AON7932
9

RES
2.2K

10uF
R070U 10 8

3.3
16V

5
6
7
C113U
220K

RES
3

R074U
1
I060U
U008U 1

R089U
BC847BW(COL) I069U
RES

R086U

R079U
I058U

D004U

5.6V
I061U 2

220pF
I065U

10uF

RES
6.3V

50V
C105U

C130U

10

10

10

10
5

8
7
U017U

B340A-M3
D005U

R090U

R090U

R090U

R090U
RT8228DGQW
VCC
I054U
5 C097U 100nF R088U 3.3

1
I052U BOOT I059U

RES
14 C121U 1nF C122U 1nF
TON I057U I055U
R095U UGATE 4
I062U
+5V DT-1V2-OK DT-1V2-OK 12 PGOOD I056U L019U F046U
3
10K PHASE
1uH
+1V2-MTK-DT
100K I063U
X006U

R085U 2
LGATE

22uF

22uF

22uF

22uF
1% 13 CS

C129U

100uF 2V
FB 8
DT-STANDBYn R072U 10 GND+1V2M-DT

C131U

C132U

C133U

C134U
11 EN

RES

RES
10

RES
I064U MODE
DT-ENABLE+1V5+3V3
R073U 10 1 9
+5V NC1 NC3
6 16 GND+1V2M-DT
NC2 NC4
RES
1nF

50V GND GND_HS C141U 22pF CORE VOLTAGE SUPPLY MTK 2

RES I067U
C120U

I068U

15

17
RES

R081U
22K R075U 220 F045U SENSE+1V2-MTK-DT L017U
F055U
1% +3V3

1MEG

56K

22K
30H
R071U 10 F043U
+1V2-MTK-DT

1%

1%
GND+1V2M-DT RES

RES
C112U 1uF

R078U

R093U

R080U
U027U
X002U

+3V5-STANDBY 1 VIN VOUT 5 +3V3-STANDBY-DT

STANDBYn 3 INH BYP 4
GND+1V2M-DT GND+1V2M-DT GND+1V2M-DT

22nF
GND

1uF

1uF
GND+1V2M-DT

6.3V

6.3V
16V
C152U

C154U

C153U
2
RES

RES
RES
L012U
+1V2-MTK-DT
30H RES
U022U U014U S005U
RES RES 50m
I089U
U024U
OUT_1 2 2 SI2304DDS
OUT_1 F047U
+3V3-DT 3 IN OUT_2 4 F044U
+1V2-A-DT 3 4 RES
+5V IN OUT_2 +3V3-A-DT

2
100nF

100nF

GND GND
100uF 16V

22uF 16V
+12V +5V +5V
C144U

C145U
RES
RES

16V

RES 16V
C098U

C099U
1

RES

100K

100K
10K
R101U

R096U

R102U
RES

RES

RES
I084U

100K
3

100nF
1

RES 16V
I085U
U026U

R100U

C151U
RES
BC847BW(COL)
2
RES
DT-3V3-OK
I087U

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 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 61

10-1-22 B, DDR I/O SUPPLY MTK 2

DDR I/O SUPPLY MTK 2

B B

L013U I076U
+12V

100nF
30H

10uF

10uF

100nF
16V 10uF
16V

16V

16V
C118U

C100U

C117U

C119U

C103U
RES

16V
U018U
TPS54494PWP

1 VIN1 VIN2 16

L015U I072U L016U

F048U C101U 100nF 2 15 C102U 100nF F050U
+1V5-MTK-DT VBST1 VBST2 +3V3-DT
1.5uH 2,2uH
16V I079U 16V
22uF

22uF

22uF

22uF

22uF

22uF
3 SW1 SW2 14
6,3V

6,3V

6,3V

6,3V

6,3V

6,3V
RES

RES
C137U

C136U

C135U

C138U

C139U

C140U
4 PGND1 PGND2 13
I080U
DT-ENABLE+1V5+3V3 5 EN1 EN2 12 DT-ENABLE+1V5+3V3
D006U
R076U 1K I075U 6 11 DT-3V3-OK
+5V PG1 PG2
I077U R094U
R084U 22K RED I070U 7 10 68K
VFB1 VFB2 +3V3-DT
1% 1%
R091U 10 +1V5-MTK-DT 9 I071U R092U 10

GND_HS
VREG5
4 5 C142U RES C143U RES 4 5

GND
470K
50V 22pF 50V 22pF

220K
R091U 10 R092U 10 C126U 1nF C127U 1nF

1nF

22K

1uF

22K
I073U

R077U
3 6 3 6

17
50V

16V
8
I078U 50V 50V

1%

1%
C123U

C146U
10 10
RES
R091U R092U

R087U
2 7 2 7

RES
R082U

R083U
F049U C125U 1nF C124U 1nF R091U 10 GND-D2
1 8 R092U 10
50V 50V I074U
GND-D2 1 8

GND-D2 GND-D2 GND-D2 GND-D2

X004U

GND-D2

RES U021U
L014U
TPS51200DRC +3V3-DT F051U
+3V3-A-DT
F052U 30H
2 3

100uF 16V
+1V5-MTK-DT VLDO_IN VO +VTT-DT

C147U
R068U RES 10K
I081U
1 5
+1V5-MTK-DT REFIN VOSNS

RES
F053U VTT-REF-DT
10K

+3V3-DT 10 VIN REFOUT 6

1nF

GND_HS
50V

+3V3-DT 7 EN PGOOD 9
PGND
C128U

100nF
GND

10uF

10uF

10uF
RES

RES
R069U

6,3V

6,3V

6,3V
16V
11

RES
C104U

C108U

C109U

C110U
8

4
10uF

RES

RES

RES
6,3V
C111U
10uF

10uF
6,3V

6,3V
C106U

C107U
RES

RES

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 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 62

10-1-23 B, AUDIO-VIDEO I/O

AUDIO-VIDEO I/O
B X260
B
1
2
3 X266
F048C
4 WHITE 1
5
6 2 F046C C013C 10uF AV-YPBPR-LIN
7 Y-L 16V
8 RED 3

10nF
9

S020C
F047C

16V
10 4

S018C
Y-R

C016C
11
12
F134C 13 +3V3
14

S017C
15
C014C 10uF AV-YPBPR-RIN

10K

10K
16
17
16V

S016C
18

10nF
S038C

S039C

S040C
19

S019C

16V
R039C

R097C
20

C017C
21
AV-YPBPR-DETECTn S042C

F002C I043C
3

U017C 1
AV-SCART-CVBS BC847BW(COL)
F003C F050C

75

47pF
2

S041C

5%

50V
X261

C015C
GREEN

R048C
1
2
Y 3

C028C 1uF AV-SCART-RIN 4 BLUE

F004C 6.3V

10nF
PB 5

S043C

16V
RED

C018C
6

PR 7

C029C 1uF AV-SCART-LIN

F033C 6.3V

10nF

S034C

S035C

S021C
16V
F133C

C019C
AV-CVBS_Y

X001C
R035C 10 F044C AV-YPBPR-S
F034C AV-SCART-BLK 5%
Y F045C R036C 18 F043C AV-YPBPR-Y
5%
75

56

10pF
5%

5%

50V
C020C
R049C

R042C
S001C I010C AV-COM_Y
50m
F035C R070C 49.9K I007C AV-SCART-STATUS
1%
10K

5%
R001C

PB F121C R037C 18 F042C AV-YPBPR-PB

5%

56

10pF
5%

50V
C021C
R043C
R F036C S014C AV-SCART-R
50m

56

10pF
5%

50V
C023C
75

C022C
50V

R044C
10pF

PR F122C R038C 18 F041C AV-YPBPR-PR

R045C

5%

I006C
C024C
75

X268 5
50V

4
R046C

F040C C027C 1uF AV-DVI-RIN

10pF

3
6.3V
G F037C S015C AV-SCART-G 2 F039C C026C 1uF AV-DVI-LIN
50m 1 6.3V
F038C
I008C
B F049C S037C AV-SCART-B

S044C

S045C
50m
75

10pF

50V
C025C
R047C

X002C AV-COM_S

X000 X006 X008 X007

EMC EMC EMC EMC

1 2013-12-13
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 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 63

10-1-24 B, HDMI CONNECTORS

HDMI CONNECTORS
B B
X283
1 UHD-RX0-2+
2
3 UHD-RX0-2-
4 UHD-RX0-1+
5 UHD-AIN-5V
6 UHD-RX0-1-
7 UHD-RX0-0+ +5V-EDID0

RES
RESERVED

RES
47K

47K
8
UHD-RX0-0-

10K

47K

47K
9

100nF
10 UHD-RX0-C+

R110C

R111C

R059C
EDIDUHD-WP

16V
11
UHD-RX0-C-

C002C
12

8
HDMI-CEC-IN I044C U003C

R002C

R058C
13
14 F007C ARC0-HDMI I045C D004C D005C D010C
15 F008C SCL-0 R007C 22 UHD-HDMI0-SCL UHD-HDMI0-SCL VDD
WP|WC 7 R066C 33 F005C BLOCK_IO TYPE TYPE TYPE
16 F009C SDA-0 R008C 22 5% UHD-HDMI0-SDA UHD-HDMI0-SDA +5V 3
EEPROM
17 5% 1 0 SCL 6 UHD-HDMI0-SCL R016C
RX1-2+ 1 CH1 NC1 10 RX1-2+ RX1-0+ 1 CH1 NC1 10 RX1-0+ 1 CH1 NC1 10
18 F011C UHD-AIN-5V 1 2 2 1 ADDR
U007C 1 RES EDID-WEn RX1-2- 2 CH2 NC2 9 RX1-2- RX1-0- 2 CH2 NC2 9 RX1-0- SCL-1 2 CH2 NC2 9 SCL-1
19 F010C S048C I018C UHD-HPD0 3 2 SDA 5 UHD-HDMI0-SDA BC847BW(COL) 4.7K
F138C 21 20 50m VSS 3 8 3 8 3 8

100nF
D013C GND1 GND2 GND1 GND2 GND1 GND2
3 2

10K
23 22

470K

2.2K
RX1-1+ RX1-1+ RX1-C+ RX1-C+ SDA-1 SDA-1

16V
4 7 4 7 4 7

4
CH3 NC3 CH3 NC3 CH3 NC3
F006C RX1-1- RX1-1- RX1-C- RX1-C-

RES
C001C
5 6 5 6 5 6
CH4 NC4 CH4 NC4 BIN-5V CH4 NC4 BIN-5V

D017C
5%
RES

R155C
EDID0-A1 X335

R026C

R054C
1 DBG
HPD0 2
3
5 4

TYPE
X284
1 RX1-2+
2
3 RX1-2-
4 RX1-1+
5
6 RX1-1- BIN-5V
7 RX1-0+

47K

47K
8 D006C D007C D011C
9 RX1-0- TYPE TYPE TYPE
10 RX1-C+

R109C
R108C
11 RX2-2+ 1 CH1 NC1 10 RX2-2+ RX2-0+ 1 CH1 NC1 10 RX2-0+ 1 CH1 NC1 10
12 RX1-C- RX2-2- 2 CH2 NC2 9 RX2-2- RX2-0- 2 CH2 NC2 9 RX2-0- SCL-2 2 CH2 NC2 9 SCL-2
13 HDMI-CEC-IN I046C
14 F013C ARC1-HDMI 3 GND1 GND2 8 3 GND1 GND2 8 3 GND1 GND2 8
15 F014C SCL-1 R009C 22 HDMI1-SCL HDMI1-SCL I047C
16 F015C SDA-1 R010C 22 5% HDMI1-SDA HDMI1-SDA RX2-1+ 4 CH3 NC3 7 RX2-1+ RX2-C+ 4 CH3 NC3 7 RX2-C+ SDA-2 4 CH3 NC3 7 SDA-2
17 5% RX2-1- 5 CH4 NC4 6 RX2-1- RX2-C- 5 CH4 NC4 6 RX2-C- CIN-5V 5 CH4 NC4 6
CIN-5V
18 F017C BIN-5V
19 F016C R051C 75 I019C
F137C 21 20 HPD1
100nF

5%
910

23 22
470K
16V
C004C

D020C

D026C
5%

15V

R055C

BIN-5V
RES
R027C

X285
1 RX2-2+
2 D008C D009C D012C
3 RX2-2- TYPE TYPE TYPE
4 RX2-1+
5 RX3-2+ 1 CH1 NC1 10 RX3-2+ RX3-0+ 1 CH1 NC1 10 RX3-0+ 1 CH1 NC1 10
6 RX2-1- CIN-5V RX3-2- 2 CH2 NC2 9 RX3-2- RX3-0- 2 CH2 NC2 9 RX3-0- SCL-3 2 CH2 NC2 9 SCL-3
7 RX2-0+
47K

47K

8 3 GND1 GND2 8 3 GND1 GND2 8 3 GND1 GND2 8

9 RX2-0-
R040C

10 RX2-C+ RX3-1+ 4 CH3 NC3 7 RX3-1+ RX3-C+ 4 CH3 NC3 7 RX3-C+ SDA-3 4 CH3 NC3 7 SDA-3
RX3-1- RX3-1- RX3-C- RX3-C-
R041C

11 5 6 5 6 5 6
CH4 NC4 CH4 NC4 DIN-5V CH4 NC4 DIN-5V
12 RX2-C-
13 HDMI-CEC-IN I048C
14 F019C ARC2-HDMI
15 F020C SCL-2 R011C 22 HDMI2-SCL HDMI2-SCL
16 F021C SDA-2 R012C 22 5% HDMI2-SDA HDMI2-SDA
17 5%
I049C
18 F023C CIN-5V
19 F022C R052C 75 I020C
F139C 21 20 HPD2
100nF

5%
910

23 22
470K

RES
16V
C006C

D022C

D027C
5%

15V

R056C
R028C

CIN-5V

X286
1 RX3-2+
2
3 RX3-2-
4 RX3-1+
5
6 RX3-1- DIN-5V
7 RX3-0+
8
RX3-0-
47K

47K

9
10 RX3-C+
R106C

11
R107C

12 RX3-C-
13 HDMI-CEC-IN
14 F025C ARC3-HDMI I050C
15 F026C SCL-3 R013C 22 HDMI3-SCL HDMI3-SCL
16 F027C SDA-3 R014C 22 5% HDMI3-SDA HDMI3-SDA
17 5%
I051C
18 F029C DIN-5V
19 F028C R053C 75 I021C EDID-WEn F135C
F140C 21 20 HPD3
100nF

5%
910

10K
23 22
470K

RES
16V
C008C

D024C

D028C
5%

R025C

RES
15V

R057C
R029C

DIN-5V

UHD-AIN-5V S033C RES HDMIA-5V

50m
S030C RES HDMIB-5V
BIN-5V 50m
S032C RES HDMIC-5V
CIN-5V 50m 1 2014-02-14
S031C RES HDMID-5V
DIN-5V 50m MTK UHD 50 Hz
715RLPCB000000037
7800

19580_105_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 64

10-1-25 B, AUDIO RETURN CHANNEL

AUDIO RETURN CHANNEL

B B
+3V3-A
+3V3-A
U010C

5
U009C +3V3-A

5
+3V3-A VCC
VCC GND

4.7K
GND

3
4.7K
3

5%

RES
5%

RES
U010C

R021C
U009C

R020C
I034C
I025C I029C OE 1 ARC3-EN
I022C OE 1 ARC1-EN ARC2-HDMI C011C 100nF R072C 180 4 Y
ARC0-HDMI C009C 100nF R071C 180 4 Y 16V 5% A 2

100K

S006C
RES
50m
16V 5% A 2

82
100K

S003C
RES
50m
82

5%

5%
5%

5%

R032C

R076C
I023C I030C S005C HDMI-ARCF
R031C

R075C
I024C
S002C HDMI-ARCF 50m
50m RES
RES

+3V3-A
+3V3-A
U012C

5
U011C +3V3-A

5
VCC
VCC +3V3-A GND

4.7K
GND

3
4.7K
3

5%

RES
5%

RES
U012C

R023C
U011C

R022C
I033C
I028C I031C OE 1 ARC4-EN
I026C OE 1 ARC2-EN ARC3-HDMI C012C 100nF R074C 180 4 Y
ARC1-HDMI C010C 100nF R073C 180 4 Y 16V 5% A 2

S012C
RES
50m
16V 5% A 2

100K
S009C
RES
50m

82
100K

82

5%

5%
5%

5%

I032C S011C HDMI-ARCF HDMI-ARCF R003C 100

R034C

R078C
I027C S008C HDMI-ARCF 50m
R033C

R077C

50m RES
RES

33pF

50V
C003C
UHD-AIN-5V
BIN-5V S036C HDMI-ARC
50m
CIN-5V
Value=47K

DIN-5V RES
HDMI-CEC-IN F001C R006C 100 I003C HDMI-CEC
47K

47K

47K

I005C I004C
5%

1MEG
RES

27K
U001C
5%
HPD0 +3V3-STANDBY

RES

RES
R104C

R096C

R102C

R103C

2
RES
R030C

R024C
6

1
I035C
U016C 2
BC847BS(COL) I002C R015C 22K
RES 3 +3V3-STANDBY
1
I036C
RES
U016C 5 R095C 47K

BC847BS(COL)
RES
4
HPD1 RES

I037C
U015C 2
BC847BS(COL)
3
1
I038C
U015C 5 R094C 47K +5V +3V3 +3V3-A

BC847BS(COL)
HPD2 4

100nF
6

100uF 16V

100uF 16V
C041C

C040C

16V
I039C
U014C 2

C030C
BC847BS(COL)
3
1
I040C
U014C 5 R093C 47K

BC847BS(COL)
HPD3 4

I041C
U002C 2
BC847BS(COL)
3
1
I042C
U002C 5 R092C 47K

BC847BS(COL) 1 2014-02-14
4
MTK UHD 50 Hz
715RLPCB000000037
7800

19580_106_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 65

10-1-26 B, COMMON INTERFACE

COMMON INTERFACE
B B

X295
F061C 1
+3V3 CA-D03 F062C 2
+3V3 +3V3 +3V3 CA-D04 F063C 3
CA-D05 F064C 4
CA-D06 F065C 5
CA-D07 F066C 6

100nF
S022C

S023C

S024C
CA-CE1n F067C

RES

RES
50m

50m

50m
7
CA-A10 F068C

16V
8

8
CA-OEn F069C

C035C
U013C 9
TMP75AIDGKR CA-A11 F070C 10
CA-A09

V+
F071C 11
I017C 7 A0 SCL 2 47 R083C SCL-SSB CA-A08 F072C 12
I015C 6 A1 SDA 1 47 R091C SDA-SSB CA-A13 F073C 13
I016C 5 A2
CA-A14 F074C 14
3 CA-WEn F075C 15

GND
ALERT
CA-RDY F076C 16
F077C 17
+5VCA
18

4
S025C

S026C

S027C
CA-MIVAL F078C

RES
50m

50m

50m
19
CA-MICLK F079C 20
CA-A12 F080C 21
CA-A07 F081C 22
CA-A06 F082C 23
CA-A05 F083C 24
CA-A04 F084C 25
CA-A03 F085C 26
X071 CA-A02 F086C 27
SCL-SRF F127C R100C 10 F129C 1 CA-A01 F087C 28
F132C 2 CA-A00 F088C 29
SDA-SRF F128C R099C 10 F130C 3 CA-D00 F089C 30
4 CA-D01 F090C 31
10pF

10pF
6 5 CA-D02 F091C 32

50V

50V
33
TYPE
C042C

C043C
34
35
CA-CD1n F092C 36
CA-MDO3 F093C 37
CA-MDO4 F094C 38
L001C
CA-MDO5 F095C 39
+3V3 F131C CA-MDO6 F096C 40
30H
CA-MDO7 F097C 41
CA-CE2n F098C
1uF

42
6.3V
CA-VS1n F099C 43
CA-IORDn F100C
C045C

44
CA-IOWRn F101C 45
CA-MISTRT F102C 46
CA-MDI0 F103C 47
CA-MDI1 F104C 48
CA-MDI2 F105C 49
CA-MDI3 F106C 50
51
+5VCA
52
CA-MDI4 F107C 53
CA-MDI5 F108C 54
CA-MDI6 F109C 55
CA-MDI7 F110C 56
CA-MOCLK F111C 57
CA-RESET F112C 58
CA-WAITn F113C 59
60
CA-REGn F115C 61
CA-MOVAL F116C 62
+3V3-STANDBY +3V3-STANDBY CA-MOSTRT F117C 63
CA-MDO0 F118C 64
CA-MDO1 F119C 65
CA-MDO2 F120C
10K

10K

66
CA-CD2n F114C 67
68
71 69
72 70
R079C

R080C

X206 5
4 F058C
3 F059C R081C 47 I014C MTK-RX-SERVICE

2 F060C R082C 47 I013C MTK-TX-SERVICE

100nF
1
+3V3

16V
C036C
S028C

S029C

D018C

D019C
5.1V

5.1V

CA-CD1n R084C 10K

CA-CD2n R085C 10K

X310
1 CA-VS1n R087C 10K
2
3 CA-WAITn R086C 10K
+5VCA
4 5

100nF
TYPE

16V
C037C
R101C
CA-RDY R088C 10K
+5V +5VCA
+5VCA
+T 750mA
CA-CE2n R089C 10K

22uF 6.3V
C039C
R090C
CA-RESET 100K
+3V3

1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_107_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 66

10-1-27 B, DT COMMON INTERFACE

DT COMMON INTERFACE
B B

X297
F141C 1
DT-CA-D03 F142C 2
DT-CA-D04 F143C 3 R134C
DT-CA-D05 F144C 4 +5V +5VCA-DT
DT-CA-D06 F145C 5 +T 750mA
DT-CA-D07 F146C 6
DT-CA-CE1n F147C

22uF 6.3V
7

C054C
DT-CA-A10 F148C 8
DT-CA-OEn F149C 9
DT-CA-A11 F150C 10
DT-CA-A09 F151C 11
DT-CA-A08 F152C 12
DT-CA-A13 F153C 13
DT-CA-A14 F154C 14
DT-CA-WEn F155C 15
DT-CA-RDY F156C 16

100nF
F157C 17
+5VCA-DT +3V3-DT
18

16V
DT-CA-MIVAL F158C

C052C
19
DT-CA-MICLK F159C 20 R123C
DT-CA-A12 F160C 21 DT-CA-CD1n 10K
DT-CA-A07 F161C 22 R124C
DT-CA-A06 F162C 23 DT-CA-CD2n 10K
DT-CA-A05 F163C 24 R126C
DT-CA-A04 F164C 25 DT-CA-VS1n 10K
DT-CA-A03 F165C 26 R125C
DT-CA-A02 F166C 27 DT-CA-WAITn 10K
DT-CA-A01 F167C +5VCA-DT
28

100nF
DT-CA-A00 F168C 29
DT-CA-D00 F169C 30

16V
DT-CA-D01 F170C

C053C
31
DT-CA-D02 F171C 32
33
34
35
DT-CA-CD1n F172C 36 DT-CA-RDY R127C 10K
+5VCA-DT
DT-CA-MDO3 F173C 37
DT-CA-MDO4 F174C 38 DT-CA-CE2n R128C 10K
DT-CA-MDO5 F175C 39
DT-CA-MDO6 F176C 40
DT-CA-MDO7 F177C 41
DT-CA-CE2n F178C 42 R131C
DT-CA-VS1n F179C 43 DT-CA-RESET 100K
+3V3-DT
DT-CA-IORDn F180C 44
DT-CA-IOWRn F181C 45
DT-CA-MISTRT F182C 46
DT-CA-MDI0 F183C 47
DT-CA-MDI1 F184C 48
DT-CA-MDI2 F185C 49
DT-CA-MDI3 F186C 50
51
+5VCA-DT
52
DT-CA-MDI4 F187C 53
DT-CA-MDI5 F188C 54
DT-CA-MDI6 F189C 55
DT-CA-MDI7 F190C 56
DT-CA-MOCLK F191C 57
DT-CA-RESET F192C 58
DT-CA-WAITn F193C 59
60
DT-CA-REGn F195C 61
DT-CA-MOVAL F196C 62
DT-CA-MOSTRT F197C 63
DT-CA-MDO0 F198C 64
DT-CA-MDO1 F199C 65
DT-CA-MDO2 F200C 66
DT-CA-CD2n F194C 67
68
71 69
72 70

3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

19580_108_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 67

10-1-28 B, SiI9679CNUC ON HDMI1 FOR HDCP 2.2

SiI9679CNUC on HDMI1 for HDCP 2.2

B B
+1V0-HDMI AVDD10
L003CI060C VDD5V-IN
R120C 10 I065C RES VDDH33

100nF

100nF
30H F125C

10uF
L008C L014C

100nF
+5V

10uF
6.3V

16V

16V

100nF
30H 30H

10uF
6.3V

16V
C057C

C044C

C046C

6.3V
AO3414

16V
C062C

C051C

U018C

C063C

C055C
+1V0-HDMI FVDD10
+3V3

3
L004C I061C

100nF
30H

10uF
L007CI064C VDD10 C072C 4.7uF

6.3V
6.3V

16V

100nF

100nF

100nF

100nF
+1V0-HDMI 30H

10uF
C034C 100nF

C058C

C047C

1
6.3V
16V R114C 10K

16V

16V

16V

16V
C071C 4.7uF +5V

C061C

C050C

C076C

C086C

C077C
6.3V
XTALVDD33

AVDD10-PLL

4
HSIC-VDD33
+3V3

AVDD10-DOC
L005C I062C C033C 100nF U021C

FVDD10
16V RT9025

100nF
30H

10uF
C070C 4.7uF VDD
F123C

6.3V
6.3V

16V
3 6
C032C 100nF +1V5-MTK VIN VOUT +1V0-HDMI
C059C

C048C
I057C

10uF

22uF
16V R143C

1nF
2 7
+5V EN ADJ

6.3V

6.3V

50V
1
VDDIO33 +3V3

1uF

56K
C056C

C073C

C065C
1

HSIC-VDD10
I063C PGOOD

AVDD10-DP

XTALVDD33

6.3V
+3V3 L006C VDD10

VDDIO33
AVDD10

VDDH33
I058C

VDD5V-IN

1%
GND_HS
C064C
5
100nF

100nF

100nF
30H NC
10uF

10K

GND

22K
6.3V

16V

16V

16V

R146C
5%
C060C

C049C

C074C

C075C

R138C
8

9
70
59
35
24

18
17
9
6
39
36
58
57

2
1
37
56

55
51
5

48
65
33
19

10
R050C
U019C
SII9679 TMDS OUT

VDD10_4
VDD10_3
VDD10_2
VDD10_1

FVDD10
AVDD10_2
AVDD10_1
AVDD10_DOC
AVDD10_DP
AVDD10_PLL
HSIC_VDD10
HSIC_VDD33

VDD5V_IN
VDD33OUT
VDD18OUT
VDD12OUT

HSIC_GND
XTAL_GND
COC_GND

XTAL_VDD33
VDDIO33_3
VDDIO33_2
VDDIO33_1

VDD33

220K
680K
I059C
HDCP-RESETn F126C 34 RESETN TX2P 47 RX0-2+

1%
TX2N 46 RX0-2-
UHD-RX0-C- 7 RXCN
UHD-RX0-C+ RX0-1+

RES
R145C

R144C
8 RXCP TX1P 45
TX1N 44 RX0-1-
UHD-RX0-0- 11 RX0N
UHD-RX0-0+ 12 43 RX0-0+
RX0P TX0P
TX0N 42 RX0-0- MX25L2006EM1C
UHD-RX0-1- 13 X346
UHD-RX0-1+ 14
RX1N
RX1P TXCP 41 RX0-C+ DBG 1 9322 279 95668
40 RX0-C- 2
UHD-RX0-2- 15 RX2N
TXCN
+5V
R139C 47K 3 2Mbit
UHD-RX0-2+ 16 RX2P TDSCL 66 R118C 10 HDMI0-SCL 4
TDSDA 67 R119C 10 HDMI0-SDA 5
UHD-HDMI0-SDA 76 DSDA +5V
R140C 47K 6
UHD-HDMI0-SCL 75 DSCL TX_HPD 38 S046C HPD0 7 8
R137C 1K 50m
+5V
UHD-HPD0 4 CBUS_HPD NC_1 26 R105C 10K TYPE

S047C

50m
71 MHL_CD NC_2 27
UHD-AIN-5V R115C 10 I066C 3 RPWR5V NC_3 28
5.1K

L002C I067C 74 29
+5V LPSBV5V NC_4

GPIO0_CI2CA
GPIO1_PSCTL
1uF

52
100nF

30H NC_5
10uF

HDCP-RESETn
10V

73 72

XTAL_OUT

SPI_MISO
SPI_MOSI

HSIC_STB
HSIC_DAT
WAKEUP NC_6

XTAL_IN

SPI_CS1
SPI_CS0
SPI_CLK
6.3V

+3V3 +3V3 +3V3

16V
C066C

TMODE

GPIO2
GPIO3
GPIO4
GPIO5
CSCL
CSDA +3V3
R142C

C067C

C031C

77
INT

EPAD

10K

10K
C038C 100nF

10K
16V

R156C

R157C
25
20

68
69

49
50

21
22
23
30
31
32

64
63
62
61
60

54
53

R113C

8
U020C
4.7K

4.7K

4.7K
4.7K

4.7K
+5V M25P20
I055C
1K

10
10

F051C
SiI-SPI-MOSI R132C 100 VCC
5 D Q 2
+1V0-HDMI
I073C
AVDD10-DOC F053C I054C FLASH
L009C I068C SiI-SPI-SCK R130C 100 6 C
4.7K
4.7K

1.8K
10K
R133C
R098C

R116C
R117C

R150C
R149C

R151C
R148C
100nF

30H I053C
10uF

SiI-SPI-CS0F054C R129C 100 1 S

R153C
6.3V

RES

RES

RES
16V

I052C
C081C

C078C

3 W

10K
R135C
R136C

R121C
BC847BW(COL)
+3V3 EDID0-A1 7
U022C HOLD
3 VSS

DBG
+1V0-HDMI AVDD10-DP
L010C I069C +3V3 R154C 1.8K 1 +3V3

R112C

4
F124C
100nF

30H F057C
10uF

RES RES

22K
R141C
6.3V

RES 2
16V

S049C
RES

50m
C082C

C079C

X003C 1MEG F056C I056C

1 3 SiI-SPI-MISO R122C 100
SiI-SPI-MISO
SiI-SPI-MOSI

RES

R152C
8.2pF

8.2pF

GPio1_PSCTL

SiI-SPI-CS0
SiI-SPI-SCK

GPio1_PSCTL
RES

EDIDUHD-WP
50V
2
4
HDCP-IRQn

C068C

C069C
SCL-FE
SDA-FE
50V

RES

+1V0-HDMI AVDD10-PLL 27MEGHz

L011C I070C
393G022S021OTP
100nF

30H
10uF

242254301698
6.3V

16V
C083C

C080C

HSIC-VDD33 +1V0-HDMI HSIC-VDD10

+3V3 L013C I072C L012C I071C

30H 30H
1uF

1uF
6.3V

6.3V
C084C

C085C

3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

19580_109_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 68

10-1-29 B, AUDIO AMPLIFIER

AUDIO AMPLIFIER
B B
+3V3
+12V-AUDIO PVDD

1
SPDIF-OUT S001D
50m
S004D

R033D
X273
50m

VS 2 I001D S020D
50m
F001D
IN 1 SPDIFO S021D
50m

100nF

100pF
GND 3

S005D
16V

50V
MT2 MT1

C001D

C029D
5

4
+3V3 +3V3

10K

10K
D008D

5%

5%
R004D

R007D
I008D I009D

100uF 16V
C005D
2 F016D
S011D PWRD
R046D
+3V3 S009D 4,7K S012D PWRDN-HP
1 U006D
5%
3
3
D007D R003D D006D I012D R039D
S010D 1 U004D
F015D
+12V-AUDIO
RES I010D 2,2K I011D 6,8K

2
R047D

3
180K

F017D 1 U005D

+3V3 PVDD
2 S023D R002D 33
4 5
5%
100nF

100uF

100nF

100nF
C037D F004D
100uF 16V HPHOL RES R002D 33

100uF 16V

100uF 16V

100uF 16V
C003D

C004D

C006D

C007D
3 6 2
6,3V
16V

16V

16V
4V 100uF I003D 5% 3
C040D

C039D

C032D

C033D

C089D

C090D
C038D I002D F002D

1K

1K

22nF

22nF
6

5
HPHOR RES R002D 33 1 X274
RES

F003D

S003D

S002D
5%

5%
2 7

25V

25V

16V

16V
4V 100uF 5%

1uF

1uF

C058D

C059D
S024D R002D 33

R008D

R008D
3

4
1 8 PVDD PVDD
5%
+3V3 12V PVDD Only
1uF 6,3V

2,2K

2,2K
1uF 6.3V
100nF

16V

16V
C041D 100uF

10uF

10uF

10uF

10uF
RES 6,3V
16V

I004D R011D

C049D

S048D

S049D

C051D

S036D

S037D
5%

5%
AUDIO-AR0 C081D 1uF R050D 16K 11,8K

50m

50m
25V

25V

25V

25V

50m

50m
AUDIO-AL0 C080D 1uF R051D 16K R012D 11,8K
C042D

C025D

C026D

C043D

C044D

100uF

100uF
C055D
C056D

R027D

R030D
HPHOR C087D 68pF I005D
I007D L005D
50V LSPK+
HPHOL C088D 68pF I006D I016D I018D 22uH S046D S038D

220nF

220nF
I015D

18
50V C046D 100nF 50m 50m
330pF

330pF

5%
R013D
50V

50V

S047D S039D

2,7

50V

50V
100nF
16V

S044D

S045D

S040D

S041D
+3V3 50m 50m

50m

50m

50m

50m
C019D

C063D
220nF
5%

RES
16V
C086D

C085D

50V
28
48

34
13

27
22

8
5

1
11

U002D

50V
C045D
STA381BWS 330pF C068D

RES
R059D

C020D
1K

1K

1K

2,2K

2,2K
VDDDIG1
VDDDIG2

VREFFILT
HALFVDD

VDD3V3CHP
VDD3V3

VCC1
VCC2

VCC_REG
VDD_REG

I014D
5%

5%

5%

100uF 16V

100uF 16V
C050D

C052D
5%

5%
R028D

R029D
16 LINEINL OUT2A 6
R040D

R006D

R005D

17 LINEINR OUT2B 3
L001D
6,3V I022D
LSPK-
24 10 22uH I017D

220nF

220nF
CPM OUT1A

10nF

10nF

S042D

S043D
1uF C030D C047D 100nF
RES

RES

RES

50m

50m
26 CPP OUT1B 7

2,7

50V

50V

50V

50V
100nF
16V

18
I023D
I2S-MCLK F005D

C064D

C023D

C076D

C077D
36 MCLK FFX3A 30

5%

5%
I2S-BICKI F006D TYPE

RES
16V
37 BICKI FFX3B 31
I2S-LRCKI TYPE

C054D
38 RES
LRCKI RES 6 5
I2S-SDI 14 C035D 1uF R022D 11,8K F008D

RES
R014D

R058D
39 SDI F3XL 50V RES
F009D 4 4
F3XR 15 C034D 1uF R023D 11,8K S006D
SDA-SSB R021D 47 RES 330pF C069D S007D 3 3 DBG
16K
16K

43 SDA RES 2 2
SCL-SSB R020D 47 44 SCL EAPD|FFX4A 32
L002D
F010D
RSPK+ 1 1
45 SA TWARNEXT|FFX4B 33 F011D
I025D 22uH S008D X070 X002D

220nF

C022D 220nF
I024D
18

10nF
PWRDN-HP I031D C048D 100nF I019D S013D TYPE
R024D
R025D

21 SOFTMUTE LINEHPOUT_L 18

10nF
RES
5%

TYPE

2,7

50V

50V

50V
19

100nF

220nF
I026D LINEHPOUT_R 16V 6 5
PWRD R026D 10 HPHOL

50V
C065D

C074D
41 PWDN RES

5%
F007D I032D HPHOR 4 RES 4

RES
16V

50V
R015D

C072D
I027D INTLINE 42 50V

10nF

10nF
3 3 DBG

C066D

C021D
46 TESTMODE
330pF C070D 2 2

RES

50V

50V
I028D R057D 1 1
AUDIO-RESETn

C073D

C075D
40 RESET
GNDDIG1
GNDDIG2

AGNDPLL

GNDPSUB

GND_REG

GND_HS

X073 X003D
CPVSS
GNDA
GND1
GND2

VSS

BAS
1uF

1uF

1uF

L003D
S017D

S018D

RSPK-
6,3V

X072
29
47
20

23

35

25

12

49

22uH F012D X001D

C079D

C031D

C062D

220nF

220nF
9
4

2
6,3V

18
6,3V

C053D 100nF I021D F014D 2 1

5%

I029D F013D
2,7

50V

50V
3 2
100nF

16V DBG
1uF 6.3V

C017D 100nF
C078D

C024D
I030D 5 4 3

RES
5%

RES
16V
R016D
100nF

16V 50V X002

RES TYPE TYPE
C067D

330pF C071D
RES

S014D
16V

R056D

50m
C057D

C016D

I020D EMC
RES

RES
PWRD R010D 10
C018D 100nF

5
16V

AUDIO-RESETn R001D 10

1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_110_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 69

10-1-30 B, MASTER - LVD RX

MASTER - LVDS RX
B B

U001B
NT72314

R097B 100
LVDS_RX 100 R083B
TX-BE0N TX-BE0N AK28 CRE0_N ARE0_N K30 DT-TX-AE0N DT-TX-AE0N
TX-BE0P TX-BE0P AJ28 CRE0_P ARE0_P J28 DT-TX-AE0P DT-TX-AE0P
R111B 100 TX-BE1N TX-BE1N AH29 J30 DT-TX-AE1N DT-TX-AE1N 100 R084B
CRE1_N ARE1_N
TX-BE1P TX-BE1P AJ29 CRE1_P ARE1_P J29 DT-TX-AE1P DT-TX-AE1P
R115B 100 TX-BE2N TX-BE2N AH30 H28 DT-TX-AE2N DT-TX-AE2N 100 R085B
CRE2_N ARE2_N
TX-BE2P TX-BE2P AJ30 CRE2_P ARE2_P H29 DT-TX-AE2P DT-TX-AE2P
R116B 100 TX-BE3N TX-BE3N AG29 G30 DT-TX-AE3N DT-TX-AE3N 100 R086B
CRE3_N ARE3_N
TX-BE3P TX-BE3P AF28 CRE3_P ARE3_P F28 DT-TX-AE3P DT-TX-AE3P
R117B 100 TX-BE4N TX-BE4N AF29 F30 DT-TX-AE4N DT-TX-AE4N 100 R087B
CRE4_N ARE4_N
TX-BE4P TX-BE4P AE28 CRE4_P ARE4_P F29 DT-TX-AE4P DT-TX-AE4P
R122B 100 TX-BECLKN TX-BECLKN AG28 G28 DT-TX-AECLKN DT-TX-AECLKN 100 R088B
CRECLK_N ARECLK_N
TX-BECLKP TX-BECLKP AG30 CRECLK_P ARECLK_P G29 DT-TX-AECLKP DT-TX-AECLKP
R124B 100 TX-BO0N TX-BO0N AH24 CRO0_N ARO0_N P28 DT-TX-AO0N DT-TX-AO0N 100 R089B FROM MTK 2
FROM MTK TX-BO0P TX-BO0P AJ24 CRO0_P ARO0_P P29 DT-TX-AO0P DT-TX-AO0P
R125B 100 TX-BO1N TX-BO1N AK24 N28 DT-TX-AO1N DT-TX-AO1N 100 R090B
CRO1_N ARO1_N
TX-BO1P TX-BO1P AH25 CRO1_P ARO1_P N29 DT-TX-AO1P DT-TX-AO1P
R126B 100 TX-BO2N TX-BO2N AK25 N30 DT-TX-AO2N DT-TX-AO2N 100 R091B
CRO2_N ARO2_N
TX-BO2P TX-BO2P AJ25 CRO2_P ARO2_P M28 DT-TX-AO2P DT-TX-AO2P
R127B 100 TX-BO3N TX-BO3N AH27 L28 DT-TX-AO3N DT-TX-AO3N 100 R092B
CRO3_N ARO3_N
TX-BO3P TX-BO3P AJ27 CRO3_P ARO3_P L29 DT-TX-AO3P DT-TX-AO3P
R128B 100 TX-BO4N TX-BO4N AK27 K28 DT-TX-AO4N DT-TX-AO4N 100 R093B
CRO4_N ARO4_N
TX-BO4P TX-BO4P AH28 CRO4_P ARO4_P K29 DT-TX-AO4P DT-TX-AO4P
R129B 100 TX-BOCLKN TX-BOCLKN AH26 M30 DT-TX-AOCLKN DT-TX-AOCLKN 100 R094B
CROCLK_N AROCLK_N
TX-BOCLKP TX-BOCLKP AJ26 CROCLK_P AROCLK_P M29 DT-TX-AOCLKP DT-TX-AOCLKP

R029B 100 TX-AE0N TX-AE0N AK18 Y30

DRE0_N BRE0_N
TX-AE0P TX-AE0P AJ18 DRE0_P BRE0_P W28
R072B 100 TX-AE1N TX-AE1N AH19 W30
DRE1_N BRE1_N
TX-AE1P TX-AE1P AJ19 DRE1_P BRE1_P W29
R073B 100 TX-AE2N TX-AE2N AH20 V28
DRE2_N BRE2_N
TX-AE2P TX-AE2P AJ20 DRE2_P BRE2_P V29
R074B 100 TX-AE3N TX-AE3N AK21 U30
DRE3_N BRE3_N
TX-AE3P TX-AE3P AJ21 DRE3_P BRE3_P T28
R075B 100 TX-AE4N TX-AE4N AH22 T30
DRE4_N BRE4_N
TX-AE4P TX-AE4P AJ22 DRE4_P BRE4_P T29
R076B 100 TX-AECLKN TX-AECLKN AK20 U28
DRECLK_N BRECLK_N
TX-AECLKP TX-AECLKP AH21 DRECLK_P BRECLK_P U29
R077B 100 TX-AO0N TX-AO0N AH14 AD28
DRO0_N BRO0_N
FROM MTK TX-AO0P TX-AO0P AJ14 DRO0_P BRO0_P AD29
R078B 100 TX-AO1N TX-AO1N AK14 AC28
DRO1_N BRO1_N
TX-AO1P TX-AO1P AH15 DRO1_P BRO1_P AC29
R079B 100 TX-AO2N TX-AO2N AK15 AC30
DRO2_N BRO2_N
TX-AO2P TX-AO2P AJ15 DRO2_P BRO2_P AB28
R080B 100 TX-AO3N TX-AO3N AH17 AA28
DRO3_N BRO3_N
TX-AO3P TX-AO3P AJ17 DRO3_P BRO3_P AA29
R081B 100 TX-AO4N TX-AO4N AK17 Y28
DRO4_N BRO4_N
TX-AO4P TX-AO4P AH18 DRO4_P BRO4_P Y29
R082B 100 TX-AOCLKN TX-AOCLKN AH16 AB30
DROCLK_N BROCLK_N
TX-AOCLKP TX-AOCLKP AJ16 DROCLK_P BROCLK_P AB29

MASTER

1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_111_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 70

10-1-31 B, MASTER V-BY-ONE OUTPUT

MASTER V-BY-ONE OUTPUT

B B

C328B
C329B
C326B
C327B
C325B

C324B

C323B
10pF
10pF
100nF
100nF
100nF

100nF

100nF
U001B

RES
RES
RES
RES
RES

RES

RES
TYPE

SYS_LVDS_VX1
VB1-TX0N C029B 100nF AJ9 TX0N ATE0_N AC2
CTRL-DISP2 VB1-TX0P C030B 100nF 16V AK9 TX0P ATE0_P AC3
CTRL-DISP1 VB1-TX1N 16V C031B 100nF AJ8 TX1N ATE1_N AB2
CTRL-DISP3 VB1-TX1P C032B 100nF 16V AK8 TX1P ATE1_P AB3
F118B
VB1-TX2N 16V C033B 100nF AJ7 TX2N ATE2_N AA2
R014B 3D-ENABLE VB1-TX2P C034B 100nF 16V AK7 TX2P ATE2_P AA1
1 100 VB1-TX3N 16V C035B 100nF AJ6 TX3N ATE3_N Y2
2 F102B VB1-TX3P C036B 100nF 16V AK6 TX3P ATE3_P Y3
3 R009B NT-CTRL-DISP2 VB1-TX4N 16V C037B 100nF AJ5 W2
TX4N ATE4_N
4 I037B R008B 100 NT-CTRL-DISP1 VB1-TX4P C038B 100nF 16V AK5 W3
TX4P ATE4_P
5 I038B
100
F014B
VB1-TX5N 16V C039B 100nF AJ4 TX5N ATECLK_N AA3
6 R007B NT-CTRL-DISP4 VB1-TX5P C040B 100nF 16V AK4 TX5P ATECLK_P Y1
7 I036B R006B 100 F013B NT-CTRL-DISP3 VB1-TX6N 16V C041B 100nF AJ3 AG2
TX6N ATO0_N
8 I035B RES R005B 100 NT-CTRL-DISP1 VB1-TX6P C042B 100nF 16V AK3 AG1
TX6P ATO0_P
9 I034B RES R011B 100 F015B SDA-DISP VB1-TX7N 16V C043B 100nF AJ2 AG3
TX7N ATO1_N
10 I033B RES R010B 47 SCL-DISP VB1-TX7P C044B 100nF 16V AK2 AF1
TX7P ATO1_P
11 I032B 47 16V AF2
ATO2_N
12 X025B VB1-TX7P HTPDn R108B F009B AJ11 AF3
HTPDN ATO2_P
13 X026B VB1-TX7N LOCKn R107B 100 F010B AK10 LOCKN ATO3_N AD2
14 100 I018B ATO3_P AD1
15 R001B 1MEG R234B 12K AJ10 AD3
EXT_SWING ATO4_N
16 X027B VB1-TX6P X019B ATO4_P AC1
17 X028B VB1-TX6N 1 3
ATOCLK_N AE2

12K

12K
18 ATOCLK_P AE3

22pF

22pF
10K

10K
19

2
4
R204B

R205B
R254B

R253B
X029B VB1-TX5P

50V

50V
20 12MEGHz R286B BTE0_N N2
X030B VB1-TX5N 100

C279B

C278B
21 G1 OSCI BTE0_P N3
22 BTE1_N M2
23 R287B 100 G2 M3
OSCO BTE1_P
24 X031B VB1-TX4P L2
BTE2_N
25 X032B VB1-TX4N +3V3-NVT +3V3-NVT L1
BTE2_P
26 F1 XTAL_BUF_OUT_N BTE3_N K2
27 F2 XTAL_BUF_OUT_P BTE3_P K3
28 X033B VB1-TX3P J2
BTE4_N
29 X034B VB1-TX3N BE-RESETn AF11 J3
SYS_RESET BTE4_P
30 BTECLK_N L3
31 F001B J4 TEST BTECLK_P K1
32 X035B VB1-TX2P F5 U2
F002B TEST_MPLL BTO0_N
33 X036B VB1-TX2N V26 U1
F003B TEST_RX BTO0_P
34 BTO1_N U3
35 BTO1_P T1
36 X037B VB1-TX1P T2
BTO2_N

S001B
X038B VB1-TX1N

50m
37 BTO2_P T3
38 BTO3_N P2
39 BTO3_P P1
40 X039B VB1-TX0P BTO4_N P3
41 X040B VB1-TX0N BTO4_P N1
42 F113B X041B BTOCLK_N R2
43 LOCKn +3V3-NVT R3
BTOCLK_P
44 X042B HTPDn
45
+3V3-NVT
46

R222B
+3V3-NVT

4.7K
47
48 MASTER

470
49
50 VDISP BE-RESETn F006B

D008B

GREEN
DBG

DBG
51
53 52

100nF

R292B
55 54
1
2

16V
57 56
2

C045B
59 58
X013B
DBG
SKHU

61 60

D001B

GREEN
1K R289B LOCKn

DBG
BC857BW(COL)
TYPE
X001B
+3V3-NVT U024B 1
X055 DBG DBG
3
4

C271B 100nF 3

16V
3

U013B

470
NCP803 3
FHD-200Hz

DBG
VCC
2 1 U011B
RESET
PDTC144EU

R312B
GND DBG
2
1

1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_112_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 71

10-1-32 B, V-BY-ONE ULTRA HD 50 Hz

V-by-One Ultra HD 50 Hz
B B
X061
1
2 VB1-TX7P
3 VB1-TX7N
4
5 VB1-TX6P
6 VB1-TX6N
7
8 VB1-TX5P
9 VB1-TX5N
10
11 VB1-TX4P
12 VB1-TX4N
13
14 VB1-TX3P
15 VB1-TX3N
16
17 VB1-TX2P
18 VB1-TX2N
19
20 VB1-TX1P
21 VB1-TX1N
22
23 VB1-TX0P
24 VB1-TX0N
25
26 LOCKn
27 HTPDn
28
29
30 F132B R130B
31 100 5% 3D-ENABLE

1nF
32 R131B
100 5% NT-CTRL-DISP3

50V
33

C047B
34
35
36
37
38 I025B R132B 100 NT-CTRL-DISP1
39

1nF
40

50V
41

C048B
42
43
44
45
46 VDISP
47
48
49
50
51
53 52
55 54
57 56
59 58
61 60

TYPE

UHD-50Hz
1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_113_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 72

10-1-33 B, MASTER I/O, FLASH MEMORY

MASTER I/O , FLASH memory

B B
U001B
TYPE

GPIO
BL-I-CTRL AF22 GPIOC_15|PWM_OUT GPIOA_0|I2C_SLAVE_SCL|MULTI_LVSYNC_OUT|MULTI_IVSYNC_IN N4
NT-CTRL-DISP1 L27 GPIOC_14|PWM_IN GPIOA_1|I2C_SLAVE_SDA|MULTI_PVSYNC_OUT|MULTI_PVSYNC_IN N5
MBS8 F26 GPIOC_13|BS8 GPIOA_2|BS0 K26 BS0
MBS7 G27 GPIOC_12|BS7 GPIOA_3|BS1 K27 MBS1
MBS6 G26 GPIOC_11|BS6 GPIOA_4|BS2 J26 MBS2
D011B L26 GPIOC_10|I2C_M_4_SDA GPIOA_5|3D_LR_IN V27 R189B 22 F130B MTK-3D-LR
D010B M27 GPIOC_09|I2C_M_4_SCK GPIOA_6|3D_IR_OUT_0 U26 R212B 22 F131B 3D-GOGGLES 3D-GOGGLES S014B
SPI0-WP R181B 22 N26 GPIOC_08|SPI_0_WS GPIOA_7|BS3 J27 MBS3 50m
SPI0-HOLD R182B 22 P27 GPIOC_07|SPI_0_HOLD GPIOA_8|3D_IR_OUT_1 U27 NT-CTRL-DISP3
MBS9 M5 GPIOC_06|SPI_1_CS_7|BS9 GPIOA_9|3D_IR_OUT_2 T26 R190B 22 NT-CTRL-DISP4
MTK-3D-LR R013B 22 D009B M4 GPIOC_05|SPI_1_CS_6 GPIOA_10|BS4 H26 MBS4
NT-CTRL-DISP2 L5 GPIOC_04|SPI_1_CS_5 GPIOA_11|BS5 H27 MBS5 MTK-3D-GOGGLES
SPLASH-ON L4 GPIOC_03|SPI_1_CS_4 GPIOA_12|I2C_M2_SCK|LED_SPI_CS3|AMBI_LIGHT AG16 F079B

F122B
D003B K5 GPIOC_02|SPI_1_CS_3 GPIOA_13|I2C_M2_SDA|LED_SPI_CK3|AMBI_LIGHT AF17 R156B 22 NT-AMBI-SPI-CLK
D005B K4 AG17 F080B
GPIOC_01|SPI_1_CS_2 GPIOA_14|I2C_M3_SCK|LED_SPI_DI3|AMBI_LIGHT
D007B J5 GPIOC_00|SPI_1_CS_1 GPIOA_15|I2C_M3_SDA|LED_SPI_DO3|AMBI_LIGHT AF18 R157B 22 NT-AMBI-SPI-MOSI
GPIOA_16|MASTER_READY_0 V5
AF16 GPIOB_31|SPI_SLAVER_DO|HSYNC_3 GPIOA_17|MASTER_READY_1 W4
AG15 GPIOB_30|SPI_SLAVER_DI|VSYNC_3 GPIOA_18|MASTER_READY_2 W5
AF15 GPIOB_29|SPI_SLAVER_CK|VDE_3 GPIOA_19|MASTER_READY_3 Y4
AG14 GPIOB_28|SPI_SLAVER_CS|H_OUT_3 GPIOA_20|SLAVE_SYNC_1 Y5
AF14 GPIOB_27|LED_SPI_DO1|HSYNC_2 GPIOA_21|SLAVE_SYNC_2 AA4 NT-LCD-PWR-ON
AG13 GPIOB_26|LED_SPI_DI1|LED_YDIO1|VSYNC_2 GPIOA_22|SLAVE_SYNC_3 AA5
AF13 GPIOB_25|LED_SPI_CK1|LED_I2C_SDA1|VDE_2 GPIOA_23|SLAVE_SYNC_4 AB4
AG12 GPIOB_24|LED_SPI_CS1|LED_I2C_SCL1|H_OUT_2 GPIOA_24|SLAVE_SYNC_5 AB5
BL-DIM8 AG22 GPIOB_23|PWM_7|LED_SPI_DO2|HSYNC_1 GPIOA_25|SLAVE_SYNC_6 AC4
BL-DIM7 AG21 GPIOB_22|PWM_6|LED_SPI_DI2|YDIO0|VSYNC_1 GPIOA_26|SLAVE_SYNC_7 AC5
BL-DIM6 AF21 GPIOB_21|PWM_5|LED_SPI_CK2|LED_I2C_SDA0|VDE_1 GPIOA_27|MULTI_CFG0|PHSYNC_OUT|MULTI_PHSYNC_IN P4
BL-DIM5 AG20 GPIOB_20|PWM_4|LED_SPI_CS2|LED_I2C_SCL0|H_OUT_1 GPIOA_28|MULTI_CHIP_CFG1 P5 AMBI-SPI-SWITCH
BL-DIM4 AF20 GPIOB_19|PWM_3|LED_SPI_DO0|HSYNC_0 GPIOA_29|MULTI_CHIP_CFG2 R4 R244B 10K F123B BL-ON
BL-DIM3 AG19 GPIOB_18|PWM_2|LED_SPI_DI0|VSYNC_0 GPIOA_30|MULTI_CHIP_CFG3 R5 F081B SWDBG
BL-DIM2 AF19 GPIOB_17|PWM_1|LED_SPI_CK0|VDE_0 GPIOA_31|SLAVE_RESET T4 D002B R160B 4.7K
BL-DIM1 AG18 GPIOB_16|PWM_0|LED_SPI_CS0|H_OUT_0
V4 GPIOB_15|SPI_1_CS0|MULTI_CHIP GPIOB_0|SPI_0_DI T27 SPI0-DI
U5 GPIOB_14|SPI_1_CK|MULTI_CHIP GPIOB_1|SPI_0_DO R26 R170B 22 SPI0-DO
U4 GPIOB_13|SPI_1_DO|MULTI_CHIP GPIOB_2|SPI_0_CK R27 R171B 22 SPI0-CLK
T5 GPIOB_12|SPI_1_DI|MULTI_CHIP GPIOB_3|SPI_0_CS P26 R172B 22 SPI0-CS
SDA-BE R201B 47 M26 GPIOB_11|SDA_SLAVER|MAIL_BOX GPIOB_4|ICE_DSU_TX AD4 R173B 22 M-DSU-TX
SCL-BE R200B 47 N27 GPIOB_10|SCK_SLAVER|MAIL_BOX GPIOB_5|ICE_DSU_RX AD5 R174B 22 M-DSU-RX
GPIOB_6|UART_RX1 AE4 R175B 22 M-UART-RX
GPIOB_7|UART_TX1 AE5 R176B 22 M-UART-TX
GPIOB_8|SCK_MASTER AG11
GPIOB_9|SDA_MASTER AF12

+3V3
X323B
F030B
SCL-BE 1
F124B 2
F031B
SDA-BE 3
16V

5 4
C277B

TYPE
100nF

+3V3-NVT
3
1

U010B
NX3L4684TK U008B 1 +3V3

100nF
PDTC144EU

10K
F125B VCC F128B
MTK-AMBI-SPI-CLK MTK-AMBI-SPI-MOSI +3V3-NVT

10K

10K

16V
5 1Y0 2Y0 7

5%
F126B
2 SDA-DISP R177B 4.7K

C275B
AMBI-SPI-SWITCH 4 1S 2S 8 AMBI-SPI-SWITCH
SCL-DISP R178B 4.7K

R206B
U003B
AMBI-SPI-CLK AMBI-SPI-MOSI

8
R208B

R300B
3 1Z 2Z 9 M25P16-VMN6P

10K

10K
F127B
NT-AMBI-SPI-CLK 2 1Y1 2Y1 10 NT-AMBI-SPI-MOSI SPI0-DO F088B 5 D
VCC
Q 2
FLASH CTRL-DISP1
GND

F129B
GND_HS SPI0-CLK F087B 6 C
1K

R236B

R239B
SPI0-CS
11

F086B 1 X325
6

S
F140B BS0 SCL-BE S016B SCL-DISP SCL-DISP F146B 1

22
SPI0-WP F089B MBS1 F145B
R133B

3 W 2
F149B
SDA-BE S013B SDA-DISP SDA-DISP F144B 3
SPI0-HOLD F090B 7 HOLD
MBS2 50m 5 4
VSS
MBS3 TYPE

R207B
4

1
2
MBS4 +3V3 +3V3 +3V3

X015B
DBG
SKHU
MBS5

100nF
4.7K
4.7K
SPI0-DI F091B MBS6

10K
10K

10K
10K
16V
3
4
MBS7

C050B
X312B

14
M-DSU-TX MBS8

RES
R161B
R162B
R096B
R158B

R154B
R155B
1 U022B
2 PCA9543APWR

VCC
M-DSU-RX 3 MBS9
5 4 SCL-BE 12 SCL SD0 5 SDA-DISP
SDA-BE 13 SDA SC0 6 SCL-DISP
TYPE 4
INT0
X313B 11 INT
M-UART-TX 1 BE-RESETn
R159B SD1 9
2 10 3 10
RESET SC1
M-UART-RX

10K

10K

10K

10K

10K

10K

10K

10K
3 F133B INT1 8
5 4 I023B 1 A0
2 A1

GND
TYPE

R259B

R260B

R262B

R263B

R264B

R265B

R266B

R267B

7
X342B
SPI0-CLK 1
SPI0-CS 2
SPI0-DO 3
SPI0-DI 4
BE-RESETn 5
6
8 7

TYPE
+3V3-NVT DBG
4.7K

4.7K

4.7K

4.7K
5%

5%

5%

5%
R224B

R225B

R226B

R227B

DBG
X314B
F155B 1
2
3
M-DSU-RX F156B 4
M-DSU-TX F157B 5
M-UART-RX F158B 7 6
M-UART-TX F159B
TYPE
1 2014-02-14

MTK UHD 50 Hz
715RLPCB000000037
7800

19580_114_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 73

10-1-34 B, MASTER - DDR

MASTER DDR
B B

DDR1V5-M DDR1V5-M

U001B

H9
H2
F1
E9
D2
C9
C1
A8
A1

R9
R1
N9
N1
K8
K2
G7
D9
B2

H9
H2
F1
E9
D2
C9
C1
A8
A1

R9
R1
N9
N1
K8
K2
G7
D9
B2
DDR3_32BIT
MA0 B15 MA0 DDR1_DQL0 B9 DDRA-DQL0 U004B U005B
MA1 C18 MA1 DDR1_DQL1 A3 DDRA-DQL1 H5TQ1G63BFR-H9C H5TQ1G63BFR-H9C
MA2 C14 MA2 DDR1_DQL2 A9 DDRA-DQL2 VDDQ VDD VDDQ VDD
MA3 A12 MA3 DDR1_DQL3 B3 DDRA-DQL3 DDRA-DQU0 D7 0 0 N3 D046B DDR-MA0 DDRB-DQU0 D7 0 0 N3 D061B DDR-MA0
MA4 C19 MA4 DDR1_DQL4 A10 DDRA-DQL4 DDRA-DQU1 C3 1 1 P7 DDR-MA1 DDRB-DQU1 C3 1 1 P7 DDR-MA1
MA5 C12 MA5 DDR1_DQL5 B2 DDRA-DQL5 DDRA-DQU2 D038B C8 2 2 P3 DDR-MA2 DDRB-DQU2 D055B C8 2 2 P3 DDR-MA2
MA6 B19 MA6 DDR1_DQL6 C9 DDRA-DQL6 DDRA-DQU3 D039B C2 3 3 N2 DDR-MA3 DDRB-DQU3 C2 3 3 N2 DDR-MA3
MA7 A13 MA7 DDR1_DQL7 C2 DDRA-DQL7 DDRA-DQU4 A7 4
DQU
4 P8 D047B DDR-MA4 DDRB-DQU4 A7 4
DQU
4 P8 D062B DDR-MA4
MA8 A19 MA8
DDRA-DQU5 A2 5 5 P2 DDR-MA5 DDRB-DQU5 A2 5 5 P2 DDR-MA5
MA9 B14 MA9 DDR1_DQU0 B4 DDRA-DQU0 DDRA-DQU6 B8 6 6 R8 DDR-MA6 DDRB-DQU6 B8 6 6 R8 DDR-MA6
MA10 B21 MA10 DDR1_DQU1 C7 DDRA-DQU1 DDRA-DQU7 A3 7 A 7 R2 DDR-MA7 DDRB-DQU7 A3 7 A 7 R2 DDR-MA7
MA11 A18 MA11 DDR1_DQU2 A4 DDRA-DQU2 8 T8 DDR-MA8 8 T8 DDR-MA8
MA12 B20 MA12 DDR1_DQU3 B8 DDRA-DQU3 DDRA-DQSU-ND040B B7 DQSU1 9 R3 DDR-MA9 DDRB-DQSU-N D056B B7 DQSU1 9 R3 DDR-MA9
MA13 C13 MA13 DDR1_DQU4 B5 DDRA-DQU4 DDRA-DQSU-PD041B C7 DQSU2 10 L7 D048B DDR-MA10 DDRB-DQSU-P D057B C7 DQSU2 10 L7 DDR-MA10
DDR1_DQU5 B7 DDRA-DQU5 11 R7 DDR-MA11 11 R7 DDR-MA11
MBA0 C11 MBA0 DDR1_DQU6 C4 DDRA-DQU6 DDRA-DQSL-PD042B F3 DQSL N7 DDR-MA12 DDRB-DQSL-P D058B F3 DQSL N7 DDR-MA12
12 12
MBA1 C20 MBA1 DDR1_DQU7 A7 DDRA-DQU7 DDRA-DQSL-ND043B G3 DQSL T3 DDR-MA13 DDRB-DQSL-N D059B G3 DQSL T3 DDR-MA13
13 13
MBA2 B12 M7 M7

R019B

R021B
MBA2 14 14
C6 DDRA-DQSL-P DDRA-DQL0 D044B E3 DDRB-DQL0 E3

100nF

100nF
DDR1_DQSL_P 0 BC 0 BC
MWEn DDRA-DQSL-N DDRA-DQL1 DDR1V5-M DDRB-DQL1 DDR1V5-M

1nF

1nF
A15 MWE DDR1_DQSL_N A6 F7 1 AP F7 1 AP F148B
MCASn DDRA-DQL2 DDRB-DQL2

16V

50V

16V

50V
C15 MCAS F2 2 F017B F2 2
MRASn DDRA-DQSU-P DDRA-DQL3 DDRB-DQL3

1%
C067B

C071B

C068B

C072B
A16 MRAS DDR1_DQSU_P B6 F8 3 VREFDQ H1 F8 3 VREFDQ H1 R020B
1%
DDRA-DQSU-N DDRA-DQL4 DQL DDRB-DQL4 D060B H3 DQL

1K

1K
DDR1_DQSU_N C5 H3 4 VREFCA M8 4 VREFCA M8
MCKE A21 DDR_MCKE
DDRA-DQL5 H8 5
1K
1%
R018B DDRB-DQL5 H8 5
1K
R246B
1%
MODT B10 DDR_ODT DDR1_DML C3 DDRA-DML DDRA-DQL6 G2 6 ZQ L8 240 DDRB-DQL6 G2 6 ZQ L8
MRSTn B13 DDR_MRST DDR1_DMU C8 DDRA-DMU DDRA-DQL7 D045B H7 7
R245B DDRB-DQL7 H7 7
240 1%

0 M2 DDRM-BA0 0 M2 DDRM-BA0
MCS0n C10 DDR_CS0 DDR2_DQL0 B28 DDRB-DQL0 J1 BA 1 N8 D049B DDRM-BA1 J1 BA 1 N8 D064B DDRM-BA1
MCS1n B11 DDR_CS1 DDR2_DQL1 C22 DDRB-DQL1 J9 2 M3 DDRM-BA2 J9 2 M3 DDRM-BA2
DDR2_DQL2 C28 DDRB-DQL2 L1 NC L1 NC
MCLKA-P C16 DDR1_MCLK0_P DDR2_DQL3 B22 DDRB-DQL3 L9 RAS J3 DDR-MRASn L9 RAS J3 DDR-MRASn
MCLKA-N B17 DDR1_MCLK0_N DDR2_DQL4 C29 DDRB-DQL4 T7 ODT K1 DDR-MODT T7 ODT K1 DDR-MODT
DDR2_DQL5 C21 DDRB-DQL5 CAS K3 DDR-MCASn CAS K3 DDR-MCASn
MCLKB-P C17 DDR2_MCLK0_P DDR2_DQL6 B29 DDRB-DQL6 CK J7 D050B DDR-MCLKA-P CK J7 D065B DDR-MCLKB-P
MCLKB-N B18 DDR2_MCLK0_N DDR2_DQL7 A22 DDRB-DQL7 CK K7 D051B DDR-MCLKA-N CK K7 D066B DDR-MCLKB-N
CKE K9 D052B DDR-MCKE CKE K9 D067B DDR-MCKE
DDR1V5-M R015B 1K
I027B B16 BYPASS_TEST0 DDR2_DQU0 B24 DDRB-DQU0 CS L2 D053B DDR-MCS0n CS L2 D068B DDR-MCS1n DDR-MCS1n
RES DDR2_DQU1 A27 DDRB-DQU1 WE L3 DDR-MWEn DDR-MCS0n I029B WE L3 DDR-MWEn I030B
R016B 1K H15 DDR_VREF DDR2_DQU2 C23 DDRB-DQU2 RESET T2 DDR-MRSTn RESET T2 DDR-MRSTn

1K

1K
DDRB-DQU3

RES
1% DDR2_DQU3 C27
DDRB-DQU4 DDRA-DML D069B DDRB-DML

RES
DDR2_DQU4 C24 DML E7 DML E7
B27 DDRB-DQU5 D3 D054B DDRA-DMU D3 DDRB-DMU
100nF

F147B DDR2_DQU5 DMU DMU

1K

10nF

DDRB-DQU6

R214B

R215B
DDR2_DQU6 A24
1%

VSSQ VSS VSSQ VSS

DDRB-DQU7
16V

16V

DDR2_DQU7 C26
C001B

C003B

DDRB-DQSL-P
R017B

DDR2_DQSL_P B26
G9
G1
F9
E8
E2
D8
D1
B9
B1

T9
T1
P9
P1
M9
M1
J8
J2
G8
E1
B3
A9

G9
G1
F9
E8
E2
D8
D1
B9
B1

T9
T1
P9
P1
M9
M1
J8
J2
G8
E1
B3
A9
DDR2_DQSL_N C25 DDRB-DQSL-N
GND
DDR2_DQSU_P B25 DDRB-DQSU-P
DDR2_DQSU_N A25 DDRB-DQSU-N

DDR2_DML B23 DDRB-DML GND GND

DDR2_DMU A28 DDRB-DMU

MBA1 R030B 22 DDRM-BA1 DDR-MA0 R038B 22 MA0

4 5
1%
MA12 R030B 22 DDR-MA12 DDR-MCKE R039B 22 MCKE
3 6 D031BD032BD033B D028B
1%

MA4 R030B 22 DDR-MA4 DDR-MA10 R040B 22 MA10

2 7
1%
MA6 R030B 22 DDR-MA6 DDR-MRASn R041B 22 MRASn
1 8
1%
DDR-MCASn R042B 22 MCASn
1%
DDR-MWEn R043B 22 MWEn
MA8 R031B 22 DDR-MA8 1%
4 5 DDR-MA7 R044B 22 MA7
MA1 R031B 22 DDR-MA1 1%
3 6 DDR-MCS0n R045B 22 MCS0n
1%
MA11 R031B 22 DDR-MA11 DDR-MCS1n R046B 22 MCS1n
2 7
1%
DDR-MCLKA-N R047B 1 MCLKA-N

DDR-MCLKA-P R048B 1 MCLKA-P

DDR1V5-M
MA2 R032B 22 DDR-MA2 DDR-MCLKB-N R049B 1 MCLKB-N L001B I026B
4 5
+1V5-M
MA9 R032B 22 DDR-MA9 DDR-MCLKB-P R050B 1 MCLKB-P 30H
3 6 DDR1V5-M

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF
10uF

10uF

10nF

10nF

10nF

10nF

10nF

10nF

10nF

10nF
6,3V

6,3V

RES

RES

RES

RES

RES

RES

RES

RES
MA13 R032B 22 DDR-MA13 I028B R052B 1K

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V
2 7

C063B

C064B

C004B

C005B

C006B

C007B

C008B

C009B

C010B

C011B

C012B

C013B

C014B

C015B

C311B

C312B

C313B

C314B

C315B

C316B

C317B

C318B
1%
MRSTn R032B 22 DDR-MRSTn DDR-MODT R051B 22 MODT
1 8
1%

100
MA5 R033B 22 DDR-MA5 DDR-MCLKA-P R068B
4 5
1%
MA3 R033B 22 DDR-MA3 DDR-MCLKA-N
3 6
DDR-MCLKB-P R069B 100
MBA2 R033B 22 DDRM-BA2 1%
2 7 DDR-MCLKB-N
MBA0 R033B 22 DDRM-BA0
1 8

3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

19580_115_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 10-1-35

+2V5-M
+2V5-M
+1V0-M

220H
220H

L012B
L011B
C258B 10uF C257B 10uF

6,3V 6,3V

J9

L9

P8
N9
N8
K9
H9
B, MASTER - POWER

M9
J24
J23
J22
J21
J20
J11
J10

L22
F24
F23

P22
E30
E29
E28
E27
E26
E25
E24
E23

R22
N22
K22
H24
H23
H22
H21
H20
H11
H10
D30
D29
D28
D27
D26
D25
D24
D23
C30
B30

G24
G23

M22

I015B
I014B
U001B
TYPE

C146B 100nF C141B 100nF

CORE_1.0V_9
CORE_1.0V_8
CORE_1.0V_7
CORE_1.0V_6
CORE_1.0V_5
CORE_1.0V_4
CORE_1.0V_3
CORE_1.0V_2
CORE_1.0V_1

CORE_1.0V_50
CORE_1.0V_49
CORE_1.0V_48
CORE_1.0V_47
CORE_1.0V_46
CORE_1.0V_45
CORE_1.0V_44
CORE_1.0V_43
CORE_1.0V_42
CORE_1.0V_41
CORE_1.0V_40
CORE_1.0V_39
CORE_1.0V_38
CORE_1.0V_37
CORE_1.0V_36
CORE_1.0V_35
CORE_1.0V_34
CORE_1.0V_33
CORE_1.0V_32
CORE_1.0V_31
CORE_1.0V_30
CORE_1.0V_29
CORE_1.0V_28
CORE_1.0V_27
CORE_1.0V_26
CORE_1.0V_25
CORE_1.0V_24
CORE_1.0V_23
CORE_1.0V_22
CORE_1.0V_21
CORE_1.0V_20
CORE_1.0V_19
CORE_1.0V_18
CORE_1.0V_17
CORE_1.0V_16
CORE_1.0V_15
CORE_1.0V_14
CORE_1.0V_13
CORE_1.0V_12
CORE_1.0V_11
CORE_1.0V_10
16V 16V

C147B 100nF C142B 100nF D13

CORE_1.0V_51 DDR_MMU_1.5V_1
MASTER - POWER

R8
RES 16V 16V CORE_1.0V_52 DDR_MMU_1.5V_2 D14
T22
CORE_1.0V_53 DDR_MMU_1.5V_3 E13
C148B 100nF C143B 100nF T8
CORE_1.0V_54 DDR_MMU_1.5V_4 E14
U22
16V 16V CORE_1.0V_55 DDR_MMU_1.5V_5 F13
U8
CORE_1.0V_56 DDR_MMU_1.5V_6 F14
V22
CORE_1.0V_57 DDR_MMU_1.5V_7 G13
C149B 100nF C144B 100nF V8
CORE_1.0V_58 DDR_MMU_1.5V_8 G14
W22
RES 16V 16V CORE_1.0V_59 DDR_MMU_1.5V_9 H13
W8
CORE_1.0V_60 DDR_MMU_1.5V_10 H14
C150B 100nF C145B 100nF Y22
CORE_1.0V_61 DDR_MMU_1.5V_11 H17
Y8
16V 16V CORE_1.0V_62 DDR_MMU_1.5V_12 H18

TX-2.5V-M
RX-2.5V-M
Y9
CORE_1.0V_63 DDR_MMU_1.5V_13 J13
AA14
CORE_1.0V_64 DDR_MMU_1.5V_14 J14
AA15
CORE_1.0V_65 DDR_MMU_1.5V_15 J17
AA16
CORE_1.0V_66 DDR_MMU_1.5V_16 J18
AA17
MMU-1.5V-M

CORE_1.0V_67 DDR_MMU_1.5V_17 K13

AA18
K14

+2V5-M
+2V5-M
AA19 CORE_1.0V_68 DDR_MMU_1.5V_18
K16
POWER

AA20 CORE_1.0V_69 DDR_MMU_1.5V_19

CORE_1.0V_70 DDR_MMU_1.5V_20 K17
AA21
K18
Circuit Diagrams and PWB Layouts

AA22 CORE_1.0V_71 DDR_MMU_1.5V_21

CORE_1.0V_72 DDR_MMU_1.5V_22 K19
AA8
AA9 CORE_1.0V_73

220H
220H
P9

L014B
L013B
AB10 CORE_1.0V_74 TX_2.5_1
CORE_1.0V_75 TX_2.5_2 R9
C260B 10uF C259B 10uF AB11
CORE_1.0V_76 TX_2.5_3 T9
AB12
TX-2.5V-M

6,3V 6,3V CORE_1.0V_77 TX_2.5_4 U9

AB13
CORE_1.0V_78 TX_2.5_5 V9
AB14
CORE_1.0V_79 TX_2.5_6 W9
AB15

I013B
AB16 CORE_1.0V_80
AC9

I012B
AB9 CORE_1.0V_81 VX1_2.5V_1
VX1_2.5V_2 AC10
MPLL_2.5V_1 VX1_2.5V_3 AC11
C156B 100nF C151B 100nF F3
QM14.3E LA

MPLL_2.5V_2 VX1_2.5V_4 AC12

F4
16V 16V VX1_2.5V_5 AC13

C157B 100nF C152B 100nF

IO_3.3V_15
IO_3.3V_14
IO_3.3V_13
IO_3.3V_12
IO_3.3V_11
IO_3.3V_10
IO_3.3V_9
IO_3.3V_8
IO_3.3V_7
IO_3.3V_6
IO_3.3V_5
IO_3.3V_4
IO_3.3V_2
IO_3.3V_1

RX_2.5V_15
RX_2.5V_14
RX_2.5V_13
RX_2.5V_12
RX_2.5V_11
RX_2.5V_10
RX_2.5V_9
RX_2.5V_8
RX_2.5V_7
RX_2.5V_6
RX_2.5V_5
RX_2.5V_4
RX_2.5V_3
RX_2.5V_2
RX_2.5V_1
VX-2.5V-M

DDR_DLL_2.5V_2
DDR_DLL_2.5V_1

DDR_CLK_1.5V_2
DDR_CLK_1.5V_1

DDR_VCCAD_1.0V_4
DDR_VCCAD_1.0V_3
DDR_VCCAD_1.0V_2
DDR_VCCAD_1.0V_1

16V 16V

MPLL-2.5V-M
C153B 100nF
J19
J12
J15
10.

J8

T23
L23
L8

E15
Y23
V23
P23

H19
H12
D15
K15
U23
R23
N23
K23
K8

M23

AB23
AB22
AB21
AB20
AB19
AB18
AB17
AA23
AC23
AC22
AC21
AC16
AC15
AC14
M8

W23

RES 16V

MPLL-2.5V-M
C154B 100nF

16V

C155B 100nF
I/O-3.3V-M
EN 74

16V

VX-2.5V-M
RX-2.5V-M

2014-Apr-17 back to
div.table
DLL-2.5V-M

DDR-AD1.0V-M

+2V5-M
DDRCLK-1.5V-M

L005B

220H
+1V0-M

220H
L015B

C261B 10uF

6,3V
SENSE+1V0M

I011B
X007B

DDR1V5-M
I007B

220H

C158B 100nF
DDR-AD1.0V-M

L003B

16V
C256B 10uF C255B 10uF
C159B 100nF C319B 10uF
6,3V 6,3V
16V 6.3V
DLL-2.5V-M
I009B

C116B 100nF C112B 100nF C099B 100nF

F025B

16V RES 16V RES 16V

C130B 100nF C119B 100nF C113B 100nF C100B 100nF C087B 100nF C075B 100nF

16V 16V RES 16V 16V RES 16V 16V

C131B 100nF C120B 100nF C114B 100nF C101B 100nF C088B 100nF C076B 100nF

16V 16V 16V 16V RES 16V 16V

C132B 100nF C121B 100nF C115B 100nF C102B 100nF C089B 100nF C077B 100nF

16V 16V 16V 16V 16V 16V

+3V3-NVT

C133B 100nF C122B 100nF C103B 100nF C090B 100nF C078B 100nF
RES 16V 16V 16V 16V RES 16V
220H
L016B

C134B 100nF C123B 100nF C104B 100nF C091B 100nF C079B 100nF

16V 16V 16V 16V 16V

C262B 10uF
+1V5-M

C135B 100nF C124B 100nF C105B 100nF C092B 100nF C080B 100nF
6,3V
16V 16V 16V RES 16V 16V
220H
L004B

C160B 100nF C136B 100nF C125B 100nF C106B 100nF C093B 100nF C081B 100nF

16V RES 16V RES 16V 16V 16V 16V

I008B

C161B 100nF C137B 100nF C126B 100nF C107B 100nF C094B 100nF C082B 100nF
RES 16V 16V 16V 16V RES 16V 16V
C320B 10uF
7800

C162B 100nF C138B 100nF C127B 100nF C108B 100nF C095B 100nF C083B 100nF
6.3V
16V RES 16V RES 16V 16V RES 16V 16V
C117B 100nF
MTK UHD 50 Hz

16V
C163B 100nF C139B 100nF C128B 100nF C109B 100nF C096B 100nF C084B 100nF
C118B 100nF
16V RES 16V RES 16V 16V 16V 16V
16V
C164B 100nF C140B 100nF C129B 100nF C110B 100nF C097B 100nF C085B 100nF
DDRCLK-1.5V-M

RES
I010B

I/O-3.3V-M

RES 16V 16V 16V RES 16V 16V 16V

MMU-1.5V-M

C111B 100nF C098B 100nF C086B 100nF

16V 16V 16V

I/O-3.3V-M

715RLPCB000000021
B

3
2013-12-13

14-03-26
19580_116_140313.eps
 10-1-36

B
B, MASTER - GROUND

G4
G3
E9
E8
E7
E6
E5
E4
E3
D9
D8
D7
D6
D5
D4
D3
D2
D1
C1
B1

E17
D17
F11
E22
E21
E20
E19
E18
E12
E11
E10
D22
D21
D20
D19
D18
D12
D11
D10
MASTER - GND

TYPE
U001B

GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35

Y10 VX_GND_1
F12

MPLL_GND_2
MPLL_GND_1
Y11 VX_GND_2 GND_36
VX_GND_3 GND_37 F18
Y12

DDR_APLL_GND_2
DDR_APLL_GND_1
VX_GND_4 GND_38 F19
Y13
VX_GND_5 GND_39 F20
AA10
VX_GND_6 GND_40 F21
AA11
VX_GND_7 GND_41 F22
AA12
VX_GND_8 GND_42 G11
AA13
VX_GND_9 GND_43 G12
AG10
VX_GND_10 GND_44 G18
AG4
VX_GND_11 GND_45 G19
AG5
VX_GND_12 GND_46 G20
AG6
VX_GND_13 GND_47 G21
AG7
VX_GND_14 GND_48 G22
AG8
VX_GND_15 GND_49 K10
AG9
VX_GND_16 GND_50 K11
AH1
K12
Circuit Diagrams and PWB Layouts

AH10 VX_GND_17 GND_51

VX_GND_18 GND_52 K20
AH11
VX_GND_19 GND_53 K21
AH12
VX_GND_20 GND_54 L10
AH2
VX_GND_21 GND_55 L11
AH3
VX_GND_22 GND_56 L12
AH4
VX_GND_23 GND_57 L13
AH5
VX_GND_24 GND_58 L14
AH6
VX_GND_25 GND_59 L15
AH7
VX_GND_26 GND_60 L16
AH8
VX_GND_27 GND_61 L17
AH9
L18
QM14.3E LA

AJ1 VX_GND_28 GND_62

VX_GND_29 GND_63 L19
AJ12
VX_GND_30 GND_64 L20
AK12
GND_65 L21
LVDS_TX_GND_1 GND_66 M10
H2
LVDS_TX_GND_2 GND_67 M11
H3
M12
10.

H4 LVDS_TX_GND_3 GND_68
LVDS_TX_GND_4 GND_69 M13
N6
LVDS_TX_GND_5 GND_70 M14
P6
LVDS_TX_GND_6 GND_71 M15
R6
LVDS_TX_GND_7 GND_72 M16
T6
LVDS_TX_GND_8 GND_73 M17
U6
M18
EN 75

V2 LVDS_TX_GND_9 GND_74
LVDS_TX_GND_10 GND_75 M19
V3
LVDS_TX_GND_11 GND_76 M20
V6
LVDS_TX_GND_12 GND_77 M21
W6
LVDS_TX_GND_13 GND_78 N10

2014-Apr-17 back to
Y6

div.table
GND

LVDS_TX_GND_14 GND_79 N11

AF4
LVDS_TX_GND_15 GND_80 N12
AF5
GND_81 N13
LVDS_RX_GND_1 GND_82 N14
R28
LVDS_RX_GND_2 GND_83 N15
R29
LVDS_RX_GND_3 GND_84 N16
W26
LVDS_RX_GND_4 GND_85 N17
W27
LVDS_RX_GND_5 GND_86 N18
Y26
LVDS_RX_GND_6 GND_87 N19
Y27
LVDS_RX_GND_7 GND_88 N20
AA26
LVDS_RX_GND_8 GND_89 N21
AA27
LVDS_RX_GND_9 GND_90 P10
AB26
LVDS_RX_GND_10 GND_91 P11
AB27
LVDS_RX_GND_11 GND_92 P12
AC26
LVDS_RX_GND_12 GND_93 P13
AC27
LVDS_RX_GND_13 GND_94 P14
AD26
LVDS_RX_GND_14 GND_95 P15
AD27
LVDS_RX_GND_15 GND_96 P16
AE23
LVDS_RX_GND_16 GND_97 P17
AE24
LVDS_RX_GND_17 GND_98 P18
AE25
LVDS_RX_GND_18 GND_99 P19
AE26
LVDS_RX_GND_19 GND_100 P20
AE27
LVDS_RX_GND_20 GND_101 P21
AE29
LVDS_RX_GND_21 GND_102 R10
AE30
LVDS_RX_GND_22 GND_103 R11
AF23
LVDS_RX_GND_23 GND_104 R12
AF24
LVDS_RX_GND_24 GND_105 R13
AF25
LVDS_RX_GND_25 GND_106 R14
AF26
LVDS_RX_GND_26 GND_107 R15
AF27
LVDS_RX_GND_27 GND_108 R16
AG23
LVDS_RX_GND_28 GND_109 R17
AG24
LVDS_RX_GND_29 GND_110 R18
AG25
LVDS_RX_GND_30 GND_111 R19
AG26
LVDS_RX_GND_31 GND_112 R20
AG27
LVDS_RX_GND_32 GND_113 R21
AH13
LVDS_RX_GND_33 GND_114 T10
AH23
LVDS_RX_GND_34 GND_115 T11
AJ13
LVDS_RX_GND_35 GND_116 T12
AJ23
GND_117 T13
DDR_CLK_GND1 GND_118 T14
D16
DDR_CLK_GND2 GND_119 T15
E16
GND_169
GND_168
GND_167
GND_166
GND_165
GND_164
GND_163
GND_162
GND_161
GND_160
GND_159
GND_158
GND_157
GND_156
GND_155
GND_154
GND_153
GND_152
GND_151
GND_150
GND_149
GND_148
GND_147
GND_146
GND_145
GND_144
GND_143
GND_142
GND_141
GND_140
GND_139
GND_138
GND_137
GND_136
GND_135
GND_134
GND_133
GND_132
GND_131
GND_130
GND_129
GND_128
GND_127
GND_126
GND_125
GND_124
GND_123
GND_122
GND_121
GND_120

7800
Y21
Y20
Y19
Y18
Y17
Y16
Y15
Y14
W21
W20
W19
W18
W17
W16
W15
W14
W13
W12
W11
W10
V21
V20
V19
V18
V17
V16
V15
V14
V13
V12
V11
V10
U21
U20
U19
U18
U17
U16
U15
U14
U13
U12
U11
U10
T21
T20
T19
T18
T17
T16

MTK UHD 50 Hz
715RLPCB000000021
B

3
2013-12-13

14-03-26
19580_117_140313.eps
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 76

10-1-37 B, VDISP - UHD

Vdisp - UHD
B B
X010
1
2
3
4 1 S018B 8
5 50m RES
6 2 S018B 7
7 50m RES
8 3 S018B 6
50m RES
TYPE
F119B 4 S018B 5
F120B
50m RES

1 S017B 8
+12V 50m RES
2 S017B 7
50m RES
3 S017B 6
50m RES

4 S017B 5
50m RES

SI4835DDY-GE3
RES

5 6 7 8
1 2 3

U018B
+12V F073B

SI3443CDV

1 2 5 6
!

U019B
4
X016B I005B
+3V3-NVT F072B
VDISP

4
R198B
T 4A 32V

RES
C017B

100nF
4

100nF
47
100K

22uF
4,7K

C296B 22nF

10V

16V

R199B

RES
PUMD12

16V

16V
1uF

C049B

3
16V
R218B

RES

5 U020B

RES
47K

C297B

C298B
I001B
3 I002B C295B 100nF
R003B

I003B
16V

22K

47
I020B 6

R294B
I004B RES RES DBG DBG

RES

22K
NT-LCD-PWR-ON R004B 1K 2 U020B
R219B I041B D006B
PUMD12
R295B

R012B
R002B

4,7K GREEN
1
RES

I006B
10K

NT-LCD-PWR-ON 1 U009B
PDTC144EU

NT-LCD-PWR-ON 1 U012B
PDTC144EU

2 RES

3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

19580_118_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 77

10-1-38 B, NOVATEK SUPPLY

NOVATEK SUPPLY
B B

L010B I059B
+12V

100nF
30H

10uF

10uF

100nF
16V 10uF
RES 16V

16V

16V

C345B

C299B
C343B

C344B

C292B

16V
U028B
TPS54494PWP

1 VIN1 VIN2 16

L027B L028B
100nF C293B I056B 2 15 C294B 100nF F021B
+1V0-M VBST1 VBST2 +1V5-M
1.5uH 1.5uH
16V I063B 16V

22uF

22uF

22uF

22uF

22uF

22uF
3 SW1 SW2 14

RES
6,3V

6,3V

6,3V

6,3V

RES6,3V

6,3V
C369B

C368B

C367B

C370B

C371B

C372B
4 PGND1 PGND2 13
+3V3
I065B ENABLE+1V5+2V5
5 EN1 EN2 12
D004B I064B
R233B 470

10K

1nF
6 11
PG1 PG2 +3V3

50V
LTST-C190 RED 5%

C357B
1nF
7 VFB1 VFB2 10
10 R196B R197B 10

50V

GND_HS
5 4 9 I055B 4 5

R134B

C352B
VREG5

GND
10 R196B DETECT12V S010B R197B 10 C355B 1nF C356B 1nF
6 3 RES GND-D3 3 6

1uF
I062B 50V 50V

17

16V
8
10 R196B GND-D3 R197B 10

C381B
7 2 BE-ENABLE 2 7
I057B
F121B
GND-D3
F020B C354B 1nF C353B 10 R196B R197B 10
8 1 ENABLE+3V3-NVT 1 8
50V 1nF 50V I058B I061B
X003B 22K R120B +1V5-M
C386B 1uF R238B 8.2K I054B
+1V0-M 1%
6.3V 1%
R250B
GND-D3 RES C378B

220K
SENSE+1V0M 10 C377B RES 22pF 50V

470K

22K
50V 22pF

5%
22K

1%
R112B
+3V3

1%

RES
R153B

R119B
RES
+5V +3V3

R118B
RES
GND-D3 GND-D3

1
L023B

R109B

R110B
GND-D3 GND-D3
30H

RES
3

I039B U025B
R147B AO3414
1
10K 2

R148B 10
I066B

10uF
U026B F022B

6,3V
RT9187GSP
U002B +3V3-NVT

C337B

10K
BC857BW(COL)
2
I031B
1 3

100nF
VIN1 VOUT1
F024B

16V
F023B
1

R106B
2 4 +2V5-M
+3V3 VIN2 VOUT2
2

C016B
1MEG
3
47K

22K
NC 7
ENABLE+3V3-NVT R105B 10K
1%

RES

RES
8 5 I016B 1
EN BP|ADJ I019B

GND GND_HS 3 +3V3

R240B

R113B

R123B
U006B U029B
F103B
BC857BW(COL)
RT9715EGB RES
10uF

I068B I067B 5 1
100uF 16V

VIN VOUT
C339B

6,3V

1MEG
I017B
C303B

22K

4 EN| EN NC 3

10nF
+3V3-NVT

10K

22K
100nF
1%

10uF

10uF
RES

RES
GND

16V
C358B

16V

6,3V

6,3V
+5V
R121B

R114B

C002B

C338B

C302B
22K

2
R104B

R103B
22K

R151B

ENABLE+1V5+2V5 ENABLE+1V5+2V5
6
R150B

2 U007B
I042B BC847BS(COL)
3
1
I040B
R152B 47K 5 U007B
+3V3-NVT BC847BS(COL)
22K

4
R149B

1 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

19580_119_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 78

10-1-39 B, RF4CE

RF4CE
B +3V3-STANDBY B

L001E

1KH
I007E
X004E
1 3

100nF

220pF

100nF

100nF

100nF

100nF
10uF
1uF
15pF

15pF

16V

50V

16V

16V

16V

16V
6.3V

6.3V
2
4
I010E

C002E

C012E

C003E

C004E

C010E

C016E

C005E

C006E
50V

50V
C008E

C009E

1uF
28
27
24
29
21
31

40
39
10
+3V3-STANDBY U003E

6.3V
+3V3-STANDBY

C011E
DCOUPL
AVDD1
AVDD2
AVDD3
AVDD4
AVDD5
AVDD6

DVDD1
DVDD2
X003E

GND

10K
U004E
100nF

U001E
22 LFB18 FEED
RT9818C-29GVL XOSC_Q1 I004E

5%
3
16V

3
BAL1 I006E L002E

R002E
VDD RES
C007E

23 XOSC_Q2 I005E UNBAL 1

RES

25 4 4,7nH

C014E
F004E RF_P BAL2 GND
RESET|RESET 20 RESET_N RF_N 26

50V
10nF
19 36

2
5
6

470fF
P0_0 P2_0
GND 18 35

16V
P0_1 P2_1

C001E
17 P0_2 P2_2 34
16 P0_3 P2_3|XOSC32K_Q2 33 F010E
15 P0_4 P2_4|XOSC32K_Q1 32 F006E
14 P0_5
RF4CE-DD
13 P0_6 I003E
RF4CE-DC
RF4CE-RESETn 12 P0_7 RBIAS 30 F007E

10pF
56K
F003E
MTK-TX-RF4CE R004E 10 11 2

50V
P1_0 SCL

5%

C015E
F002E 5% 9 P1_1
MTK-RX-RF4CE R005E 10 8 P1_2 SDA 3

R006E
5% F009E 7 P1_3
6 P1_4 NC2 4
+3V3-STANDBY 5 1
P1_5 NC1
38 P1_6
37 P1_7
100K

GND_HS
X303
RES 5%

41
1
R003E

F005E 2
RF4CE-DC +3V3-STANDBY 3
F001E
RC RF4CE-DD 4
5
3 6
I002E R001E I001E
RF4CE-RESETn 7
U002E 1 10K 8
BC847BW(COL) S001E 9
5% +3V3-STANDBY 50m 10
2
FTSH
R011E
10K
+3V3 X027
RES 5%
RF4CE-RESETn 1
R009E
10K MTK-TX-RF4CE MTK-TX-RF4CE 2
+3V3-STANDBY 3
R010E 5%
X001E 10K MTK-RX-RF4CE MTK-RX-RF4CE 4
TSOP75236 +3V3-STANDBY 5
I008E 5%
+3V3-STANDBY
R007E 100 2 VS R012E
RC 6
10K 7
I009E +3V3
RC R008E 10 3 RES 5% 8
OUT +3V3-STANDBY 9 10
100nF

10pF
1uF

1 GND1
4 FH52
16V

50V
6.3V

GND2
C017E

C019E

C018E

F008E
X311

X005 1
2
3
5 4
EMC
TYPE
1

3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

19580_120_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 79

10-1-40 B, DDR 3 INTERFACE - 16 BITS

DDR3 INTERFACE - 16 bits - DT

B B
+1V5-MTK-DT

+1V5-MTK-DT
100nF

1K

1%
16V
C013N

R087N

F006N

G7

R1
B2
D9

K2
K8
N1
N9

R9

A1
A8
C1
C9
D2

H2
H9
E9
F1
U002N
H5TQ4G63AFR-PBCR
100nF

1K

1%
16V

D046N VDD VDDQ

DT-BRA0
C014N

N3 0
U005N +1V5-MTK-DT DT-BRA1 DT-BRDQ8
R086N

P7 1 0 D7
TYPE DT-BRA2 P3 C3 DT-BRDQ9
2 1
DDR_B DT-BRA3 N2 3 2 C8 DT-BRDQ10
C2 L1 DT-BRDQM0 DT-BRA4 P8 C2 DT-BRDQ11

100nF
RVREF_C BRDQM0 4 3

1K
BRDQS0 H2 DT-BRDQS0 DT-BRA5 P2 5
DQU
4 A7 DT-BRDQ12

1%
DT-BRCLK0 J2 H1 DT-BRDQS0n DT-BRA6 R8 A2 DT-BRDQ13

16V
BRCLK0 BRDQS0# 6 5
DT-BRCLK0n DT-BRDQ0 DT-BRA7 DT-BRDQ14

C001N
J1 BRCLK0# BRDQ0 E2 R2 7 A 6 B8
DT-BRDQ1 DT-BRA8 DT-BRDQ15

R083N
BRDQ1 N3 T8 8 7 A3
DT-BRCKE L6 BRCKE BRDQ2 E1 DT-BRDQ2 DT-BRA9 R3 9
BRDQ3 N1 DT-BRDQ3 F008N
DT-BRA10 L7 10 DQSU B7 DT-BRDQS1n
DT-BRODT E3 D1 DT-BRDQ4 DT-BRA11 D047N R7 C7 DT-BRDQS1

100nF
BRODT BRDQ4 11 DQSU

1K
DT-BRRASn L4 BRRAS# BRDQ5 P1 DT-BRDQ5 DT-BRA12 N7

1%
12 D052N
DT-BRCASn D3 D2 DT-BRDQ6 DT-BRA13 T3 F3 DT-BRDQS0

16V
BRCAS# BRDQ6 13 DQSL
DT-BRCSn DT-BRDQ7 DT-BRA14 DT-BRDQS0n

C002N
D4 BRCS# BRDQ7 N2 T7 DQSL G3
14
DT-BRA15

R082N
M7 15 D053N
DT-BRBA0 J4 BRBA0 BC 0 E3 DT-BRDQ0
DT-BRBA1 M6 BRBA1
S001N RES AP 1 F7 DT-BRDQ1
DT-BRBA2 E4 BRBA2 BRDQM1 H3 DT-BRDQM1 2 F2 DT-BRDQ2
BRDQS1 K1 D042N DT-BRDQS1 H1 VREFDQ 3 F8 D054N DT-BRDQ3
DT-BRWEn K4 BRWE# BRDQS1# K2 DT-BRDQS1n +1V5-MTK-DT M8 VREFCA
DQL
4 H3 DT-BRDQ4
N4 D043N DT-BRDQ8 H8 D055N DT-BRDQ5
BRDQ8 5
DT-BRA15 J3 BRA15 BRDQ9 F2 D044N DT-BRDQ9 R104N 240 DT-A-ZQ3 DT-A-ZQ3 L8 ZQ 6 G2 DT-BRDQ6
DT-BRA14 P4 M3 DT-BRDQ10 H7 DT-BRDQ7

100nF
BRA14 BRDQ10 1% 7

1K
DT-BRA13 G5 BRA13 BRDQ11 F1 DT-BRDQ11 DT-BRBA0 M2 0

1%
DT-BRA12 P6 L2 DT-BRDQ12 DT-BRBA1 N8 J1

16V
BRA12 BRDQ12 1 BA
DT-BRA11 DT-BRDQ13 DT-BRBA2

C003N
P5 BRA11 BRDQ13 F3 M3 2 J9
NC
DT-BRA10 DT-BRDQ14

R085N
L5 BRA10 BRDQ14 M4 L1
DT-BRA9 F4 BRA9 BRDQ15 G3 DT-BRDQ15 DT-BRCLK0 DT-BRRASn D048N J3 RAS L9
DT-BRA8 P3 DT-BRODT K1

100
BRA8 D045N ODT
DT-BRA7 H4 DT-BRCASnD049N K3

100nF
BRA7 CAS

1K
F009N

1%
DT-BRA6 P2 BRA6
DT-BRCLK0 J7 CK

1%
DT-BRA5 K6 DT-BRCLK0n K7

16V
BRA5 CK
DT-BRA4 DT-BRCKE D050N

C004N

R101N
M5 BRA4 K9 CKE
DT-BRA3 DT-BRRESET DT-BRCLK0n DT-BRCSn

R084N
K5 BRA3 BRRESET G4 L2 CS
DT-BRA2 G6 BRA2
DT-BRWEn L3 WE
DT-BRA1 N5 BRA1
DT-BRRESET T2 RESET
DT-BRA0 E5 BRA0 D051N
DT-BRDQM0 E7 DML
+1V5-MTK-DT B19 DDRV_1
DT-BRDQM1 D3 DMU
C19 DDRV_2 VSS VSSQ
D19 DDRV_3
E19 DDRV_4
F19 DDRV_5

M1
M9

G1
G9
G8
A9
B3

B1
B9
D1
D8
E1

P1
P9

E2
E8
T1

F9
T9
J2
J8
G19 DDRV_6 D061N D062N D063N D064N D065N
F5 DDRV_7
H5 DDRV_8
N8 DDRV_9
P8 DDRV_10
D13 DDRV_11
E8 DDRV_12
G11 DDRV_13
D20 DDRV_14
E20 +1V5-MTK-DT
DDRV_15
F20 DDRV_16
G20 DDRV_17
R7

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF
DDRV_18

4.7uF

10uF
1uF
R8

100uF 16V
DDRV_19

C090N
T5

16V

16V

16V

16V

16V

16V

16V

16V
6.3V

6.3V

6.3V
DDRV_20

C088N

C074N

C012N

C011N

C010N

C009N

C008N

C007N

C006N

C005N

C079N
T6 DDRV_21

RES
T7 DDRV_22
X004N T8 DDRV_23 D056N D057N D058N D059N D060N
1

X005N
1

3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

19580_121_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 80

10-1-41 B, DDR 3 INTERFACE - 32BITS

DDR3 INTERFACE - 32 bits - DT

B B

+1V5-MTK-DT
+1V5-MTK-DT U005N +1V5-MTK-DT +1V5-MTK-DT
TYPE
R1 D12 DT-ARDQM0
100nF

DDRV_1 ARDQM0
1K

R2
DDR_A D14 DT-ARDQS0
DDRV_2 ARDQS0
1%

R3 C14 DT-ARDQS0n
16V

DDRV_3 ARDQS0#
DT-ARDQ0
C042N

R4 DDRV_4 ARDQ0 B17

G7

G7
D9

N1
N9
R1
R9

C1
C9
D2

H2
H9

D9

N1
N9
R1
R9

C1
C9
D2

H2
H9
B2

K2
K8

A1
A8

E9

B2

K2
K8

A1
A8

E9
F1

F1
DT-ARDQ1
R097N

R5 DDRV_5 ARDQ1 D10 U004N U003N

F010N R6 DDRV_6 ARDQ2 C17 DT-ARDQ2 H5TQ4G63AFR-PBCR H5TQ4G63AFR-PBCR
K3 DDRV_7 ARDQ3 C10 DT-ARDQ3
L8 C18 DT-ARDQ4 VDD VDDQ VDD VDDQ
100nF

DDRV_11 ARDQ4
1K

M8 B9 DT-ARDQ5 +1V5-MTK-DT DT-ARA0 D009N N3

+1V5-MTK-DT DT-ARA0
D021N
N3
DDRV_10 ARDQ5 0 0
1%

D015N D027N
D17 E18 DT-ARDQ6 DT-ARA1 P7 D7 DT-ARDQ8 DT-ARA1 P7 D7 DT-ARDQ24
16V

DDRV_9 ARDQ6 1 0 1 0
C043N

A19 DDRV_8 ARDQ7 D9 DT-ARDQ7 DT-ARA2 P3 2 1 C3 DT-ARDQ9 DT-ARA2 P3 2 1 C3 DT-ARDQ25

DT-ARA3 DT-ARDQ10 DT-ARA3 DT-ARDQ26
R096N

N2 C8 N2 C8

100nF

100nF
3 2 3 2

1K

1K
D001N
I001N J22 MEMTP ARDQM1 C15 DT-ARDQM1 DT-ARA4 P8 4 3 C2 DT-ARDQ11 DT-ARA4 P8 4 3 C2 DT-ARDQ27

1%

1%
+VTT-DT I002N K22 A13 DT-ARDQS1 DT-ARA5 P2 DQU A7 DT-ARDQ12 DT-ARA5 P2 DQU A7 DT-ARDQ28

16V

16V
MEMTN ARDQS1 5 4 5 4
D002N DT-ARDQS1n DT-ARA6 D016N
DT-ARDQ13 DT-ARA6 D022N
DT-ARDQ29

C045N

C015N
ARDQS1# B13 R8 6 5 A2 R8 6 5 A2
DT-ARDQ8 DT-ARA7 DT-ARDQ14 DT-ARA7 DT-ARDQ30

R089N

R093N
D18 RVREF_A ARDQ8 B11 R2 7 A 6 B8 R2 7 A 6 B8 D028N

ARDQ9 B16 DT-ARDQ9 F011N DT-ARA8 T8 8 7 A3 DT-ARDQ15 F013N DT-ARA8 T8 8 7 A3 DT-ARDQ31

R054N 47 DT-ARCKE DT-ARCKE G8 ARCKE ARDQ10 A11 DT-ARDQ10 DT-ARA9 R3 9
DT-ARA9 R3 9
D017N D029N
A17 D004N DT-ARDQ11 DT-ARA10 L7 B7 DT-ARDQS1n DT-ARA10 L7 B7 DT-ARDQS3n

100nF

100nF
ARDQ11 10 DQSU 10 DQSU

1K

1K
DT-ARCLK1 B5 ARCLK1 ARDQ12 C12 DT-ARDQ12 DT-ARA11 R7 11 DQSU C7 DT-ARDQS1 DT-ARA11 R7 11 DQSU C7 DT-ARDQS3

1%

1%
DT-ARCLK1n A5 A16 DT-ARDQ13 DT-ARA12 N7 DT-ARA12 N7

16V

16V
D030N
ARCLK1# ARDQ13 12 D018N
12
DT-ARDQ14 DT-ARA13 DT-ARDQS0 DT-ARA13 DT-ARDQS2

C046N

C016N
ARDQ14 C11 T3 DQSL F3 T3 DQSL F3
13 13
DT-ARCLK0 DT-ARDQ15 DT-ARA14 DT-ARDQS0n DT-ARA14 DT-ARDQS2n

R088N

R092N
B14 ARCLK0 ARDQ15 C16 T7 DQSL G3 T7 DQSL G3
14 14
DT-ARCLK0n A14 ARCLK0# D011N M7 15 D023N M7 15
D005N
ARDQM2 A3 DT-ARDQM2 S002N RES BC 0 E3 DT-ARDQ0 S003N RES BC 0 E3 DT-ARDQ16
R055N 47 DT-ARODT DT-ARODT F13 ARODT ARDQS2 D5 DT-ARDQS2 AP 1 F7 DT-ARDQ1 AP 1 F7 DT-ARDQ17
R056N 47 DT-ARRASn DT-ARRASn E13 ARRAS# ARDQS2# C5 D006N DT-ARDQS2n 2 F2 DT-ARDQ2 2 F2 DT-ARDQ18
R057N 47 DT-ARCASn DT-ARCASn G13 E7 DT-ARDQ16 +1V5-MTK-DT H1 F8 D020N
DT-ARDQ3 +1V5-MTK-DT H1 F8 DT-ARDQ19
ARCAS# ARDQ16 VREFDQ 3 VREFDQ 3
R058N 47 DT-ARCSn DT-ARCSn G15 ARCS# ARDQ17 B2 DT-ARDQ17 M8 VREFCA
DQL
4 H3 DT-ARDQ4 M8 VREFCA
DQL
4 H3 DT-ARDQ20
R059N 47 DT-ARWEn DT-ARWEn H18 ARWE# ARDQ18 C8 DT-ARDQ18 5 H8 DT-ARDQ5 5 H8 DT-ARDQ21
B1 DT-ARDQ19 R105N 240 DT-A-ZQ1 DT-A-ZQ1 L8 G2
D019N
DT-ARDQ6 R106N 240 DT-A-ZQ2 L8 G2 D031N DT-ARDQ22
100nF

100nF
ARDQ19 ZQ 6 ZQ 6

1K

1K
R060N 47 DT-ARRESET DT-ARRESET G16 ARRESET ARDQ20 A9 D007N DT-ARDQ20 1% 7 H7 DT-ARDQ7 1% DT-A-ZQ2 7 H7 DT-ARDQ23

1%

1%
C1 DT-ARDQ21 DT-ARBA0 M2 DT-ARBA0 M2
16V

16V
ARDQ21 0 0
R061N 47 DT-ARBA0 DT-ARBA0 DT-ARDQ22 DT-ARBA1 DT-ARBA1
C047N

C017N
D15 ARBA0 ARDQ22 C9 N8 1 BA J1 N8 1 BA J1
R062N 47 DT-ARBA1 DT-ARBA1 DT-ARDQ23 DT-ARBA2 DT-ARBA2
R091N

R095N
F9 ARBA1 ARDQ23 C3 M3 2 J9 M3 2 J9
NC NC
R063N 47 DT-ARBA2 DT-ARBA2 G18 ARBA2 D008N L1 L1
D024N
ARDQM3 C6 DT-ARDQM3 F012N
DT-ARCLK0 DT-ARRASn D012N
J3 RAS L9 F014N
DT-ARCLK1 DT-ARRASn J3 RAS L9
R064N 47 DT-ARCSXn DT-ARCSXn F15 A4 DT-ARDQS3 DT-ARODT K1 DT-ARODT K1

100

100
100nF

100nF
ARCSX# ARDQS3 ODT ODT
1K

1K
ARDQS3# B4 DT-ARDQS3n DT-ARCASn D013N K3 CAS
DT-ARCASn D025N K3 CAS
1%

1%

1%

1%
R065N 47 DT-ARA14 DT-ARA14 D11 A1 DT-ARDQ24 DT-ARCLK0 J7 DT-ARCLK1 J7
16V

16V
ARA14 ARDQ24 CK CK
R066N 47 DT-ARA13 DT-ARA13 DT-ARDQ25 DT-ARCLK0n K7 DT-ARCLK1n
C048N

C018N
F16 ARA13 ARDQ25 B7 CK K7 CK
R067N 47 DT-ARA12 DT-ARA12 DT-ARDQ26 DT-ARCKE DT-ARCKE
R090N

R102N

R094N

R103N
D8 ARA12 ARDQ26 C4 K9 CKE K9 CKE
R068N 47 DT-ARA11 DT-ARA11 E11 ARA11 ARDQ27 C7 DT-ARDQ27 DT-ARCLK0n DT-ARCSn L2 CS
DT-ARCLK1n DT-ARCSXn L2 CS
R069N 47 DT-ARA10 DT-ARA10 G9 ARA10 ARDQ28 B3 DT-ARDQ28 DT-ARWEn D014N L3 WE
DT-ARWEn D026N L3 WE
R070N 47 DT-ARA9 DT-ARA9 E16 ARA9 ARDQ29 A7 DT-ARDQ29 DT-ARRESET T2 RESET
DT-ARRESET T2 RESET
R071N 47 DT-ARA8 DT-ARA8 F11 ARA8 ARDQ30 A2 DT-ARDQ30
R072N 47 DT-ARA7 DT-ARA7 G17 ARA7 ARDQ31 D7 DT-ARDQ31 DT-ARDQM0 E7 DML
DT-ARDQM2 E7 DML
R073N 47 DT-ARA6 DT-ARA6 F10 ARA6 L005N
DT-ARDQM1 D3 DMU
DT-ARDQM3 D3 DMU
R074N 47 DT-ARA5 DT-ARA5 E17 ARA5 AVDD33_MEMPLL A20 I066N
+3V3-A-DT VSS VSSQ VSS VSSQ
R075N 47 DT-ARA4 DT-ARA4 E10 H9
100nF

ARA4 AVSS33_MEMPLL 30H

R076N 47 DT-ARA3 DT-ARA3 E15
1uF

ARA3
R077N 47 DT-ARA2 DT-ARA2 F17
16V

6.3V

ARA2

M1
M9

M1
M9
G8

G1
G9

G8

G1
G9
D1
D8

D1
D8
DT-ARA1 DT-ARA1

A9
B3
E1

P1
P9

B1
B9

E2
E8

A9
B3
E1

P1
P9

B1
B9

E2
E8
T1
T9

F9

T1
T9

F9
R078N 47

J2
J8

J2
J8
C044N

C076N

G10 ARA1
R079N 47 DT-ARA0 DT-ARA0 F18 ARA0

RES

+1V5-MTK-DT +1V5-MTK-DT +1V5-MTK-DT

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF
4.7uF

10uF

10uF
1uF
100uF 16V

D039N D040N D041N D035N D036N

C091N

D037N D038N D032N D033N D034N

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V

16V
6.3V

6.3V

6.3V

6.3V
C089N

C075N

C041N

C040N

C039N

C038N

C037N

C036N

C035N

C026N

C025N

C024N

C023N

C022N

C021N

C020N

C019N

C080N

C034N

C033N

C032N

C031N

C030N

C029N

C028N

C027N

C081N
+VTT-DT +VTT-DT
100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF
16V

16V

RES 16V

RES 16V

16V

RES 16V

RES 16V

RES 16V

RES 16V

RES 16V
C109N

C108N

C107N

C106N

C105N

C114N

C113N

C112N

C111N

C110N
RES

RES
RES

+1V5-MTK-DT

RES

3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

19580_122_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 81

10-1-42 B, EMMC DT

EMMC - DT
B B

W9
W8
W7
W3
W14
W13
W12
W11
W10
AG2
AG13
AH9
AH6
AH4
AH11

AE1

AA9
AA8
AA2
AA1
AE14

AA14
AA13
AA12
AA11

Y9
Y8
Y7
Y6
Y3
Y1
Y14
Y13
Y12
Y11
Y10
U007N
TYPE
+3V3-DT

NC99
NC98
NC97
NC96
NC95
NC94
NC93
NC92
NC91
NC90
NC89
NC88
NC87
NC122
NC121
NC120
NC119
NC118
NC117
NC116
NC115
NC114
NC113
NC112
NC111
NC110
NC109
NC108
NC107
NC106
NC105
NC104
NC103
NC102
NC101
NC100
H6 RFU1 NC86 W2
H7 W1

100nF
RFU2 NC85

10uF

10uF
K5 RFU3 NC84 V14
M5 V13

16V

6.3V

6.3V
RFU4 NC83

C049N

C082N

C083N
M8 RFU5 NC82 V12
C132N 220pF M9 V3
RFU6 NC81
50V M10 RFU7 NC80 V2
C134N 220pF N10 V1
RFU8 NC79
P3 U14 +3V3-DT
50V RFU9 NC78
P10 RFU10 NC77 U13
+3V3-STANDBY-DT
R042N 10K DT-MTK-TX-SERVICE R5 U12

100nF

100nF

100nF
RFU11 NC76
R043N 10K DT-MTK-RX-SERVICE T5 RFU12 NC75 U3
U005N U6 U2

16V

16V

16V
RFU13 NC74
TYPE

C050N

C051N

C052N
U7 RFU14 NC73 U1
AK10 JTCK MISC U0TX AH15 R166N 75 DT-MTK-TX-SERVICE U10 RFU15 NC72 T14
AL9 JTDO U0RX AH14 R167N 75 DT-MTK-RX-SERVICE AA7 RFU16 NC71 T13
AK11 JTDI AA10 RFU17 NC70 T12
AJ11 AH13 R168N 10K T3
F040N JTMS U1TX +3V3-DT NC NC69
R158N 10K DT-MTK-EJTAG-TRSTn DT-MTK-EJTAG-TRSTn R144N 10 AJ12 JTRST# U1RX AG13 R169N 10K A4 NC1 NC68 T2
A6 NC2 NC67 T1

10uF

10uF

10uF
R174N 2.2K DT-SDA-SSB DT-SDA-SSB R153N 10 AH11 OSDA0 D24 R243N 10 DT-EMMC-CMD A9 R14
+3V3-DT R175N 2.2K DT-SCL-SSB DT-SCL-SSB R154N 10
POWE# NC3 NC66
AH10 OSCL0 B25 A11 R13

6.3V

6.3V

6.3V
POOE# NC4 NC65

C084N

C085N

C086N
POCE1# D25 B2 NC5 NC64 R12
R176N 2.2K DT-SDA-SRF DT-SDA-SRF R151N 10 AF11 OSDA1 POCE0# A25 B13 NC6 NC63 R3
R177N 2.2K DT-SCL-SRF DT-SCL-SRF R152N 10 AG11 OSCL1 PDD7 C22 DT-EMMC-D7 D1 NC7 NC62 R2
PDD6 B22 DT-EMMC-D6 D14 NC8 NC61 R1
C149N 10pF AN29 XTALI PDD5 A22 DT-EMMC-D5 H1 NC9 NC60 P14
AM29 XTALO PDD4 C23 DT-EMMC-D4 H2 NC10 NC59 P13
X331N A23 DT-EMMC-D3 H8 P12

100nF

100nF

100nF
PDD3 NC11 NC58
1 F042N DT-SCL-SRF PDD2 B23 DT-EMMC-D2 H9 NC12 NC57 P2
+3V3-STANDBY-DT
3

2 F032N AN30 AVDD33_XTAL_STB D23 H10 P1

16V

16V

16V
F043N DT-SDA-SRF +3V3-STANDBY-DT PDD1 NC13 NC56

C053N

C054N

C055N
3 X002N AL29 AVSS33_XTAL_STB PDD0 C24 H11 NC14 NC55 N14
4 5 4 C25 R100N 10K H12 N13
PARB# NC15 NC54
2 A26 DT-EMMC-D1 H13 N12
1

PACLE NC16 NC53

TYPE
+3V3-STANDBY-DT AN17 AVDD33_VGA_STB PAALE B26 DT-EMMC-D0 NC52 N3
X330N AL17 AVSS33_VGA_STB EMMC_CLK C21 R244N 10 DT-EMMC-CLK

NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
NC25
NC26
NC27
NC28
NC29
NC30
NC31
NC32
NC33
NC34
NC35
NC36
NC37
NC38
NC39
NC40
NC41
NC42
NC43
NC44
NC45
NC46
NC47
NC48
NC49
NC50
NC51
1 F035N DT-SCL-SSB C150N 10pF
2 F036N
OPWRSB AL15
R170N 10 DT-STANDBYn X010N
3 F037N DT-SDA-SSB AL26 AVDD33_PLL DT-MTK-RX-SERVICE F025N 1
+3V3-A-DT

M12
M13
M14
H14

K10
K11
K12
K13
K14

L12
L13
L14
J10
J11
J12
J13
J14

M1
M2
M3

N1
N2
DT-MTK-RESET-INn

K1
K3
K7
K8
K9
R172N 10

L1
L2
L3
L4
J1
J7
J8
J9
4 5 AC21 AVSS33_PLLGP AK20 2

100nF

100nF

100nF
ORESET#
H21 AVSS33_CPUPLL F029N 3
TYPE
OIRI AF17 R171N 10 DT-RC DT-MTK-TX-SERVICE 5 4

C170N

C169N

C168N
F028N
AM17 AVDD10_LDO C20 R163N 4.7K TYPE
FSRC_WR
X333
R032N
1 F044N DT-SCL-BE STB_SCL AL14 R161N 10 DT-SCL-BE DT-SCL-BE 2.2K
+3V3-DT
2 F007N AN16 AVDD10_ELDO STB_SDA AK15 R162N 10 DT-SDA-BE DT-SDA-BE 2.2K
3 F046N DT-SDA-BE R033N
+3V3-DT +3V3-DT

4.7uF

4.7uF
4 5 POR_BND AE14
R164N 4.7K RES
+3V3-DT
TYPE R165N 4.7K
+3V3-STANDBY-DT

C176N

C177N

10K

10K

10K

10K

10K

10K

10K

10K

10K
W4
M6

VCCQ_4 AA3
VCCQ_5 AA5
N5

U9

K6

Y4
T10
U007N

R001N
TYPE

R002N

R003N

R004N

R005N

R006N

R007N

R008N

R009N
VCCQ_1
VCCQ_2
VCCQ_3
VCC_1
VCC_2
VCC_3
VCC_4
DT-EMMC-CMD F020N W5 H3 R235N 33 DT-EMMC-D0
+3V3-DT +3V3-STANDBY-DT CMD DAT0
DAT1 H4 R236N 33 F001N DT-EMMC-D1
DT-EMMC-CLK F021N W6 H5 R237N 33 F002N DT-EMMC-D2
DEBUG CLK DAT2
R238N 33 F003N DT-EMMC-D3

10K
J2
MAIN DAT3
50m RES

X008N +3V3-DT U5 RST DAT4 J3 R239N 33 F004N DT-EMMC-D4

I026N
TSOP75236
DAT5 J4 R240N 33 F005N DT-EMMC-D5
DBG
S014N

S009N

F015N DT-EMMC-D6

4.7K
R139N 100 F045N R241N 33
50m

2 K2 J5
+3V3-STANDBY-DT VS VDDI DAT6

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
DBG R242N 33 F016N DT-EMMC-D7

R010N
J6

100nF

VSS_1
VSS_2
VSS_3
VSS_4
I049N DAT7
DT-RC R135N 10 3 OUT
F017N
DBG

16V
100nF

I034N
10pF

R189N 10K

R081N

C056N
1
1uF

AA4
AA6
GND1

R10
M7

U8
P5

K4
Y2
Y5
4
16V

50V
6.3V

GND2
3

U001N DT-EMMC-RESETn
C156N

C148N

C157N
DBG
DBG
DBG

F023N F019N F018N

10uF
VCC

RESS004N
2 DT-MTK-RESET-INn

6.3V
RESET

C087N
GND F070N
100
1

100nF
R245N

X410
16V

3 1
C178N

4 2

+3V3-DT +3V3-DT

I036N C175N 100nF

10K

16V
RES

U008N

F076N
VDD DT-SYS-EEPROM-WP DT-SYS-EEPROM-WP R025N 10K
R232N

WP| WC 7

EEPROM
I035N
1 0 SCL 6 R233N 47 DT-SCL-SSB
2 1 ADDR
3 2 SDA 5 R234N 47 DT-SDA-SSB
VSS
10K

F031N
R011N

3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

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div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 82

10-1-43 B, ETHERNET DT

ETHERNET - DT
B B

U005N
TYPE

ETHERNET
TXVP_0 AL13 R015N 10 DT-TXP
TXVN_0 AM13 R017N 10 DT-TXN

RXVP_1 AL12 DT-RXP

RXVN_1 AM12 DT-RXN

PHYLED0 AJ13 I003N

PHYLED1 AF13 I004N
I009N
+3V3-DT
AN12 R107N 24K
REXT
1%
AVDD33_ETH AN14
AE13

100nF
AVSS33_ELDO

16V
AVSS33_LD AC16

C059N
AVSS33_COM AC15

3 2013-12-13

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715RLPCB000000021
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 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 83

10-1-44 B, AUDIO / VIDEO

AUDIO / VIDEO - DT
B C100N 10pF

680
50V
U005N
TYPE

VIDEO

R114N
R137N 100 AN27 ADCINN_DEMOD AK18
HSYNC
R138N AM27 ADCINP_DEMOD AL18
VSYNC
C101N 10pF AL20
100 RP
50V AN26 AVDD33_DEMOD AM20
+3V3-A-DT C172N 100nF
GP
BP AL19
AN28 AVDD12_DEMOD AN20
+1V2-A-DT C171N 100nF
COM
SOG AK19
X322N AL28 AVSS33_DEMOD AG22
VGA_SDA
1 DT-SCL-FE AL27 AVSS12_DEMOD VGA_SCL AH22
2
3 DT-SDA-FE COM1 AL21 C066N 10nF R016N 100 DT-AV-COM_S
4 5 R013N 10K L26 AK22
IF_AGC PB1P
M28 RF_AGC PR1P AL22
TYPE C098N 100nF AM21
Y1P
I024N AJ27 LOUTN AN21
SOY1
I025N AK27 LOUTP AM23
COM0
PB0P AL23

+3V3-DT
R119N 2.2K DT-SCL-FE DT-SCL-FE R230N 10 N27 OSCL2 PR0P AL24
X009N 5 R120N 2.2K DT-SDA-FE DT-SDA-FE R231N 10 N26 OSDA2 Y0P AN23
4
+3V3-DT AK23
SOY0
3
I022N R124N 75
AK26 CVBS3P VDACX_OUT AH24
2 DT-AV-SCART-CVBS DT-AV-SCART-CVBS R014N 100 C096N 47nF AM25 CVBS2P VDACY_OUT AJ24 R125N 75
1 F024N AH26 CVBS1P I023N
75

S005N
AK25 CVBS0P AVDD33_VIDEO AN25 +3V3-A-DT
C139N 1uF AJ26

100nF
CVBS_COM
RES AN18 +1V2-A-DT

1uF
AVDD12_RGB
+3V3-DT S015N +3V3 +3V3-A-DT
R099N

AM26 AVDD33_CVBS

100nF
50m X003N DT-AV-COM_S

C145N

C140N
AC19

100nF
AVSS33_VDAC_BG
AB20 AVSS33_CVBS_1 AVSS12_RGB AK17

C146N
AB22 AVSS33_CVBS_2 AVSS33_VDAC AE20

C144N
U005N
TYPE

AUDIO
AN32 AIN1_L_AADC AR0_ADAC AK30
AL32 AIN1_R_AADC AL0_ADAC AJ29
AM31 AIN2_L_AADC
AM33 AIN2_R_AADC AR1_ADAC AJ31
AK33 AIN3_L_AADC AL1_ADAC AK29
AM32 AIN3_R_AADC +3V3-A-DT
AN33 AJ30

100nF
AIN4_L_AADC AR2_ADAC I015N
AL33 AIN4_R_AADC AL2_ADAC AH28 I016N

C151N
AVDD33_ADAC AJ33
AJ32 AVDD33_AADC AVSS33_ADAC AC23
+3V3-A-DT
AC24 AVSS33_AADC

100nF
ASPDIF0 AG10
ASPDIF1 V27 F027N
STRAP OPTION LED1 LED2 STRAP AUDIO-ENABLE

C133N
AN31 VMID_AADC AOBCK AK9

100K
AJ9

100nF

100pF
AOLRCK
AH25 MPXP AF10

1uF
AOMCLK
AH9 LED_PWM0 LED_PWM1 OPCTRL3 OPCTRL7

50V
AOSDATA4

C138N

C152N

C057N
AOSDATA3 AK8

R018N
AOSDATA2 AJ8
AOSDATA1 AH8 ICE mode + 27M + serial boot 1 0 0 0
AOSDATA0 AJ10
ALIN AG9
ICE mode + 27M + ROM to Nand boot 1 0 0 1

U005N ICE mode + 27M + ROM to eMMC boot

TYPE from eMMC pins (share pins w/s NAND) 1 0 1 1
GPIO
DT-CA-A00 R268N 22 B30 GPIO0 DEMOD_RST P30 R287N 22 DT-DEMOD-RESETn ICE mode + 27M + ROM to eMMC boot
DT-CA-A01 6 3 R268N 22 A31 N32 DT-TS-CLK from SDIO pins 1 1 0 0
GPIO1 DEMOD_TSCLK
DT-CA-A02 R267N 22 5 4 B31 P27 DT-TS-VALID
GPIO2 DEMOD_TSVAL
DT-CA-A03 8 1 R267N 22 A32 R29 DT-TS-SYNC
GPIO3 DEMOD_TSSYNC
DT-CA-A04 R264N 22 7 2 C30 R27 DT-TS-DATA0
GPIO4 DEMOD_TSDATA0
DT-CA-A05 R267N 22 A33 GPIO5 DEMOD_TSDATA1 T26 DT-TS-DATA1
DT-CA-A06 R267N 22 5 4 B32 T27 DT-TS-DATA2
GPIO6 DEMOD_TSDATA2
DT-CA-A07 6 3 R261N 22 C31 P26 DT-TS-DATA3
GPIO7 DEMOD_TSDATA3
DT-CA-A08 R260N 22 E30 GPIO8 DEMOD_TSDATA4 R28 DT-TS-DATA4
DT-CA-A09 R259N 22 F29 GPIO9 DEMOD_TSDATA5 U27 DT-TS-DATA5
DT-CA-A10 R258N 22 F27 GPIO10 DEMOD_TSDATA6 U26 DT-TS-DATA6
DT-CA-A11 R257N 22 F28 GPIO11 DEMOD_TSDATA7 R26 DT-TS-DATA7
DT-CA-A12 R256N 22 C32 GPIO12
DT-CA-A13 R255N 22 F30 GPIO13 CI_INT L25 R278N 22 DT-CA-REGn
DT-CA-A14 R254N 22 F32 GPIO14 CI_TSCLK N33 R277N 22 DT-CA-CE1n
DT-CA-MICLK R249N 47 D30 GPIO15 CI_TSDATA0 K26 R252N 47 DT-CA-MOSTRT
DT-CA-MIVAL R249N 47 8 1 D32 N30 R282N 22 1 8 DT-CA-WEn +3V3-STANDBY-DT
GPIO16 CI_TSSYNC
DT-CA-MISTRT 6 3 R251N 47 F31 N31 R281N 22 DT-CA-OEn
GPIO17 CI_TSVAL
DT-CA-MDI0 R248N 47 8 1 F33 GPIO18
DT-CA-MDI1 5 4 R248N 47 E31 M31 R250N 47 DT-CA-MOVAL
GPIO19 PVR_TSCLK
DT-CA-MDI2 R248N 47 7 2 E32 M27 R286N 22 4 5 DT-CA-VS1n
GPIO20 PVR_TSVAL
DT-CA-MDI3 6 3 R248N 47 D31 L27 R250N 47 DT-CA-MOCLK 4
GPIO21 PVR_TSSYNC
DT-CA-MDI4 R249N 47 8 1 D33 M29 R288N 22 3 6 DT-CA-RDY
GPIO22 PVR_TSDATA0
DT-CA-MDI5 5 4 R249N 47 E29 M30 R285N 22 DT-CA-WAITn DT-LED1 PUMD12
GPIO23 PVR_TSDATA1
DT-CA-MDI6 R250N 47 7 2 C33 5 U006N
GPIO24
DT-CA-MDI7 7 2 R250N 47 B33 DBG
GPIO25
DT-CA-D00 R268N 22 8 1 A30 L30 R280N 22 DT-CA-CD2n 3
GPIO26 SPI_CLK1
DT-CA-D01 7 2 R270N 22 E28 L33 R279N 22 DT-CA-CD1n
GPIO27 SPI_CLK
DT-CA-D02 R268N 22 C29 L32 R284N 22 DT-CA-IORDn

470
GPIO28 SPI_DATA
DT-CA-D03 8 1 R272N 22 J28 K27 R283N 22 DT-CA-IOWRn
GPIO29 SPI_CLE

DBG
DT-CA-D04 R273N 22 H29 GPIO30
DT-CA-D05 R274N 22 J26 GPIO31
DT-CA-D06 R275N 22

R041N
G30 GPIO32 OPWM2 AL8 I005N
DT-CA-D07 R276N 22 G27 GPIO33 OPWM1 AM8 I007N
DT-CA-MDO0 R252N 47 E27 GPIO34 OPWM0 AM9 I013N

D003N
DT-CA-MDO1 7 2

RED
R252N 47 D29 GPIO35
DT-CA-MDO2 R252N 47 5 4 D28 GPIO36

DBG
DT-CA-MDO3 6 3 R253N 47 H28 D27
GPIO37 SD_D0 I020N
DT-CA-MDO4 R253N 47 5 4 J27 C27
GPIO38 SD_D1 I006N
DT-CA-MDO5 6 3 R253N 47 G29 D26
GPIO39 SD_D2 I021N
DT-CA-MDO6 R253N 47 7 2 G31 C26
GPIO40 SD_D3 I008N
DT-CA-MDO7 8 1 R251N 47 G28 A28
GPIO41 SD_CMD I014N
5 4 B28 E24
GPIO42 SD_CLK I017N
DT-EMMC-RESETn R262N 10K
+3V3-STANDBY-DT K28 GPIO43
RES I041N
R118N 10 E25 GPIO44 F072N
R263N DT-EMMC-RESETn DT-EMMC-RESETn R121N 10K
+3V3-DT DT-EMMC-RESETn R265N 10 D21 AF15 DT-LED2 10K R179N DT-LED2 DT-LED2 RES R037N 10K
GPIO45 LED_PWM1 +3V3-STANDBY-DT
10K RES DT-SYS-EEPROM-WP R026N 10 G23 AG15 DT-LED1 RES 10K R180N DT-LED1 DT-LED1 R036N 10K
GPIO46 LED_PWM0 +3V3-STANDBY-DT
R115N DT-CA-ENABLE DT-CA-ENABLE R012N 10K RES +3V3-DT DT-CA-RESET R222N 10 C28 GPIO47 F073N
10K DT-CA-ENABLE R116N 10 F24 GPIO48
R098N DT-CA-OC DT-CA-OC R080N 10K
+3V3-DT DT-CA-OC R117N 10 AB8 GPIO49 OPCTRL11 AL16 I037N
10K AA7 AM16
RES GPIO50 OPCTRL10 I038N
AD6 GPIO51 OPCTRL9 AE17 I039N
AC8 AG19 DT-AUDIO-RESETn R211N 10K DT-AUDIO-RESETn DT-AUDIO-RESETn RES R205N 10K
GPIO52 OPCTRL8 +3V3-STANDBY-DT
AC7 AH17 DT-OPCTRL7 RES R181N 10K DT-OPCTRL7 DT-OPCTRL7 R053N 10K
GPIO53 OPCTRL7 +3V3-STANDBY-DT
AB6 AE19 DT-OPCTRL6 R210N 10K DT-OPCTRL6 DT-OPCTRL6 F074N RES R208N 10K
GPIO54 OPCTRL6 +3V3-STANDBY-DT
AC6 AH19 DT-DETECT12V RES R214N 10K DT-DETECT12V DT-DETECT12V RES R209N 10K
GPIO55 OPCTRL5 +3V3-STANDBY-DT
OPCTRL4 AK16 I040N
R029N 4.7K AJ23 AG17 DT-OPCTRL3 RES R182N 10K DT-OPCTRL3 DT-OPCTRL3 R184N 10K
R044N 4.7K
ADIN0_SRV OPCTRL3
F075N
+3V3-STANDBY-DT
AH23 ADIN1_SRV OPCTRL2 AJ17

+3V3-STANDBY-DT
R048N 100K DT-KEYBOARD DT-KEYBOARD R038N 10 AE28 ADIN2_SRV OPCTRL1 AF19
R049N 100K DT-POWER-OK DT-POWER-OK R039N 10 AD28 AJ19 DT-WOLAN-IRQn RES R218N 10K DT-WOLAN-IRQn DT-WOLAN-IRQn R031N 10K
+3V3-DT R027N 4.7K
ADIN3_SRV OPCTRL0 +3V3-STANDBY-DT
AF22 ADIN4_SRV
R269N 100K DT-LNB-SENSE DT-LNB-SENSE R266N 10 RES AK21
+3V3-DT RES R290N 4.7K
ADIN5_SRV
AG24 ADIN6_SRV
R030N 4.7K AM18 ADIN7_SRV

3 2013-12-13
R047N 6.8K
+3V3-STANDBY-DT MTK UHD 50 Hz
715RLPCB000000021
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div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 84

10-1-45 B, HDMI - DT

HDMI - DT
B B

U005N
TYPE
DB001N V26 AG30
HDMI_CEC HDMI HDMI_0_RX_0
HDMI_0_RX_0B AG31
+3V3-DT R023N 47K DT-HDMI0-SCL DT-HDMI0-SCL DB002N AC27 HDMI_0_SCL HDMI_0_RX_1 AF30
R023N 47K 4 5 DT-HDMI1-SCL DT-HDMI1-SCL DB003N AB27 AF31
HDMI_1_SCL HDMI_0_RX_1B
3 6 R023N 47K DT-HDMI2-SCL DT-HDMI2-SCL DB004N AA26 AE32
HDMI_2_SCL HDMI_0_RX_2
R023N 47K 2 7 DT-HDMI3-SCL DT-HDMI3-SCL DB005N W27 AE33
HDMI_3_SCL HDMI_0_RX_2B
1 8 AG32
HDMI_0_RX_C
+3V3-DT R024N 47K DT-HDMI0-SDA DT-HDMI0-SDA DB006N AC26 HDMI_0_SDA HDMI_0_RX_CB AG33
R024N 47K 4 5 DT-HDMI1-SDA DT-HDMI1-SDA DB007N AB26 HDMI_1_SDA
3 6 R024N 47K DT-HDMI2-SDA DT-HDMI2-SDA DB008N Y26 AD30
HDMI_2_SDA HDMI_1_RX_0
R024N 47K 2 7 DT-HDMI3-SDA DT-HDMI3-SDA DB009N W26 AD31
HDMI_3_SDA HDMI_1_RX_0B
1 8 AC32
HDMI_1_RX_1
AE29 HDMI_0_PWR5V HDMI_1_RX_1B AC33
Y27 HDMI_1_PWR5V HDMI_1_RX_2 AC30
AA28 HDMI_2_PWR5V HDMI_1_RX_2B AC31
V28 HDMI_3_PWR5V HDMI_1_RX_C AE30
HDMI_1_RX_CB AE31
R019N 470K DT-HPD0 DT-HPD0 DB010N AD29 HDMI_0_HPD
R020N 470K DT-HPD1 DT-HPD1 DB011N AA27 HDMI_1_HPD HDMI_2_RX_0 Y30
R021N 470K DT-HPD2 DT-HPD2 DB012N AA29 HDMI_2_HPD HDMI_2_RX_0B Y31
R022N 470K DT-HPD3 DT-HPD3 DB013N V29 HDMI_3_HPD HDMI_2_RX_1 W32
HDMI_2_RX_1B W33
+1V2-A-DT AA33 AVDD12_HDMI_0_RX HDMI_2_RX_2 W30
AA32 AVDD12_HDMI_1_RX HDMI_2_RX_2B W31
+1V2-A-DT P33 AVDD12_HDMI_2_RX HDMI_2_RX_C AA30
P32 AVDD12_HDMI_3_RX HDMI_2_RX_CB AA31
100nF

100nF
F034N
+3V3-A-DT AH33 AVDD33_HDMI HDMI_3_RX_0 U30
U31

100nF
HDMI_3_RX_0B
C063N

C062N
T25 AVSS33_HDMI_RX_1 HDMI_3_RX_1 T32
W25 AVSS33_HDMI_RX_2 HDMI_3_RX_1B T33

C061N
AD27 AVSS33_HDMI_RX_3 HDMI_3_RX_2 T30
AE27 AVSS33_HDMI_RX_4 HDMI_3_RX_2B T31
HDMI_3_RX_C V30
HDMI_3_RX_CB V31

3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

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div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 85

10-1-46 B, LVDS - DT

LVDS - DT
B B

U005N
TYPE

LVDS BE0P Y1 DT-TX-BE0P

BE0N Y2 DT-TX-BE0N
BE1P W3 DT-TX-BE1P
BE1N W4 DT-TX-BE1N
BE2P V3 DT-TX-BE2P
BE2N V4 DT-TX-BE2N
BECKP V1 DT-TX-BECLKP
BECKN V2 DT-TX-BECLKN
BE3P U3 DT-TX-BE3P
BE3N U4 DT-TX-BE3N
AA8 TCON0 BE4P T3 DT-TX-BE4P
AA9 TCON1 BE4N T4 DT-TX-BE4N
W6 TCON2
U6 TCON3 BO0P AD1 DT-TX-BO0P
U7 TCON4 BO0N AD2 DT-TX-BO0N
V8 TCON5 BO1P AC3 DT-TX-BO1P
V6 TCON6 BO1N AC4 DT-TX-BO1N
AB7 TCON7 BO2P AB3 DT-TX-BO2P
W9 TCON8 BO2N AB4 DT-TX-BO2N
U8 TCON9 BOCKP AB1 DT-TX-BOCLKP
U9 TCON10 BOCKN AB2 DT-TX-BOCLKN
V9 TCON11 BO3P AA3 DT-TX-BO3P
V7 TCON12 BO3N AA4 DT-TX-BO3N
BO4P Y3 DT-TX-BO4P
BO4N Y4 DT-TX-BO4N
+1V2-A-DT
AN1 AH1 DT-TX-AE0P
100nF

100nF

AVDD12_LVDS_1 AE0P
AN2 AH2 DT-TX-AE0N
1uF

AVDD12_LVDS_2 AE0N
AN3 AVDD12_LVDS_3 AE1P AG3 DT-TX-AE1P
DT-TX-AE1N
C142N

C155N

C154N

AN4 AVDD33_LVDS AE1N AG4

AE2P AF3 DT-TX-AE2P
AM4 AVSS12_LVDS_1 AE2N AF4 DT-TX-AE2N
AM3 AVSS12_LVDS_2 AECKP AF1 DT-TX-AECLKP
AF5 AVSS12_LVDS_3 AECKN AF2 DT-TX-AECLKN
+3V3-A-DT AE3P AE3 DT-TX-AE3P
V5 AE4 DT-TX-AE3N
100nF

AVSS33_LVDS_1 AE3N
AC5 AD3 DT-TX-AE4P
1uF

AVSS33_LVDS_2 AE4P
AE5 AVSS33_LVDS_3 AE4N AD4 DT-TX-AE4N
TO NT72314
C141N

C153N

T1 REXT_VPLL AO0P AM1 DT-TX-AO0P

DT-TX-AO0N
24K

AO0N AM2
AO1P AL3 DT-TX-AO1P
AO1N AL4 DT-TX-AO1N
AO2P AK3 DT-TX-AO2P
DT-TX-AO2N
R123N

AO2N AK4
AOCKP AK1 DT-TX-AOCLKP
AOCKN AK2 DT-TX-AOCLKN
AO3P AJ3 DT-TX-AO3P
AO3N AJ4 DT-TX-AO3N
AO4P AH3 DT-TX-AO4P
AO4N AH4 DT-TX-AO4N

3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

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14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 86

10-1-47 B, SECOND SOC DECOUPLING

2nd SOC DECOUPLING

B B
U005N
TYPE
C13 DVSS_1 DVSS DVSS_64 K25
D6 DVSS_2 DVSS_65 L24
D16 DVSS_3 DVSS_66 M18
L3 DVSS_4 DVSS_67 M19
M13 DVSS_5 DVSS_68 M20
M14 DVSS_6 DVSS_69 M21
M15 DVSS_7 DVSS_70 M22
M16 N18
DVSS_8 DVSS_71 +1V2-MTK-DT U005N +1V2-MTK-DT
M17 DVSS_9 DVSS_72 N19
N13 N20 TYPE
DVSS_10 DVSS_73
N14 DVSS_11 DVSS_74 N21 VCCK
N15 DVSS_12 DVSS_75 N22 L11 VCCK_1 VCCK_40 AE8
N16 DVSS_13 DVSS_76 P18 L12 VCCK_2 VCCK_41 AE9
N17 P19 L13 VCCK_42 AE10

100nF

100nF

100nF
DVSS_14 DVSS_77 VCCK_3

10uF

10uF

10uF

10uF

10uF
P13 L14

220uF 2.5V
DVSS_15 DVSS_78 P20 VCCK_4 VCCK_43 AF6

C128N
P14 DVSS_16 DVSS_79 P21 L15 VCCK_5 VCCK_44 AF7

C126N

C127N

C120N

C121N

C122N

C190N

C191N

C192N
P15 DVSS_17 DVSS_80 P22 L16 VCCK_6 VCCK_45 AF8

RES
P16 DVSS_18 DVSS_81 R18 L17 VCCK_7 VCCK_46 AF9
P17 DVSS_19 DVSS_82 R19 M11 VCCK_8 VCCK_47 AG5
R13 DVSS_20 DVSS_83 R20 M12 VCCK_9 VCCK_48 AG6
R14 DVSS_21 DVSS_84 R21 N11 VCCK_10 VCCK_49 AG7
R15 DVSS_22 DVSS_85 R22 N12 VCCK_11 VCCK_50 AG8
R16 DVSS_23 DVSS_86 T18 P11 VCCK_12 VCCK_51 AH5
R17 DVSS_24 DVSS_87 T19 P12 VCCK_13 VCCK_52 AH6
T13 DVSS_25 DVSS_88 T20 R11 VCCK_14 VCCK_53 AH7
T14 T21 R12 AJ5
T15
DVSS_26 DVSS_89
T22 T11
VCCK_15 VCCK_54
AJ6
CHIP BOTTOM
DVSS_27 DVSS_90 VCCK_16 VCCK_55
T16 DVSS_28 DVSS_91 U18 T12 VCCK_17 VCCK_56 AJ7 X006N SENSE+1V2-MTK-DT
T17 DVSS_29 DVSS_92 U19 U11 VCCK_18 VCCK_57 AK5
U13 U20 U12 AK6

100nF

100nF

100nF
DVSS_30 DVSS_93 VCCK_19 VCCK_58

10uF
U14 DVSS_31 DVSS_94 U21 V11 VCCK_20 VCCK_59 AK7
U15 DVSS_32 DVSS_95 U22 V12 VCCK_21 VCCK_60 AL5

C117N

C118N

C119N

C125N
U16 DVSS_33 DVSS_96 V18 W11 VCCK_22 VCCK_61 AL6
U17 DVSS_34 DVSS_97 V19 W12 VCCK_23 VCCK_62 AL7
V13 DVSS_35 DVSS_98 V20 Y11 VCCK_24 VCCK_63 AM5
V14 DVSS_36 DVSS_99 V21 Y12 VCCK_25 VCCK_64 AM6
V15 DVSS_37 DVSS_100 V22 AA11 VCCK_26 VCCK_65 AM7
V16 DVSS_38 DVSS_101 V24 AA12 VCCK_27 VCCK_66 AN5
V17 DVSS_39 DVSS_102 W18 AB11 VCCK_28 VCCK_68 AN7
W13 DVSS_40 DVSS_103 W19 AB12 VCCK_29 VCCK_69 L18
W14 DVSS_41 DVSS_104 W20 AC10 VCCK_30 VCCK_70 L19
W15 DVSS_42 DVSS_105 W21 AC11 VCCK_31 VCCK_71 R23
W16 W22 AC12 V23
+3V3-DT
DVSS_43 DVSS_106 VCCK_32 VCCK_72
W17 DVSS_44 DVSS_107 W23 AD8 VCCK_33 VCCK_67 AN6
Y13 DVSS_45 DVSS_108 Y18 AD10 VCCK_34
Y14 Y19 AD11 T9
DVSS_46 DVSS_109 VCCK_35 VCC3IO_C +3V3-DT
Y15 DVSS_47 DVSS_110 Y20 AD13 VCCK_36 VCC3IO_B_1 Y10
Y16 Y21 AD14 VCC3IO_B_2 AA10

100nF

100nF
DVSS_48 DVSS_111 VCCK_37 +3V3-DT

10uF

10uF
Y17 DVSS_49 DVSS_112 Y22 AD17 VCCK_38 VCC3IO_A_1 D22
AA13 Y23 AE7 E22
DVSS_50 DVSS_113 VCCK_39 VCC3IO_A_2 +3V3-DT

C123N

C115N

C116N

C124N
RES
AA14 DVSS_51 DVSS_114 AA18
AA15 DVSS_52 DVSS_115 AA19
AA16 DVSS_53 DVSS_116 AA20
AA17 DVSS_54 DVSS_117 AA21
AB13 DVSS_55 DVSS_118 AA22
AB14 DVSS_56 DVSS_119 AA23
AB15 DVSS_57 DVSS_120 AB18
AB16 DVSS_58 DVSS_121 AB19
AB17 DVSS_59 DVSS_122 AB21
AC13 DVSS_60 DVSS_123 AB23
AC14 DVSS_61 DVSS_124 AC18
AC17 DVSS_62 DVSS_125 AC20
K24 DVSS_63 DVSS_126 AC22
DVSS_127 AD20

3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

19580_128_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 87

10-1-48 B, USB - DT

USB - DT
B B

U005N

+5V
USB
DT-USB-DP-P0 H32 USB_DP_P0
X371 F038N DT-USB-DM-P0 H33 USB_DM_P0
DBG 1
F033N
2 DT-USB-DM-P1 DT-USB-DP-P1 J32 USB_DP_P1
3 DT-USB-DP-P1 DT-USB-DM-P1 J31 USB_DM_P1
4 F041N
5 I012N K32 USB_DP_P2
6 7 F039N I019N K31 USB_DM_P2

TYPE AN10 USB_DP_P3

I047N
I048N AM10 USB_DM_P3

K33
+3V3-A-DT AVDD33_USB_P0P1P2
AN8 AVDD33_USB_P3

100nF

100nF
1uF
M25 AVSS33_USB_P1
AE11 AVSS33_USB_P3

16V

16V
6.3V

C129N

C130N
C131N

3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

19580_129_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 88

10-1-49 B, USB SWITCH - DT

USB SWITCH DT
B B

L006N
I056N
+3V3-DT +3V3-DT
30H

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF
I057N

C093N

C072N

C073N

C092N

C094N

C095N

C097N

C099N

C102N
L004N

30H
+3V3-USBSWITCH

L003N

30H
100nF

100nF
4.7uF

4.7uF
+3V3-DT
R129N 1MEG

10V

16V

10V

16V
I058N

C071N

C060N

C070N

C058N

100

100

100

100
5

8
X007N I059N
1 3

4
7
9
15

25
35
48
51
52

21
50

10

17
U019N
U018N

33pF

33pF
6
1
16
50

37
17
54

47
11

53
LAN9500

R131N

R131N

R131N

R131N
2
4

1
VDDCORE_1
VDDCORE_2

VDDUSBPLL
VDDPLL
USB2524-ABZJ

VDD33A_1
VDD33A_2
VDD33A_3
VDD33A_4

VDD33IO_1
VDD33IO_2
VDD33IO_3
VDD33IO_4
VDD33IO_5
50V

50V
VDDCR18_2
VDDCR18_1

VDDPLL18
VDDA33_4
VDDA33_3
VDDA33_2
VDDA33_1

C065N

C067N
18 1

VDD33_3
VDD33_2
VDD33_1
XI PHY_INT
USB-DP-P2 2 USBUP_DP1 USBDN_DP1 5 DT-USB-SWITCHED-DP1 PHY_SEL 34
USB-DM-P2 3 USBUP_DM1 USBDN_DM1 4 DT-USB-SWITCHED-DM1
TXP 3 I060N R110N 10 C104N 470pF DT-RXP
DT-USB-DP-P0 48 USBUP_DP2 USBDN_DP2 7 DT-USB-SWITCHED-DP2 19 XO TXN 2 R111N 10 C135N 470pF DT-RXN
DT-USB-DM-P0 49 USBUP_DM2 USBDN_DM2 8 DT-USB-SWITCHED-DM2 TXCLK 47 I061N
R045N 10K 38 43
+3V3-DT TCK|RXD1 TXEN
+3V3-USBSWITCH
45 VBUS_DET1 USBDN_DP3 10 DT-USB-SWITCHED-DP3 R046N 10K 40 TDI|RXD3
S010N 46 VBUS_DET2 USBDN_DM3 9 DT-USB-SWITCHED-DM3 37 TDO|PHY_RST RXP 6 I063N C136N 470pF DT-TXP
+3V3-DT
S011N I011N R050N 10K 39 TMS|RXD2 RXN 5 I062N C147N 470pF DT-TXN
SDA-SSB R108N 10 32 SDA/SMBDATA USBDN_DP4 12 DB001C
R051N 10K 36 TRST| RXD0 RXCLK 41
SCL-SSB R109N 10
33 SCL/SMBCLK/CFG_SEL0 USBDN_DM4 13 DB002C RXDV 42
C068N 12pF 44

100

100

100

100
I055N RXER

8
1MEG

S013N 34 26 R128N 1K 20
50V CFG_SEL1 OCS1_N +3V3-DT VBUS_DET
1

50m 2 35 25
CFG_SEL2 OCS2_N
X001N
R147N

RES 4
OCS3_N 22 COL|GPIO0 46
USB-DP-P0

R132N

R132N

R132N

R132N
52 21 12 23

1
XTAL1/CLKIN OCS4_N USBDP MDIO|GPIO1
C069N 51 USB-DM-P0 11 22
3

XTAL2 USBDM MDC|GPIO2

30 R112N 100K R133N 12K I027N 16 45
50V 12pF LED_A1_N/NON_REM0 USBRBIAS CRS|GPIO3 +3V3-DT
DT-USBSWITCH-RESETn 44 RESET_N LED_A2_N/NON_REM1 28 R113N 100K
TXD0|GPIO4|EEP_DISABLE 56
R028N 10K I050N 36 14 R122N 100K 55
+3V3-USBSWITCH SELF_PWR LED_A3_N/PRT_DIS0 TXD1|GPIO5|RMT_WKP
18 42 R126N 100K 49 54
TEST LED_A4_N/PRT_DIS1 +3V3-DT TEST1 TXD2|GPIO6|PORT_SWAP
13 TEST2 TXD3|GPIO7|EEP_SIZE 53
R034N 10K I051N
41 PRT_ASSIGN0 LED_B1_N 31 33 TEST3 FDX_LED|GPIO8 26
+3V3-USBSWITCH
40 PRT_ASSIGN1 LED_B2_N 29 LNKA_LED_|GPIO9 27
39 PRT_ASSIGN2 LED_B3_N 15 SPD_LED|GPIO10 28
S012N

38 PRT_ASSIGN3 LED_B4_N 43 DT-USB2ETH-RESETn 24 RESET

EEDI 32
I065N
27 55 31 S006N
PRTPWR1 NC I054N EEDO|AUTOMDIX_EN
24 R134N 12K 8 30
PRTPWR2 EXRES EECS
23 29 R040N 10K
PRTPWR3 EECLK|PWR_SEL +3V3-DT
20 PRTPWR4 14 NC I064N
GND_HS
R127N 100K I052N 19 PRTPWR_POL
HS/VSS

57
R130N 12K I053N 56 RBIAS
57

U009N
+3V3-USBSWITCH

L001N I010N OUT_1 2 F030N I018N R035N 10K

3 4 S008N +3V3-DT
+5V IN OUT_2
50m
+3V3-USBSWITCH
100nF

30H
GND
22uF 16V
C078N

R052N 10K
16V

U017N
C077N

3
U020N
VCC

RESET 2 DT-USBSWITCH-RESETn VCC

F026N
2 DT-USB2ETH-RESETn
F022N RESET
GND
GND
100nF

100nF
S007N
+3V3-USBSWITCH
1

+3V3-DT 50m
16V

16V
1
C064N

C103N
3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

19580_130_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 89

10-1-50 B, USB HUB

USB HUB
B B

+3V3-USBSWITCH +5V

100nF

100nF

100nF

100nF

100nF

100nF
C165N

C160N

C161N

C162N

C163N

C164N
+3V3-USBSWITCH

9
5
14

21

27
U010N
CY7C65632-28LTXC

VCC_D

VCC
VCC_A3
VCC_A2
VCC_A1
4 DDP_1
3 DDN_1 VREG 28
C158N 18pF
R143N 10K 25 10 50V
+3V3-USBSWITCH OVR_1 XIN

3
X011N
DT-USB-SWITCHED-DP3 7 4
DDP_2
DT-USB-SWITCHED-DM3 6 11 2 C159N 18pF

1
DDN_2 XOUT
50V
R136N 10K 24 17 DT-USBSWITCH-RESETn
+3V3-USBSWITCH OVR_2 RESET
I032N
22 R142N 10K
SELFPWR +3V3-USBSWITCH
DT-USB-SWITCHED-DP2 13 DDP_3
DT-USB-SWITCHED-DM2 12 23 R145N 100K
DDN_3 GANG
I029N
R140N 10K 20 8 R146N 680
+3V3-USBSWITCH OVR_3 RREF
I033N
TEST|I2C_SCL 18
DT-USB-SWITCHED-DP1 16 DDP_4 PWR|I2C_SDA 26
DT-USB-SWITCHED-DM1 15 DDN_4
I030N DN 1 USB-DM-P2
R141N 10K 19 2 USB-DP-P2
+3V3-USBSWITCH OVR_4 DP
GND_HS
29

3 2013-12-13

MTK UHD 50 Hz
715RLPCB000000021
7800

19580_131_140313.eps
14-03-26

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 90

10-1-51 Layout Top

X003
X002 X008
X031 X001D
X002 X070
X020 X025 X026 X003 X008
X002D X003D X001D
X031

C164T
X020 X026
X025 U014U

C004U
1 6 40
11 1 1

C174T
X314B U024U
X070

R126T
R132B

X002D X003D C164T 5 1 S

C173T
R127T
C048B

C156T

C158T

R132T
R001U

X073 X072 C145U

S014D

R133T

C159T
X313B
R130B
S002U
C050D R131B X312B U024U

S005U
4 1

C157T

C160T

C072U
C162T

R130T
R134T

C136T

S025T

C147T
S010T

R128T
R131T

C161T

C145U
X072

R139T

C167T
R010D

R001D
C047B

X011U X313B X314B X312B U014U

1
X011U
X073 D G

X273

R229T
C078D

C050D

R227B

R226B

R225B

R224B
X273

S007D

C166T
C148T

R129T
C163T

X061

R135T
S006D

C135T
S013D

C165T
C063D
C053D C067D

C052D
C065D
C018U

C099U
S008D

C165T
R135T
C052D
R056D

D045B

D028B
C064D
C075D C074D
X055 X325 IN

R030D

R029D
C018U

D038B D042B
R001B

X019B

C048D C066D

C046D C045D
C047D
R286B
C072D
L022F

R245B
C073D
X061 U004B

L005D
L010F C298B

D007B

L001D
X325

L002D

X010
X010
R028D

R027D

L003D

R059D
C278B

R058D
R057D
R013B

C020U
C279B
X019B

D041B D043B
D040B
C054D
D005B

R287B
D002B
D009B
D003B

C020U
R219B
C023D

C019D
C024D
C076D

C022D
C077D

C049D
L009F U024B

C037D

C038D
C044B

C037D
X055

C038D

L021F
C021D C020D AJ1 B1
L010F L022F C C043B
C042B
AK2 U004B

D006B
U024B

C051D

R312B
K
D008B
C041B
A3 C071B

C051D
B E C040B

D039B
K
L009F L021F

A
R289B C039B R019B

L005D
L003D

BYP

INH
L001D
C038B

D054B
L002D
R018B

D044B
L003F
C061F L015F C036B
C037B

C067B

U003U
C049D U003U

C019U
C035B

GND
C034B

D033B
C061F C111F C033B

K A C032B R051B C014U

K A
D001F

C111F

VOUT

VIN
X274
C031B R045B

X274
D006F C115F R214B R052B
C065F C030B C013U
S001U

C139U

C138U
C029B

C140U
R033B
R046B

L014U
C058F C072F C112F R107B
C062F R215B

D006F
R108B

D001F

R060F
VOUT BYP

R037F

C154U
R077B

C153U
R044B

C116F

C119F

R032B
C067F

C070F
C005D

C005D
U027U

R078B
C006D

R079B
R074F
R041F
U005F U010F R038B
U027U
VIN INH

C004D

C004D

C007D

C003D

C006D

L016U
GND

R082B
R043B

C152U
L016U
C127U
U005F
C091F R042B
C059F
U010F

R080B

27
28
R041B
R048B

C119F
C070F
C029F

C067F

C116F

R081B

C126U
R015B
R047B
C057F C090F
R050B

R029B

R092U
R049B

R072B
C089F

R031B
C056F
C040F C071F

R073B
D002U U018U

R059F
R036F
C102U

R076B

R030B
D002U

C007D

L014F

R161B

D069B
C029F

L016F
C003D

R074B
R040B

D055B
A
E B K

16 9

C030U

C146U
C103U
R075B
R028U

R076U
C119U
U005U R039B

U005B

R124B
C
C033U

R125B

A
D056B

D006U
C032U U018U

R126B
L001U

C012U
D059B
AK28 A28

K
U009UD003U

R129B

X090
C031U

C118U
U005UX323B C072B

R127B
U005B

D058B
AJ30 B30 D057B

C100U
R246B
1 8

X090
R021B

U009U
5

R128B
L013U
R020B

D003U

C159U
C159U
A

R097B
U002F X013B

D032B
C068B

R091U
X323B U001B
U001B

D060B
8

1
C101U

R111B
C044F

C124U
C022U

R017U
S006T

C034F

R115B
C023U

U002F

R122B

C125U
C032F

L015U
R116B R117B

L009U
C041F
X013B

U007B
K
R090B R094B R093B R084B R088B R087B

D031B

C
R029F R025F

L015U
L009U

U007B
R089B R091B R092B R083B R085B R086B

C045B

B
R152B R150B
R022F R026F

R236B
R149B

D011B

E
R028F R027F

D046T

6
C303B
D059T
D049T
D061T D065T
K A
R151B

C337B
R292B
R153B

C047F

C158U
C158U
R233B
4 1 C339B

D005F
R119B D001B
D010B

D004B
A
6 1

X342B
R043F

R012F

D005F
R112B C377B C386B

C357B
S010B C352B

X342B

C136U
X296

C135U
C378B

C137U
X296

K
D063T R118B R238B R250B

1
R123B

2
R120B
C381B

K
C024U
C027U U028B U026B

8
C002B
R044F

U028B

C358B

R240B

R113B
C047F C037U

U002T

U002T
C025U C370B C368B

C002T

R083T
5 8
C339B

R121B
C035F C026U R082T C371B
L028B L027B C369B

C294B

C293B
IN
OUT_1
GND N P C001T

16
U003F D055T

1
R114B
C372B C367B

D062T
D054T U026B

1
D064T C292B C299B

L028B L027B C147U

C074T
C345B C344B
U003F C037U
L002F
R046F

C128T
R197B R196B

X015B
D003T
C343B L010B

X015B
L008U
C356B C355B C353B C354B
D046N
X292 OUT_2 R134B
D057T
D037T D031TU003T
D008T
D052T
D053T D058T D061N D059N
D049N D065N
C090N
C147U

L011U
C083U
D041T

P
D056T

R051U
D027T D063N

C090T
GND IN
OUT_1 C116U
D032T

U008U
D043T

C128T
C113U C042C

C079T
C055F
R052U

D042TD045T

1
R100C

D044T C078U C115U

C090N

X071
C084U

U008U

X071
U002N
U002N
C084U

04 T

C002N

R083N
C
C055F D029T

R068U
D005U
U015U D014T

X0 04

B
C114U
D030T
X292

U003T D009T

C054C
R083C

A
R082N

T
R074U

D005U
K A R069U

U020U
5

4
R099C

4
N
C001N

X
C128U
OUT_2 D005T D004U
D055N C155U C043C

U020U
AN1 A1
D062N C045C
R091C

C090T D054N

1
D004U D064N C155U

L001C
D028T

K
U015U D006T D012TD013T

C074N
X320 X320

C054C

X030
4 1 2

C016T
C015T

R093T

R092T
C121U
R050T

R090U
R185T
S025C

R186T

U013C
R051T R153T
D060T D057N D058N

C122U
U013C R052T R187T

X321 R154T D038T D033T D052N

D053N U003N

L019U
S022C

C035C

D007T D037N
5 8

D008N
D031N C156U
X321
D023T
R152T

D056N D041N D027N

1
1
C180T

R151T
U004T D032N
R149T

D043N

X029
C080N
S024C

C156U

X029
S023C
S005T R161T

S026C R162T D002T D015TD020T D034T D042N

D044N D045N
C040C D018T D024T

X030
04 N
C084F

S016T
C083F C177T
D001T D029N D014N
R081F

X0 04
S027C R291T R031T
R140T
S009T
D022T
D025T L019U D030N U003N D009N

5
R033T C176T X003T

N
U005T
C183T
R292T
~RESET D004T

0
R150T

D039T
C132U

X
U008F D017T D005N X003T

R245T

R189T
U004T C091T AN1 A1
R144T

U001T U001T C131U

R158T

X007T

C184T
U008F D008F R172T

D040T D028N

8
C040C VCC GND
C178T
D006N D012ND013N

L012U
S014T

C091T
D008F
C085D
C086D

R051D
R050D C081D

C080D
D016T L005T
D036T N P

R093N

R092N
C015N

C016N
R175N R154N
A K
R049F

D019T D026T D021T D060N

C100T
D035T
C044T

X007T R174N R153N

D038N D033N

R088T

C046T

R089T
C045T
R050F R137T
R082F

R083F

L001T C076T
C136N R015N

D007N

C101T
R085F

R138T
R086F

R269N
R247T R099T

C128N

R114T
R017N
R038T

C147N

D023N
R078F

R084F
C095F

R100N

C128N

C025T

R116T

R115T
R246T R100T
R110N C104N

X002T
L002T

C150T
R111N C135N
R222T R265T R032N R161N
R262T

D002N U004N
D020N
X002T
D015N D034N
5

4
U020C

U020C

R033N R162N
AN33 A33

R263T
R121T
C065N
R113C R118T
14 1
D018N D024N

1
C177N

X001E
X001E
15 56
D001N

X007N
R268T
3 1
C038C

R112C

C149T
AA1 H1 D022N
D025N

R129N
C176N

05 T
X322 U005N D004N

D039N
X0 05
X335

X007N
AH4 A4
8

U019N ~RESET
S009N
S014N
D017N

R189N
R267T

C018E
U004N

4
X0
R252T R245N
C182T

R142T 4 2 R287T
C067N

X335 X261 X322 U005T AH11 A11 28 43 U001N R172N

D040N

C091N
C091N
29 42
R142T C178N

D016N D036N
1

X330N
R253T AA14 H14 VCC GND

X330N
R016N C066N L005N
R248T
R249T
U001N
D019N D026N D021N

C100N
D035N
X281

C044N

C041C
R231T

R120T
R230T

R041N

R285T

R089N
C046N
R088N
C045N
U019N R137N

8
R114N
U007T

R088C

R086C

R157T
C076N

X027

X027
A

C101N
D003N
R138N R010E
R251T R250T
R113T
R119T

C041C R012E

R262N
X009N

C025N

R116N

R115N
K
R011E

X002N
X261 U007T

C150N

R009E
R265N

1
R222N
R109T 19
X281

R121C
4

AN33 A33

X002N
5

R121N

R263N
R112T R089C

R268N
C149N
R166T

X346
12 X001T 4 3 R131C AA1 H1

N
X001T
R167T

U006T

05
AH4 A4
X009N
D

2 2
U006T

S047C
R293T

1 1
R082C

R079C

R080C

R081C

R267N
3 1

X0
R252N
S

N
L009C
1 6 20 2 1

05
GND
G

X346 68 06
C081C R099N

U005N AH11 A11 U003E X003E

U022U

OUT_2
OUT_1
4 4

X0
C179T

X2 X2 2
K

R014N C096N
R287N
D018C

S015T
R253N
X283

R111C
AA14 H14
K
C027C

C001C R054C R139N

U022U
R248N
D019C

S033C
4 2 S005N R249N 1 X003E 2
C156N

X266
A

40

31
C063C

06

R285N
5 5

30
C039C 3 3 C148N

1
U007N

C157N

R135N

IN
A

R166N
R031C
C009C

X2
R075C R250N
R251N
C039C

U003E
D018C
D019C

R125C

C014E
L002E

R167N
3 1
R127C

X371 U004E

68
C134N R042N R043N

X008N X331N
4 6

X333
C002E
R117C

R116C

R132C

R129C

R130C

10
U007N
X2
S001E C010E

9
C072C C009E

10

21
L002C

4 1

C132N

20
11
X003C

X333 X010N X410

C098U
R156C R157C

X303
X303

2
X331N 1 5 X311

X004E
C031C

C086C

R122C

R151C

C076C

C085C

L012C

X266 C082U X008N

S048C

X310 X371
19

C084C ~RESET~|RESET GND

R126C R128C C001E
L013C
X010N

1
C052C

R002E
R123C

C144U X311

1
C052U
C050U

C051U
X410 C053C R124C
C069C

U001E
X297

C008E
X003C

C007E
C082U

X295
X283

X310
R141C

C144U U001E
U019C

VDD

L002U
C068C

1 21
L002U
U019C

X260
1

C045U
2 20
C056U

R045U

R036U

R046U

C071U

R040U
C049C

C044U
R098C

C050C

R133C

R150C

R149C

R050C

C077C

R042U

R104U
C149U
R105C

C060U
R136C

4 1
R067U

R135C
8 1 L006U
C059U
C061C

C066U

C047C S046C
C071C

D001U

R137C
C058C
U010U
K

U010U U011U U011U

D020C

X260
A

C063U

C064U

C148U
D020C

L005U
C057U

5 8
C067U

L004U
C062U

U011C 9 16
C070U
~OE

VCC

R022C
K

R071C
GND

S009C
S002C
19

X295 X297
Y

C004C C058U
U011C

U009C
C030C
A

A
D010C

R033C C041U C061U

R047U
GND

VCC

~OE

R020C
C042U
U009C

R077C S008C

X322N
R041U
X284

S003C
C010C R073C
L003U
L003U
L010U
D005C

C046U

X322N
C069U
L010U

C047U

U018N
D004C

X001N
1

42 29
C080U

43 28
GND IN
OUT_1
C055U
C053U

C054U
C081U

L007U

C069N

U012C U018N C068U C048U C069U

X001N

U012U
C081U
C078N
C078N

C068U
R003C

VCC Y
G D
R074C
S011C
R023C
X284

U012C
U010C 56 15
C003C

OUT_2 R098U

1 14 U023U
R078C

C012C

~OE GND
A S004U U023U
R034C
S012C

C068N R147N
VCC Y
U012U
R021C

S005C

R072C

U010C
S

~OE GND X280

R076C

C011C

A
S006C

X000 X286 X282 X006 X007

1 4 1 4
C006C

C008C

R032C
D011C D007C D006C D012C D009C D008C

X285 X005

19 1 19 1
X000

X280 X282 X006 X005 X007

X285 X286

3 2013-12-19

SSB Layout top

715RLPCB000000021

19580_071_140305.eps
14-04-21

2014-Apr-17 back to
div.table
 Circuit Diagrams and PWB Layouts QM14.3E LA 10. EN 91

10-1-52 Layout Bottom

X001D X003D X002D

C

R147T

C186T
R145T
R148T

U011T
E B
B E C

C324B

R008B
R007B
U009T

R005B

R155T

R146T
R156T
U010T C

C327B

R014B

U029U
C326B

C029D
B E

C325B

R011B

C329B

S005D
C187T
C297B C157U

C328B
R010B

R112U

1
C323B

R009B
C016U

X273
C

D052B
S042D

R100U
R101U

10
C151U

D064B

1
U026U

C015B

C013B
C007B

U004U
D048B
B E

C015U
D050B
D051B

C005U
C009U

6
R096U
R102U

S048D

S049D

3
R033D

4 1

C008U

C001D
C014B R050U S043D
R011U

D046B
X010
C012B

S044D

S045D
C006U

S036D

S037D
L014B
C064B

S040D

S041D
U001U

R218B
D062B C260B
S039D

S046D

S047D