c
c

Racetrack memory promises a novel storage-class memory with the low cost per bit of magnetic
disk drives but the high performance and reliability of conventional solid state memories. Unlike
conventional memories, the fundamental concept of racetrack memory (RM) is to store multiple
data bits as many as 10 to 100 bits per access point, rather than the typical single bit per
transistor. This is accomplished in racetrack memory by storing data bits in the form of domain
walls in magnetic nano wires which are oriented either parallel to the surface or perpendicular to
the surface of a silicon wafer. These distinct structures form "horizontal" and "vertical" racetrack
memories. This paper discusses progress towards building a racetrack memory and the
fundamental physics underlying it. In particular, the current and field controlled dynamical
motion of magnetic domain walls in magnetic nano wires formed from permalloy and related
materials are discussed.
ð ð 
Racetrack memory is an experimental non-volatile memory device under development at IBM's
Almaden Research Center by a team led by Stuart Parkin. In early 2008, a 3-bit version was
successfully demonstrated. If it is developed successfully, racetrack would offer storage density
higher than comparable solid-state memory devices like flash memory and similar to
conventional disk drives, and also have much higher read/write performance. It is one of a
number of new technologies trying to become a universal memory in the future.

The world today is very different from that of just a decade ago, thanks to our ability to readily
access enormous quantities of information. Tools that we take for granted²social networks,
Internet search engines, online maps with point-to-point directions, and online libraries of songs,
movies, books and photographs²were unavailable just a few years ago. We owe the arrival of
this information age to the rapid development of remarkable technologies in high-speed
communications, data processing and²perhaps most important of all but least appreciated²
digital data storage.

Each type of data storage has its Achilles¶ heel, however, which is why computers use several
types for different purposes. Most digital data today, such as the information that makes up the
Internet, resides in vast farms of magnetic hard disk drives (HDDs) and in the HDDs of
individual computers. Yet these drives, with their rotating disks and moving read/write heads, are
unreliable and slow. Loss of data because of so-called head crashes occurs relatively often.
Regarding speed, it can take up to 10 milliseconds to read the first bit of some requested data. In
computers, 10 milliseconds is an eon²a modern processor can perform 20 million operations in
that time.


  
Racetrack memory uses a spin-coherent electric current to move magnetic domains along a
nanoscopic permalloy wire about 200 nm across and 100 nm thick. As current is passed through
the wire, the domains pass by magnetic read/write heads positioned near the wire, which alter the
domains to record patterns of bits. A racetrack memory device is made up of many such wires
and read/write elements. In general operational concept, racetrack memory is similar to the
earlier twistor memory or bubble memory of the 1960s and 1970s. Delay line memory, such as
mercury delay lines of the 1940s and 1950s are a still earlier form of similar technology, as used
in the UNIVAC and EDSAC computers. Delay line technology was superseded by core memory,
a technology developed to support creating the Semi Automatic Ground Environment effort by
the U.S. Department of Defense, a project that eventually led to creating the MITRE corporation.
These delay-based memory storage technologies used electrical currents to "push" a magnetic
pattern through a substrate. Dramatic improvements in magnetic detection capabilities, based on
the development of spintronic magnetoresistive sensing materials and devices, allow the use of
much smaller magnetic domains to provide far higher areal densities.
In production, it is expected that the wires can be scaled down to around 50 nm. There are two
ways to arrange racetrack memory. The simplest is a series of flat wires arranged in a grid with
read and write heads arranged nearby. A more widely studied arrangement uses U-shaped wires
arranged vertically over a grid of read/write heads on an underlying substrate. This allows the
wires to be much longer without increasing its 2D area, although the need to move individual
domains further along the wires before they reach the read/write heads results in slower random
access times. This does not present a real performance bottleneck; both arrangements offer about
the same throughput. Thus the primary concern in terms of construction is practical; whether or
not the 3D vertical arrangement is feasible to mass produce.

Ö
cc


IBM is developing a new class of memory that could eventually allow portable devices to store
thousands of movies and run on a single battery for weeks at a time. Well, instead of telling a
device to seek out the data it needs (as is the case in traditional computing systems), the new
memory automatically moves data to where it can be used, sliding magnetic bits back and forth
along nanowire "racetracks."

"Digital data is typically stored in magnetic hard disk drives, which are low-cost but slow due to
their moving parts, or in solid state memory such as Flash memory, which are faster but more
expensive," explained Dr. Stuart Parkin, an IBM Fellow at IBM Research - Almaden.

"Racetrack memory aims to combine the best attributes of these two types of devices by storing
data as magnetic regions - also called domains - in racetracks just a few tens of nanometers
wide."According to Parkin, this technique facilitates the precise placement of domains, which act
as nano-sized data keepers capable of rapidly accessing and storing immense amounts of data.

"By controlling electrical pulses in the device, the scientists can move these domain walls at
speeds of hundreds of miles per hour and then stop them precisely at the position needed."This
allows massive amounts of stored information to be accessed in less than a billionth of a second."
Parkin also noted that to achieve the densest and fastest possible memory, the domain walls
inside the device must be moved at speeds of hundreds of miles per hour to atomically precise
positions along the tracks. ¬¬

"These timescales (tens of nanoseconds) and distances (micrometers) are surprisingly long,
especially since previous experiments had shown no evidence for acceleration and deceleration
for domain walls driven along smooth racetracks with current,"

ð 
 
      

Racetrack memory has attracted attention in the last two years because it's a possible replacement
for flash and conventional magnetic disks. Racetrack memory devices can potentially have
storage densities hundreds of times greater than flash memories, but read/write speed and power
consumption remain substantial technological hurdles. The problems arise from the physics of
racetrack memory devices, so performance gains must come from an improved scientific
understanding of the underlying processes rather than improved device fabrication.

In a nutshell, racetrack memory works by cycling magnetic domains (bits of memory) along
ferromagnetic nanowires using a spin polarized current. A transistor in the center of the wire
reads and writes data as the bits are moved up and down the nanowirewire.

The key to increasing speed and efficiency in racetrack memory devices is understanding the
interaction between spin polarized current and domain wall motion in the nanowires. A team
from Texas A&M University recently solved the equations of motion for magnetic domain walls
in nanowires under various current conditions. They found that both the efficiency and speed of
domain wall motion could be dramatically increased using a series of current pulses rather than
DC, AC, or a combination of the two. Most importantly, they show that the optimum pulse
conditions can be calculated using basic electrical properties of the nanowire, which are
relatively easy to measure.

There is a lot to like here, but one important aspect is the choice of model. Most work on domain
wall motion relies on complex numerical codes that tend to hide the underlying physics of the
process. This work uses much more basic magnetisation theory so that the physics and
implications of the model are transparent and understandable. The conclusions provide clear,
testable conditions that can be realized in the lab, and, if the predictions are accurate,
demonstrable increases in device speed and efficiency.

    


 ! 



The global cost in terms of lost productivity and energy consumption runs into the hundreds of
millions of dollars a day.

Like the tried and true VHS videocassette, the proposed solution involves data recorded on
magnetic tape. But the similarity ends there; in this system the tape would be a nickel-iron
nanowire, a million times smaller than the classic tape. And unlike a magnetic videotape, in this
system nothing moves mechanically. The bits of information stored in the wire are simply
pushed around inside the tape using a spin polarized current, attaining the breakneck speed of
several hundred meters per second in the process. It's like reading an entire VHS cassette in less
than a second.

In order for the idea to be feasible, each bit of information must be clearly separated from the
next so that the data can be read reliably. This is achieved by using domain walls with magnetic
vortices to delineate two adjacent bits. To estimate the maximum velocity at which the bits can
be moved, Kläui and his colleagues carried out measurements on vortices and found that the
physical mechanism could allow for possible higher access speeds than expected.

Their results were published online in the journal Physical Review Letters. Scientists at the
Zurich Research Center of IBM (which is developing a racetrack memory) have confirmed the
importance of the results in a Viewpoint article. Millions or even billions of nanowires would be
embedded in a chip, providing enormous capacity on a shock-proof platform. A market-ready
device could be available in as little as 5 to 7 years.
 Y

Racetrack memory promises to be a real breakthrough in data storage and retrieval. Racetrack-
equipped computers would boot up instantly, and their information could be accessed 100,000
times more rapidly than with a traditional hard disk. They would also save energy. RAM needs
to be powered every millionth of a second, so an idle computer consumes up to 300mW just
maintaining data in RAM. Because Racetrack memory doesn't have this constraint, energy
consumption could be slashed by nearly a factor of 300, to a few mW while the memory is idle.
It's an important consideration: computing and electronics currently consumes 6% of worldwide
electricity, and is forecast to increase to 15% by 2025.

   
  
"  
Y
IBM researchers have moved another step closer to commercializing "racetrack memory" ± a
new technology that uses magnetic nanowires as high-density data storage devices. Racetrack
involves moving magnetic domain walls ± the boundaries between regions of opposite
magnetization ± along a nanowire using small spin-polarized current pulses. It could make for a
new type of magnetic memory that can store up to 100 times more data than existing random-
access memories (RAMs).

A conventional computer hard drive uses a motor to rotate glass discs on which magnetic bits are
stored in a thin film. Racetrack memory is radically different because it uses electric currents to
move magnetic domain walls up and down a nanowire without displacing any atoms at all.
Magnetic domain walls are narrow boundaries between regions in a material where the magnetic
moments point "up" on one side of the wall and "down" on the other. Walls can be moved inside
a material by applying an external magnetic field or by injecting a spin-polarized current pulse (a
current of spin-polarized electrons that carries spin angular momentum).

In a racetrack memory, data are stored as a sequence of magnetic domains ± separated by domain
walls ± along a nanowire and individual bits are stored and retrieved by moving the sequence
along the nanowire and across magnetic read and write devices. A typical racetrack chip would
contain arrays of nanowires a few microns long and about 30 nm wide and could store hundreds
of gigabytes of data.

#""
$  
"

Stuart Parkin's team at IBM Almaden Research Center in San Jose, California, has been working
on the technology since 2004 and has already developed some basic racetrack prototypes that can
read and write simple data sets. However, until now, the researchers did not know how magnetic
domain walls move in a nanowire. Do the walls move instantly as soon as the current is applied
and come to a stop straight away when the current is switched off, or do they take time to reach
their peak velocity and come to a slow stop when there is no current?

Parkin and colleagues say that the second scenario holds true. The researchers came to their
conclusion by measuring the time it takes for a domain wall to accelerate to its peak velocity and
the distance travelled by the domain wall when it is excited by a current pulse. They did this by
using an exciting current pulse and a second probe current pulse while also measuring the time it
takes for the domain wall to decelerate from this peak velocity to zero when the current is
switched off.

4

4
 



"We found that the time required for acceleration/deceleration is surprisingly long at around
10 ns and the distance travelled is long too at around 1 µm," Parkin told Ô

.
"However, the distance lagged during acceleration is the same as the distance moved by the
domain under its own inertia (or mass) when the current is switched off." This latter finding is
very important because it means that, although the domain wall has inertia, it still moves a
distance that corresponds to the length of the applied current pulse. Knowing this, the researchers
will thus now be able to precisely control the position of the domain wall along the racetrack by
using carefully tailored current pulses or sequences of pulses and so accurately move and retrieve
data on it.

"This is clearly an important breakthrough in our understanding of current-driven domain wall

dynamics relevant to building racetrack memories," stated Parkin.

The IBM team followed domain wall motion by measuring the resistance of racetracks made of
permalloy ± a soft magnetic alloy made of nickel and iron. The presence of a domain wall
slightly lowers the resistance of the nanowire.

4


4

"We use the resistance of the nanowire to determine not only whether a domain wall is present,
but also the number of domain walls and even the detailed internal magnetic structure of the
domain wall," explained Parkin. "We used a rather ingenious technique that involves combining
two current pulses ± one to excite the domain wall and the second to probe the domain wall's
motion ± somewhat akin to pump-probe techniques using photon pulses."

The researchers now plan to build an integrated prototype of a racetrack memory with reading,
writing and shifting elements built into the track itself.

c c%ð
ð



The basic structure of an HDD has not changed since its inception in the 1950s, although the
technology of individual components has altered enormously, in particular shrinking by many
orders of magnitude. An HDD stores data as the directions of magnetization of tiny regions in an
ultrathin layer of magnetic material coating the surface of a highly polished glass disk. The disk
rotates at high speed (commonly 7,200 revolutions per minute in computers currently sold) under
a recording head on a moving arm that reads and writes the magnetic bits.
In the early decades HDDs were refrigerator-size devices and the cost per stored bit was very
high. The figure of merit for a disk technology is its areal density: the number of data bits
reliably stored per unit area of the magnetic surface. At first areal densities of disk platters
improved by only about 25 percent each year, but beginning in the late 1980s HDDs rapidly
morphed into much more compact and capacious machines.

An important milestone in this evolution was the development of read heads exploiting
spintronics, or what I like to call spin-engineered materials. My research in the period of 1988 to
1991 into the fundamental properties of materials constructed of multiple magnetic nanolayers
led to development of the spin-valve magnetoresistive sensor. This sensor detects tiny magnetic
fields as a change in its resistance, and at the time of its invention it was the most sensitive
detector of such fields at ambient temperatures.

The first use of spin-valve sensors in HDD read heads came in 1997 with IBM`s Deskstar 16GP
Titan. Within five years HDD storage capacities had increased 1,000-fold, the rapidest advance
in the half-century-long history of HDDs. Today the collective storage capacity of all HDDs
manufactured in one month exceeds 200 exabytes, or 2 X 1020 bytes enough to store all the
extant analog data in the world, that is, all the data on paper, film and videotape.

The spin-valve sensor was the first spintronic nanodevice, and knowing some spintronics is
essential to understanding how RM works. Spin is a fundamental quantum property of electrons.
Imagine each electron as a tiny spinning ball of electric charge, with a magnetic field pointing
along the axis of the spin. The spin axis of an electron in an ambient magnetic field lines up
either parallel or antiparallel to the field. It is said to have either spin up or spin down, with
respect to the local magnetic field.

When electrons travel through a magnetized metal, the spin-up electrons travel more easily,
resulting in a spin-polarized current or spin current one in which most of the moving electrons
carry a specific spin. In contrast, an ordinary current, such as one traveling along copper wire,
involves electrons whose spins point randomly in all directions. Permalloy, a strongly magnetic
alloy of nickel and iron, can produce as much as 90 percent spin polarization in a current.
The spin-valve sensor consists of a nanosandwich, a layer of nonmagnetic metal between two
magnetic layers. The first magnetic layer spin- polarizes the current in a specific direction. The
second magnetic layer changes its magnetism back and forth to match the field coming from
each passing magnetic domain representing a 0 or a 1 on a disk. When the two magnetic layers
of the sensor are parallel, the spin-polarized current flows through relatively easily. When the
layers are antiparallel, the polarized electrons are impeded. The changing resistance of the device
is known as giant magnetoresistance, a phenomenon independently discovered in 1988 by the
groups of Albert Fert of the University of Paris South and Peter Gr nberg of the J lich Research
Center in Germany. Giant magnetoresistance allows read heads to detect much weaker fields,
which in turn allows magnetic domains on a disk to be much smaller and more tightly packed.

Yet the era of the spin-valve sensor has lasted no more than a decade. A newer spintronic
technology known as magnetic tunnel junctions has already replaced it in the HDDs
manufactured today. Magnetic tunnel junctions exploit an effect called tunneling
magnetoresistance to achieve even greater sensitivity to small magnetic fields than spin-valve
devices [see Magnetic Field Nanosensors, by Stuart A. Solin Scientific American, July 2004].

Although spintronic read heads have enabled vast increases in the storage capacity of HDDs and
helped to bring the cost of storing data down to about 10 cents per gigabyte, the basic mechanical
nature of an HDD`s rotating disk and moving read head remains, leading to two major
deficiencies. First, a head crash occurs when the recording head accidentally strikes the magnetic
layer, thereby damaging it, and can result in loss of all data in the HDD. Second, it takes a lot of
energy to spin a glass disk at 7,200 rpm, and even at such a pace, rotating the disk to the data of
interest takes millions of times longer than accessing data from volatile memory. As a result,
HDDs are very inefficient for many quite ordinary.


   $ 

Current projections suggest that racetrack memory will offer performance on the order of 20-
32 ns to read or write a random bit. This compares to about 3,000,000 ns for a hard drive, or 6-
40 ns for conventional DRAM. The authors of the primary work also discuss ways to improve
the access times with the use of a "reservoir," improving to about 9.5 ns. Aggregate throughput,
with or without the reservoir, is on the order of 250-670 Mbit/s for racetrack memory, compared
to 102400 Mbit/s for dual channel DDR2 DRAM, 1000 Mbit/s for high-performance hard drives,
and much slower performance on the order of 30 to 100 Mbit/s for flash memory devices. The
only current technology that offers a clear performance benefit over racetrack memory is SRAM,
on the order of 2 ns, but is much more expensive and far lower density.

Flash memory, in particular, is a highly asymmetrical device. Although read performance is

fairly fast, especially compared to a hard drive, writing is much slower. Flash memory works by
"trapping" electrons in the chip surface, and requires a burst of high voltage to remove this
charge and reset the cell. In order to do this, charge is accumulated in a device known as a charge
pump, which takes a relatively long time to charge up. In the case of NOR flash memory, which
allows random bit-wise access like racetrack memory, read times are on the order of 70 ns, while
write times are much slower, about 2,500 ns. To address this concern, NAND flash memory
allows reading and writing only in large blocks, but this means that the time to access any
random bit is greatly increased, to about 1,000 ns. Additionally, the use of the burst of high
voltage physically degrades the cell, so most flash devices allow on the order of 100,000 writes
to any particular bit before their operation becomes unpredictable. Wear leveling and other
techniques can spread this out, but only if the underlying data can be re-arranged.

The key determinant of the cost of any memory device is the physical size of the storage
medium. The reason for this is due to the way memory devices are fabricated. In the case of
solid-state devices like flash memory or DRAM, a large "wafer" of silicon is processed into
many individual devices, which are then cut apart and packaged. The cost of packaging is about
$1 per device, so as the density increases and the number of bits per devices increases with it, the
cost per bit falls by an equal amount. In the case of hard drives, data is stored on a number of
rotating platters, and the cost of the device is strongly related to the number of platters.
Increasing the density allows the number of platters to be reduced for any given amount of
storage.

In most cases memory devices store one bit in any given location, so they are typically compared
in terms of "cell size", a cell storing one bit. Cell size itself is given in units of F , where F is the
design rule, representing usually the metal line width. Flash and racetrack both store multiple bits
per cell, but the comparison can still be made. For instance, modern hard drives appear to be
rapidly reaching their current theoretical limits around 650 nm /bit, which is defined primarily by
our capability to read and write to tiny patches of the magnetic surface. DRAM has a cell size of
about 6 F , SRAM is much worse at 120 F . NAND flash memory is currently the densest form
of non-volatile memory in widespread use, with a cell size of about 4.5 F , but storing three bits
per cell for an effective size of 1.5 F . NOR flash memory is slightly less dense, at an effective
4.75 F , accounting for 2-bit operation on a 9.5 F cell size. In the vertical orientation (U-shaped)
racetrack, about 10-20 bits are stored per cell, which itself can have a physical size of at least
about 20 F . In addition, bits at different positions on the "track" would take different times (from
~10 ns to nearly a microsecond, or 10 ns/bit) to be accessed by the read/write sensor, because the
"track" is moved at fixed rate (~100 m/s) past the read/write sensor.

Racetrack memory is one of a number of new technologies aiming to replace flash memory, and
potentially offer a "universal" memory device applicable to a wide variety of roles. Other leading
contenders include MRAM, PCRAM and FeRAM. Most of these technologies offer densities
similar to flash memory, in most cases worse, and their primary advantage is the lack of write
endurance limits like those in flash memory. Field-MRAM offers excellent performance as high
as 3 ns access time, but requires a large 25-40 F cell size. It might see use as a SRAM
replacement, but not as a mass storage device. The highest densities from any of these devices is
offered by PCRAM, which has a cell size of about 5.8 F , similar to flash memory, as well as
fairly good performance around 50 ns. Nevertheless, none of these can come close to competing
with racetrack memory in overall terms, especially density. For example, 50 ns allows about five
bits to be operated in a racetrack memory device, resulting in an effective cell size of 20/5=4 F ,
easily exceeding the performance-density product of PCM. On the other hand, without
sacrificing bit density, the same 20 F area can also fit 2.5 2-bit 8 F alternative memory cells
(such as RRAM or spin-torque transfer MRAM), each of which could individually operated
much faster (~10 ns).

A difficulty for this technology arises from the need for high current density (>108 A/cm ); a
30 nm x 100 nm cross-section would require >3 mA. The resulting power draw would be higher
than, for example, spin-torque transfer memory or flash memory.
 $ "   !"

One limitation of the early experimental devices was that the magnetic domains could only be
pushed slowly through the wires, requiring current pulses on the orders of microseconds to move
them successfully. This was unexpected, and led to performance roughly equal to hard drives, as
much as 1000 times slower than predicted. Recent research at the University of Hamburg has
traced this problem to microscopic imperfections in the crystal structure of the wires which led to
the domains becoming "stuck" at these imperfections. Using an x-ray microscope to directly
image the boundaries between the domains, their research found that domain walls would be
moved by pulses as short as a few nanoseconds when these imperfections were absent. This
corresponds to a macroscopic performance of about 110 m/s.

The voltage required to drive the domains along the racetrack would be proportional to the
length of the wire. The current density must be sufficiently high to push the domain walls (as in
electromigration). For example, a permalloy racetrack of resistivity 5×10-7 ohm-m, that is 1 cm
long to cover an entire chip array, and uses a current density of 3×108 A/cm , would require a
driving voltage of 15 kV along the racetrack.