Sunteți pe pagina 1din 41

1 2 3 4 5 6 7 8

PCB STACK UP
LAYER 1 : TOP
SW7 BLOCK DIAGRAM 01
LAYER 2 : SGND1 CPU CPU THERMAL SENSOR
FAN
LAYER 3 : IN1 Merom 14.318MHz
A A
PG 5
LAYER 4 : IN2
479P (uPGA)/46W
LAYER 5 : VCC PG 3,4 CLK_CPU_BCLK,CLK_CPU_BCLK#
CLK_MCH_BCLK,CLK_MCH_BCLK# CLOCK GEN
LAYER 6 : IN3 DREFCLK,DREFCLK# ALPR365K05
64pins
LAYER 7 : SGND2 DREFSSCLK,DREFSSCLK#
PG 2
LAYER 8 : BOT
LVDS
533/667 MHZ DDR II Panel Connector PG 22
DDR2-SODIMM1
PG 13,14
533/667 MHZ DDR II NORTH BRIDGE
DDR2-SODIMM2
PG 13,14
Crestline VGA
B
CRT Connector B

PG 21
PG 6~12
S-Video
I/O Board Connector PG 20
32.768KHz DMI LINK NBSRCCLK, NBSRCCLK#

USB2.0 (P2) (EXT Left Side)


SATA - HDD SATA USB
USB2.0 (P0,P1) (EXT Right Side)
PG 28 PG 32
SYSTEM CHARGER(MAX8724)
PAG 41 PATA - ODD 25MHz
IDE
PG 28 SOUTH BRIDGE MARVELL RJ45/Magnetics
SYSTEM POWER MAX8778 LAN
PAG 42 USB2.0 (P5)
8055/8039 PG 30
Bluetooth ICH-8M PG 29
PG 19
C 33MHz PCI C
DDR II SMDDR_VTERM Azalia
PG 15~18 PCIEx2
1.8V/1.8VSUS(TPS51116REGR)
PAG 46 USB2.0 (P6,P7) 1394/Card Reader
AUDIO MODEM USB2.0 P3
PCI7402
VCCP +1.5V AND GMCH
PG 25,26 PG 27 PG 23,24
1.05V(MAX8717)
PAG 43
LPC
24.576MHz 1394 P0
32.768KHz
VGACORE(1.025V)MAX1992 Audio KBC USB CAMERA
1394
PAG 45 Jacks
ene PG 32 SD/MMC/MS CONNECTOR
PG 25
KB3926 CARD READER PG 23
CPU CORE MAX8771
PG 24
PAG 44 PG 33

om
l.c
D D

ai
PS/2 EXPRESS-CARD

tm
Keyboard MINI-CARD
Flash

ho
Touchpad WLAN PROJECT : SW7
S/W&Led

f@
PG 19
PG 33 PG 20 PG 31 Quanta Computer Inc.

in
Size Document Number Rev

xa
BLOCK DIAGRAM 1A

he
Date: Friday, September 28, 2007 Sheet 1 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3V

L37
1 2
BLM21PG600SN1D
+CK_VDD_MAIN
CLK_XTAL_IN 1
Y9
2

14.318MHZ
CLK_XTAL_OUT CLK_3GPLLREQ#

NEW-CARD_CLK_REQ#
R282

R276
2

2
1 10K/F

1 10K/F
+3V

02

1
120 ohms@100Mhz

1
C448 C447 C474 C475
C483 C482 C451 C466 C485 22pF/50V 22pF/50V

2
4.7uF/6.3V_6 4.7uF/6.3V_6 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V

2
14.318MHz
A L36 A
1 2 VDDCPU
BLM21PG600SN1D

1
C449 C450
C463
4.7uF/6.3V_6 4.7uF/6.3V_6

2
0.1uF/10V

L39
+CK_VDD_MAIN2 U24
1 2
BLM21PG600SN1D
120 ohms@100Mhz +CK_VDD_MAIN 16 54
VDDPLL3 CPUCLKT0 CLK_CPU_BCLK 3
1

1
C453 9 53
VDD48 CPUCLKC0 CLK_CPU_BCLK# 3

1
C455 C245 C486 C484 C464 C465
4.7uF/6.3V_6 4.7uF/6.3V_6 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V C467
2
61
VDDPCI CK505 51 CLK_MCH_BCLK 6
2

2
0.1uF/10V VDDREF CPUCLKT1
39 50 CLK_MCH_BCLK# 6

2
VDDCPU VDDSRC CPUCLKC1
55 VDDCPU
47 T18
+CK_VDD_MAIN2 CPUT2_ITP/SRCT8
12 VDD96I/O CPUT2_ITP/SRCC8 46 T17
20 VDDPLL3I/O
+3V 26 13
VDDSRCI/O DOTT_96/SRCT0 MCH_DREFCLK 7
+3V 45 14
VDDSRCI/O DOTC_96/SRCC0 MCH_DREFCLK# 7
36 VDDSRCI/O
27MHz_Nonss/SRCCLK1/SE1 17 DREF_SSCLK 7
2

49 VDDCPU_IO 27Mhz_ss/SRCCLC1/SE2 18 DREF_SSCLK# 7


2
4

B 48 B
R292 NC
SRCCLKT2/SATACL 21 CLK_PCIE_SATA 15
10K/F RP37 22
SRCCLKC2/SATACL CLK_PCIE_SATA# 15
4P2R-S-2.2K CLK_XTAL_IN 60
1

Q24 CLK_XTAL_OUT X1
59 X2 SRCCLKT3/CR#_C 24
2

TME 2N7002E 25
1
3

SRCCLKC3/CR#_D
3 1 CLK_SDATA 27
17,31 ICH_SMBDATA SRCCLKT4 CLK_PCIE_LAN 29
SRCCLKC4 28 CLK_PCIE_LAN# 29
R285
17 CK_PWG 56 CK_PWRGD/PD# PCI_STOP# 38 H_STP_PCI# 17
*4.7K CPU_MCH_BSEL1 R280 4.7K/F FSB 57 37
FSLB/TEST_MODE CPU_STOP# H_STP_CPU# 17
+3V
SRCCLKT6 41 CLK_PCIE_ICH 16
Q25 40
SRCCLKC6 CLK_PCIE_ICH# 16
2

2N7002E
CLK_SCLK 64 44
14,31 CLK_SCLK SCLK SRCCLKT7/CR#_F CLK_PCIE_MINI 31
3 1 CLK_SCLK CLK_SDATA 63 43
17,31 ICH_SMBCLK 14,31 CLK_SDATA SDATA SRCCLKC7/CR#_E CLK_PCIE_MINI# 31

0=overclocking SRCCLKT9 30 CLK_MCH_3GPLL 7


15 31 CLK_MCH_3GPLL# 7
of CPU and 19
GND SRCCLKC9
GND
SRC Allowed 11 GND48 SRCCLKT10 34 CLK_PCIE_EXPCARD 31
52 GNDCPU SRCCLKC10 35 CLK_PCIE_EXPCARD# 31
8 GNDPCI
1 = overclocking 58 33 NEW-CARD_CLK_REQ#_R R281 475/F NEW-CARD_CLK_REQ#
GNDREF SRCCLKT11/CR#_H NEW-CARD_CLK_REQ# 31
23 32 CLK_3GPLLREQ#_R R283 475/F CLK_3GPLLREQ#
of CPU and SRC GNDSRC SRCCLKC11/CR#_G CLK_3GPLLREQ# 7
29 GNDSRC
not Allowed 42 GNDSRC
1 PCI_EC R284 33
C PCICLK0/CR#_A CLK_PCI_EC 33 C
C487 *33pF/50V CLK_PCI_EC 3 PCI_PCCARD R291 33
PCICLK1/CR#_B CLK_PCI_PCCARD 23
4 TME
C503 *33pF/50V CLK_PCI_PCCARD PCICLK2/TME
PCICLK3 5
6 PCI_DBP R286 33
PCICLK4/27_SELECT CLK_PCI_DBP 31
C489 10pF/50V CLK_PCI_ICH
R287 33
CLK_PCI_ICH 16
C488 *33pF/50V CLK_PCI_DBP
7 ITP_EN R290 22
PCI_F5/ITP_EN CLK_7402_48M 24
C459 *33pF/50V CLK_ICH_14M R293 22
CLK_ICH_48M 17
10 FSA R298 4.7K/F CPU_MCH_BSEL0
USB_48MHZ/FSLA FSC R277 4.7K/F CPU_MCH_BSEL2
for EMI 62 R278 33
FSLC/TST_SL/REF CLK_ICH_14M 17
PCI_DBP
ICS9LPRS365AGLFT
2

R301 FSC FSB FSA CPU SRC PCI


10K/F CPU Clock select
1 0 1 100 100 33
1

R304 0
3 CPU_MCH_BSEL0 MCH_BSEL0 7
R308 *56
0 0 1 133 100 33
+1.05V_VCCP
0=UMA 0 1 1 166 100 33
1 = External VGA R306 1K/F

R279 0
0 1 0 200 100 33
3 CPU_MCH_BSEL1 MCH_BSEL1 7
R274 *0
0 0 0 266 100 33
ITP_EN 1 0 0 333 100 33
+1.05V_VCCP R273 1K/F
D D
1 1 0 400 100 33
1

R272 0
3 CPU_MCH_BSEL2 MCH_BSEL2 7
10K/F R271 *0 <FAE>
1 1 1 RSVD 100 33
R302 1K to NB only when
R270 1K/F XDP is implement.No
+1.05V_VCCP PROJECT : SW7
2

Disable ITP XDP can use 0 ohm

Quanta Computer Inc.


Size Document Number Rev
CLOCK GENERATOR 1A

Date: Friday, September 28, 2007 Sheet 2 of 44


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

H_A#[3..16] U22A H_D#[0..63] U22B H_D#[0..63]

03
6 H_A#[3..16] 6 H_D#[0..63]
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# 6 D[0]# D[32]#
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 6 D[1]# D[33]#
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 6 D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35
H_A#7 A[6]# H_D#4 D[3]# D[35]# H_D#36
M3 A[7]# DEFER# H5 H_DEFER# 6 F23 D[4]# D[36]# V23
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# 6 D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 6 D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
A A[10]# H_BR0# 6 D[7]# D[39]# A

DATA GRP 2
ADDR GROUP 0

DATA GRP 0
H_A#11 P5 F1 H_D#8 K24 Y25 H_D#40
H_A#12 A[11]# BR0# R60 56 H_D#9 D[8]# D[40]# H_D#41
P2 A[12]# G24 D[9]# D[41]# W22
H_A#13 L2 D20 H_IERR# 1 2 H_D#10 J24 Y23 H_D#42

CONTROL
A[13]# IERR# +1.05V_VCCP D[10]# D[42]#
H_A#14 P4 B3 H_D#11 J23 W24 H_D#43
A[14]# INIT# H_INIT# 15 D[11]# D[43]#
H_A#15 P1 H_D#12 H22 W25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# 6 F26 D[13]# D[45]# AA23
M1 R91 0 H_D#14 K22 AA24 H_D#46
6 H_ADSTB#0 H_REQ#[0..4] ADSTB[0]# D[14]# D[46]#
C1 H_D#15 H23 AB25 H_D#47
6 H_REQ#[0..4] RESET# H_RESET# 6 D[15]# D[47]#
H_REQ#0 K3 F3 J26 Y26
REQ[0]# RS[0]# H_RS#0 6 6 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 6

1
H_REQ#1 H2 F4 H26 AA26
REQ[1]# RS[1]# H_RS#1 6 6 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 6
H_REQ#2 K2 G3 RV7 H25 U22
REQ[2]# RS[2]# H_RS#2 6 6 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 6
H_REQ#3 J3 G2 *VZ0603M260APT
H_REQ#4 L1
REQ[3]# TRDY# H_TRDY# 6 H_D#[0..63] H_D#[0..63] Reserved for EMI.

2
H_A#[17..35] REQ[4]# H_D#16 H_D#48
6 H_A#[17..35] HIT# G6 H_HIT# 6 Add for ESD N22 D[16]# D[48]# AE24
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# 6 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# H_D#19 D[18]# D[50]# H_D#51 +1.05V_VCCP
R3 A[19]# BPM[0]# AD4 R23 D[19]# D[51]# AB22
H_A#20 W6 AD3 Layout Note: H_D#20 L23 AB21 H_D#52
A[20]# BPM[1]# D[20]# D[52]#
ADDR GROUP 1
H_A#21 H_D#21 H_D#53

XDP/ITP SIGNALS
U4 A[21]# BPM[2]# AD1 Place voltage M24 D[21]# D[53]# AC26

1
H_A#22 Y5 AC4 H_D#22 L22 AD20 H_D#54
A[22]# BPM[3]# divider within D[22]# D[54]#

DATA GRP 3
DATA GRP 1
H_A#23 U1 AC2 H_D#23 M23 AE22 H_D#55 C418
A[23]# PRDY# D[23]# D[55]#
H_A#24 R4 AC1 BPM#5 0.5" of GTLREF H_D#24 P25 AF23 H_D#56 0.1uF/10V

2
H_A#25 A[24]# PREQ# ITP_TCK H_D#25 D[24]# D[56]# H_D#57
T5 A[25]# TCK AC5 pin P23 D[25]# D[57]# AC25
H_A#26 T3 AA6 ITP_TDI H_D#26 P22 AE21 H_D#58
H_A#27 A[26]# TDI ITP_TDO H_D#27 D[26]# D[58]# H_D#59 +1.5V_RUN
W2 A[27]# TDO AB3 T24 D[27]# D[59]# AD21
H_A#28 W5 AB5 ITP_TMS +1.05V_VCCP H_D#28 R24 AC22 H_D#60
H_A#29 A[28]# TMS ITP_TRST# H_D#29 D[28]# D[60]# H_D#61
Y4 A[29]# TRST# AB6 L25 D[29]# D[61]# AD23
H_A#30 U2 C20 ITP_DBRESET# H_D#30 T25 AF22 H_D#62
A[30]# DBR# ITP_DBRESET# 17 D[30]# D[62]#

2
H_A#31 V4 H_D#31 N25 AC23 H_D#63
H_A#32 A[31]# R55 75/F R57 D[31]# D[63]#
B W3 A[32]# 6 H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 6 B
H_A#33 AA4 THERMAL 2 1 +1.05V_VCCP 1K/F M26 AF24
A[33]# 6 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 6
H_A#34 AB2 N24 AC20
A[34]# 6 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 6
H_A#35 AA3 D21 H_PROCHOT#

1
A[35]# PROCHOT# H_THERMDA V_CPU_GTLREF AD26 COMP0
6 H_ADSTB#1 V1 ADSTB[1]# THERMDA A24 H_THERMDA 5 GTLREF COMP[0] R26 Note:
B25 H_THERMDC CPU_TEST1 C23 MISC COMP[1] U26 COMP1
THERMDC H_THERMDC 5 TEST1 H_DPRTSTP need to daisy chain

2
A6 CPU_TEST2 D25 AA1 COMP2
15 H_A20M# A20M# TEST2 COMP[2] from ICH8 to IMVP6 to CPU.
A5 C7 PM_THRMTRIP# CPU_TEST3 C24 Y1 COMP3
15 H_FERR# FERR# THERMTRIP# PM_THRMTRIP# 7,15 TEST3 COMP[3]
ICH

C4 R288 56 R56 CPU_TEST4 AF26


15 H_IGNNE# IGNNE# TEST4
1 2 +1.05V_VCCP 2K/F CPU_TEST5 AF1 E5
TEST5 DPRSTP# H_DPRSTP# 7,15,38
D5 H CLK CPU_TEST6 A26 B5
15 H_STPCLK# H_DPSLP# 15

1
STPCLK# TEST6 DPSLP#
15 H_INTR C6 LINT0 DPWR# D24 H_DPWR# 6
15 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 2 2 CPU_MCH_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGOOD 15
15 H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# 2 2 CPU_MCH_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 6
2 CPU_MCH_BSEL2 C21 BSEL[2] PSI# AE6 PM_PSI# 38
M4 RSVD[01]
N5 Merom Ball-out Rev 1a
RSVD[02] +1.05V_VCCP
T2 RSVD[03]
V3
RESERVED

RSVD[04] R253 *1K/F


B2 RSVD[05]
C3 1 2 CPU_TEST1 3VPCU
RSVD[06] R260 *1K/F CPU_TEST3
D2 RSVD[07] *PADT8
*PADT8
D22 1 2 CPU_TEST2 R295 *PADT21 CPU_TEST5
RSVD[08] *1K
D3 RSVD[09] Merom CPU Socket PN:
F6 C154 *0.1uF/10V For the purpose of testability, route these signals
RSVD[10] FOX: DGT^000021 2 1 CPU_TEST4 R289
TYC: DGT^000012 10K/F
through a ground referenced Z0 = 55ohm trace that

2
R261 *0 ends in a via that is near a GND via and is
MLX: DGT^000004
Merom Ball-out Rev 1a 1 2 CPU_TEST6 accessible through an oscilloscope connection.
PM_THRMTRIP# 1 3
C THERM_CPUDIE# 33 C
Place C close to the Q26
CPU_TEST4 pin. Make sure *MMBT3904
Populate ITP700Flex for bringup CPU_TEST4 routing is
Layout Note: reference to GND and away +5V
+1.05V_VCCP from other noisy signal.
Place R4,R361,R346 & R7 close to CPU.

1
COMP0
COMP1
1

R47 COMP2
R97 R106 R107 R111 R105 100K/F H_PROCHOT# COMP3
54.9/F *54.9/F 39 150/F 54.9/F

2
2

Q16 R110 R109 R58 R59

3
ITP_TDI 2N7002E 54.9/F 27.4/F 54.9/F 27.4/F
ITP_TMS 2
ITP_TDO 2 Q13
33 FANLESS#

1
BPM#5 DTC144EUA

Comp0,2 connect with Zo=27.4ohm,Comp1,3

1
H_RESET#
connect with Zo=55ohm, make those traces
ITP debug signals

om
Layout Note: length shorter than 0.5".Trace should be
Place R8 close ITP. ITP disable guidelines at least 25 mils away from any other
toggling signal.

l.c
Signal Resistor Value Connect To Resistor Placement

ai
D TDI 150 ohm +/- 5% VTT Within 2.0" of the ITP D

tm
R104 2 1 27.4/F ITP_TCK
2 1 ITP_TRST# TMS 39 ohm +/- 1% VTT Within 2.0" of the ITP

ho
R108 649/F
TRST# 500-680ohm +/- 5% GND Within 2.0" of the ITP FSB BCLK BSEL2 BSEL1 BSEL0

f@
TCK 27 ohm +/- 1% GND Within 2.0" of the ITP 533 133 0 0 1 PROJECT : SW7

in
TDO 150 ohm +/- 5% VTT Within 2.0" of the ITP 667 166 0 1 1
Quanta Computer Inc.

xa
800 200 0 1 0
Size Document Number Rev

he
Note: Populate R5, R8, C372 & R430 when ITP connector is populated. Merom (HOST BUS) 1A

Date: Friday, September 28, 2007 Sheet 3 of 44


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

VCC_CORE All use 10U 4V(+-20%,X6S,0805)Pb-Free.


VCC_CORE

A7
A9
A10
U22C
VCC[001]
VCC[002]
VCC[068]
VCC[069]
AB20
AB7
AC7
VCC_CORE
ICCODE:
for Merom processors
recommended design
target is 44A A4
A8
A11
U22D
VSS[001]
VSS[002]
VSS[082]
VSS[083]
P6
P21
P24
04
VCC[003] VCC[070] VSS[003] VSS[084]
A12 VCC[004] VCC[071] AC9 A14 VSS[004] VSS[085] R2
A13 VCC[005] VCC[072] AC12 A16 VSS[005] VSS[086] R5
A15 VCC[006] VCC[073] AC13 A19 VSS[006] VSS[087] R22

1
A17 VCC[007] VCC[074] AC15 A23 VSS[007] VSS[088] R25
C452 C461 C456 C219 C226 A18 AC17 AF2 T1
10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VCC[008] VCC[075] VSS[008] VSS[089]
A20 AC18 B6 T4
2

2
A VCC[009] VCC[076] VSS[009] VSS[090] A
B7 VCC[010] VCC[077] AD7 B8 VSS[010] VSS[091] T23
B9 VCC[011] VCC[078] AD9 B11 VSS[011] VSS[092] T26
B10 VCC[012] VCC[079] AD10 B13 VSS[012] VSS[093] U3
B12 VCC[013] VCC[080] AD12 B16 VSS[013] VSS[094] U6
VCC_CORE B14 AD14 B19 U21
VCC[014] VCC[081] VSS[014] VSS[095]
B15 VCC[015] VCC[082] AD15 B21 VSS[015] VSS[096] U24
B17 VCC[016] VCC[083] AD17 B24 VSS[016] VSS[097] V2
B18 VCC[017] VCC[084] AD18 C5 VSS[017] VSS[098] V5
1

1
B20 VCC[018] VCC[085] AE9 C8 VSS[018] VSS[099] V22
C445 C202 C438 C212 C446 C9 AE10 C11 V25
10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VCC[019] VCC[086] VSS[019] VSS[100]
C10 AE12 C14 W1
2

2
VCC[020] VCC[087] VSS[020] VSS[101]
C12 VCC[021] VCC[088] AE13 C16 VSS[021] VSS[102] W4
C13 VCC[022] VCC[089] AE15 C19 VSS[022] VSS[103] W23
C15 VCC[023] VCC[090] AE17 C2 VSS[023] VSS[104] W26
8 inside cavity, north side, secondary layer. C17 VCC[024] VCC[091] AE18 C22 VSS[024] VSS[105] Y3
C18 VCC[025] VCC[092] AE20 C25 VSS[025] VSS[106] Y6
D9 VCC[026] VCC[093] AF9 D1 VSS[026] VSS[107] Y21
VCC_CORE D10 AF10 ICCP: D4 Y24
VCC[027] VCC[094] VSS[027] VSS[108]
D12 AF12 D8 AA2
D14
VCC[028] VCC[095]
AF14 1before vccore stable D11
VSS[028] VSS[109]
AA5
VCC[029] VCC[096] VSS[029] VSS[110]
D15 VCC[030] VCC[097] AF15 peak current is 4.5A D13 VSS[030] VSS[111] AA8
1

1
D17 AF17 D16 AA11
C173 C462 C201 C192 C182 D18
VCC[031] VCC[098]
AF18 +1.05V_VCCP 2.after vccore stable D19
VSS[031] VSS[112]
AA14
10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VCC[032] VCC[099] VSS[032] VSS[113]
E7 AF20 continue current is D23 AA16
2

2
VCC[033] VCC[100] VSS[033] VSS[114]
E9 D26 AA19
E10
VCC[034]
G21
2.5A E3
VSS[034] VSS[115]
AA22
VCC[035] VCCP[01] VSS[035] VSS[116]
E12 VCC[036] VCCP[02] V6 E6 VSS[036] VSS[117] AA25
E13 VCC[037] VCCP[03] J6 E8 VSS[037] VSS[118] AB1
VCC_CORE E15 K6 + C252 E11 AB4
VCC[038] VCCP[04] VSS[038] VSS[119]
B E17 VCC[039] VCCP[05] M6 E14 VSS[039] VSS[120] AB8 B
E18 J21 *330u/2.5V/12m E16 AB11
VCC[040] VCCP[06] VSS[040] VSS[121]
E20 VCC[041] VCCP[07] K21 E19 VSS[041] VSS[122] AB13
1

1
F7 VCC[042] VCCP[08] M21 E21 VSS[042] VSS[123] AB16
C204 C197 C457 C174 C181 F9 N21 E24 AB19
10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VCC[043] VCCP[09] VSS[043] VSS[124]
F10 N6 F5 AB23
2

2
VCC[044] VCCP[10] VSS[044] VSS[125]
F12 VCC[045] VCCP[11] R21 F8 VSS[045] VSS[126] AB26
F14 R6 +1.5V_RUN F11 AC3
VCC[046] VCCP[12] VSS[046] VSS[127]
F15 VCC[047] VCCP[13] T21 F13 VSS[047] VSS[128] AC6
8 inside cavity, south side, secondary layer. F17 VCC[048] VCCP[14] T6 F16 VSS[048] VSS[129] AC8
F18 VCC[049] VCCP[15] V21 F19 VSS[049] VSS[130] AC11
F20 VCC[050] VCCP[16] W21 F2 VSS[050] VSS[131] AC14
AA7 VCC[051] ICCA 130mA F22 VSS[051] VSS[132] AC16
VCC_CORE AA9 B26 F25 AC19
VCC[052] VCCA[01] VSS[052] VSS[133]
AA10 VCC[053] VCCA[02] C26 G4 VSS[053] VSS[134] AC21
AA12 VCC[054] G1 VSS[054] VSS[135] AC24

1
AA13 AD6 C420 C417 G23 AD2
VCC[055] VID[0] CPU_VID0 38 VSS[055] VSS[136]
1

AA15 AF5 0.01uF/25V 10U/6.3V_8 G26 AD5


VCC[056] VID[1] CPU_VID1 38 VSS[056] VSS[137]
C228 C222 C214 C216 C188 C444 AA17 AE5 H3 AD8
CPU_VID2 38

2
10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VCC[057] VID[2] VSS[057] VSS[138]
AA18 AF4 CPU_VID3 38 H6 AD11
2

VCC[058] VID[3] VSS[058] VSS[139]


AA20 VCC[059] VID[4] AE3 CPU_VID4 38 H21 VSS[059] VSS[140] AD13
AB9 VCC[060] VID[5] AF3 CPU_VID5 38 H24 VSS[060] VSS[141] AD16
AC10 VCC[061] VID[6] AE2 CPU_VID6 38 J2 VSS[061] VSS[142] AD19
6 inside cavity, north side, primary layer. AB10 VCC[062] J5 VSS[062] VSS[143] AD22
AB12 VCC[063] Layout Note: J22 VSS[063] VSS[144] AD25
AB14 VCC[064] VCCSENSE AF7 TP_VCCSENSE TP_VCCSENSE 38 Place C105 near PIN J25 VSS[064] VSS[145] AE1
VCC_CORE AB15 K1 AE4
VCC[065] B26. VSS[065] VSS[146]
AB17 VCC[066] K4 VSS[066] VSS[147] AE8
AB18 VCC[067] VSSSENSE AE7 TP_VSSSENSE TP_VSSSENSE 38 K23 VSS[067] VSS[148] AE11
K26 VSS[068] VSS[149] AE14
1

C C
Merom Ball-out Rev 1a L3 AE16
C234 C437 C235 C215 C203 C233 VSS[069] VSS[150]
L6 VSS[070] VSS[151] AE19
10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 L21 AE23
2

VSS[071] VSS[152]
L24 VSS[072] VSS[153] AE26
M2 VSS[073] VSS[154] A2
M5 VSS[074] VSS[155] AF6
6 inside cavity, south side, primary layer. M22 VSS[075] VSS[156] AF8
M25 VSS[076] VSS[157] AF11
N1 VSS[077] VSS[158] AF13
N4 VSS[078] VSS[159] AF16
N23 VSS[079] VSS[160] AF19
N26 VSS[080] VSS[161] AF21
P3 VSS[081] VSS[162] A25
VSS[163] AF25
+1.05V_VCCP
Merom Ball-out Rev 1a
1

C213 C211 C227 C183 C225 C184


0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V
2

Layout out:
Place these inside socket cavity on North side secondary.

D D

PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
Merom Processor (POWER) 1A

Date: Friday, September 28, 2007 Sheet 4 of 44


1 2 3 4 5 6 7 8
5 4 3 2 1

+3V 5V_AL

R427
05
100
D D

R61 25mils
LM86VCC

*100
C153 R51 *0
SYS_SHDN# 36
R50 R49 R52 0.1uF/10V
10K/F 10K/F 10K/F
U10 +3V
10/20mils
THCLK_SMB 8 1
SCLK VCC H_THERMDA
H_THERMDA 3
THDAT_SMB 7 2
SDA DXP

3
C156 R53
6 3 2200pF/50V 1M/F
ALERT# DXN

17 THERM_ALERT# THERM_ALERT# 1 2 4 5 H_THERMDC 2


OVERT# GND H_THERMDC 3
R54 *0 Q15

3
2N7002E
close to ICH GMT-781 C149
ADDRESS: 98H

1
SYS_SHDN-1# 2 0.1uF/10V
C C
2nd:AL006648004 Q14
2N7002E

1
add hardware protect
+3V

Q12
2

2N7002E

33,35 MBDATA 3 1 THDAT_SMB

+3V

Q11 1st FAN OUT CONNECTOR


2

2N7002E

33,35 MBCLK 3 1 THCLK_SMB J8


B +5V R252 0_6 +5V_FAN B
1
33 VFAN_1 2
3
1

1
C413 C414
C415 FAN
2

10U/6.3V_8 0.1uF/10V 1000pF/50V

2
FAN Con.
1st PN: DFHD04MR663(MLX)
2nd PN: DFWF04MS079(PTI)
+3V

R256
10K/F

33 FANSIG_1

1
C416
1000pF/50V

om
A 2 A

l.c
PROJECT : SW7

ai
tm
Quanta Computer Inc.

ho
Size Document Number Rev

f@
THERMAL LM86 & FAN 1A

in
Date: Friday, September 28, 2007 Sheet 5 of 44

xa
5 4 3 2 1

he
1 2 3 4 5 6 7 8

U23A H_A#[3..35]
06
H_D#[0..63] H_A#[3..35] 3
J13 H_A#3
3 H_D#[0..63] H_A#_3
H_D#0 E2 B11 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
A
G2 H_D#_1 H_A#_5 C11 A
H_D#2 G7 M11 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
M6 H_D#_3 H_A#_7 C15
H_D#4 H7 F16 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
H3 H_D#_5 H_A#_9 L13
H_D#6 G4 G17 H_A#10
H_D#7 H_D#_6 H_A#_10 H_A#11
F3 H_D#_7 H_A#_11 C14
H_D#8 N8 K16 H_A#12
H_D#9 H_D#_8 H_A#_12 H_A#13
H2 H_D#_9 H_A#_13 B13
H_D#10 M10 L16 H_A#14
H_D#11 H_D#_10 H_A#_14 H_A#15
N12 H_D#_11 H_A#_15 J17
H_D#12 N9 B14 H_A#16
+1.05V_VCCP H_D#13 H_D#_12 H_A#_16 H_A#17
H5 H_D#_13 H_A#_17 K19
H_D#14 P13 P15 H_A#18
H_D#15 H_D#_14 H_A#_18 H_A#19
K9 H_D#_15 H_A#_19 R17
H_D#16 M2 B16 H_A#20
H_D#_16 H_A#_20
1

H_D#17 W10 H20 H_A#21


R303 H_D#18 H_D#_17 H_A#_21 H_A#22
Y8 H_D#_18 H_A#_22 L19
221/F H_D#19 V4 D17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
M3 H_D#_20 H_A#_24 M17
H_D#21 J1 N16 H_A#25
2

H_SWING H_D#22 H_D#_21 H_A#_25 H_A#26


N5 H_D#_22 H_A#_26 J19
H_D#23 N3 B18 H_A#27
H_D#_23 H_A#_27
1

H_D#24 W6 E19 H_A#28


H_D#_24 H_A#_28
2

R297 H_D#25 W9 B17 H_A#29


100 C495 H_D#26 H_D#_25 H_A#_29 H_A#30
N2 H_D#_26 H_A#_30 B15
0.1uF/10V H_D#27 Y7 E17 H_A#31
1

H_D#28 H_D#_27 H_A#_31 H_A#32


Y9 C18
2

H_D#29 H_D#_28 H_A#_32 H_A#33


P4 H_D#_29 H_A#_33 A19
H_D#30 W3 B19 H_A#34
H_D#31 H_D#_30 H_A#_34 H_A#35
B N1 H_D#_31 H_A#_35 N19 B
H_D#32 AD12
H_D#33 H_D#_32
AE3 H_D#_33 H_ADS# G12 H_ADS# 3
H_D#34 AD9 H17
H_D#_34 H_ADSTB#_0 H_ADSTB#0 3
H_D#35 AC9 G20
H_D#_35 H_ADSTB#_1 H_ADSTB#1 3
H_D#36 AC7 C8
H_D#_36 H_BNR# H_BNR# 3

HOST
+1.05V_VCCP H_D#37 AC14 E8
H_D#_37 H_BPRI# H_BPRI# 3
H_D#38 AD11 F12
H_D#_38 H_BREQ# H_BR0# 3
impedance 55 ohm H_D#39 AC11 D6
H_D#_39 H_DEFER# H_DEFER# 3
H_D#40 AB2 C10
H_D#_40 H_DBSY# H_DBSY# 3
H_D#41 AD7 AM5
H_D#_41 HPLL_CLK CLK_MCH_BCLK 2
1

H_D#42 AB1 AM7


H_D#_42 HPLL_CLK# CLK_MCH_BCLK# 2
R275 R269 H_D#43 Y3 H8
H_D#_43 H_DPWR# H_DPWR# 3
54.9/F 54.9/F H_D#44 AC6 K7
H_D#_44 H_DRDY# H_DRDY# 3
H_D#45 AE2 E4
H_D#_45 H_HIT# H_HIT# 3
H_D#46 AC5 C6 H_HITM# 3
2

H_SCOMP H_D#47 H_D#_46 H_HITM#


AG3 H_D#_47 H_LOCK# G10 H_LOCK# 3
H_SCOMP# H_D#48 AJ9 B7
H_D#_48 H_TRDY# H_TRDY# 3
H_D#49 AH8
H_D#50 H_D#_49
AJ14 H_D#_50
H_D#51 AE9
H_RCOMP H_D#52 H_D#_51
AE11 H_D#_52
H_D#53 AH12 K5
H_D#_53 H_DINV#_0 H_DINV#0 3
1

H_D#54 AJ5 L2
H_D#_54 H_DINV#_1 H_DINV#1 3
R89 H_D#55 AH5 AD13
H_D#_55 H_DINV#_2 H_DINV#2 3
24.9/F Layout Note: H_D#56 AJ6 AE13
H_D#_56 H_DINV#_3 H_DINV#3 3
H_RCOMP trace should be H_D#57 AE7
H_D#58 H_D#_57
AJ7 M7 H_DSTBN#0 3
2

10-mil wide with 20-mil H_D#59 H_D#_58 H_DSTBN#_0


AJ2 H_D#_59 H_DSTBN#_1 K3 H_DSTBN#1 3
C
spacing. H_D#60 AE5 H_D#_60 H_DSTBN#_2 AD2 H_DSTBN#2 3 C
H_D#61 AJ3 AH11
H_D#_61 H_DSTBN#_3 H_DSTBN#3 3
H_D#62 AH2
H_D#63 H_D#_62
AH13 H_D#_63 H_DSTBP#_0 L7 H_DSTBP#0 3
H_DSTBP#_1 K2 H_DSTBP#1 3
H_DSTBP#_2 AC2 H_DSTBP#2 3
H_SWING B3 AJ10
H_SWING H_DSTBP#_3 H_DSTBP#3 3
H_RCOMP C2 H_RCOMP
H_REQ#_0 M14 H_REQ#0 3
H_SCOMP W1 E13
H_SCOMP H_REQ#_1 H_REQ#1 3
R294 H_SCOMP# W2 A11
H_SCOMP# H_REQ#_2 H_REQ#2 3
0 H13
H_REQ#_3 H_REQ#3 3
3 H_RESET# B6 H_CPURST# H_REQ#_4 B12 H_REQ#4 3
3 H_CPUSLP# E5 H_CPUSLP#
1

H_RS#_0 E12 H_RS#0 3


RV8 D7
H_RS#_1 H_RS#1 3
H_RS#_2 D8 H_RS#2 3
*VZ0603M260APT H_REF B9
2

H_AVREF
A9 H_DVREF
+1.05V_VCCP CRESTLINE_1p0

Add for ESD


2

R299
1K/F
1

D H_REF D
1

R300 C493
2K/F 0.1uF/10V
Layout Note:
PROJECT : SW7
2

Place the 0.1 uF


2

decoupling capacitor
within 100 mils from Quanta Computer Inc.
GMCH pins. Size Document Number Rev
Crestline (HOST) 1A

Date: Friday, September 28, 2007 Sheet 6 of 44


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U23B U23C +VCC_PEG

P36 J40 R69 24.9/F


RSVD1 22 BIA_PWM L_BKLT_CTRL
P37 RSVD2 SM_CK_0 AV29 M_CLK_DDR0 14 22 PANEL_BKEN H39 L_BKLT_EN PEG_COMPI N43 VCC3G_PCIE_R 1 2
R35 BB23 +3V R85 10K/F E39 M43
RSVD3 SM_CK_1 M_CLK_DDR1 14 L_CTRL_CLK PEG_COMPO
N35 BA25 R87 10K/F E40
RSVD4 SM_CK_3 M_CLK_DDR2 14 L_CTRL_DATA
AR12 RSVD5 SM_CK_4 AV23 M_CLK_DDR3 14 22 LCD_DDCCLK C37 L_DDC_CLK
AR13 RSVD6 22 LCD_DDCDAT D35 L_DDC_DATA PEG_RX#_0 J51
AM12 RSVD7 SM_CK#_0 AW30 M_CLK_DDR#0 14 22 ENVDD K40 L_VDD_EN PEG_RX#_1 L51
AN13 RSVD8 SM_CK#_1 BA23 M_CLK_DDR#1 14 PEG_RX#_2 N47
J12 AW25 R72 2.4K LVDS_IBG L41 T45
RSVD9 SM_CK#_3 M_CLK_DDR#2 14 LVDS_IBG PEG_RX#_3
AR37 RSVD10 SM_CK#_4 AW23 M_CLK_DDR#3 14 L43 LVDS_VBG PEG_RX#_4 T50

07
AM36 RSVD11 N41 LVDS_VREFH PEG_RX#_5 U40
AL36 RSVD12 SM_CKE_0 BE29 DDR_CKE0_DIMMA 13,14 N40 LVDS_VREFL PEG_RX#_6 Y44
AM37 RSVD13 SM_CKE_1 AY32 DDR_CKE1_DIMMA 13,14 22 LCD_ACLK- D46 LVDSA_CLK# PEG_RX#_7 Y40
A D20 RSVD14 SM_CKE_3 BD39 DDR_CKE2_DIMMB 13,14 22 LCD_ACLK+ C45 LVDSA_CLK PEG_RX#_8 AB51 A
BG37 D44 W49

MUXING
SM_CKE_4 DDR_CKE3_DIMMB 13,14 LVDSB_CLK# PEG_RX#_9
E42 LVDSB_CLK PEG_RX#_10 AD44

LVDS
WW22 update SM_CS#_0 BG20 DDR_CS0_DIMMA# 13,14 PEG_RX#_11 AD40
--- MA14 needs SM_CS#_1 BK16 DDR_CS1_DIMMA# 13,14 22 LCD_A0- G51 LVDSA_DATA#_0 PEG_RX#_12 AG46
to be routed if SM_CS#_2 BG16 DDR_CS2_DIMMB# 13,14 22 LCD_A1- E51 LVDSA_DATA#_1 PEG_RX#_13 AH49
customers are H10 RSVD20 SM_CS#_3 BE13 DDR_CS3_DIMMB# 13,14 22 LCD_A2- F49 LVDSA_DATA#_2 PEG_RX#_14 AG45
B51 RSVD21 PEG_RX#_15 AG41
planning on BJ20 BH18
RSVD22 SM_ODT_0 M_ODT0 13,14

RSVD

GRAPHICS
using 2Gb BK22 BJ15 M_ODT1 13,14 22 LCD_A0+ G50 J50
RSVD23 SM_ODT_1 LVDSA_DATA_0 PEG_RX_0
technology and BF19 RSVD24 SM_ODT_2 BJ14 M_ODT2 13,14 22 LCD_A1+ E50 LVDSA_DATA_1 PEG_RX_1 L50
width=8 (by 8) BH20 BE16 F48 M47

DDR
RSVD25 SM_ODT_3 M_ODT3 13,14 22 LCD_A2+ LVDSA_DATA_2 PEG_RX_2
DIMMs BK18 RSVD26 PEG_RX_3 U44
BJ18 BL15 SMRCOMPP T49
RSVD27 SM_RCOMP SMRCOMPN PEG_RX_4
BF23 RSVD28 SM_RCOMP# BK14 G44 LVDSB_DATA#_0 PEG_RX_5 T41
BG23 C178 0.1uF/10V B47 W45
RSVD29 SM_RCOMP_VOH LVDSB_DATA#_1 PEG_RX_6
BC23 RSVD30 SM_RCOMP_VOH BK31 B45 LVDSB_DATA#_2 PEG_RX_7 W41
BD24 BL31 SM_RCOMP_VOL C179 0.1uF/10V AB50
RSVD31 SM_RCOMP_VOL PEG_RX_8
13,14 DDR_A_MA14 BJ29 SA-MA14 PEG_RX_9 Y48
13,14 DDR_B_MA14 BE24 AR49 SMDDR_VREF_MCH R62 0 E44 AC45
SB_MA14 SM_VREF_0 V_DDR_MCH_REF 14,40 LVDSB_DATA_0 PEG_RX_10
BH39 RSVD34 SM_VREF_1 AW4 A47 LVDSB_DATA_1 PEG_RX_11 AC41
AW20 RSVD35 A45 LVDSB_DATA_2 PEG_RX_12 AH47
BK20 RSVD36 PEG_RX_13 AG49
CRESTLINE T20 *PAD C48 AH45

PCI-EXPRESS
T19 *PAD LVDSA_DATA#_3 PEG_RX_14
new pin D47 LVDSA_DATA_3 DPLL_REF_CLK B42 MCH_DREFCLK 2 PEG_RX_15 AG42
define B44 RSVD39 DPLL_REF_CLK# C42 MCH_DREFCLK# 2
C44 RSVD40 DPLL_REF_SSCLK H48 DREF_SSCLK 2 20 TV_CVBS E27 TVA_DAC PEG_TX#_0 N45
A35 RSVD41 DPLL_REF_SSCLK# H47 DREF_SSCLK# 2 20 TV_Y G27 TVB_DAC PEG_TX#_1 U39

CLK
B37 RSVD42 20 TV_C K27 TVC_DAC PEG_TX#_2 U47
B36 RSVD43 PEG_CLK K44 CLK_MCH_3GPLL 2 PEG_TX#_3 N51

TV
B34 RSVD44 PEG_CLK# K45 CLK_MCH_3GPLL# 2 F27 TVA_RTN PEG_TX#_4 R50
C34 RSVD45 J27 TVB_RTN PEG_TX#_5 T42
Layout Note: L27 TVC_RTN PEG_TX#_6 Y43
Location of all MCH_CFG strap PEG_TX#_7 W46
AN47 +3V R68 2.2K TV_DCONSEL_0 M35 W38
B resistors needs to be close to DMI_RXN_0 DMI_MRX_ITX_N0 16 TV_DCONSEL_0 PEG_TX#_8 B
AJ38 R66 2.2K TV_DCONSEL_1 P33 AD39
DMI_RXN_1 DMI_MRX_ITX_N1 16 TV_DCONSEL_1 PEG_TX#_9
minmize stub. DMI_RXN_2 AN42 DMI_MRX_ITX_N2 16 PEG_TX#_10 AC46
DMI_RXN_3 AN46 DMI_MRX_ITX_N3 16 PEG_TX#_11 AC49
PEG_TX#_12 AC42
DMI_RXP_0 AM47 DMI_MRX_ITX_P0 16 PEG_TX#_13 AH39
2 MCH_BSEL0 P27 CFG_0 DMI_RXP_1 AJ39 DMI_MRX_ITX_P1 16 PEG_TX#_14 AE49
2 MCH_BSEL1 N27 CFG_1 DMI_RXP_2 AN41 DMI_MRX_ITX_P2 16 PEG_TX#_15 AH44
2 MCH_BSEL2 N24 CFG_2 DMI_RXP_3 AN45 DMI_MRX_ITX_P3 16
C21 VGA_BLU H32 M45
CFG_3 CRT_BLUE PEG_TX_0
C23 CFG_4 DMI_TXN_0 AJ46 DMI_MTX_IRX_N0 16 G32 CRT_BLUE# PEG_TX_1 T38
DMI

12 CFG5 CFG5 F23 AJ41 VGA_GRN K29 T46


CFG_5 DMI_TXN_1 DMI_MTX_IRX_N1 16 CRT_GREEN PEG_TX_2
N23 CFG_6 DMI_TXN_2 AM40 DMI_MTX_IRX_N2 16 J29 CRT_GREEN# PEG_TX_3 N50
G23 AM44 VGA_RED F29 R51
CFG_7 DMI_TXN_3 DMI_MTX_IRX_N3 16 CRT_RED PEG_TX_4

VGA
J20 CFG_8 E29 CRT_RED# PEG_TX_5 U43
CFG

C20 CFG_9 DMI_TXP_0 AJ47 DMI_MTX_IRX_P0 16 PEG_TX_6 W42


R24 CFG_10 DMI_TXP_1 AJ42 DMI_MTX_IRX_P1 16 PEG_TX_7 Y47
L23 CFG_11 DMI_TXP_2 AM39 DMI_MTX_IRX_P2 16 21 VGADDCCLK K33 CRT_DDC_CLK PEG_TX_8 Y39
12 CFG12 CFG12 J23 AM43 G35 AC38
CFG_12 DMI_TXP_3 DMI_MTX_IRX_P3 16 21 VGADDCDAT CRT_DDC_DATA PEG_TX_9
12 CFG13 CFG13 E23 R93 39 HSYNC11 F33 AD47
CFG_13 21 VGAHSYNC CRT_HSYNC PEG_TX_10
E20 R92 1.3K_6 CRTIREF C32 AC50
CFG_14 R94 39 VSYNC11 CRT_TVO_IREF PEG_TX_11
K23 CFG_15 21 VGAVSYNC E33 CRT_VSYNC PEG_TX_12 AD43
12 CFG16 CFG16 M20 AG39
CFG_16 PEG_TX_13
M24 AE50
GRAPHICS VID

CFG_17 PEG_TX_14
L32 CFG_18 PEG_TX_15 AH43
N33 CFG_19
12 CFG20 CFG20 L35 CFG_20 CRESTLINE_1p0
IV&EV Dis/Enable setting

GFX_VID_0 E35
17 PM_BMBUSY# R78 0 PM_BMBUSY#_R
G41 A39 In Crestline EDS R86 1 2 150/F TV_CVBS +3V
R77 0 ICH_DPRSTP#_R PM_BM_BUSY# GFX_VID_1
3,15,38 H_DPRSTP# L39 PM_DPRSTP# GFX_VID_2 C38 Rev.1.0, Render
14 PM_EXTTS#0 L36 B39 Standby Voltage is R79 1 2 150/F TV_Y
PM_EXT_TS#_0 GFX_VID_3
PM

PM_EXTTS#1 R80 0 J36 E36 R90 2.2K LCD_DDCCLK


PM_EXT_TS#_1 GFX_VR_EN not finalized R76 1
17,38 DELAY_VR_PWRGOOD AW49 PWROK 2 150/F TV_C R96 2.2K LCD_DDCDAT
C R63 100 PLTRST_MCH# AV20 yet(TBD), 1.05V for C
16,31 PLT_RST-R# RSTIN#
3,15 PM_THRMTRIP# R67 0 PM_THRMTRIP#_GMCH N20 Graphic Voltage
R118 0 PM_DPRSLPVR_GMCH G36 THERMTRIP#
17,38 PM_DPRSLPVR DPRSLPVR
range(VCC_AXG) is
between 0.9975V(min.)
CL_CLK AM49 CL_CLK0 17 and 1.1025V(max.).
CL_DATA AK50 CL_DATA0 17
GMCH pwrok is 3.3v BJ51 AT43
Vgfx max at 1.1025V @ R119 0 VGA_BLU
NC_1 CL_PWROK ECPWROK 17,33 8A (estimated) 21 VGA_BLU_S
R95 0 VGA_GRN
ME

tolerant BK51 NC_2 CL_RST# AN49 CL_RST#0 17 21 VGA_GRN_S


BK50 AM50 R115 0 VGA_RED
NC_3 CL_VREF 21 VGA_RED_S
BL50 MCH_CLVREF
NC_4
BL49 NC_5

2
BL3 R114 R88 R113
NC_6 C260 C249 C261 C258 C242 C251
BL2 NC_7
only resever AT3/5 not
NC

BK1 support IAMT,but design

om
NC_8 *18pF/50V *18pF/50V *18pF/50V *18pF/50V *18pF/50V *18pF/50V 150/F 150/F 150/F
BJ1 NC_9 SDVO_CTRL_CLK H35 line suggest to connection
E1 K36

1
NC_10 SDVO_CTRL_DATA these pin ,do not NC

l.c
A5 G39
MISC

NC_11 CLK_REQ# CLK_3GPLLREQ# 2


C51 NC_12 ICH_SYNC# G40 MCH_ICH_SYNC# 17

ai
B50 NC_13
A50

tm
NC_14
A49 NC_15 TEST_1 A37
BK2 NC_16 TEST_2 R32

ho
2

CRESTLINE_1p0

f@
R65 R112
20K/F 0
+1.8VSUS

in
1

xa
1

he
R257
1K/F +1.25V +1.8VSUS
2

SM_RCOMP_VOH
1

D D
1

C429 C424 R268


+3V 0.01uF/25V 2.2uF/6.3V_6 1K/F R264
R259 20/F
2

R74 1 2 10K/F PM_EXTTS#0 3.01K/F


2

R84 1 2 10K/F PM_EXTTS#1 MCH_CLVREF SMRCOMPP


2

SMRCOMPN
1

SM_RCOMP_VOL
2

C439 R267
PROJECT : SW7
1

C428 C423 0.1uF/10V 392/F


0.01uF/25V 2.2uF/6.3V_6 R265
1

R258 20/F
Quanta Computer Inc.
2

1K/F
2

Size Document Number Rev


2

Crestline (VGA,DMI) 1A

Date: Friday, September 28, 2007 Sheet 7 of 44


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

08
A 14 DDR_A_D[63:0] 14 DDR_B_D[63:0] A
U23D
DDR_A_D0 AR43 BB19
SA_DQ_0 SA_BS_0 DDR_A_BS0 13,14
DDR_A_D1 AW44 BK19 U23E
SA_DQ_1 SA_BS_1 DDR_A_BS1 13,14
DDR_A_D2 BA45 BF29 DDR_B_D0 AP49 AY17
SA_DQ_2 SA_BS_2 DDR_A_BS2 13,14 SB_DQ_0 SB_BS_0 DDR_B_BS0 13,14
DDR_A_D3 AY46 DDR_B_D1 AR51 BG18
SA_DQ_3 DDR_A_CAS# 13,14 SB_DQ_1 SB_BS_1 DDR_B_BS1 13,14
DDR_A_D4 AR41 BL17 DDR_B_D2 AW50 BG36
SA_DQ_4 SA_CAS# SB_DQ_2 SB_BS_2 DDR_B_BS2 13,14
DDR_A_D5 AR45 DDR_B_D3 AW51
SA_DQ_5 DDR_A_DM[0..7] 14 SB_DQ_3
DDR_A_D6 AT42 AT45 DDR_A_DM0 DDR_B_D4 AN51 BE17
SA_DQ_6 SA_DM_0 SB_DQ_4 SB_CAS# DDR_B_CAS# 13,14
DDR_A_D7 AW47 BD44 DDR_A_DM1 DDR_B_D5 AN50
SA_DQ_7 SA_DM_1 SB_DQ_5 DDR_B_DM[0..7] 14
DDR_A_D8 BB45 BD42 DDR_A_DM2 DDR_B_D6 AV50 AR50 DDR_B_DM0
DDR_A_D9 SA_DQ_8 SA_DM_2 DDR_A_DM3 DDR_B_D7 SB_DQ_6 SB_DM_0 DDR_B_DM1
BF48 SA_DQ_9 SA_DM_3 AW38 AV49 SB_DQ_7 SB_DM_1 BD49
DDR_A_D10 BG47 AW13 DDR_A_DM4 DDR_B_D8 BA50 BK45 DDR_B_DM2
DDR_A_D11 SA_DQ_10 SA_DM_4 DDR_A_DM5 DDR_B_D9 SB_DQ_8 SB_DM_2 DDR_B_DM3
BJ45 SA_DQ_11 SA_DM_5 BG8 BB50 SB_DQ_9 SB_DM_3 BL39
DDR_A_D12 BB47 AY5 DDR_A_DM6 DDR_B_D10 BA49 BH12 DDR_B_DM4
DDR_A_D13 SA_DQ_12 SA_DM_6 DDR_A_DM7 DDR_B_D11 SB_DQ_10 SB_DM_4 DDR_B_DM5
BG50 SA_DQ_13 SA_DM_7 AN6 BE50 SB_DQ_11 SB_DM_5 BJ7
DDR_A_D14 BH49 DDR_B_D12 BA51 BF3 DDR_B_DM6
SA_DQ_14 DDR_A_DQS[7:0] 14 SB_DQ_12 SB_DM_6
DDR_A_D15 BE45 AT46 DDR_A_DQS0 DDR_B_D13 AY49 AW2 DDR_B_DM7
SA_DQ_15 SA_DQS_0 SB_DQ_13 SB_DM_7

A
DDR_A_D16 AW43 BE48 DDR_A_DQS1 DDR_B_D14 BF50
SA_DQ_16 SA_DQS_1 SB_DQ_14 DDR_B_DQS[7:0] 14
DDR_A_D17 BE44 BB43 DDR_A_DQS2 DDR_B_D15 BF49 AT50 DDR_B_DQS0
DDR_A_D18 SA_DQ_17 SA_DQS_2 DDR_A_DQS3 DDR_B_D16 SB_DQ_15 SB_DQS_0 DDR_B_DQS1
BG42 SA_DQ_18 SA_DQS_3 BC37 BJ50 SB_DQ_16 SB_DQS_1 BD50

B
DDR_A_D19 BE40 BB16 DDR_A_DQS4 DDR_B_D17 BJ44 BK46 DDR_B_DQS2
DDR_A_D20 SA_DQ_19 SA_DQS_4 DDR_A_DQS5 DDR_B_D18 SB_DQ_17 SB_DQS_2 DDR_B_DQS3
BF44 BH6 BJ43 BK39

MEMORY
DDR_A_D21 SA_DQ_20 SA_DQS_5 DDR_A_DQS6 DDR_B_D19 SB_DQ_18 SB_DQS_3 DDR_B_DQS4
BH45 SA_DQ_21 SA_DQS_6 BB2 BL43 SB_DQ_19 SB_DQS_4 BJ12
DDR_A_D22 BG40 AP3 DDR_A_DQS7 DDR_B_D20 BK47 BL7 DDR_B_DQS5
SA_DQ_22 SA_DQS_7 DDR_A_DQS#[7:0] 14 SB_DQ_20 SB_DQS_5
DDR_A_D23 BF40 AT47 DDR_A_DQS#0 DDR_B_D21 BK49 BE2 DDR_B_DQS6

MEMORY
DDR_A_D24 SA_DQ_23 SA_DQS#_0 DDR_A_DQS#1 DDR_B_D22 SB_DQ_21 SB_DQS_6 DDR_B_DQS7
AR40 SA_DQ_24 SA_DQS#_1 BD47 BK43 SB_DQ_22 SB_DQS_7 AV2 DDR_B_DQS#[7:0] 14
DDR_A_D25 AW40 BC41 DDR_A_DQS#2 DDR_B_D23 BK42 AU50 DDR_B_DQS#0
DDR_A_D26 SA_DQ_25 SA_DQS#_2 DDR_A_DQS#3 DDR_B_D24 SB_DQ_23 SB_DQS#_0 DDR_B_DQS#1
AT39 SA_DQ_26 SA_DQS#_3 BA37 BJ41 SB_DQ_24 SB_DQS#_1 BC50
DDR_A_D27 AW36 BA16 DDR_A_DQS#4 DDR_B_D25 BL41 BL45 DDR_B_DQS#2
DDR_A_D28 SA_DQ_27 SA_DQS#_4 DDR_A_DQS#5 DDR_B_D26 SB_DQ_25 SB_DQS#_2 DDR_B_DQS#3
B AW41 SA_DQ_28 SA_DQS#_5 BH7 BJ37 SB_DQ_26 SB_DQS#_3 BK38 B
DDR_A_D29 AY41 BC1 DDR_A_DQS#6 DDR_B_D27 BJ36 BK12 DDR_B_DQS#4
DDR_A_D30 SA_DQ_29 SA_DQS#_6 DDR_A_DQS#7 DDR_B_D28 SB_DQ_27 SB_DQS#_4 DDR_B_DQS#5
AV38 SA_DQ_30 SA_DQS#_7 AP2 BK41 SB_DQ_28 SB_DQS#_5 BK7
DDR_A_D31 AT38 DDR_B_D29 BJ40 BF2 DDR_B_DQS#6
SA_DQ_31 DDR_A_MA[13:0] 13,14 SB_DQ_29 SB_DQS#_6
DDR_A_D32 AV13 BJ19 DDR_A_MA0 DDR_B_D30 BL35 AV3 DDR_B_DQS#7
DDR_A_D33 SA_DQ_32 SA_MA_0 DDR_A_MA1 DDR_B_D31 SB_DQ_30 SB_DQS#_7
AT13 BD20 BK37
SYSTEM

SA_DQ_33 SA_MA_1 SB_DQ_31 DDR_B_MA[13:0] 13,14


DDR_A_D34 AW11 BK27 DDR_A_MA2 DDR_B_D32 BK13 BC18 DDR_B_MA0
DDR_A_D35 SA_DQ_34 SA_MA_2 DDR_A_MA3 DDR_B_D33 SB_DQ_32 SB_MA_0 DDR_B_MA1
AV11 SA_DQ_35 SA_MA_3 BH28 BE11 SB_DQ_33 SB_MA_1 BG28
DDR_A_D36 AU15 BL24 DDR_A_MA4 DDR_B_D34 BK11 BG25 DDR_B_MA2

SYSTEM
DDR_A_D37 SA_DQ_36 SA_MA_4 DDR_A_MA5 DDR_B_D35 SB_DQ_34 SB_MA_2 DDR_B_MA3
AT11 SA_DQ_37 SA_MA_5 BK28 BC11 SB_DQ_35 SB_MA_3 AW17
DDR_A_D38 BA13 BJ27 DDR_A_MA6 DDR_B_D36 BC13 BF25 DDR_B_MA4
DDR_A_D39 SA_DQ_38 SA_MA_6 DDR_A_MA7 DDR_B_D37 SB_DQ_36 SB_MA_4 DDR_B_MA5
BA11 SA_DQ_39 SA_MA_7 BJ25 BE12 SB_DQ_37 SB_MA_5 BE25
DDR_A_D40 BE10 BL28 DDR_A_MA8 DDR_B_D38 BC12 BA29 DDR_B_MA6
DDR_A_D41 SA_DQ_40 SA_MA_8 DDR_A_MA9 DDR_B_D39 SB_DQ_38 SB_MA_6 DDR_B_MA7
BD10 SA_DQ_41 SA_MA_9 BA28 BG12 SB_DQ_39 SB_MA_7 BC28
DDR_A_D42 BD8 BC19 DDR_A_MA10 DDR_B_D40 BJ10 AY28 DDR_B_MA8
DDR_A_D43 SA_DQ_42 SA_MA_10 DDR_A_MA11 DDR_B_D41 SB_DQ_40 SB_MA_8 DDR_B_MA9
AY9 SA_DQ_43 SA_MA_11 BE28 BL9 SB_DQ_41 SB_MA_9 BD37
DDR_A_D44 BG10 BG30 DDR_A_MA12 DDR_B_D42 BK5 BG17 DDR_B_MA10
DDR_A_D45 SA_DQ_44 SA_MA_12 DDR_A_MA13 DDR_B_D43 SB_DQ_42 SB_MA_10 DDR_B_MA11
AW9 SA_DQ_45 SA_MA_13 BJ16 BL5 SB_DQ_43 SB_MA_11 BE37
DDR_A_D46 BD7 DDR_B_D44 BK9 BA39 DDR_B_MA12
DDR

DDR_A_D47 SA_DQ_46 DDR_B_D45 SB_DQ_44 SB_MA_12 DDR_B_MA13


BB9 SA_DQ_47 BK10 SB_DQ_45 SB_MA_13 BG13
DDR_A_D48 BB5 BE18 DDR_B_D46 BJ8
SA_DQ_48 SA_RAS# DDR_A_RAS# 13,14 SB_DQ_46
DDR_A_D49 AY7 AY20 TP_SA_RCVEN# DDR_B_D47 BJ6 AV16

DDR
SA_DQ_49 SA_RCVEN# SB_DQ_47 SB_RAS# DDR_B_RAS# 13,14
DDR_A_D50 AT5 T9 DDR_B_D48 BF4 AY18 TP_SB_RCVEN# T10 *PAD
DDR_A_D51 SA_DQ_50 DDR_B_D49 SB_DQ_48 SB_RCVEN#
AT7 SA_DQ_51 SA_WE# BA19 DDR_A_WE# 13,14 BH5 SB_DQ_49
DDR_A_D52 AY6 DDR_B_D50 BG1 BC17
SA_DQ_52 SB_DQ_50 SB_WE# DDR_B_WE# 13,14
DDR_A_D53 BB7 DDR_B_D51 BC2
DDR_A_D54 SA_DQ_53 DDR_B_D52 SB_DQ_51
AR5 SA_DQ_54 BK3 SB_DQ_52
DDR_A_D55 AR8 DDR_B_D53 BE4
DDR_A_D56 SA_DQ_55 DDR_B_D54 SB_DQ_53
AR9 SA_DQ_56 BD3 SB_DQ_54
DDR_A_D57 AN3 DDR_B_D55 BJ2
C
DDR_A_D58 SA_DQ_57 DDR_B_D56 SB_DQ_55 C
AM8 SA_DQ_58 BA3 SB_DQ_56
DDR_A_D59 AN10 DDR_B_D57 BB3
DDR_A_D60 SA_DQ_59 DDR_B_D58 SB_DQ_57
AT9 SA_DQ_60 AR1 SB_DQ_58
DDR_A_D61 AN9 DDR_B_D59 AT3
DDR_A_D62 SA_DQ_61 DDR_B_D60 SB_DQ_59
AM9 SA_DQ_62 AY2 SB_DQ_60
DDR_A_D63 AN11 DDR_B_D61 AY3
SA_DQ_63 DDR_B_D62 SB_DQ_61
AU2 SB_DQ_62
CRESTLINE_1p0 DDR_B_D63 AT2 SB_DQ_63
CRESTLINE_1p0

D D

PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
Crestline (DDR) 1A

Date: Friday, September 28, 2007 Sheet 8 of 44


1 2 3 4 5 6 7 8
5 4 3 2 1

+1.05V_VCCP
+3V

AT35
AT34
AH28
AC32
AC31
U23G

VCC_1
VCC_2
VCC_3
VCC_5
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
T17
T18
T19
T21
Layout Note:
370 mils from edge.
Ivcc (External GFX 1.310 A,
R309
1
10
2 +VCC_GMCH_L
D27
1

CH501H-40PT
2 AB33
AB36
AB37
AC33
AC35
U23F

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4 VSS_NCTF_1
09
T27
T37
AK32
VCC_4 VCC_AXG_NCTF_4
T22 integrate 1.572 A) AC36
VCC_NCTF_5 VSS_NCTF_2
U24

VCC CORE
VCC_6 VCC_AXG_NCTF_5 VCC_NCTF_6 VSS_NCTF_3
AJ31 VCC_7 VCC_AXG_NCTF_6 T23 AD35 VCC_NCTF_7 VSS_NCTF_4 U28
AJ28 T25 +1.05V_VCCP AD36 V31
VCC_8 VCC_AXG_NCTF_7 VCC_NCTF_8 VSS_NCTF_5
AH32 VCC_9 VCC_AXG_NCTF_8 U15 AF33 VCC_NCTF_9 VSS_NCTF_6 V35
D
AH31 VCC_10 VCC_AXG_NCTF_9 U16 AF36 VCC_NCTF_10 VSS_NCTF_7 AA19 D
AH29 VCC_11 VCC_AXG_NCTF_10 U17 AH33 VCC_NCTF_11 VSS_NCTF_8 AB17
AF32 VCC_12 VCC_AXG_NCTF_11 U19 AH35 VCC_NCTF_12 VSS_NCTF_9 AB35

VSS NCTF
VCC_AXG_NCTF_12 U20 AH36 VCC_NCTF_13 VSS_NCTF_10 AD19

1
U21 C190 C207 AH37 AD37
VCC_AXG_NCTF_13 C196 C224 C209 VCC_NCTF_14 VSS_NCTF_11
VCC_AXG_NCTF_14 U23 AJ33 VCC_NCTF_15 VSS_NCTF_12 AF17
R30 U26 10U/6.3V_8 10U/6.3V_8 0.22uF/10V_6 0.22uF/10V_6 0.1uF/10V AJ35 AF35

2
VCC_13 VCC_AXG_NCTF_15 VCC_NCTF_16 VSS_NCTF_13
VCC_AXG_NCTF_16 V16 AK33 VCC_NCTF_17 VSS_NCTF_14 AK17
VCC_AXG_NCTF_17 V17 AK35 VCC_NCTF_18 VSS_NCTF_15 AM17
IVCCSM supply VCC_AXG_NCTF_18 V19 Layout Note: AK36 VCC_NCTF_19 VSS_NCTF_16 AM24
V20 Inside GMCH cavity. AK37 AP26
current 1 VCC_AXG_NCTF_19
V21 AD33
VCC_NCTF_20 VSS_NCTF_17
AP28
VCC_AXG_NCTF_20 VCC_NCTF_21 VSS_NCTF_18
channel VCC_AXG_NCTF_21 V23
+1.05V_VCCP
AJ36 VCC_NCTF_22 VSS_NCTF_19 AR15
V24 AM35 AR19
1.615A 2 VCC_AXG_NCTF_22 VCC_NCTF_23 VSS_NCTF_20

VCC NCTF
Y15 AL33 AR28
channel +1.8VSUS
3.318A
POWER VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
Y16
Y17
Ivcc_AXG Graphics core supply
current 7.7A
AL35
AA33
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VSS_NCTF_21

AU32 VCC_SM_1 VCC_AXG_NCTF_26 Y19 AA35 VCC_NCTF_27


AU33 VCC_SM_2 VCC_AXG_NCTF_27 Y20 AA36 VCC_NCTF_28
AU35 VCC_SM_3 VCC_AXG_NCTF_28 Y21 AP35 VCC_NCTF_29

1
AV33 VCC_SM_4 VCC_AXG_NCTF_29 Y23 AP36 VCC_NCTF_30
AW33 Y24 + C436 + C480 AR35
VCC_SM_5 VCC_AXG_NCTF_30 VCC_NCTF_31
AW35 VCC_SM_6 VCC_AXG_NCTF_31 Y26 AR36 VCC_NCTF_32
AY35 Y28 330UF_2.0V_ESR9 330UF_2.0V_ESR9 Y32

2
VCC_SM_7 VCC_AXG_NCTF_32 VCC_NCTF_33
BA32 Y29 Y33
BA33
BA35
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
AA16
AA17 Layout Note:
Y35
Y36
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
POWER
BB33 VCC_SM_11 VCC_AXG_NCTF_36 AB16 370 mils from edge. Y37 VCC_NCTF_37 VSS_SCB1 A3
BC32 AB19 T30 B2

VSS SCB
VCC_SM_12 VCC_AXG_NCTF_37 VCC_NCTF_38 VSS_SCB2
BC33 VCC_SM_13 VCC_AXG_NCTF_38 AC16 T34 VCC_NCTF_39 VSS_SCB3 C1
C BC35 VCC_SM_14 VCC_AXG_NCTF_39 AC17 T35 VCC_NCTF_40 VSS_SCB4 BL1 C
BD32 VCC_SM_15 VCC_AXG_NCTF_40 AC19 Layout Note: U29 VCC_NCTF_41 VSS_SCB5 BL51
BD35 VCC_SM_16 VCC_AXG_NCTF_41 AD15 Inside GMCH cavity for VCC_AXG. U31 VCC_NCTF_42 VSS_SCB6 A51
BE32 VCC_SM_17 VCC_AXG_NCTF_42 AD16 for IAMT power if not U32 VCC_NCTF_43
BE33 VCC_SM_18 VCC_AXG_NCTF_43 AD17 support need to U33 VCC_NCTF_44
BE35 VCC_SM_19 VCC_AXG_NCTF_44 AF16 connection to S0 power U35 VCC_NCTF_45
VCC GFX NCTF

BF33 AF19 U36


VCC SM

VCC_SM_20 VCC_AXG_NCTF_45 VCC_NCTF_46

1
BF34 AH15 C470 C210 V32
VCC_SM_21 VCC_AXG_NCTF_46 C218 C200 C469 C221 C472 VCC_NCTF_47
BG32 VCC_SM_22 VCC_AXG_NCTF_47 AH16 V33 VCC_NCTF_48
BG33 AH17 2 0.1uF/10V 0.1uF/10V 0.47uF/10V_6 1uF/6.3V 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 V36

2
VCC_SM_23 VCC_AXG_NCTF_48 VCC_NCTF_49 +1.05V_VCCP
BG35 VCC_SM_24 VCC_AXG_NCTF_49 AH19 V37 VCC_NCTF_50
BH32 VCC_SM_25 VCC_AXG_NCTF_50 AJ16
BH34 VCC_SM_26 VCC_AXG_NCTF_51 AJ17 VCC_AXM_1 AT33
BH35 AJ19 AT31

VCC AXM
VCC_SM_27 VCC_AXG_NCTF_52 VCC_AXM_2
BJ32 VCC_SM_28 VCC_AXG_NCTF_53 AK16 VCC_AXM_3 AK29
BJ33 VCC_SM_29 VCC_AXG_NCTF_54 AK19 VCC_AXM_4 AK24
BJ34 VCC_SM_30 VCC_AXG_NCTF_55 AL16 Layout Note: VCC_AXM_5 AK23
BK32 AL17 +1.05V_VCCP AL24 AJ26
VCC_SM_31 VCC_AXG_NCTF_56 Inside GMCH VCC_AXM_NCTF_1 VCC_AXM_6
BK33 VCC_SM_32 VCC_AXG_NCTF_57 AL19 GMCH 1.05V current(A) Remark AL26 VCC_AXM_NCTF_2 VCC_AXM_7 AJ23
BK34 AL20
cavity. AL28
VCC_SM_33 VCC_AXG_NCTF_58 VCC_AXM_NCTF_3
BK35 VCC_SM_34 VCC_AXG_NCTF_59 AL21 ( 1.3A for AM26 VCC_AXM_NCTF_4
BL33 VCC_SM_35 VCC_AXG_NCTF_60 AL23 VCC Core 1.573 external Ivcc_AXM AM28 VCC_AXM_NCTF_5

VCC AXM NCTF


AU30 AM15 GFX ) AM29
VCC_SM_36 VCC_AXG_NCTF_61
AM16 for integrated Controller C208 C220 C205 AM31
VCC_AXM_NCTF_6
VCC_AXG_NCTF_62 0.1uF/10V 0.1uF/10V 0.1uF/10V VCC_AXM_NCTF_7
AM19 VCC_AXG 7.7 Gfx supply AM32

2
+1.05V_VCCP VCC_AXG_NCTF_63 VCC_AXM_NCTF_8
AM20 AM33
VCC_AXG_NCTF_64
AM21
current AP29
VCC_AXM_NCTF_9
VCC_AXG_NCTF_65 VCC_AXM_NCTF_10
R20 VCC_AXG_1 VCC_AXG_NCTF_66 AM23 VCC_AXD 0.2 540mA AP31 VCC_AXM_NCTF_11
T14 VCC_AXG_2 VCC_AXG_NCTF_67 AP15 AP32 VCC_AXM_NCTF_12
B
W13 VCC_AXG_3 VCC_AXG_NCTF_68 AP16 AP33 VCC_AXM_NCTF_13 B
W14 VCC_AXG_4 VCC_AXG_NCTF_69 AP17 VTT 0.85 FSB VCCP AL29 VCC_AXM_NCTF_14
Y12 VCC_AXG_5 VCC_AXG_NCTF_70 AP19 AL31 VCC_AXM_NCTF_15

1
AA20 AP20 C237 C230 AL32
VCC_AXG_6 VCC_AXG_NCTF_71 C223 C471 VCC_AXM_NCTF_16
AA23 VCC_AXG_7 VCC_AXG_NCTF_72 AP21 VCC_PEG 1.2 for PCIEG AR31 VCC_AXM_NCTF_17
AA26 AP23 10U/6.3V_8 10U/6.3V_8 0.22uF/10V_6 0.22uF/10V_6 AR32

2
VCC_AXG_8 VCC_AXG_NCTF_73 VCC_AXM_NCTF_18
AA28 VCC_AXG_9 VCC_AXG_NCTF_74 AP24 AR33 VCC_AXM_NCTF_19
AB21 VCC_AXG_10 VCC_AXG_NCTF_75 AR20 VCC_AXM 0.54 for IAMT
AB24 VCC_AXG_11 VCC_AXG_NCTF_76 AR21 function
AB29 VCC_AXG_12 VCC_AXG_NCTF_77 AR23 Layout Note:
AC20 VCC_AXG_13 VCC_AXG_NCTF_78 AR24 Place close to GMCH edge.
AC21 AR26 VCCR_RX_DMI 0.25 DMI CRESTLINE_1p0
VCC_AXG_14 VCC_AXG_NCTF_79
VCC GFX

AC23 VCC_AXG_15 VCC_AXG_NCTF_80 V26


AC24 VCC_AXG_16 VCC_AXG_NCTF_81 V28
AC26 V29 SUM 12.313

om
VCC_AXG_17 VCC_AXG_NCTF_82 +1.8VSUS
AC28 VCC_AXG_18 VCC_AXG_NCTF_83 Y31
AC29 VCC_AXG_19

l.c
AD20 VCC_AXG_20
AD23

ai
VCC_AXG_21

1
AD24 AW45 VCCSM_LF1
VCC SM LF

VCC_AXG_22 VCC_SM_LF1

tm
AD28 BC39 VCCSM_LF2 + C172 C427 C132 C422
VCC_AXG_23 VCC_SM_LF2

1
AF21 BE39 VCCSM_LF3 C431
VCC_AXG_24 VCC_SM_LF3

ho
AF26 BD17 VCCSM_LF4 C175 330UF_2.0V_ESR9 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8

2
VCC_AXG_25 VCC_SM_LF4 VCCSM_LF5 0.1uF/10V
AA31 BD4

2
VCC_AXG_26 VCC_SM_LF5

f@
AH20 AW8 VCCSM_LF6
VCC_AXG_27 VCC_SM_LF6 VCCSM_LF7
AH21 VCC_AXG_28 VCC_SM_LF7 AT6

in
AH23 VCC_AXG_29
1

AH24 Layout Note:

xa
VCC_AXG_30 C186 C176 C166 C167 C165 C169 C177
AH26 VCC_AXG_31 Layout Note: Place on the edge.
1uF/6.3V 1uF/6.3V

he
AD31 Place C901 where LVDS
2

VCC_AXG_32 0.1uF/10V 0.1uF/10V 0.47uF/10V_6 0.47uF/10V_6 0.47uF/10V_6


A AJ20 VCC_AXG_33
A
AN14
and DDR2 taps.
VCC_AXG_34

PROJECT : SW7
CRESTLINE_1p0

Quanta Computer Inc.


Size Document Number Rev
Crestline (VCC, NCTF) 1A

Date: Friday, September 28, 2007 Sheet 9 of 44


5 4 3 2 1
5 4 3 2 1

CRT/TV Disable/Enable guideline


LVDS Disable/Enable guideline

10
External VGA with EV@part,Internal VGA with IV@ part
IV&EV Dis/Enable setting External VGA with EV@part,Internal VGA with IV@ part
Ball Enable Disable Ball Enable Disable If SDVO Disable If SDVO enable If SDVO enable
Signal LVDS Disable LVDS Disable LVDS enable
VCCA_CRT 3.3V GND VCCA_C_TVO 3.3V GND
VCCD_LVDS GND 1.8V 1.8V
+3V
VCCD_CRT 1.5V GND VCCD_TVO 1.5V 1.5V
C239 VCCA_LVDS GND GND 1.8V
VCCDQ_CRT 1.5V GND VCCABG_DAC 3.3V GND
0.1uF/10V VCCTX_LVDS GND GND 1.8V
VCCA_A_TVO 3.3V GND VSSABG_DAC GND GND

VCCA_B_TVO 3.3V GND VCC_SYNC 3.3V GND

D D

L42
+3V 1 2 +3V_VCCA_CRT_DAC
BLM18PG181SN1

1
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC +1.05V_VCCP
C505
0.1uF/10V
+3V_VCC_HV

2
U23H D28
CH501H-40PT 40 mil
+3V_TV_DAC R307 0.03/F J32 U13 wide

1
VCCSYNC VTT_1
2 1 +VCC_TVBG VTT_2 U12
A33 U11 Ivcc_VTT FSB +3V_VCC_HV_L
VCCA_CRT_DAC_1 VTT_3

1
B33 U9
VCCA_CRT_DAC_2 VTT_4 supply

1
U8 C229 C231

CRT
VTT_5

1
C506 U7 2.2uF/6.3V_6 4.7uF/6.3V_6 current

2
0.1uF/10V VTT_6 +3V_VCC_HV
A30 U5
0.85A

2
VCCA_DAC_BG VTT_7 R310
VTT_8 U3
B32 U2 10
VSSA_DAC_BG VTT_9 +1.05V_VCCP
U1

2
VTT_10
VTT_11 T13 Place on the edge.
+1.25V_VCCA_DPLLA B49 T11 R296 0
VCCA_DPLLA VTT_12

VTT
VTT_13 T10
+1.25V_VCCA_DPLLB H49 T9
VCCA_DPLLB VTT_14
FB_120ohm+-25%_100mHz T7

PLL
VTT_15

1
+1.25V_VCCA_HPLL AL2 T6
+1.25V _200mA_0.2ohm DC +1.25V
80mA +1.8VSUS_VCC_TX_LVDS VCCA_HPLL VTT_16
T5 C217 C236 +3V
L20 +1.25V_VCCA_MPLL AM2 VTT_17 0.47uF/10V_6 4.7uF/6.3V_6
50mA T3

2
L35 +1.25V_VCCA_DPLLA VCCA_MPLL VTT_18
2 1 VTT_19 T2
2 1 +1.25V_VCCA_HPLL 10uH/100MA_8 R3

A LVDS
BLM18PG121SN VTT_20
A41 VCCA_LVDS VTT_21 R2
1

1
10uH+-20%_100mA + C507 C244 10mA C490 R1 +1.25V
C443 C441 C440 VTT_22
B41 VSSA_LVDS
Place on the edge.
0.1uF/10V 330UF_2.0V_ESR9
0.1uF/10V 1000pF/50V
2

2
10U/6.3V_8 10U/6.3V_8 AT23 +1.25V_AXD 1 2
VCC_AXD_1
VCC_AXD_2 AU28
80mA +3V K50 AU24 L12 0Reserved L81 pad for
VCCA_PEG_BG VCC_AXD_3

1
C L34 L17 C193 C194 C160 C
150mA AT29

A PEG
VCC_AXD_4 inductor.

AXD
BLM18PG121SN 2 1 +1.25V_VCCA_DPLLB K49 AT25
+1.25V_VCCA_MPLL 10uH/100MA_8 VSSA_PEG_BG VCC_AXD_5 1uF/6.3V 10U/6.3V_8 10U/6.3V_8
2 1 AT30 Place caps close

2
C240 VCC_AXD_6
to VCC_AXD.

1
R266 0.1Caps should be + C238 +1.25V_VCCD_PEG_PLL U51 AR29
VCCA_PEG_PLL VCC_AXD_NCTF

1
0.5/F_6 C502 +1.25V
placed 200 mils 100mA
1

1 2 +VCCA_MPLL_L 0.1uF/10V
330UF_2.0V_ESR9 0.1uF/10V

2
C435 with in its pins. Ivcca_PEG_BG AW18 B23

2
+VCCA_MPLL_L 0.1uF/10V VCCA_SM_1 VCC_AXF_1
supply current AV19 B21

AXF
POWER
2

VCCA_SM_2 VCC_AXF_2

1
100mA AU19 VCCA_SM_3 VCC_AXF_3 A21
C432 C433 AU18 C243 C248
VCCA_SM_4 1uF/6.3V 4.7uF/6.3V_6
AU17 AJ50 +1.25V

2
10U/6.3V_8 10U/6.3V_8 VCCA_SM_5 VCC_DMI

A SM

1
+1.25V AT22 Ivcc_DMI supply
VCCA_SM_7 +1.8VSUS_VCC_SM_CK C442
AT21 BK24

SM CK
VCCA_SM_8 VCC_SM_CK_1 current 100mA
1

AT19 BK23 200mA 0.1uF/10V

2
VCCA_SM_9 VCC_SM_CK_2
2

1
+ C458 C198 C187 C195 C191 C189 C180 AT18 BJ24 Place caps close
220U/2.5V_B 1uF/6.3V VCCA_SM_10 VCC_SM_CK_3
AT17 VCCA_SM_11 VCC_SM_CK_4 BJ23 to VCC_AXF
4.7uF/6.3V_6 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 AR17 +1.8VSUS_VCC_TX_LVDS +1.8VSUS
2

2
VCCA_SM_NCTF_1
AR16 VCCA_SM_NCTF_2 100mA
L19 1uH/300mA_8
A43 +1.8VSUS_VCC_TX_LVDS 2 1

A CK
VCC_TX_LVDS
BC29 VCCA_SM_CK_1

1
+1.25V BB29 +3V_VCC_HV 1uH+-20%_300mA
VCCA_SM_CK_2

1
VCC_HV_1 C40 +
+3V_TV_DAC C25 B40 C491 C508

HV
VCCA_TVA_DAC_1 VCC_HV_2
1

1
C155 C151 C170 C171 C157 B25 1000pF/50V 220U/2.5V_B

2
VCCA_TVA_DAC_2

1
1uF/6.3V 1uF/6.3V 0.1uF/10V +3V_TV_DAC C27
10U/6.3V_8 10U/6.3V_8 VCCA_TVB_DAC_1 C492
B27 AD51

TV
2

2
+3V_TV_DAC VCCA_TVB_DAC_2 VCC_PEG_1 0.1uF/10V
B28 W50

2
VCCA_TVC_DAC_1 VCC_PEG_2 +VCC_PEG +1.05V_VCCP
A28 VCCA_TVC_DAC_2 VCC_PEG_3 W51

PEG
+1.5V_VCCD_TVDAC V49 L40 Ivcc_PEG

D TV/CRT
+1.5V_RUN +1.5V_VCCD_TVDAC VCC_PEG_4
V50
M32
VCC_PEG_5 supply current
VCCD_CRT

1
R73 0_6 +1.5V_VCCD_TVDAC L29 BLM21PG220SN1D 1.2A
VCCD_TVDAC

1
AH50 +VCC_RXR_DMI +

DMI
VCC_RXR_DMI_1
1

+1.5V_VCCD_QDAC N28 AH51 C199 C460


C265 VCCD_QDAC VCC_RXR_DMI_2 220U/2.5V_B 4.7uF/6.3V_6

2
0.1uF/10V +VCCA_MPLL_L AN2
2

VCCD_HPLL +VTTLF1 +VCC_PEG


A7

VTTLF
+VCCA_MPLL_L +1.25V_VCCD_PEG_PLL VTTLF1 +VTTLF2
U48 VCCD_PEG_PLL VTTLF2 F2 Ivcc_RX_DMI
L21 250mA AH1 +VTTLF3 L38

LVDS
VTTLF3 supply current
1

B 1 2 J41 B
100_6 C434 C473 VCCD_LVDS_1
150mA H42 VCCD_LVDS_2 250mA
1

0.1uF/10V 0.1uF/10V 0_8


2

FB_180ohm+-25%_ C266 C262


0.1uF/10V 4.7uF/6.3V_6
100mHz_1500mA_
2

CRESTLINE_1p0
0.09ohm DC
+1.8VSUS
+VTTLF1
+VTTLF2
C168 C161 +VTTLF3

1
1uF/6.3V 10U/6.3V_8 L33 +1.8VSUS
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC
C454 C241 C496 1uH/300mA_8
+3V_TV_DAC 0.47uF/10V_6 0.47uF/10V_6 0.47uF/10V_6 +1.8VSUS_VCC_SM_CK 2 1

2
+3V R305 0_6

1
1uH+-20%_300mA
L41
+3.3S_TVDAC_LDO 1 2 R254

1
BLM18PG181SN1 C426 C421 1/F_6
C430

1 2
1

10U/6.3V_8 10U/6.3V_8 0.1uF/10V +VCC_SM_CK_L

2
C501 C499
0.1uF/10V C419
2

10U/6.3V_8 10U/6.3V_8

2
+1.25V
100mA
L16
1 2 +1.25V_VCCD_PEG_PLL
22nF & 0.1uF for BLM21PG221SN1D
For TV-OUT
1

+3.3S_TVDAC_LDO +5V VCC_TVDACA:C_R should


be placed with in 250 FB_220ohm+-25%_100MHz
U25 R64
_2A_0.1ohm DC
1

mils from Crestline. 1/F_6


1

5 1 C497
1 2

OUT IN 0.1uF/10V C468


2
2

GND 0.1uF/10V
4 3
2

BYP EN C232
C504 *AAT3218 C498 10U/6.3V_8
2

C494
*10U/6.3V_8 *0.01uF/25V *1uF/6.3V

A A
1

C500
0.1uF/10V
2

PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
Crestline (POWER) 1A

Date: Friday, September 28, 2007 Sheet 10 of 44


5 4 3 2 1
5 4 3 2 1

U23I U23J

A13
A15
A17
A24
AA21
AA24
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
AW24
AW29
AW32
AW5
AW7
AY10
C46
C50
C7
D13
D24
D3
D32
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
W11
W39
W43
W47
W5
W7
Y13
11
VSS_6 VSS_105 VSS_205 VSS_293
AA29 VSS_7 VSS_106 AY24 D39 VSS_206 VSS_294 Y2
D
AB20 VSS_8 VSS_107 AY37 D45 VSS_207 VSS_295 Y41 D
AB23 VSS_9 VSS_108 AY42 D49 VSS_208 VSS_296 Y45
AB26 VSS_10 VSS_109 AY43 E10 VSS_209 VSS_297 Y49
AB28 VSS_11 VSS_110 AY45 E16 VSS_210 VSS_298 Y5
AB31 VSS_12 VSS_111 AY47 E24 VSS_211 VSS_299 Y50
AC10 VSS_13 VSS_112 AY50 E28 VSS_212 VSS_300 Y11
AC13 VSS_14 VSS_113 B10 E32 VSS_213 VSS_301 P29
AC3 VSS_15 VSS_114 B20 E47 VSS_214 VSS_302 T29
AC39 VSS_16 VSS_115 B24 F19 VSS_215 VSS_303 T31
AC43 VSS_17 VSS_116 B29 F36 VSS_216 VSS_304 T33
AC47 VSS_18 VSS_117 B30 F4 VSS_217 VSS_305 R28
AD1 VSS_19 VSS_118 B35 F40 VSS_218
AD21 VSS_20 VSS_119 B38 F50 VSS_219
AD26 VSS_21 VSS_120 B43 G1 VSS_220
AD29 VSS_22 VSS_121 B46 G13 VSS_221 VSS_306 AA32
AD3 VSS_23 VSS_122 B5 G16 VSS_222 VSS_307 AB32
AD41 VSS_24 VSS_123 B8 G19 VSS_223 VSS_308 AD32
AD45 VSS_25 VSS_124 BA1 G24 VSS_224 VSS_309 AF28
AD49 VSS_26 VSS_125 BA17 G28 VSS_225 VSS_310 AF29
AD5 VSS_27 VSS_126 BA18 G29 VSS_226 VSS_311 AT27
AD50 VSS_28 VSS_127 BA2 G33 VSS_227 VSS_312 AV25
AD8 VSS_29 VSS_128 BA24 G42 VSS_228 VSS_313 H50
AE10 VSS_30 VSS_129 BB12 G45 VSS_229
AE14 VSS_31 VSS_130 BB25 G48 VSS_230
AE6 VSS_32 VSS_131 BB40 G8 VSS_231
AF20 BB44 H24
AF23
AF24
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
BB49
BB8
H28
H4
VSS_232
VSS_233
VSS_234
AF31 VSS_36 VSS_135 BC16 H45 VSS_235
AG2 VSS_37 VSS_136 BC24 J11 VSS_236
C AG38 VSS_38 VSS_137 BC25 J16 VSS_237
C
AG43 VSS_39 VSS_138 BC36 J2 VSS_238
AG47 VSS_40 VSS_139 BC40 J24 VSS_239
AG50 VSS_41 VSS_140 BC51 J28 VSS_240
AH3 BD13 J33
AH40
AH41
VSS_42
VSS_43
VSS_44
VSS_141
VSS_142
VSS_143
BD2
BD28
J35
J39
VSS_241
VSS_242
VSS_243
VSS
AH7 VSS_45 VSS_144 BD45
AH9 VSS_46 VSS_145 BD48 K12 VSS_245
AJ11 VSS_47 VSS_146 BD5 K47 VSS_246
AJ13 VSS_48 VSS_147 BE1 K8 VSS_247
AJ21 VSS_49 VSS_148 BE19 L1 VSS_248
AJ24 VSS_50 VSS_149 BE23 L17 VSS_249
AJ29 VSS_51 VSS_150 BE30 L20 VSS_250
AJ32 VSS_52 VSS_151 BE42 L24 VSS_251
AJ43 VSS_53 VSS_152 BE51 L28 VSS_252
AJ45 VSS_54 VSS_153 BE8 L3 VSS_253
AJ49 VSS_55 VSS_154 BF12 L33 VSS_254
AK20 VSS_56 VSS_155 BF16 L49 VSS_255
AK21 VSS_57 VSS_156 BF36 M28 VSS_256
AK26 VSS_58 VSS_157 BG19 M42 VSS_257
AK28 VSS_59 VSS_158 BG2 M46 VSS_258
AK31 VSS_60 VSS_159 BG24 M49 VSS_259
AK51 VSS_61 VSS_160 BG29 M5 VSS_260
AL1 VSS_62 VSS_161 BG39 M50 VSS_261
AM11 VSS_63 VSS_162 BG48 M9 VSS_262
AM13 VSS_64 VSS_163 BG5 N11 VSS_263
AM3 VSS_65 VSS_164 BG51 N14 VSS_264
AM4 VSS_66 VSS_165 BH17 N17 VSS_265
B
AM41 VSS_67 VSS_166 BH30 N29 VSS_266 B
AM45 VSS_68 VSS_167 BH44 N32 VSS_267
AN1 VSS_69 VSS_168 BH46 N36 VSS_268
AN38 VSS_70 VSS_169 BH8 N39 VSS_269
AN39 VSS_71 VSS_170 BJ11 N44 VSS_270
AN43 VSS_72 VSS_171 BJ13 N49 VSS_271
AN5 VSS_73 VSS_172 BJ38 N7 VSS_272
AN7 VSS_74 VSS_173 BJ4 P19 VSS_273
AP4 VSS_75 VSS_174 BJ42 P2 VSS_274
AP48 VSS_76 VSS_175 BJ46 P23 VSS_275
AP50 VSS_77 VSS_176 BK15 P3 VSS_276
AR11 VSS_78 VSS_177 BK17 P50 VSS_277
AR2 VSS_79 VSS_178 BK25 R49 VSS_278
AR39 VSS_80 VSS_179 BK29 T39 VSS_279
AR44 BK36 T43

om
VSS_81 VSS_180 VSS_280
AR47 VSS_82 VSS_181 BK40 T47 VSS_281
AR7 VSS_83 VSS_182 BK44 U41 VSS_282

l.c
AT10 VSS_84 VSS_183 BK6 U45 VSS_283
AT14 BK8 U50

ai
VSS_85 VSS_184 VSS_284
AT41 VSS_86 VSS_185 BL11 V2 VSS_285

tm
AT49 VSS_87 VSS_186 BL13 V3 VSS_286
AU1 VSS_88 VSS_187 BL19

ho
AU23 VSS_89 VSS_188 BL22
AU29 BL37 CRESTLINE_1p0
VSS_90 VSS_189

f@
AU3 VSS_91 VSS_190 BL47
AU36 VSS_92 VSS_191 C12

in
AU49 VSS_93 VSS_192 C16
AU51 C19

xa
VSS_94 VSS_193
AV39 VSS_95 VSS_194 C28

he
AV48 VSS_96 VSS_195 C29
A AW1 VSS_97 VSS_196 C33 A
AW12 VSS_98 VSS_197 C36
AW16 VSS_99 VSS_198 C41

CRESTLINE_1p0
PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
Crestline (VSS) 1A

Date: Friday, September 28, 2007 Sheet 11 of 44


5 4 3 2 1
5 4 3 2 1

Strap table
All strap are sampled with respect to the leading edge of the GMCH Power OK(PWROK) Signal
CFG[17:3] Have internal Pull-up
CFG[18:19] Have internal Pull-down
12
Any CFG signal strapping option not list below should be left NC Pin

Pin Name Strap description Configuration

CFG[2:0] FSB Frequency Select 010 = FSB 800MHz


D 011 = FSB 667MHz D

CFG[4:3] Reserved

CFG5 DMI X2 Select 0 = DMI X2


1 = DMI X4(Default)

CFG6 Reserved

CFG7 CPU Strap 0 = Reserved


1 = Mobile CPU(Default)

CFG8 Low power PCI Express 0 = Normal mode


1 = Low Power mode

CFG9 PCI Express Graphics Lane Reversal 0 = Reverse Lanes


1 = Normal operation(Default)

CFG[11:10] Reserved
C C
CFG[13:12] XOR/ALLZ 00 = Reserved
01 = XOR Mode Enable
10 = All-Z Mode Enabled
11 = Normal operation(Default)

CFG[15:14] Reserved

CFG16 FSB Dynamic ODT 0 = Dynamic ODT disable


1 = Dynamic ODT Enable(Default)

CFG[18:17] Reserved

SDVO_CTRLDATA SDVO Present 0 = No SDVO Card present(Default)


1 = SDVO Card Present

CFG19 DMI Lane Reversal 0 = Normal operation(Default)


1 = Reverse Lanes

CFG20 SDVO/PCIe concurrent 0 = Only SDVO or PCIE x1 is operation(Default)


1 = SDVO and PCIE x1 are operating simultaneously via the PEG port
B B

DMI X2 Select DMI Lane Reversal XOR /ALLz /Clock Un-gating PCI Express Graphics SDVO Present

MCH_CFG_5 Low = DMIX2 MCH_CFG_19 Low = Normal operation(Default) MCH_CFG_12 MCH_CFG_13 Configuration MCH_CFG_9 Low = Reverse Lane Strap define at External
High = IDMIX4(Default) High = Reverse Lane High = Normal operation(Default)
DVI control page
0 0 Clock gating disable

7 CFG5
0 1 XOR Mode Enable

1 0 ALL-z Mode Enable


R81

*4.02K/F 1 1 Normal operation(Default)

FSB Dynamic ODT SDVO/PCIE Concurrent operation


Low = Only SDVO or PCIE X1 is
MCH_CFG_16 Low = ODT Disable MCH_CFG_20 operational(Default)
7 CFG12
High = ODT Enable(Default) High = SDVO andPCIE X1 are operating 7 CFG13
simultaneously via the PEG port

A A
7 CFG16 +3V R82 R75

*4.02K/F *4.02K/F

R70

*4.02K/F R71 PROJECT : SW7


*4.02K/F
Quanta Computer Inc.
Size Document Number Rev
7 CFG20 GMCH STRAP 1A

Date: Friday, September 28, 2007 Sheet 12 of 44


5 4 3 2 1
1 2 3 4 5 6 7 8

DDRII DUAL CHANNEL A,B. 13


A A

DDRII A CHANNEL DDRII B CHANNEL


DDR_B_MA[13..0]
DDR_A_MA[13..0] DDR_B_MA[13..0] 8,14
DDR_A_MA[13..0] 8,14
+0.9V_DDR_VTT
+0.9V_DDR_VTT 40
+0.9V_DDR_VTT
+0.9V_DDR_VTT

C98 C121 C131 C130 C129 C36 C62 C124 C120 C123 C57 C37 C122
C102 C38 C39 C59 C40 C100 C60 C103 C58 C101 C99 C61 C125 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V
0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V

Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
+0.9V_DDR_VTT
RP23 RP13
B B
DDR_A_MA7 2 1 1 2 DDR_B_MA7
DDR_A_MA11 4 3 3 4 DDR_B_MA11

4P2R-S-56 4P2R-S-56
RP22 RP12
DDR_A_MA6 2 1 1 2 DDR_B_MA6
DDR_A_MA4 4 3 3 4 DDR_B_MA4

4P2R-S-56 4P2R-S-56
RP20 RP10
8,14 DDR_A_BS1 DDR_A_BS1 2 1 1 2 DDR_B_BS1
DDR_B_BS1 8,14
8,14 DDR_A_RAS# DDR_A_RAS# 4 3 3 4 DDR_B_RAS#
DDR_B_RAS# 8,14
4P2R-S-56 4P2R-S-56
RP19 RP9
DDR_A_MA13 2 1 1 2 DDR_B_MA13
M_ODT0 4 3 3 4 M_ODT2
7,14 M_ODT0 M_ODT2 7,14
4P2R-S-56 4P2R-S-56
RP25 RP16
DDR_A_MA12 2 1 1 2 DDR_B_MA3
8,14 DDR_A_BS2 DDR_A_BS2 4 3 3 4 DDR_B_MA1

C 4P2R-S-56 4P2R-S-56 C
RP24 RP18
DDR_A_MA8 2 1 1 2 DDR_B_MA9
DDR_A_MA9 4 3 3 4 DDR_B_MA12
Please these resistor Please these resistor
closely DIMMA,all 4P2R-S-56 4P2R-S-56 closely DIMMB,all
RP28 RP17
trace length<750 mil. DDR_A_MA5 2 1 1 2 DDR_B_MA5 trace length<750 mil.
DDR_A_MA3 4 3 3 4 DDR_B_MA8

4P2R-S-56 4P2R-S-56
RP27 RP15
DDR_A_BS0 2 1 1 2 DDR_B_MA10
8,14 DDR_A_BS0
DDR_A_MA10 4 3 3 4 DDR_B_BS0
DDR_B_BS0 8,14
4P2R-S-56 4P2R-S-56
RP26 RP14
DDR_A_WE# 2 1 1 2 DDR_B_CAS#
8,14 DDR_A_WE# DDR_B_CAS# 8,14
DDR_A_CAS# 4 3 3 4 DDR_B_WE#
8,14 DDR_A_CAS# DDR_B_WE# 8,14
4P2R-S-56 4P2R-S-56
RP21 RP11
DDR_A_MA2 2 1 1 2 DDR_B_MA2
DDR_A_MA0 4 3 3 4 DDR_B_MA0

om
D D
4P2R-S-56 4P2R-S-56

l.c
R8 2 1 56 R25 2 1 56 PROJECT : SW7

ai
7,14 DDR_B_MA14 DDR_A_MA14 7,14
R32 1 2 56 R12 2 1 56
7,14 M_ODT1 M_ODT3 7,14

tm
DDR_A_MA1 R34 1 2 56 R14 2 1 56
R24 1 2 56 R10 2 1 56
DDR_B_BS2 8,14
Quanta Computer Inc.

ho
7,14 DDR_CS0_DIMMA# DDR_CS2_DIMMB# 7,14
R33 1 2 56 R13 2 1 56
7,14 DDR_CS1_DIMMA# DDR_CS3_DIMMB# 7,14
R31 1 2 56 R15 2 1 56 Size Document Number Rev

f@
7,14 DDR_CKE0_DIMMA DDR_CKE2_DIMMB 7,14
R26 1 2 56 R9 2 1 56 1A
7,14 DDR_CKE1_DIMMA DDR_CKE3_DIMMB 7,14 DDRII RES.ARRAY

in
Date: Friday, September 28, 2007 Sheet 13 of 44

xa
1 2 3 4 5 6 7 8

he
PROJECT :
Quanta Com
1 2 3 4 5 6 7 8

14
+1.8VSUS +1.8VSUS +1.8VSUS +1.8VSUS
DDR_A_DM[0..7] 8
DDR_A_D[0..63] 8 DDR_B_DM[0..7] 8
DDR_A_DQS[0..7] 8 DDR_B_D[0..63] 8
DDR_A_DQS#[0..7] 8 DDR_B_DQS[0..7] 8
A DDR_A_MA[0..13] 8,13 DDR_B_DQS#[0..7] 8 A
JDIM8 JDIM7
DDR_B_MA[0..13] 8,13
V_DDR_MCH_REF 1 2 V_DDR_MCH_REF 1 2
VREF VSS46 7,40 V_DDR_MCH_REF VREF VSS46
3 4 DDR_A_D4 3 4 DDR_B_D4
DDR_A_D6 VSS47 DQ4 DDR_A_D0 DDR_B_D5 VSS47 DQ4 DDR_B_D1
5 DQ0 DQ5 6 5 DQ0 DQ5 6
C398 C405 DDR_A_D5 7 8 C67 C56 DDR_B_D0 7 8
0.1uF/10V 2.2uF/6.3V_6 DQ1 VSS15 DDR_A_DM0 0.1uF/10V 2.2uF/6.3V_6 DQ1 VSS15 DDR_B_DM0
9 VSS37 DM0 10 9 VSS37 DM0 10
DDR_A_DQS#0 11 12 DDR_B_DQS#0 11 12
DDR_A_DQS0 DQS#0 VSS5 DDR_A_D1 DDR_B_DQS0 DQS#0 VSS5 DDR_B_D6
13 14 13 14
15
DQS0
VSS48
DQ6
DQ7 16 DDR_A_D7 15
DQS0
VSS48
DQ6
DQ7 16 DDR_B_D3 Place these Caps near So-Dimm2.
DDR_A_D2 17 18 DDR_B_D2 17 18 +1.8VSUS
DDR_A_D3 DQ2 VSS16 DDR_A_D13 DDR_B_D7 DQ2 VSS16 DDR_B_D12
19 DQ3 DQ12 20 19 DQ3 DQ12 20
21 22 DDR_A_D9 21 22 DDR_B_D13
DDR_A_D12 VSS38 DQ13 DDR_B_D8 VSS38 DQ13
23 DQ8 VSS17 24 23 DQ8 VSS17 24
DDR_A_D8 25 26 DDR_A_DM1 DDR_B_D9 25 26 DDR_B_DM1
DQ9 DM1 DQ9 DM1
27 VSS49 VSS53 28 27 VSS49 VSS53 28
DDR_A_DQS#1 29 30 DDR_B_DQS#1 29 30 C148 C134 C133 C393 C135 C411 C85 C83
DQS#1 CK0 M_CLK_DDR0 7 DQS#1 CK0 M_CLK_DDR2 7
DDR_A_DQS1 31 32 DDR_B_DQS1 31 32 2.2uF/6.3V_6 2.2uF/6.3V_6 2.2uF/6.3V_6 2.2uF/6.3V_6 2.2uF/6.3V_6 0.1uF/10V 0.1uF/10V 0.1uF/10V
DQS1 CK0# M_CLK_DDR#0 7 DQS1 CK0# M_CLK_DDR#2 7
33 VSS39 VSS41 34 33 VSS39 VSS41 34
DDR_A_D10 35 36 DDR_A_D14 DDR_B_D11 35 36 DDR_B_D14
DDR_A_D11 DQ10 DQ14 DDR_A_D15 DDR_B_D10 DQ10 DQ14 DDR_B_D15
37 DQ11 DQ15 38 37 DQ11 DQ15 38
39 VSS50 VSS54 40 39 VSS50 VSS54 40
PC4800 DDR2 SDRAM

41 VSS18 VSS20 42 41 VSS18 VSS20 42


DDR_A_D16 43 44 DDR_A_D20 DDR_B_D20 43 44 DDR_B_D16 +1.8VSUS
DDR_A_D17 DQ16 DQ20 DDR_A_D21 DDR_B_D17 DQ16 DQ20 DDR_B_D21
45 DQ17 DQ21 46 45 DQ17 DQ21 46
R19 0

PC4800 DDR2 SDRAM


47 VSS1 VSS6 48 47 VSS1 VSS6 48
DDR_A_DQS#2 49 50 PM_EXTTS#0_R 1 2 PM_EXTTS#0 7 DDR_B_DQS#2 49 50 PM_EXTTS#0_R
DDR_A_DQS2 DQS#2 NC3 DDR_A_DM2 DDR_B_DQS2 DQS#2 NC3 DDR_B_DM2
SO-DIMM (200P)

51 DQS2 DM2 52 51 DQS2 DM2 52


53 VSS19 VSS21 54 53 VSS19 VSS21 54
DDR_A_D23 55 56 DDR_A_D18 DDR_B_D19 55 56 DDR_B_D18 C399 C407 C408 C409 C410 C87 C88 C86 C84 C82
DDR_A_D19 DQ18 DQ22 DDR_A_D22 DDR_B_D22 DQ18 DQ22 DDR_B_D23 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V
57 DQ19 DQ23 58 57 DQ19 DQ23 58

SO-DIMM (200P)
59 VSS22 VSS24 60 59 VSS22 VSS24 60
DDR_A_D24 61 62 DDR_A_D28 DDR_B_D29 61 62 DDR_B_D28
B DDR_A_D25 DQ24 DQ28 DDR_A_D29 DDR_B_D25 DQ24 DQ28 DDR_B_D24 B
63 DQ25 DQ29 64 63 DQ25 DQ29 64
65 VSS23 VSS25 66 65 VSS23 VSS25 66
DDR_A_DM3 67 68 DDR_A_DQS#3 DDR_B_DM3 67 68 DDR_B_DQS#3
DM3 DQS#3 DDR_A_DQS3 DM3 DQS#3 DDR_B_DQS3 +3V
69 NC4 DQS3 70 69 NC4 DQS3 70
71 VSS9 VSS10 72 71 VSS9 VSS10 72 SO-DIMM BYPASS PLACEMENT :
DDR_A_D26 73 74 DDR_A_D30 DDR_B_D26 73 74 DDR_B_D31
DQ26 DQ30 DQ26 DQ30
DDR_A_D27 75 DQ27 DQ31 76 DDR_A_D31 DDR_B_D27 75 DQ27 DQ31 76 DDR_B_D30 Place these Caps near So-Dimm2
77 VSS4 VSS8 78 77 VSS4 VSS8 78
7,13 DDR_CKE0_DIMMA 79 CKE0 CKE1 80 DDR_CKE1_DIMMA 7,13 7,13 DDR_CKE2_DIMMB 79 CKE0 CKE1 80 DDR_CKE3_DIMMB 7,13
C128 C119 No Vias Between the Trace of PIN to CAP.
81 82 81 82 2.2uF/6.3V_6 0.1uF/10V
VDD7 VDD8 VDD7 VDD8
83 NC1 A15 84 83 NC1 A15 84
DDR_A_BS2 85 86 DDR_A_MA14 7,13 DDR_B_BS2 85 86 DDR_B_MA14 7,13
8,13 DDR_A_BS2 A16_BA2 A14 8,13 DDR_B_BS2 A16_BA2 A14
87 VDD9 VDD11 88 87 VDD9 VDD11 88
DDR_A_MA12 89 90 DDR_A_MA11 DDR_B_MA12 89 90 DDR_B_MA11
DDR_A_MA9 A12 A11 DDR_A_MA7 DDR_B_MA9 A12 A11 DDR_B_MA7
91 A9 A7 92 91 A9 A7 92
DDR_A_MA8 93 94 DDR_A_MA6 DDR_B_MA8 93 94 DDR_B_MA6
A8 A6 A8 A6
95 VDD5 VDD4 96 95 VDD5 VDD4 96
DDR_A_MA5 97 98 DDR_A_MA4 DDR_B_MA5 97 98 DDR_B_MA4
DDR_A_MA3 A5 A4 DDR_A_MA2 DDR_B_MA3 A5 A4 DDR_B_MA2
99 A3 A2 100 99 A3 A2 100
DDR_A_MA1 101 102 DDR_A_MA0 DDR_B_MA1 101 102 DDR_B_MA0
A1 A0 A1 A0
103 VDD10 VDD12 104 103 VDD10 VDD12 104
DDR_A_MA10 105 106 DDR_A_BS1 DDR_B_MA10 105 106 DDR_B_BS1
A10/AP BA1 DDR_A_BS1 8,13 A10/AP BA1 DDR_B_BS1 8,13
DDR_A_BS0 107 108 DDR_A_RAS# DDR_B_BS0 107 108 DDR_B_RAS#
8,13 DDR_A_BS0 BA0 RAS# DDR_A_RAS# 8,13 8,13 DDR_B_BS0 BA0 RAS# DDR_B_RAS# 8,13
DDR_A_WE# 109 110 DDR_B_WE# 109 110
8,13 DDR_A_WE# WE# S0# DDR_CS0_DIMMA# 7,13 8,13 DDR_B_WE# WE# S0# DDR_CS2_DIMMB# 7,13
111 112 111 112 +1.8VSUS
8,13 DDR_A_CAS#
DDR_A_CAS# 113
VDD2
CAS#
VDD1
ODT0 114 M_ODT0
M_ODT0 7,13 8,13 DDR_B_CAS#
DDR_B_CAS# 113
VDD2
CAS#
VDD1
ODT0 114 M_ODT2
M_ODT2 7,13
Place these Caps near So-Dimm1.
115 116 DDR_A_MA13 115 116 DDR_B_MA13
7,13 DDR_CS1_DIMMA# S1# A13 7,13 DDR_CS3_DIMMB# S1# A13
117 VDD3 VDD6 118 117 VDD3 VDD6 118
M_ODT1 119 120 M_ODT3 119 120
7,13 M_ODT1 ODT1 NC2 7,13 M_ODT3 ODT1 NC2
121 VSS11 VSS12 122 121 VSS11 VSS12 122
DDR_A_D37 123 124 DDR_A_D36 DDR_B_D32 123 124 DDR_B_D36 C391 C395 C390 C394 C392 C30 C73 C72
DDR_A_D33 DQ32 DQ36 DDR_A_D32 DDR_B_D33 DQ32 DQ36 DDR_B_D37 2.2uF/6.3V_6 2.2uF/6.3V_6 2.2uF/6.3V_6 2.2uF/6.3V_6 2.2uF/6.3V_6 0.1uF/10V 0.1uF/10V 0.1uF/10V
125 DQ33 DQ37 126 125 DQ33 DQ37 126
127 VSS26 VSS28 128 127 VSS26 VSS28 128
C DDR_A_DQS#4 129 130 DDR_A_DM4 DDR_B_DQS#4 129 130 DDR_B_DM4 C
DDR_A_DQS4 DQS#4 DM4 DDR_B_DQS4 DQS#4 DM4
131 DQS4 VSS42 132 131 DQS4 VSS42 132
133 134 DDR_A_D35 133 134 DDR_B_D38
DDR_A_D39 VSS2 DQ38 DDR_A_D38 DDR_B_D34 VSS2 DQ38 DDR_B_D39
135 DQ34 DQ39 136 135 DQ34 DQ39 136
DDR_A_D34 137 138 DDR_B_D35 137 138
DQ35 VSS55 DDR_A_D44 DQ35 VSS55 DDR_B_D44 +1.8VSUS
139 VSS27 DQ44 140 139 VSS27 DQ44 140
DDR_A_D41 141 142 DDR_A_D45 DDR_B_D40 141 142 DDR_B_D45
DDR_A_D40 DQ40 DQ45 DDR_B_D41 DQ40 DQ45
143 DQ41 VSS43 144 143 DQ41 VSS43 144
145 146 DDR_A_DQS#5 145 146 DDR_B_DQS#5
DDR_A_DM5 VSS29 DQS#5 DDR_A_DQS5 DDR_B_DM5 VSS29 DQS#5 DDR_B_DQS5
147 DM5 DQS5 148 147 DM5 DQS5 148
149 VSS51 VSS56 150 149 VSS51 VSS56 150
DDR_A_D42 151 152 DDR_A_D43 DDR_B_D42 151 152 DDR_B_D46 C29 C28 C27 C79 C78 C77 C76 C75 C74
DDR_A_D46 DQ42 DQ46 DDR_A_D47 DDR_B_D43 DQ42 DQ46 DDR_B_D47 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V
153 DQ43 DQ47 154 153 DQ43 DQ47 154
155 VSS40 VSS44 156 155 VSS40 VSS44 156
DDR_A_D48 157 158 DDR_A_D52 DDR_B_D48 157 158 DDR_B_D52
DDR_A_D49 DQ48 DQ52 DDR_A_D53 DDR_B_D49 DQ48 DQ52 DDR_B_D53
159 DQ49 DQ53 160 159 DQ49 DQ53 160
161 VSS52 VSS57 162 161 VSS52 VSS57 162
163 NCTEST CK1 164 M_CLK_DDR1 7 163 NCTEST CK1 164 M_CLK_DDR3 7
165 VSS30 CK1# 166 M_CLK_DDR#1 7 165 VSS30 CK1# 166 M_CLK_DDR#3 7
DDR_A_DQS#6 167 168 DDR_B_DQS#6 167 168
DDR_A_DQS6 DQS#6 VSS45 DDR_A_DM6 DDR_B_DQS6 DQS#6 VSS45 DDR_B_DM6 +3V
169 DQS6 DM6 170 169 DQS6 DM6 170 SO-DIMM BYPASS PLACEMENT :
171 VSS31 VSS32 172 171 VSS31 VSS32 172
DDR_A_D50 173 DQ50 DQ54 174 DDR_A_D54 DDR_B_D50 173 DQ50 DQ54 174 DDR_B_D54 Place these Caps near So-Dimm1.
DDR_A_D51 175 176 DDR_A_D55 DDR_B_D51 175 176 DDR_B_D55
DQ51 DQ55 DQ51 DQ55
177 VSS33 VSS35 178 177 VSS33 VSS35 178 No Vias Between the Trace of PIN to CAP.
DDR_A_D56 179 180 DDR_A_D60 DDR_B_D56 179 180 DDR_B_D60 C63 C64
DDR_A_D61 DQ56 DQ60 DDR_A_D57 DDR_B_D57 DQ56 DQ60 DDR_B_D61 2.2uF/6.3V_6 0.1uF/10V
181 DQ57 DQ61 182 181 DQ57 DQ61 182
183 VSS3 VSS7 184 183 VSS3 VSS7 184
DDR_A_DM7 185 186 DDR_A_DQS#7 DDR_B_DM7 185 186 DDR_B_DQS#7
DM7 DQS#7 DDR_A_DQS7 DM7 DQS#7 DDR_B_DQS7
187 VSS34 DQS7 188 187 VSS34 DQS7 188
DDR_A_D62 189 190 DDR_B_D58 189 190
DDR_A_D59 DQ58 VSS36 DDR_A_D58 DDR_B_D59 DQ58 VSS36 DDR_B_D62
191 DQ59 DQ62 192 191 DQ59 DQ62 192
193 194 DDR_A_D63 193 194 DDR_B_D63
CLK_SDATA VSS14 DQ63 CLK_SDATA VSS14 DQ63 +3V
D 2,31 CLK_SDATA 195 SDA VSS13 196 195 SDA VSS13 196 D
CLK_SCLK 197 198 CLK_SCLK 197 198
2,31 CLK_SCLK SCL SA0 SCL SA0
199 200 199 200 R247 2 1 10K/F
+3V VDD(SPD) SA1 +3V VDD(SPD) SA1
2

DDR2_SODIMM(1-1734074-1) SMbus address A4 DDR2_SODIMM(2-1734073-2)


SMbus address A0 R20 R21 R246
10K/F 10K/F 10K/F <OrgName>
CLOCK 0,1 CLOCK 2,3
CKE 0,1 H 5.2 CKE 2,3 H 9.2 <OrgAddr1> PROJECT : SW7
1

<OrgAddr2>
<OrgAddr3>
Memory Socket PN: Memory Socket PN: <OrgAddr4> Quanta Computer Inc.
TYC: DGMK0000C0 (H=5.2mm, REV) FOX: DGMK00000C0 (H=5.2mm, REV) Size Document Number Rev
TYC: DGMK0002610 (H=9.2mm, REV) FOX: DGMK0002610 (H=9.2mm, REV) DDRII SO-DIMM(200P) 1A

Date: Friday, September 28, 2007 Sheet 14 of 44


1 2 3 4 5 6 7 8
5 4 3 2 1

CKL:C1/C2: 18pF -> CL:12.5pF


RTC VCCRTC

15
C294 C1/C: 10pF -> CL Value =
1uF/6.3V 8.5pF
VCCRTC
3VPCU
D14
CH501H-40PT R154
20K/F C537 CLK_32KX1
VCCRTC_2 12pF/50V +3V +3V

2
1
D13

1
R161 CH501H-40PT G7 C283 W7 R327
1K/F 1uF/6.3V 10M_6
R160 *SHORT_ PAD1 32.768KHZ R354 R351
D 1M/F U32A 10K/F 10K/F D

3
4
AG25 RTCX1 FWH0/LAD0 E5 LAD0/FWH0 31,33
C532 CLK_32KX2 AF24 F5 RCIN#
RTCX2 FWH1/LAD1 LAD1/FWH1 31,33 +1.05V_VCCP
12pF/50V G8 GATEA20
FWH2/LAD2 LAD2/FWH2 31,33
RTCRST# AF23 F6
RTCRST# FWH3/LAD3 LAD3/FWH3 31,33
1

BT7 SM_INTRUDER# AD22 C4 +1.05V_VCCP


INTRUDER# FWH4/LFRAME# LFRAME#/FWH4 31,33
BAT_CONN

RTC
LPC
SM_INTVRMEN AF25 G9 T15
2

LAN100_SLP INTVRMEN LDRQ0# R135 R137


AD21 LAN100_SLP LDRQ1#/GPIO23 E6
*56/F *56/F
B24 AF13 GATEA20
GLAN_CLK A20GATE GATEA20 33
AG26 R136
A20M# H_A20M# 3
D22 56
LAN_RSTSYNC H_DPRSTP#_R R138 0
DPRSTP# AF26 H_DPRSTP# 3,7,38
C21 AE26 H_DPSLP#_R R142 0
LAN_RXD0 DPSLP# H_DPSLP# 3
B21 LAN_RXD1
C22 LAN_RXD2 FERR# AD24 H_FERR# 3

LAN / GLAN
5VPCU
20MIL 20MIL D21 AG29 R322 0
H_PWRGOOD 3
Q18 LAN_TXD0 CPUPWRGD/GPIO49
E20 LAN_TXD1
R140 VCCRTC_1 R144 VCCRTC_3 3 1 C20 AF27
LAN_TXD2 IGNNE# H_IGNNE# 3
1K/F
1.2K_6 MMBT3904 AH21 AE24
GLAN_DOCK#/GPIO13 INIT# H_INIT# 3
R139 AC20 H_INTR 3
2

INTR

CPU
+1.5V_PCIE R159 24.9/F GLAN_COMP_SB D25 AH14 RCIN#
GLAN_COMPI RCIN# RCIN# 33
4.7K/F C25 GLAN_COMPO
NMI AD23 H_NMI 3
ACZ_BIT_CLK AJ16 AG28 H_SMI#_R R323 0
HDA_BIT_CLK SMI# H_SMI# 3
ACZ_SYNC AJ15 HDA_SYNC
STPCLK# AA24 H_STPCLK# 3
R143 ACZ_RST# AE14
C HDA_RST# THERMTRIP#_ICH R324 24.9/F C
THRMTRIP# AE27 PM_THRMTRIP# 3,7
15K AJ17
25 ICH_AZ_CODEC_SDIN0 HDA_SDIN0
ACZ_SDIN1 AH17 AA23
27 ACZ_SDIN1 HDA_SDIN1 TP8 T12 IDE_DD[15:0] 28
AH15 HDA_SDIN2 IDE_DD0

IHDA
AD13 HDA_SDIN3 DD0 V1
U2 IDE_DD1 Should be 2" close ICH7
ACZ_SDOUT DD1 IDE_DD2
AE13 HDA_SDOUT DD2 V3
T1 IDE_DD3 C528
DD3 IDE_DD4
29 LAN_DISABLE# AE10 HDA_DOCK_EN#/GPIO33 DD4 V4
AG14 T5 IDE_DD5 *SFI0603-050E101NP
+3V R185 10K/F HDA_DOCK_RST#/GPIO34 DD5 IDE_DD6
DD6 AB2
SATA_LED# AF10 T6 IDE_DD7
20 SATA_LED# SATALED# DD7
T3 IDE_DD8
C326 3900pF/25V SATA_RX0- DD8 IDE_DD9
28 SATA_RX0-C AF6 SATA0RXN DD9 R2
C332 3900pF/25V SATA_RX0+ AF5 T4 IDE_DD10
28 SATA_RX0+C SATA0RXP DD10
CKL:1n ~ 20nF C325 3900pF/25V SATA_TX0-_C AH5 V6 IDE_DD11 ACZ_SDOUT R184 33
28 SATA_TX0- SATA0TXN DD11 ICH_AZ_CODEC_SDOUT 25
C322 3900pF/25V SATA_TX0+_C AH6 V5 IDE_DD12
28 SATA_TX0+ SATA0TXP DD12
U1 IDE_DD13
DD13 IDE_DD14 C312
AG3 SATA1RXN DD14 V2
AG4 U6 IDE_DD15 *10pF/50V
SATA1RXP DD15

IDE
AJ4 SATA1TXN IDE_DA[2:0] 28
AJ3 AA4 IDE_DA0
SATA1TXP DA0 IDE_DA1 ACZ_SYNC R352 33
DA1 AA1 ICH_AZ_CODEC_SYNC 25

SATA
AF2 AB3 IDE_DA2
SATA2RXN DA2
AF1 SATA2RXP
AE4 Y6 C556
SATA2TXN DCS1# IDE_DCS1# 28
AE3 Y5 *10pF/50V
SATA2TXP DCS3# IDE_DCS3# 28

2 CLK_PCIE_SATA# AB7 SATA_CLKN DIOR# W4 IDE_DIOR# 28


2 CLK_PCIE_SATA AC6 SATA_CLKP DIOW# W3 IDE_DIOW# 28
Y2 ACZ_BIT_CLK R349 33
DDACK# IDE_DDACK# 28 ICH_AZ_CODEC_BITCLK 25
AG1 SATARBIAS# IDEIRQ Y3 IDE_IRQ 28
B R408 24.9/F_6 SATA_BIAS B
AG2 SATARBIAS IORDY Y1 IDE_DIORDY 28
Place within W5 C550
DDREQ IDE_DDREQ 28
25mils/15mils *10pF/50V
500 mils of ICH8M REV 1.0
ICH7
ACZ_RST# R176 33
ICH_AZ_CODEC_RST# 25
intel check list
SB Strap define to stuff
33ohm
XOR Chain Entrance Strap
ICH8-M Internal VR Enable ACZ_SDOUT R183 33
ACZ_SDOUT_AUDIO_MDC 27

om
strap ICH_RSV0 HDA_SDOUT Description C311
(Internal VR for *10pF/50V

l.c
ICH8-M LAN100_SLP Strap
Vccsus1_05,VccSus1_5 and (Internal VR for VccLAN1_05 and

ai
0 0 RSVD
VccCL1_5) VccCL1.05)

tm
ACZ_SYNC R353 33
ACZ_SYNC_AUDIO_MDC 27
Low = Internal VR disable 0 1 Enter XOR Chain

ho
Low = Internal VR disable LAN100_SLP High = Internal VR
INTVRMEN High = Internal VR enable(Default) C558

f@
enable(Default) 1 0 Normal opration(Default) *10pF/50V

in
1 1 Set PCIE port config bit 1

xa
ACZ_BIT_CLK R350 33
BIT_CLK_AUDIO_MDC 27

he
VCCRTC VCCRTC +3V
C554
*10pF/50V

A A
R155 R169 R182 ACZ_RST# R173 33
ACZ_RST#_AUDIO_MDC 27
332K/F 332K/F *1K

SM_INTVRMEN LAN100_SLP ACZ_SDOUT


ICH_TP3 17
PROJECT : SW7
R158 R168
*0 *0
R338 Quanta Computer Inc.
*1K
Size Document Number Rev
ICH8-M HOST(1/4) 1A

Date: Friday, September 28, 2007 Sheet 15 of 44


5 4 3 2 1
5 4 3 2 1

MINI CARD WLAN PCI-E


31
31
31
31
PCIE_RX1-
PCIE_RX1+
PCIE_TX1-
PCIE_TX1+
C523
C524
0.1uF/10V
0.1uF/10V
PCIE_TXN1_C
PCIE_TXP1_C
P27
P26
N29
N28
U32D
PERN1
PERP1
PETN1
DMI0RXN
DMI0RXP
DMI0TXN
V27
V26
U29
U28
DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_MRX_ITX_N0
DMI_MRX_ITX_P0
7
7

7
7
PCI Pullups

ICH_GPIO3_PIRQF# 6
RP35
5
+3V
16

Direct Media Interface


PETP1 DMI0TXP ICH_GPIO5_PIRQH# PCI_PERR#
7 4
M27 Y27 ICH_GPIO4_PIRQG# 8 3 PCI_SERR#
29 PCIE_RX2- PERN2 DMI1RXN DMI_MTX_IRX_N1 7
M26 Y26 9 2 PCI_PLOCK#
29 PCIE_RX2+ PERP2 DMI1RXP DMI_MTX_IRX_P1 7
C522 0.1uF/10V PCIE_TXN2_C
PCIE-LAN 29 PCIE_TX2-
C521 0.1uF/10V PCIE_TXP2_C
L29
L28
PETN2 DMI1TXN W29
W28
DMI_MRX_ITX_N1 7 +3V 10 1
29 PCIE_TX2+ PETP2 DMI1TXP DMI_MRX_ITX_P1 7
10P8R-8.2K

PCI-Express
K27 AB26 +3V
PERN3 DMI2RXN DMI_MTX_IRX_N2 7 RP34
D
K26 PERP3 DMI2RXP AB25 DMI_MTX_IRX_P2 7 D
J29 PETN3 DMI2TXN AA29 DMI_MRX_ITX_N2 7 6 5
J28 AA28 PCI_TRDY# 7 4 PCI_STOP#
PETP3 DMI2TXP DMI_MRX_ITX_P2 7
PCI_DEVSEL# 8 3 PCI_FRAME#
H27 AD27 PCI_REQ3# 9 2 PCI_REQ1#
PERN4 DMI3RXN DMI_MTX_IRX_N3 7
H26 AD26 +1.5V_PCIE 10 1 PCI_REQ2#
PERP4 DMI3RXP DMI_MTX_IRX_P3 7 +3V
G29 PETN4 DMI3TXN AC29 DMI_MRX_ITX_N3 7
G28 PETP4 DMI3TXP AC28 DMI_MRX_ITX_P3 7 10P8R-8.2K
+3V
RP36
F27 PERN5 DMI_CLKN T26 CLK_PCIE_ICH# 2
F26 T25 R167 PCI_PIRQC# 6 5
PERP5 DMI_CLKP CLK_PCIE_ICH 2
E29 24.9/F_6 PCI_PIRQB# 7 4 PCI_PIRQD#
PETN5 PCI_PIRQA# PCI_IRDY#
E28 PETP5 DMI_ZCOMP Y23 15/15mils 8 3
Y24 DMI_COMP Place within 500 9 2 ICH_GPIO2_PIRQE#
DMI_IRCOMP mils of ICH7 PCI_REQ0#
31 PCIE_RX6- D27 PERN6/GLAN_RXN +3V 10 1
31 PCIE_RX6+ D26 PERP6/GLAN_RXP USBP0N G3 USBP0- 32
C518 0.1uF/10V PCIE_TXN6_C Ext Right Side Top
EXPRESS CARD (NEW CARD) 31 PCIE_TX6-
C527 0.1uF/10V PCIE_TXP6_C
C29
C28
PETN6/GLAN_TXN USBP0P G2
H5
USBP0+ 32 10P8R-8.2K
31 PCIE_TX6+ PETP6/GLAN_TXP USBP1N USBP1- 32
USBP1P H4 USBP1+ 32 Ext Right Side
C23 SPI_CLK USBP2N H2 USBP2- 32
B23 SPI_CS0# USBP2P H1 USBP2+ 32 Ext Left Side RP33
SPI_CS1# E22 J3
SPI_CS1# USBP3N USBP3- 32

SPI
J2 CAMERA USBOC#6 6 5
USBP3P USBP3+ 32
D23 K5 USBOC#4 7 4 USBOC#1
SPI_MOSI USBP4N USBOC#3 USBOC#7
F21 SPI_MISO USBP4P K4 Dock 8 3
K2 USBOC#2 9 2 USBOC#0
USBP5N USBP5- 19
USBOC#0 AJ19 K1 Bluetooth 3V_S5 10 1 USBOC#5
OC0# USBP5P USBP5+ 19
USBOC#1 AG16 L3
OC1#/GPIO40 USBP6N USBP6- 31
USBOC#2 Mini Card WLAN
USBOC#3
AG15
AE15
OC2#/GPIO41 USB USBP6P L2
M5
USBP6+ 31 10P8R-10K
OC3#/GPIO42 USBP7N USBP7- 31
C USBOC#4 AF15 M4 Express Card C
OC4#/GPIO43 USBP7P USBP7+ 31
USBOC#5 AG17 M2 USBOC#8 R180 10K/F 3V_S5
USBOC#6 OC5#/GPIO29 USBP8N
AD12 OC6#/GPIO30 USBP8P M1
USBOC#7 AJ18 N3 USBOC#9 R348 10K/F 3V_S5
USBOC#8 OC7#/GPIO31 USBP9N
AD14 OC8# USBP9P N2
USBOC#9 AH18 OC9#
USBRBIAS# F2
F3 USBRBIAS CHECK LIST suggest pull up 10k
USBRBIAS
ICH8M REV 1.0 25mils/15mils
Place within 500 R401 A16 SWAP Override strap
mils of ICH7 22.6/F_6

PCI_GNT#3 Low = A16 swap override enabled


High = Default

PCI_GNT3# R190 *1K


U32B
23 PCI_AD[0..31]
PCI_AD0 D20 A4 PCI_REQ0#
AD0 REQ0# PCI_REQ0# 23
PCI_AD1 PCI_GNT0# ICH8 Boot BIOS select
PCI_AD2
E19
D19
AD1 PCI GNT0# D7
E18 PCI_REQ1#
PCI_GNT0# 23
PCI_AD3 AD2 REQ1#/GPIO50
A20 AD3 GNT1#/GPIO51 C18
PCI_AD4 D17 B19 PCI_REQ2# PCI_GNT#0 SPI_CS#1 Boot BIOS Location
PCI_AD5 AD4 REQ2#/GPIO52
A21 AD5 GNT2#/GPIO53 F18
PCI_AD6 A19 A11 PCI_REQ3#
PCI_AD7 AD6 REQ3#/GPIO54 PCI_GNT3# 0 1 SPI(Default)
C19 AD7 GNT3#/GPIO55 C10
PCI_AD8 A18
PCI_AD9 AD8
B
B16 AD9 C/BE0# C17 PCI_C_BE0# 23 B
PCI_AD10 A12 E15 1 0 PCI
AD10 C/BE1# PCI_C_BE1# 23
PCI_AD11 E16 F16
AD11 C/BE2# PCI_C_BE2# 23
PCI_AD12 A14 E17
AD12 C/BE3# PCI_C_BE3# 23
PCI_AD13 G16 1 1 LPC
PCI_AD14 AD13 PCI_IRDY#
A15 AD14 IRDY# C8 PCI_IRDY# 23
PCI_AD15 B6 D9
AD15 PAR PCI_PAR 23
PCI_AD16 C11 G6 PCI_RST# SPI_CS1# R166 *1K
AD16 PCIRST# PCI_RST# 23
PCI_AD17 A9 D16 PCI_DEVSEL#
AD17 DEVSEL# PCI_DEVSEL# 23
PCI_AD18 D11 A7 PCI_PERR# PCI_GNT0# R200 *1K
AD18 PERR# PCI_PERR# 23
PCI_AD19 B12 B7 PCI_PLOCK#
PCI_AD20 AD19 PLOCK# PCI_SERR#
C12 AD20 SERR# F10 PCI_SERR# 23,33
PCI_AD21 D10 C16 PCI_STOP#
AD21 STOP# PCI_STOP# 23
PCI_AD22 C7 AD22 TRDY# C9 PCI_TRDY#
PCI_TRDY# 23 PCI ROUTING
PCI_AD23
PCI_AD24
F13 AD23 FRAME# A17 PCI_FRAME#
PCI_FRAME# 23
TABLE IDSEL INTERUPT DEVICE
E11 AD24
PCI_AD25
PCI_AD26
E13 AD25 PLTRST# AG24 PLT_RST-R#
CLK_PCI_ICH
PLT_RST-R# 7,31 REQ0# / GNT0# AD25 INTE#,INTF# PCI7402
E12 AD26 PCICLK B10 CLK_PCI_ICH 2
PCI_AD27 D8 AD27 PME# G7 ICH_PME# 23
+3V
MINI PCI
PCI_AD28
PCI_AD29
A6 AD28 REQ1# / GNT1# AD22 INTC#,INTD# for debug
E8 AD29
PCI_AD30 D6
PCI_AD31 AD30
A3 AD31 C304

PCI_PIRQA# F9
Interrupt I/F F8 ICH_GPIO2_PIRQE# 0.1uF/10V
PIRQA# PIRQE#/GPIO2 ICH_GPIO2_PIRQE# 23
PCI_PIRQB# B5 G11 ICH_GPIO3_PIRQF# U13
PIRQB# PIRQF#/GPIO3 ICH_GPIO3_PIRQF# 23
5

PCI_PIRQC# C5 F12 ICH_GPIO4_PIRQG#


PCI_PIRQD# PIRQC# PIRQG#/GPIO4 ICH_GPIO5_PIRQH# PLT_RST-R#
A10 PIRQD# PIRQH#/GPIO5 B3 2
4 PLTRST# 17,28,29,31,33
A ICH8M REV 1.0 1 A

TC7SH08FU
3

PROJECT : SW7
C561
CLK_PCI_ICH R369 *0 *33pF/50V
Quanta Computer Inc.
for EMI request Size Document Number Rev
ICH8-M M PCI E(2/4) 1A

Date: Friday, September 28, 2007 Sheet 16 of 44


5 4 3 2 1
5 4 3 2 1

3V_S5 +3V
5VSUS

R341

38 VR_PWRGD_CK410#
10K/F

1
2
U31
+3V

5 C551 0.1uF/10V
3V_S5

3
1
RP32

4P2R-S-2.2K
4
2
CL_RST#1
SMBALERT# 3V_S5
ICH_RI#
DNBSWON#
SWI#
R177
R403
R178
8.2K
10K/F
10K/F

3VSUS
CLKRUN#
SERIRQ
SCI#_R
KBSMI#_R
R362
R363
R375
R371
8.2K
8.2K
10K/F
10K/F
17
3 4 VR_PWRGD ICH_SMLINK0 R179 10K/F RSMRST# R149 10K/F
ICH_SMLINK1 R175 10K/F
NL17SZ14DFT2G 3V_S5 ICH_PCIE_WAKE# R174 1K/F ME_SMC_ALERT# R334 10K/F VR_PWRGD R337 1 2 100K/F
PM_BATLOW#_R R162 8.2K
RP31 ITP_DBRESET# R181 8.2K
3 4 ICH_SMBDATA
D 1 2 ICH_SMBCLK D

4P2R-S-2.2K
CLK_ICH_14M
U32C
ICH_SMBCLK AJ26 AJ12 BOARD_ID1 CLK_ICH_48M
2,31 ICH_SMBCLK SMBCLK SATA0GP/GPIO21
ICH_SMBDATA AD19 AJ10 BOARD_ID0
2,31 ICH_SMBDATA SMBDATA SATA1GP/GPIO19
CL_RST#1 BOARD_ID3

SATA
AG21 AF11

GPIO
31 CL_RST#1 LINKALERT# SATA2GP/GPIO36

SMB
+3V ICH_SMLINK0 AC17 AG11 BOARD_ID4 R196 R202
ICH_SMLINK1 SMLINK0 SATA3GP/GPIO37 *33 33
AE19 SMLINK1
AG9 CLK_ICH_14M
CLK14 CLK_ICH_14M 2
ICH_RI# CLK_ICH_48M

Clocks
AF17 RI# CLK48 G5 CLK_ICH_48M 2 9/4 add for
EMI item 1.
F4 D3 T16 C316 C327
23 SUS_STAT# SUS_STAT#/LPCPD# SUSCLK
R172 R343 ITP_DBRESET# AD15 *10pF/50V 10pF/50V
3 ITP_DBRESET# SYS_RESET#
*10K/F *10K/F AG23 R336 100
SLP_S3# SUSB# 33
AG12 AF21 R170 100
7 PM_BMBUSY# BMBUSY#/GPIO0 SLP_S4# SUSC# 33
SLP_S5# AD18
SMBALERT# AG22 SMBALERT#/GPIO11
S4_STATE#/GPIO26 AH27

GPIO
2 H_STP_PCI# AE20 STP_PCI#/GPIO15

SYS
AG18 AE23 ICH_PWROK R355 *100K
2 H_STP_CPU# STP_CPU#/GPIO25 PWROK
CLKRUN# AH11 AJ14 DPRSLPVR-ICH R356 475/F
23,33 CLKRUN# CLKRUN#/GPIO32 DPRSLPVR/GPIO16 PM_DPRSLPVR 7,38

Power MGT
ICH_PCIE_WAKE# AE17 AE21 PM_BATLOW#_R R164 0 LAN_RST pin : 1.if used pci
29,31 ICH_PCIE_WAKE# WAKE# BATLOW# BATLOW# 33
SERIRQ AF12 DNBSWON#
23,33 SERIRQ SERIRQ DNBSWON# 33 LAN please tie to PLTRST#
AC13 C2 C547 *0.1uF/10V
5 THERM_ALERT# THRM# PWRBTN#
2.if used PHY LAN please tie
C VR_PWRGD AJ20 AH20 PLTRST_LAN# R340 100 C
+3V R187 8.2K VRMPWRGD LAN_RST# PLTRST# 16,28,29,31,33 to RSMRST#
AJ22 AG27 RSMRST#
T25 TP7 RSMRST# RSMRST# 33
AJ8 E1 R405 0
TACH1/GPIO1 CK_PWRGD CK_PWG 2
KBSMI# R372 0 KBSMI#_R AJ9
33 KBSMI# TACH2/GPIO6
SCI# R376 0 SCI#_R AH9 E3 R404 0
33 SCI# TACH3/GPIO7 CLPWROK ECPWROK 7,33
SWI# AE16
33 SWI# GPIO8
AC19 AJ25 SUSM# 3V_S5 +3V
GPIO12 SLP_M# T24
AG8 TACH0/GPIO17
T14 AH12 GPIO18 CL_CLK0 F23 CL_CLK0 7
AE11 GPIO20 CL_CLK1 AE18 ICH_CL_CLK1 31

GPIO
Controller Link
BOARD_ID2 AG10 SCLOCK/GPIO22 R152 R163
AH25 QRT_STATE0/GPIO27 CL_DATA0 F22 CL_DATA0 7
AD16 AF19 3.24K/F_6 3.24K/F_6
QRT_STATE1/GPIO28 CL_DATA1 ICH_CL_DATA1 31
AG13 SATACLKREQ#/GPIO35
BOARD_ID5 AF9 D24 CL_VREF0_SB
+3V R361 10K/F SLOAD/GPIO38 CL_VREF0 CL_VREF1_SB
AJ11 SDATAOUT0/GPIO39 CL_VREF1 AH23
R199 10K/F AD10 SDATAOUT1/GPIO48
CL_RST# AJ23 CL_RST#0 7
AD9 C295
26 SPKR SPKR
AJ27 T23 C288 R165
MEM_LED/GPIO24

MISC
R357 0 MCH_ICH_SYNC#_R AJ13 AJ24 ME_SMC_ALERT# R153 453/F 0.1uF/10V
7 MCH_ICH_SYNC# MCH_SYNC# ME_EC_ALERT/GPIO10
AF22 453/F 0.1uF/10V
15 ICH_TP3 EC_ME_ALERT/GPIO14
AJ21 AG19 T11
+3V R360 *10K TP3 WOL_EN/GPIO9 T13
ICH8M REV 1.0
Controller Link 0
B
Controller Link 1 VREF for IAMT B
3VSUS
VREF for IAMT support only
CRB STUFF support only
No Reboot strap 2K%1 C274 0.047uF/10V

Low = Default +3V R145 2K/F


HDA_SPKR High = No
5

MBID0 Reboot U11


7,38 DELAY_VR_PWRGOOD 2
Low ICH_PWROK
RESERVE ECPWROK 1
4

RESERVE High
+3V TC7SH08FU R146
3

R141 100K/F
MBID1 10K/F
SPKR R186 *1K/F
TW7 Low

om
SW7 High

l.c
BOARD ID Selection

ai
MBID2
+3V +3V +3V +3V +3V

tm
W/ MODEM Low +3V

ho
1

W/O MODEM High

f@
R366 R359 R370 R192 R188 R191
MBID3 10K 10K/F *10K/F *10K *10K/F 10K/F

in
A A
2

xa
W/ MIC Low

2
BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4 BOARD_ID5

he
W/O MIC High MBID5
1

1
R195 PROJECT : SW7
MBID4 DVI Low R365 R358 R364 R193 R189 *10K/F
*10K/F *10K 10K/F 10K/F 10K/F
PR NA Low Quanta Computer Inc.
2

2
CRT High
PR on High Size Document Number Rev
ICH8-M GPIO(3/4) 1A

Date: Friday, September 28, 2007 Sheet 17 of 44


5 4 3 2 1
5 4 3 2 1

3V_S5 +3V
VCCRTC
C287 C300 C301 +1.05V_VCCP
18

2
D16 D15
1uF/6.3V 0.1uF/10V 0.1uF/10V U32F
AD25 VCCRTC VCC1_05[01] A13
CH501H-40PT CH501H-40PT B13
VCC1_05[02]
A16 C13

1
U32E R211 10_6 +5V R194 100_6 +5VREF_SB V5REF[1] VCC1_05[03] C308 C310
5V_S5 T7 V5REF[2] VCC1_05[04] C14
A23 K7 D14 +1.5V_RUN
VSS[001] VSS[099] C324 C318 +5VREF_SUS_SB VCC1_05[05] 0.047uF/10V 0.047uF/10V
A5 VSS[002] VSS[100] L1 G4 V5REF_SUS VCC1_05[06] E14
AA2 VSS[003] VSS[101] L13 VCC1_05[07] F14
AA7 L15 0.1uF/10V 0.1uF/10V AA25 G14
VSS[004] VSS[102] VCC1_5_B[01] VCC1_05[08]
A25 VSS[005] VSS[103] L26 AA26 VCC1_5_B[02] VCC1_05[09] L11
AB1 VSS[006] VSS[104] L27 AA27 VCC1_5_B[03] VCC1_05[10] L12
D AB24 VSS[007] VSS[105] L4 AB27 VCC1_5_B[04] VCC1_05[11] L14 D
AC11 L5 AB28 L16 VCCDMIPLL_ICH L44 R321 1_8
VSS[008] VSS[106] +1.5V_PCIE VCC1_5_B[05] VCC1_05[12]
AC14 VSS[009] VSS[107] M12 AB29 VCC1_5_B[06] VCC1_05[13] L17
AC25 M13 D28 L18 1uH/800mA_12
VSS[010] VSS[108] L23 VCC1_5_B[07] VCC1_05[14] C515 C525
AC26 VSS[011] VSS[109] M14 D29 VCC1_5_B[08] VCC1_05[15] M11

CORE
AC27 VSS[012] VSS[110] M15 +1.5V_RUN E25 VCC1_5_B[09] VCC1_05[16] M18
AD17 M16 E26 P11 0.01uF/25V 10U/6.3V_8
VSS[013] VSS[111] BLM21PG220SN1D + C275 C284 C297 C293 C285 C296 VCC1_5_B[10] VCC1_05[17]
AD20 VSS[014] VSS[112] M17 E27 VCC1_5_B[11] VCC1_05[18] P18
AD28 VSS[015] VSS[113] M23 F24 VCC1_5_B[12] VCC1_05[19] T11
AD29 M28 220U/2.5V_B 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 2.2uF/6.3V_6 F25 T18 +1.25V
VSS[016] VSS[114] VCC1_5_B[13] VCC1_05[20]
AD3 VSS[017] VSS[115] M29 G24 VCC1_5_B[14] VCC1_05[21] U11
AD4 VSS[018] VSS[116] M3 H23 VCC1_5_B[15] VCC1_05[22] U18
AD6 N1 +1.5V_RUN H24 V11 +1.05V_VCCP
VSS[019] VSS[117] VCC1_5_B[16] VCC1_05[23]
AE1 VSS[020] VSS[118] N11 J23 VCC1_5_B[17] VCC1_05[24] V12
AE12 N12 J24 V14 C519
VSS[021] VSS[119] VCC1_5_B[18] VCC1_05[25] C520 10U/6.3V_8
AE2 VSS[022] VSS[120] N13 K24 VCC1_5_B[19] VCC1_05[26] V16
AE22 VSS[023] VSS[121] N14 K25 VCC1_5_B[20] VCC1_05[27] V17
AD1 N15 L23 V18 10U/6.3V_8
VSS[024] VSS[122] VCC1_5_B[21] VCC1_05[28] C291 C298 C279
AE25 VSS[025] VSS[123] N16 L24 VCC1_5_B[22]

VCCA3GP
AE5 N17 R171 +1.5V_SATA R378 +1.5V_APLL_RR L53 10uH/100MA_8 +1.5V_APLL L25 R29
VSS[026] VSS[124] VCC1_5_B[23] VCCDMIPLL 0.1uF/10V 0.1uF/10V 4.7uF/6.3V_6
AE6 VSS[027] VSS[125] N18 M24 VCC1_5_B[24]
AE9 N26 0_8 1_8 C576 C575 M25 AE28
VSS[028] VSS[126] VCC1_5_B[25] VCC_DMI[1]
AF14 VSS[029] VSS[127] N27 N23 VCC1_5_B[26] VCC_DMI[2] AE29
AF16 N4 10U/6.3V_8 1uF/6.3V N24 +3V
VSS[030] VSS[128] VCC1_5_B[27]
AF18 VSS[031] VSS[129] N5 N25 VCC1_5_B[28] V_CPU_IO[1] AC23
AF3 VSS[032] VSS[130] N6 P24 VCC1_5_B[29] V_CPU_IO[2] AC24
AF4 VSS[033] VSS[131] P12 P25 VCC1_5_B[30]
AG5 VSS[034] VSS[132] P13 R24 VCC1_5_B[31] VCC3_3[01] AF29
AG6 VSS[035] VSS[133] P14 R25 VCC1_5_B[32]
AH10 VSS[036] VSS[134] P15 R26 VCC1_5_B[33] VCC3_3[02] AD2
AH13 VSS[037] VSS[135] P16 R27 VCC1_5_B[34]
AH16 VSS[038] VSS[136] P17 T23 VCC1_5_B[35] VCC3_3[03] AC8
AH19 VSS[039] VSS[137] P23 T24 VCC1_5_B[36] VCC3_3[04] AD8

VCCP_CORE
AH2 P28 T27 AE8 C338 C281
VSS[040] VSS[138] VCC1_5_B[37] VCC3_3[05]
C
AF28 VSS[041] VSS[139] P29 T28 VCC1_5_B[38] VCC3_3[06] AF8 C
AH22 R11 T29 0.1uF/10V 0.1uF/10V
VSS[042] VSS[140] C570 VCC1_5_B[39]
AH24 VSS[043] VSS[141] R12 U24 VCC1_5_B[40] VCC3_3[07] AA3
AH26 VSS[044] VSS[142] R13 U25 VCC1_5_B[41] VCC3_3[08] U7
AH3 R14 1uF/6.3V V23 V7 C339
VSS[045] VSS[143] VCC1_5_B[42] VCC3_3[09]
AH4 VSS[046] VSS[144] R15 V24 VCC1_5_B[43] VCC3_3[10] W1
AH8 R16 V25 W6 0.1uF/10V

IDE
VSS[047] VSS[145] VCC1_5_B[44] VCC3_3[11]
AJ5 VSS[048] VSS[146] R17 W25 VCC1_5_B[45] VCC3_3[12] W7
B11 VSS[049] VSS[147] R18 Y25 VCC1_5_B[46] VCC3_3[13] Y7
B14 VSS[050] VSS[148] R28
B17 VSS[051] VSS[149] R4 AJ6 VCCSATAPLL VCC3_3[14] A8
B2 VSS[052] VSS[150] T12 VCC3_3[15] B15
B20 VSS[053] VSS[151] T13 AE7 VCC1_5_A[01] VCC3_3[16] B18
B22 T14 C571 AF7 B4
VSS[054] VSS[152] VCC1_5_A[02] VCC3_3[17]

ARX
B8 VSS[055] VSS[153] T15 AG7 VCC1_5_A[03] VCC3_3[18] B9
C24 T16 1uF/6.3V AH7 C15 C306 C315 C323
VSS[056] VSS[154] VCC1_5_A[04] VCC3_3[19]
C26 T17 AJ7 D13

PCI
VSS[057] VSS[155] VCC1_5_A[05] VCC3_3[20] 0.1uF/10V 0.1uF/10V 0.1uF/10V
C27 VSS[058] VSS[156] T2 VCC3_3[21] D5
C6 VSS[059] VSS[157] U12 AC1 VCC1_5_A[06] VCC3_3[22] E10
D12 VSS[060] VSS[158] U13 AC2 VCC1_5_A[07] VCC3_3[23] E7

ATX
D15 VSS[061] VSS[159] U14 AC3 VCC1_5_A[08] VCC3_3[24] F11
D18 VSS[062] VSS[160] U15 AC4 VCC1_5_A[09]
D2 VSS[063] VSS[161] U16 AC5 VCC1_5_A[10] VCCHDA AC12 +3V
D4 VSS[064] VSS[162] U17
E21 U23 AC10 AD11 3V_S5 C313
VSS[065] VSS[163] VCC1_5_A[11] VCCSUSHDA
E24 VSS[066] VSS[164] U26 AC9 VCC1_5_A[12]
E4 U27 J6 TP_VCCSUS1_05_ICH_1 C314 Can be connect to 0.1uF/10V
VSS[067] VSS[165] VCCSUS1_05[1] TP_VCCSUS1_05_ICH_2 +3V_S5 or
E9 VSS[068] VSS[166] U3 AA5 VCC1_5_A[13] VCCSUS1_05[2] AF20
F15 U5 AA6 0.1uF/10V +1.5V_S5 Can be connect to
VSS[069] VSS[167] VCC1_5_A[14] +3V or +1.5V
E23 VSS[070] VSS[168] V13 VCCSUS1_5[1] AC16
F28 VSS[071] VSS[169] V15 G12 VCC1_5_A[15]
F29 V28 C333 G17 J7 3V_S5
VSS[072] VSS[170] VCC1_5_A[16] VCCSUS1_5[2]
F7 VSS[073] VSS[171] V29 H7 VCC1_5_A[17]
G1 W2 0.1uF/10V C3
VSS[074] VSS[172] VCCSUS3_3[01]
E2 VSS[075] VSS[173] W26 AC7 VCC1_5_A[18]
B G10 VSS[076] VSS[174] W27 AD7 VCC1_5_A[19] VCCSUS3_3[02] AC18 B
G13 Y28 AC21 C289 C303
VSS[077] VSS[175] VCCSUS3_3[03]
G19 VSS[078] VSS[176] Y29 D1 VCCUSBPLL VCCSUS3_3[04] AC22

VCCPSUS
G23 Y4 AG20 0.1uF/10V 0.047uF/10V
VSS[079] VSS[177] VCCSUS3_3[05]
G25 VSS[080] VSS[178] AB4 F1 VCC1_5_A[20] VCCSUS3_3[06] AH28

USB CORE
G26 VSS[081] VSS[179] AB23 L6 VCC1_5_A[21]
G27 AB5 C317 L7 P6
VSS[082] VSS[180] VCC1_5_A[22] VCCSUS3_3[07]
H25 VSS[083] VSS[181] AB6 M6 VCC1_5_A[23] VCCSUS3_3[08] P7
H28 AD5 0.1uF/10V M7 C1
VSS[084] VSS[182] VCC1_5_A[24] VCCSUS3_3[09]
H29 VSS[085] VSS[183] U4 VCCSUS3_3[10] N7
H3 W24 +1.5V_SATA W23 P1
VSS[086] VSS[184] VCC1_5_A[25] VCCSUS3_3[11]
H6 VSS[087] VCCSUS3_3[12] P2
J1 A1 TP_VCCLAN1_05_ICH_1 F17 P3 C595
VSS[088] VSS_NCTF[01] VCCLAN1_05[1] VCCSUS3_3[13]

VCCPUSB
J25 A2 TP_VCCLAN1_05_ICH_2 G18 P4
VSS[089] VSS_NCTF[02] VCCLAN1_05[2] VCCSUS3_3[14] 4.7uF/6.3V_6 TP_VCCLAN1_05_ICH_1 C309 0.1uF/10V
J26 VSS[090] VSS_NCTF[03] A28 VCCSUS3_3[15] P5
J27 A29 +3V F19 R1 TP_VCCLAN1_05_ICH_2 C307 0.1uF/10V
VSS[091] VSS_NCTF[04] VCCLAN3_3[1] VCCSUS3_3[16]
J4 VSS[092] VSS_NCTF[05] AH1 G20 VCCLAN3_3[2] VCCSUS3_3[17] R3
J5 AH29 C302 R5 TP_VCCSUS1_05_ICH_1 C320 0.1uF/10V
VSS[093] VSS_NCTF[06] +1.5V_VCCGLANPLL VCCSUS3_3[18] TP_VCCSUS1_05_ICH_2 C305 0.1uF/10V
K23 VSS[094] VSS_NCTF[07] AJ1 A24 VCCGLANPLL VCCSUS3_3[19] R6
K28 AJ2 0.1uF/10V
VSS[095] VSS_NCTF[08]

GLAN POWER
K29 VSS[096] VSS_NCTF[09] AJ28 A26 VCCGLAN1_5[1] VCCCL1_05 G22
K3 VSS[097] VSS_NCTF[10] AJ29 A27 VCCGLAN1_5[2]
K6 B1 B26 A22 VCCCL1_5_INT_ICH
VSS[098] VSS_NCTF[11] R346 1_8 L46 1uH/800mA_12 VCCGLAN1_5[3] VCCCL1_5
VSS_NCTF[12] B29 +1.5V_RUN B27 VCCGLAN1_5[4]
B28 F20 C553 C552
ICH8M REV 1.0 C545 C544 VCCGLAN1_5[5] VCCCL3_3[1]
VCCCL3_3[2] G21
B25 1uF/6.3V *0.1uF/10V
10U/6.3V_8 2.2uF/6.3V_6 VCCGLAN3_3
ICH8M REV 1.0

+1.5V_PCIE +3V
C299
A +3V A
4.7uF/6.3V_6

PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
ICH8-M POWER(4/4) 1A

Date: Friday, September 28, 2007 Sheet 18 of 44


5 4 3 2 1
1 2 3 4 5 6 7 8

19
A A

L13
TOUCHPAD 12 MIL 5VTP C164 0.1uF/10V SW12
5VSUS
PBY201209T-4A TP_L R209 1K/F 1 3
2 4
CN9 5

2
L15 BLM18AG601SN1D 12 C334 MISAKI_TC004-PS11AT
TPDATA-1 11 0.1uF/10V
1 2

1
33 TPDATA L14 BLM18AG601SN1D 10
TPCLK-1 9
33 TPCLK 1 2 8
7
6
TP_L 5
4
3
TP_R 2
C163 C162 1
*10pF/50V *10pF/50V TOUCH_PAD CON 12P
TP Con. SW13
1st PN: DFFC12FR234(PTI) TP_R R212 1K/F 1 3
2nd PN: DFFC12FR277(ACS) 2 4
B 5 B

2
C342 MISAKI_TC004-PS11AT
0.1uF/10V

1
Bluetooth
3VSUS

CN13
1 GND Activity LED 2 BLUELED 31 20 WL_LED#
3 3.3V(Logic) COEX2 4 WLAN_ACTIVE_R 31
HW_RADIO_DIS# 5 6
Radio Enable/Disable# COEX1 BT_AVTIVE_R 31

3
7 RSVD USB- 8 USBP5- 16
16 USBP5+ 9 USB+ GND 10
2 BLUELED 2
C
TYC_1770735-1 31 RF_LINK1 C
2

2
BT Con. Q31 Q32
1

1st PN: DFHS10FS603(TYC) R150 R148 DTC144EUA DTC144EUA

1
C278 *10K 10K/F
0.1uF/10V 2nd PN: DFHD10MSA77(ACS)
2

+3V

om
+3V

l.c
ai
R156

tm
4.7K/F

ho
HW_RADIO_DIS#
R325
3

f@
4.7K/F
Q29

in
2 DTC144EUA

xa
3

Q30

he
1

D 2 DTC144EUA D
33 BT_OFF#
1

PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
TOUCH PAD & BULE TOOTH 1A

Date: Friday, September 28, 2007 Sheet 19 of 44


1 2 3 4 5 6 7 8
A B C D E

LED
AC Present (Orange) 3VPCU
R426

20
D22
1
3 2 1

3
33 PWR_LED# 2
150/F
2 Q33 *LED ORANGE/BLUE
33 PowerLED_AMBER
DTC144EUA

+5V D36

1
4 4

D21 LED_BLUE 4 3
R429 *0_6
19 WL_LED# 1 2 R422 330_6 2 1 KEYBOARD
CP9 220PX4
LED_BLUE/ORANGE CN8 1 2 MX0
R428 D34
R430 0_6 MX1 3 4 MY1
1 MX1 33
CARD_WLN 1 2 MX7 5 6 MY5
WL_LED# 2 MX7 33
19 MX6 7 8 MX3
3 MX6 33
MY9
330_6 LED_BLUE 4 MY9 33
U14 R424 MX4
5 MX4 33
+5V 330_6 MX5 CP10 220PX4
6 MX5 33
TC7SH08FU MY0 1 2 MY8
7 MY0 33
MX2 3 4 MY7
8 MX2 33
5

15 SATA_LED# 1 3VPCU MX3 5 6 MY4


9 MX3 33
4 MY5 7 8 MY2
D23 10 MY5 33
2 R425 MY1
28 ODDLED# 11 MY1 33
D19 *LED_BLUE 33 MBATLED1# 1 2 1 2 MX0
MX0 33
3

12 MY2 CP11 220PX4


13 MY2 33
R423 150/F MY4 1 2 MY13
14 MY4 33
330_6 Status: *HSMD-C110 ORANGE MY7 3 4 MY12
15 MY7 33
MY8 5 6 MY3
D37 LED_BLUE 1. Charge - ON D35 16 MY6
MY8 33
7 8 MY6
17 MY6 33
D20 2. Discharge - OFF MY3
MY3 33
18 MY12
LED_BLUE 19 MY12 33
MY13 CP12 220PX4
20 MY13 33
Orange_LED MY14 1 2 MY15
21 MY14 33
MY11 3 4 MY10
22 MY11 33
CARD_WLN

3 MY10 5 6 MY11 3
23 MY10 33
Note: 24
MY15
MY15 33 7 8 MY14

1.D35,D36,D37 for SW7-Haier 25


2.R429,R428,R430 for CARD_WLN select KEYBOARD CONNECTOR CP8 220PX4
Keyboard Con. 1 2 MX2
3

1st PN: DFFC25FR151(ACS) 3 4 MY0


5 6 MX5
2 Q34 2nd PN: DFFC25FR100(PTI) 7 8 MX4
23 FM_LED
DTC144EUA

CP7 220PX4
1

3VPCU 3VPCU 1 2 MY9


RP29 RP30 3 4 MX6
10 1 MY6 10 1 MY9 5 6 MX7
MY15 9 2 MY3 MY8 9 2 MY0 7 8 MX1
MY10 8 3 MY13 MY7 8 3 MY5
MY11 7 4 MY12 MY4 7 4 MY1
MY14 6 5 3VPCU MY2 6 5 3VPCU
10P8R-10K 10P8R-10K

I/O Board CONN


2 2

IE E-Mail FAN 3VPCU


MODIFY FOR SWITCH WLAN FUNCTION +5V
CN11
SW7 SW8 SW9
R431 *0_6 NBSWON# 1 2
33 NBSWON# 3 4
MY3 1 3 MX2 MY3 1 3 MX3_MX6 1 2 MX3 MY3 1 3 MX4 TV_CVBS TV_CVBS 7
NUMLED# 5 6 TV_Y
2 4 2 4 2 4 33 NUMLED# 7 8 TV_Y 7
5 5 5 33 CAPSLED# CAPSLED# TV_C TV_C 7
SCROLED# 9 10
33 SCROLED# 11 12
*MISAKI_TC004-PS11AT MISAKI_TC004-PS11AT *MISAKI_TC004-PS11AT INSPKR-_IO 26
13 14
2

2
26 INSPKR+_IO 15 16
C15 C9 C10 C17 C11 C14
470pF/50V 470pF/50V 470pF/50V 470pF/50V 470pF/50V 470pF/50V CON 16PIN
1

MUTE WLAN MODIFY FOR SWITCH WLAN FUNCTION


SW10 SW11
R432 0_6
1 MY3 1 3 MX5 MY3 1 3 MX6 1 2 MX3_MX6 1
2 4 2 4
5 5

*MISAKI_TC004-PS11AT *MISAKI_TC004-PS11AT
2

C13 C16 C19 C18 PROJECT : SW7


470pF/50V 470pF/50V 470pF/50V 470pF/50V
1

Quanta Computer Inc.


Size Document Number Rev
SWITCH, KEYBOARD & LED 1A

Date: Friday, September 28, 2007 Sheet 20 of 44


A B C D E
5 4 3 2 1

CRT PORT 21

D D

+3V CRT_VCC +5V IIC_VCC

1
1

1
F7
D24 D26 D25 FUSE1A6V_POLY D7
*DA204U *DA204U *DA204U CH501H-40PT

2
Setting R,G,B treac

2
impedance to 50 ohm.

3
L29
1 2 RED
7 VGA_RED_S

2
BLM18BA750SN C20
0.01uF/25V
L30

1
1 2 GREEN
7 VGA_GRN_S
BLM18BA750SN JVGA7
6
L28 11
1 2 BLUE 1
7 VGA_BLU_S
BLM18BA750SN 7

2
12

1
R239 R240 R241 2
150/F 150/F 150/F C381 C379 C382 C376 C378 C377 8
6.8pF/50V 6.8pF/50V 6.8pF/50V 3.3pF/50V 3.3pF/50V 3.3pF/50V 13

2
3

1
9
14
4
+3V +3V +3V IIC_VCC 10
+5V 15
5
C C

3
1

3
1
C384 0.1uF/10V R242 1K/F SUY 070549FR015S210CR
2 1 2 1
RP8 RP7

1
4P2R-S-2.2K 4P2R-10K
U19 Q7

2
2N7002E

4
2

4
2
7 VGAHSYNC 2 4
7 VGADDCDAT 1 3

SN74AHCT1G125DCKR Q8

2
2N7002E

7 VGADDCCLK 1 3

L32
CRTHSYNC 1 2

1
BLM18AG601SN1D
U18
L31
2 4 CRTVSYNC 1 2
7 VGAVSYNC
BLM18AG601SN1D

1
SN74AHCT1G125DCKR
C34 C33 C383 C386 C385 C380
10pF/50V 10pF/50V

2
10pF/50V 10pF/50V *10pF/50V *10pF/50V

B B

om
l.c
ai
tm
ho
f@
in
xa
he
A A

PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
CRT 1A

Date: Friday, September 28, 2007 Sheet 21 of 44


5 4 3 2 1
1 2 3 4 5 6 7 8

22
LCD CONNECTOR
A A
+12V_ALW
+3V

AO3404 ID
current
R232 5.8A C369
332K/F 0.1uF/10V

3
5VSUS +LCDVCC
Q22
AO3404
LCDONG 2

1
J7
30 R231
30 LCD_ACLK- 7

3
29 29 LCD_ACLK+ 7 100K/F
28 R235

1
28 22_8
27 LCD_A2- 7

2
27
26 26 LCD_A2+ 7 2
25 +LCDVCC +3V C364
25 Q21 LCDDISCHG
24 24 LCD_A1- 7

3
23 Q20 2N7002E 0.01uF/25V
23 LCD_A1+ 7
22

1
22

3
21 21 LCD_A0- 7 7 ENVDD 2

1
20 20 LCD_A0+ 7
19 C366 C367 C7
19 LCD_DDCCLK 0.1uF/10V 0.047uF/10V 0.1uF/10V DTC144EUA LCDON#
18 LCD_DDCCLK 7 2

1
18

1
17 LCD_DDCDAT
17 LCD_DDCDAT 7
16 R7 Q23
16 2N7002E
15 15 +3V 100K/F
B 14 B

1
14
13

2
13 +LCDVCC
12 12
11 LCD_TST
11 *PAD T7
10 10
9 9
8 8 VIN
7 7
6 6
5 5
4 PANEL_BKEN R234 3.3K/F
4 LIGHT_SENSE_IN
3 3 LIGHT_SENSE 33
2 VADJ
2
1 1
R233
C365 4.7K/F
GS12301-1011-30P *100pF/50V

3VPCU
Light sensor
+3V
C C

1
R228
R223 100K/F
+5V *10K
LQ7
D17

2
2 1 R230 1K/F
MXLID# 33
CH501H-40PT
2 1 C362
0.1uF/10V
RPM-075PT +3V SW14
Pin 1:Emitter
COVERSW# 1 2
1 2
Pin 2:Collector
C387
0.1uF/10V C363
R243 0 1000pF/50V NRS-701-1020T
+5V 2 1 U20
33 EC_BRIGHT_PWM
R244 *0 TC7SH08FU
7 BIA_PWM 2 1 1 5
4 VADJ
7 PANEL_BKEN 2
1

C368
3

C373 C375 C388 C389


1

0.1uF/10V 0.1uF/10V 1000pF/50V *100pF/50V *0.1uF/10V


2

R245
100K/F
D D
2

PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
LCD CONN 1A

Date: Friday, September 28, 2007 Sheet 22 of 44


1 2 3 4 5 6 7 8
8 7 6 5 4 3 2 1

+3V

1394_AVDD
L52
1
BLM18PG181SN1
2

1394_AVDD
C538

0.1uF/10V
U34D
23
C569 C568 J6 +3V
VCC33_00 TPBIAS0
K1 1.5V_00 VCC33_01 L6
0.1uF/10V 1uF/6.3V K19 P6
1.5V_01 VCC33_02
1394_AVDD U19 VDDPLL33 VCC33_03 P8
P10 C590
D VCC33_04 D
L14

Power/GND
VCC33_05 R388 R389 1uF/6.3V
H6 GND_00 VCC33_06 J14
K6 GND_01 VCC33_07 F14
N6 F12 56.2/F 56.2/F
GND_02 VCC33_08
P7 GND_03 VCC33_09 F9
P9 GND_04 VCC33_10 F6
+3V M14 R411 0
GND_05 1394_AVDD R402 0
K14 GND_06 AVDD33_00 P13
G14 GND_07 AVDD33_01 P14
F13 U15 EB7
C536 C582 C586 C581 C549 GND_08 AVDD33_02 TPA0P L1394_TPA0+
F10 GND_09 1 A0+ A_0+ 8
F7 P1 +3V
0.1uF/10V 0.1uF/10V 4.7uF/6.3V_6 0.01uF/25V 0.01uF/25V GND_10 VCCP_00 TPA0N L1394_TPA0-
VCCP_01 W8 2 A0- A_0- 7

PCI7402 TPB0P 3 6 L1394_TPB0+


B1+ B_1+
TPB0N 4 5 L1394_TPB0-
C562 B1- B_1-
12pF/50V *NCM900E-TR
1394_XIN
PN

2
24.576MHZ PN:
Y10 R386 R387 R413 0
U34A 24.576MHZ TXC: BG624576473 R414 0
16 PCI_GNT0# L2 R19 FCE: 56.2/F 56.2/F

1
GNT# XI 1394_XOUT
16 PCI_REQ0# L3 REQ# XO R18
PCI_AD25 R384 150/F N5 C555
IDSEL R0 R374 6.34K/F 12pF/50V
16 PCI_FRAME# R6 FRAME# R0 T18
V5 T19 R1
16 PCI_IRDY# IRDY# R1
C U6 R12 CPSR385 332K/F R399 C589 C
16 PCI_DEVSEL# DEVSEL# CPS CN15
W5 P12 R410 330_6 5.11K/F_6
16 PCI_TRDY# TRDY# TEST0
W6 R17 220pF/50V
16,33 PCI_SERR# SERR# VSSPLL

1394 Interface
16 PCI_STOP# V6 STOP#
R7 V14 TPA0P
16 PCI_PERR# PERR# TPA0P
U7 W14 TPA0N L1394_TPA0+ 4
16 PCI_PAR PAR TPA0N A1+
R13 TPBIAS0 L1394_TPA0- 3
TPBIAS0 TPB0P L1394_TPB0+ A1-
16 PCI_C_BE3# P2 CBE3 TPB0P V13 2 B1+
U5 W13 TPB0N L1394_TPB0- 1
16 PCI_C_BE2# CBE2 TPB0N B1-
16 PCI_C_BE1# V7 CBE1
W10 V16 TPA1P
16 PCI_C_BE0# CBE0 TPA1P
W16 TPA1N
TPA1N TPBIAS1
2 CLK_PCI_PCCARD L1 PCLK TPBIAS1 W17
V15 TPB1P FOX_UV31413-WR55P-7F
TPB1P TPB1N
16 PCI_RST# K3 PRST# TPB1N W15
K5 GRST#
PCI Interface

P15 C583 1uF/6.3V


16 PCI_AD[31..0] VDDPLL15
PCI_AD0 R11 P17 1394_AVDD
PCI_AD1 AD00 PHY_TEST_MA R377 4.7K/F TPBIAS1 R393 56.2/F
P11 AD01
PCI_AD2 U11 U12 C563 R392 56.2/F
PCI_AD3 AD02 PC0_RSVD 1uF/6.3V TPA1P
V11 AD03 PC1_RSVD V12
PCI_AD4 W11 W12 TPA1N
PCI_AD5 AD04 PC2_RSVD +3V
R10 AD05
PCI_AD6 U10 U13 TPB1P
PCI_AD7 AD06 AGND_00 TPB1N
V10 AD07 AGND_01 U14
PCI_AD8 R9 R14 R344 R390 56.2/F TPB_RC C591 220pF/50V
PCI_AD9 AD08 AGND_02 D29 *BAS316 R391 56.2/F R400 5.11K/F_6
U9 AD09
PCI_AD10 V9 J5 10K/F 2 1
AD10 SUSPEND# SUS_STAT# 17
PCI_AD11 W9 L5 R347 0
AD11 RI_OUT# ICH_PME# 16
PCI_AD12 V8 H3
B
PCI_AD13 AD12 SPKROUT B
U8 AD13
PCI_AD14 R8 K2
PCI_AD15 AD14 VR_EN#
W7 AD15 USB_EN E10
Miscellaneous

PCI_AD16 W4
PCI_AD17 AD16 SCL_CARD
T2 AD17 SCL G2
PCI_AD18 T1 G3 SDA_CARD
PCI_AD19 AD18 SDA +3V
R3 AD19
PCI_AD20 P5 G1
AD20 MFUNC0 ICH_GPIO2_PIRQE# 16
PCI_AD21 R2 H5
AD21 MFUNC1 ICH_GPIO3_PIRQF# 16
PCI_AD22 R1 H2
AD22 MFUNC2 FM_LED 20
PCI_AD23 P3 H1
PCI_AD24 AD23 MFUNC3 R382 10K/F SERIRQ 17,33 R339 R345 +3V
N3 AD24 MFUNC4 J1 +3V
PCI_AD25 U30
N2 AD25 MFUNC5 J2
PCI_AD26 N1 J3 2.2K 2.2K 8 1

om
AD26 MFUNC6 CLKRUN# 17,33 VCC A0
PCI_AD27 M5 7 2
PCI_AD28 AD27 SCL_CARD NC A1 C540
M6 AD28 LATCH/VD3/VPPD0 C9 6 SCL A3 3

l.c
PCI_AD29 M3 A9 SDA_CARD 5 4 0.1uF/10V
PCI_AD30 AD29 CLOCK/VD1/VCCD0# SDA GND
M2 B9

ai
PCI_AD31 AD30 DATA/VD2/VPPD1
M1 AD31 RSVD_03/VD0/VCCD1#/PS_MODE C4

tm
24LC02BT
PCI7402

ho
f@
in
xa
he
A CLK_PCI_PCCARD A

R383
33

PROJECT : SW7
C588
10pF/50V
Quanta Computer Inc.
Size Document Number Rev
PCI7402-IEEE1394 1A

Date: Friday, September 28, 2007 Sheet 23 of 44


8 7 6 5 4 3 2 1
1 2 3 4 5 6 7 8

U34B
DO NOT INSERT SD/MMC, MEMORYSTICK AND XD SIMULTANEOUSLY.
24
CAD31 C10
CAD30 A10
F11 U34C
CAD29
CAD28 E11
CAD27 C11 SC_OC# F2
CAD26 B13 SC_PWR_CTRL G5
C13 G6 VCC_FM
CAD25 SC_VCC5
A CAD24 A14 SD_CMD/SM_ALE/SC_GPIO2 C5 A
B14 A4 SM_RE# R330 *10K
CAD23 SD_CLK/SM_RE#/SC_GPIO1
CAD22 B15 SM_CLE/SC_GPIO0 B4
CAD21 E14 SM_R/B#/SC_RFU D1
A16 E3 SM_PHYS_WP#/SC_FCB T26
CAD20 SM_PHYS_WP#/SC_FCB
CAD19 D19 SC_CLK E2

FlashMedia Interface
CAD18 E17 SC_RST F5
CAD17 F15 SC_DATA E1
CAD16 H19
J17 F1 CLK_7402_48M CLK_7402_48M 2
CAD15 CLK_48
CAD14 J15
CAD13 J18 SC_CD# F3
K15 E9 SD_CD# R335
CAD12 SD_CD# MS_CD# 33
CAD11 K17 MS_CD# A8
CAD10 K18 SM_CD# B8
CAD09 L15
L18 A3 VCC_FM
CAD08 XD_CD#/SM_PHYS_WP# C542
CAD07 L19
M17 C8 MC_PWR_CTRL_0 10pF/50V
CardBus Interface

CAD06 MC_PWR_CTRL_0 SM_R/B# R332 *10K


CAD05 M18 MC_PWR_CTRL_1/SM_R/B# F8
N19 E8 MS_BS/SD_CMD/SM_WE# R326 10K/F
CAD04 MS_BS/SD_CMD/SM_WE# MS_CLK_SD_CLK_SM_ELWPZ_R R329 47_6 MS_CLK/SD_CLK/SM_EL_WP#
CAD03 M15 MS_CLK/SD_CLK/SM_EL_WP# A7
CAD02 N17
N18 B7 MS_SDIO(DAT0)/SD_DAT0/SM_D0
CAD01 MS_SDIO(DATA0)/SD_DATA0/SM_D0 MS_DAT1/SD_DAT1/SM_D1
CAD00 P19 MS_DATA1/SD_DATA1_SM_D1 C7
A6 MS_DAT2/SD_DAT2/SM_D2
MS_DATA2/SD_DATA2_SM_D2 MS_DAT3/SD_DAT3/SM_D3
CCBE3 E13 MS_DATA3/SD_DATA3_SM_D3 B6
CCBE2 E18
H18 E7 SD_WP/SM_CE# R331 10K/F
CCBE1 SD_WP/SM_CE#
CCBE0 L17
SD_DAT0/SM_D4/SC_GPIO6 C6
RSVD_04/D2 B10 SD_DAT1/SM_D5/SC_GPIO5 A5
N15 B5 C534
CCD1#/CD1# SD_DAT2/SM_D6/SC_GPIO4 10pF/50V
CCD2#/CD2# B11 SD_DAT3/SM_D7/SC_GPIO3 E6

CVS1/VS1# A13 PCI7402


CRST# C15
CBLOCK# H15
B
CREQ#/INPACK# C14 B

CSERR#/WAIT# C12
F19 VCC_FM
CDEVSEL#
CFRAME# E19
CGRANT# G17
CINT# E12
CVS2/VS2# B16
G19 R342
CPERR# C546
CSTOP# G18 150K/F_6
CIRDY F17
G15 2.2uF/6.3V_6
CTRDY#
H17 +3V
RSVD_02/A18
RSVD_01/D14 M19 U28

CCLKRUN# A11 5 IN OUT 1 VCC_FM


H14 3 CLOSE CONN
CPAR NC
VCCCA_01 A15
J19 MC_PWR_CTRL_0 4 2
VCCCA_00 EN GND
CSTSCHG A12
CAUDIO B12 G5240
CCLK F18
C539
0.1uF/10V C529
PCI7402
4.7uF/6.3V_6

VCC_FM VCC_FM
CN14
VCC_FM
1 11 MS_DAT3/SD_DAT3/SM_D3
MS_BS/SD_CMD/SM_WE# MS-GND1 SD-CD/DAT3 MS_BS/SD_CMD/SM_WE#
2 MS-BS SD-CMD 12
MS_DAT1/SD_DAT1/SM_D1 3 13
C
MS_SDIO(DAT0)/SD_DAT0/SM_D0 MS-D1 SD-GND1 C
4 MS-SDIO(D0) SD-VDD 14
C530 C531 MS_DAT2/SD_DAT2/SM_D2 5 15 MS_CLK/SD_CLK/SM_EL_WP#
0.1uF/10V 0.1uF/10V MS_CD# MS-D2 SD-CLK
6 MS-INS SD-GND2 16
MS_DAT3/SD_DAT3/SM_D3 7 17 MS_SDIO(DAT0)/SD_DAT0/SM_D0
MS_CLK/SD_CLK/SM_EL_WP# MS-D3 SD-DAT0 MS_DAT1/SD_DAT1/SM_D1
8 MS-SCLK SD-DAT1 18
9 19 MS_DAT2/SD_DAT2/SM_D2
MS-VCC SD-DAT2
10 MS-GND2

SD_CD# 20 22 SD_WP/SM_CE#
SD-SW(RSV) SD-SW(WP)
21 SD-SW(GND) SD-SW(WP-GND) 23

Molex 47265-0001-CARD READER

CN10:
MLX: DFHD23MS0B6
TTN: DFHD23MS0A8

D D

PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
PCI7402-CARD READER 1A

Date: Friday, September 28, 2007 Sheet 24 of 44


1 2 3 4 5 6 7 8
A B C D E

+3V

1
L24

0_8
2

C336 C340
3V_DVDD

INT_MIC_BIAS
D32
2
MIC-VREFO

CH501H-40PT
1
EXT MIC BIAS

INT_MIC_BIAS_L
AVDD

5
U36
Vout Vin 1 2
L57
1
BLM18PG121SN
+5V 25
INT MIC BIAS
C343 D33 CH501H-40PT 4 C604
*10uF/6.3V_8 0.1uF/10V INT_MIC_BIAS_R C610 C608 C605 BYP C612 C613 C611 C607
2 1
1uF/6.3V 0.1uF/10V 0.1uF/10V 4.7uF/6.3V_6 2 3 0.1uF/10V 0.047uF/10V 1uF/6.3V 0.1uF/10V 4.7uF/6.3V_6
C606 GND EN
1uF/6.3V TPS793475

AGND
AGND AGND

26 AUD_LINE_OUT_L
Vset=1.242V
AVDD
26 AUD_LINE_OUT_R C598

10U/6.3V_8

36

35

34

33

32

31

30

29

28

27

26

25
U17

LINE-OUT-R

NC

MIC1-VREFO-R

MIC2-VREFO

LINE1-VREFO

VREF
Sense B
LINE-OUT-L

GPIO1

MIC1-VREFO-L

AVSS1

AVDD1
AGND AGND
R226 2.2K
INT_MIC_BIAS_L 2 1
37 MONO LINE1-R 24
R227 2.2K
Internal
AVDD 38 AVDD2 LINE1-L 23 INT_MIC_BIAS_R 2 1 MIC
26 AUD_HP_OUT_L EXT_MIC_R C357 2.2uF/6.3V_6 C358 10U/6.3V_8 L9 BK1005HS601 CON7
39 HP-OUT-L MIC1-R 22
INT_MIC_L 1 2 INT_MIC1-L-1 1 2 INT_MIC1-L-2
R204 20K/F EXT_MIC_L C356 2.2uF/6.3V_6 EXT_MIC C359 10U/6.3V_8 L10 BK1005HS601 4
AGND 40 JDREF MIC1-L 21 3
INT_MIC_R 1 2 INT_MIC1-R-1 1 2 INT_MIC1-R-2
L11 BK1005HS601 2
41 HP-OUT-R CD-R 20 1
26 AUD_HP_OUT_R 1 2 INT_MIC1-GND

2
AGND 42 19 C360 Molex 53780-0470
AVSS2 CD-GND C361
43
ALC268 18 100pF/50V 100pF/50V 1st PN: DFHD04MR817(MLX)

1
NC CD-L
44 17 INT_MIC_R 2nd PN: DFHS04FRC5(ACS)
NC MIC2-R
45 16 INT_MIC_L AGND AGND
NC MIC2-L
46 DMIC-CLK NC 15

R210 0 47 14
GPIO0-DMIC-12

EAPD NC
GPIO3/DMIC-34

26 AMP_SHDN#
SPDIF_OUT SENSEA R225 39.2K/F +3V
SDATA-OUT

48 SPDIFO Sense A 13 HP_NB_SENSE# 26


26 SPDIF_OUT

SDATA-IN

DVDD-I/O
DVSS-I/O

PCBEEP
RESET#
BIT-CLK

1
DVDD

SYNC
DVSS

R224 20K/F MIC_EXT_SENSE#


R417
3V_DVDD *100K
1

10

11

12
R419 2.2K

2
MIC-VREFO 2 1
1 C344 *1uF/10V 1
PC_BEEP 26
MIC_EXT_SENSE#
ICH_AZ_CODEC_RST# 15
ICH_AZ_CODEC_SYNC 15
SDI R214 22 CON13
ICH_AZ_CODEC_SDIN0 15
BITCLK R213 22 L54 BLM18AG601SN1D 1
ICH_AZ_CODEC_BITCLK 15
EXT_MIC 1 2 MIC_IN_L2 2
ICH_AZ_CODEC_SDOUT 15
6

2
3
C609 4
C341 470pF/50V 5

1
7
27pF/50V MIC_JACK
AGND

AGND

Normal Open

om
l.c
ai
tm
ho
f@
PROJECT : SW7

in
Quanta Computer Inc.

xa
he
Size Document Number Rev
Azalia ALC268 1A

Date: Friday, September 28, 2007 Sheet 25 of 44


A B C D E

PROJECT : SW7
Quanta Computer Inc.
1 2 3 4 5 6 7 8

L56
5VAMP INT. SPEAKER
+5V 1 2
BLM21PG600SN1D

26

1
C616 C345 C329 C330
C603 + + C599
4.7uF/6.3V_6 0.1uF/10V 0.1uF/10V

1
4.7uF/6.3V_6 0.01uF/25V 4.7uF/6.3V_6 U16

2
19 21 INSPKR+
VDD ROUT+ INSPKR-
ROUT- 16
R381 *1K LINE-R_4 7
AGND AGND PVDD1 INSPKL+
18 PVDD2 LOUT+ 4
C577 0.047uF/10V R206 20K/F 9 INSPKL-
25 AUD_LINE_OUT_R LINE-R_3 LOUT-
A
23 RLINEIN A
C574 *0.47uF/10V_6 LINE-R_1 R208 *1K/F LINE-R_2 20 14 BEEP_AMP
R380 *15K C346 1 RHPIN PC-BEEP
AGND 2 0.47uF/10V_6 AMP_RIN+ 8 RIN+
C331 *0.1uF/10V
AGND
15 SE/BTL#
R222 *15K LINE-L_1 AGND C347 1 SE/BTL
AGND 2 0.47uF/10V_6 AMP_LIN+ 10 LIN+ HP/LINE 17
C351 *0.47uF/10V_6 R216 *1K/F LINE-L_2 6
LINE-L_3 LHPIN AMP_SHDN# R207 10K/F
5 LLINEIN SHUTDOWN 22 AVDD Int SPK Con.
LINE-L_4 R215 20K/F
25 AUD_LINE_OUT_L C350 0.047uF/10V AMP_BYPS
1st PN: DFHD02MSA05(MLX)
2 1 11 BYPASS GND4 1 AMP_SHDN# 25 INSPKR+_IO 20
R221 *1K AGND C355 4.7uF/6.3V_6 24 2nd PN: DFWF02MS100(PTI)
GND3 INSPKR-_IO 20
AGND R416 *1K/F AMP_GA0 2 13 D30 INSPKR+ R248 1 02
R415 1K/F GAIN0 GND2 INSPKR- R18 02
5VAMP 3 12 2 1 VOLMUTE# 33 1 CON8
R217 10K/F GAIN1 GND1 INSPKL+ R237 1 02 INSPKL+_S
GND5 25 1 1
R218 *10K/F 26 CH501H-40PT INSPKL- R236 1 02 INSPKL-_S 2
C11: Add R740,R741 0 GND6 2

1
GND7 27
ohm(0402) 28 D31 ACES 88231-0200
AGND GND8
GND9 29

2
30 CH501H-40PT
GND10 C397 C89 C374 C371
31

2
GND11
0312 Gain Table 32 AMP_BYPS_H AMP_BYPS *100pF/50V *100pF/50V *100pF/50V

1
GND12 R396 15K *100pF/50V
GND13 33
R379 0_6 R249 0_6 SP_R_GND SP_L_GND 0_6 R238
GAIN0 GAIN1 SE/BTL AV(INV) R229 0_6 AGND
U12:
Ti: AL000312K10
0 0 0 6dB R203 0
TPA0312 PWP24-TW7
ANP: AL002030K03
0 1 0 10dB R420 0_6
1 0 0 15.6dB R205 0
1 1 0 21.6dB
AUDIO AMPLIFIER
B SE/BTL# R398 *100K B
5VAMP
R397 100K/F AGND
x x 1 4.1dB AGND

PCSPK BEEP
+5V

R201
10K/F TO AMP
TO CODE
C321 0.1uF/50V_6
R197 1K/F BEEP_AMP
25 PC_BEEP
3

2 Q19 R198 C319


17 SPKR
*1K *2200pF/50V
1

DTC144EUA
C C

U15 MAX4411 HP_NB_SENSE#


21
Normal Open
EP
EP 22
C348 10U/6.3V_8 AOUTR_L_HP R219 4.7K/F INL_4411 13 23
25 AUD_HP_OUT_L INL EP
24 CON12
EP

1
25 5 6 D18
EP 25 HP_NB_SENSE#
C349 10U/6.3V_8 AOUTR_R_HP R220 4.7K/F INR_4411 15 L27 0_6 4 11

1
25 AUD_HP_OUT_R INR
9 HPOUTL 1 2 HP_L2 2
OUTL HPOUTR HP_R2
OUTR 11 1 2 3
4 L26 1 10
AMP_SHDN# NC1 0_6
14 6

2
SHDNR NC2
18 SHDNL NC3 8 +5V 8 LED 3301D-ESD

2
C573 1uF/6.3V 12 7 Drive
C1P_4411 NC4 C352 C354 IC AGND
1 C1P NC5 16 9
20 L25 +3V 470pF/50V 470pF/50V C353

1
C1N_4411 NC6 BLM18AG601SN1D AGND 0.1uF/10V
3 C1N SVDD 10
VCC3_4411 1 HP_JACK AGND
5
PVDD 19
2
2 for ESD
PVSS_4411 PVSS PGND
7 SVSS SGND 17
D D
C337 C328 AGND
QFN20-4X4-5-25P 1uF/6.3V 4.7uF/6.3V_6
C335 SPDIF_OUT
25 SPDIF_OUT
1uF/6.3V <OrgName>

Port replicator HP_SENSE: Normal Open <OrgAddr1> PROJECT : SW7


AGND AGND AGND <OrgAddr2>
System HP_SENSE: Normal Open <OrgAddr3>
<OrgAddr4> Quanta Computer Inc.
Size Document Number Rev
JACK/AMP_TAP0312 1A

Date: Friday, September 28, 2007 Sheet 26 of 44


1 2 3 4 5 6 7 8
A B C D E

No Ground Plane In DAA Section 27


Homologation Area
MR10
536/F

4 4
MQ1
MMBTA42-7-F

MR1 MR3
1.07K/F 3.65K/F
MR11 MQ4 MR5
73.2/F_1210 MMBTA06-7-F 100K/F MQ2
MMBTA92LT1G
MC4

0.47uF/50V_12 MR2 2.49K/F


150/F MQ7 MR4 MC10
MMBTA06-7-F 0.01uF/25V

21
20
19
18
17
16
MU1

QE
EPAD

IGND
NC
DCT2
DCT
1 NC DCT3 15
2 14 MR6
MC1 33pF/5KV_18 RX QB
3 IB QE2 13 100K/F
C1A 4 12
C1B SC MQ3
5 11

VREG2
IGND2
C2B NC

VREG
RNG1

RNG2
MC2 33pF/5KV_18 MMBTA42-7-F
C2A

6
7
8
9
10
Si3080_F_FM
3 3
MC7
2700pF/50V
MR9 MZ7
1M/F MC5 DDZ9717-7
0.1uF/16V MC6
0.1uF/16V

MC3
0.01uF/250V_8

RING

MFB2 MFB8
MR8 BLM18AG601SN1D BLM18AG601SN1D
20M_8 MJP7
MC9
MD7 680pF/5KV_18 1
MRV1 2
WIRE-TO-BOARD

Dual Diode
MC8 SiDactor
MD8 680pF/5KV_18

MR7
2 2
TIP
Dual Diode
MFB1 MFB7
BLM18AG601SN1D BLM18AG601SN1D
20M_8

3VSUS
+VA ACZ_RST#_AUDIO_MDC

om
ACZ_RST#_AUDIO_MDC 15
ACZ_SYNC_AUDIO_MDC
ACZ_SYNC_AUDIO_MDC 15
BIT_CLK_AUDIO_MDC
BIT_CLK_AUDIO_MDC 15
ACZ_SDOUT_AUDIO_MDC

l.c
ACZ_SDOUT_AUDIO_MDC 15
ACZ_SDIN1_MDC R147 33
ACZ_SDIN1 15

ai
R134
C273 *Contact_Vendor_6

tm
U12
0.1uF/50V_6 1 16

ho
NC1 GPIO_A/EE_SC
1 2 VDDIO GPIO_B/EE_SD/PNPID 15 1
BIT_CLK_AUDIO_MDC 3 14

f@
BCLK/BIT_CLK NC3
4 VD VA 13
ACZ_SDIN1_MDC 5 12 R133
SDI/SDATA_IN GND

in
ACZ_SDOUT_AUDIO_MDC 6 11 7.15K/F_6
ACZ_SYNC_AUDIO_MDC SDO/SDATA_OUT AOUT C1A_S R151 56.2/F C1A C276
7 10
PROJECT : SW7

xa
ACZ_RST#_AUDIO_MDC SYNC C1A C2A_S R157 56.2/F C2A
8 9
RST#/RESET# C2A SILICON LABORATORIES CONFIDENTIAL

he
Si3054
0.1uF/50V_6 Quanta Computer Inc.
Size Document Number Rev
MODEM(DAA) 1A
Date: Friday, September 28, 2007 Sheet 27 of 44
A B C D E
5 4 3 2 1

ODD CONNECTOR
CN12 ODD_VCC
28
1 2 SATA Connector.
IDERST# 3 4 IDE_DD8
5 6

C253

C247

C250
IDE_DD7 IDE_DD9
IDE_DD6 7 8 IDE_DD10 CON11
+5V +3V +3V IDE_DD5 9 10 IDE_DD11
D
IDE_DD4 11 12 IDE_DD12 D
13 14

1000pF/50V
IDE_DD3 IDE_DD13

0.1uF/10V

10U/6.3V_8
15 16 GND1 1

2
IDE_DD2 IDE_DD14 2 SATA_TX0+ 15
IDE_DD1 17 18 IDE_DD15 RXP
19 20 RXN 3 SATA_TX0- 15
R367 R121 R407 IDE_DD0 IDE_DDREQ 4
10K/F 8.2K 4.7K/F 21 22 IDE_DIOR# GND2
23 24 TXN 5 SATA_RX0-C 15
IDE_DIOW# 6 SATA_RX0+C 15

1
IDE_DIORDY 25 26 IDE_DDACK# TXP
27 28 GND3 7
IDE_IRQ +3VSATA +3V
IDE_DA1 29 30 -PDIAG 80MIL
IDE_DA0 31 32 IDE_DA2 ODD_VCC +5V
33 34 3.3V_0 8
IDE_DCS1# IDE_DCS3# 9 L47
35 36 3.3V_1 PBY201209T-4A
20 ODDLED# 37 38 3.3V_2 10
L18 11
ODD_VCC 39 40 GND4 +5VSATA
PBY201209T-4A 12 +5V
41 42 C269 GND5
43 44 GND6 13
0.1uF/10V
C254 45 46 C246 5V_0 14
15 L50 80MIL
0.1uF/10V 47 48 0.1uF/10V 5V_1 PBY201209T-4A
49 50 5V_2 16
R406 17
IDE_DDREQ GND7
51 1 2 RSVD 18
52 GND8 19
R83 *5.6K 20
53 12V_0
NC for slave 54 12V_1 21
470_6 22
12V_2
GND 23
C15004-15001 24
-PDIAG R120 *10K GND
MLX_67492-1822
C C

IDE_DD[0..15]
15 IDE_DD[0..15]
+3V +5V
IDE_DDREQ +5VSATA +3VSATA
15 IDE_DDREQ
IDE_DIOW#
15 IDE_DIOW#
IDE_DIOR#
15 IDE_DIOR#
2

IDE_DIORDY
15 IDE_DIORDY
R126 IDE_DDACK#
15 IDE_DDACK#
10K/F IDE_IRQ C564 C565 C559 C560
15 IDE_IRQ
IDE_DA1 4.7uF/6.3V_6 0.1uF/10V 4.7uF/6.3V_6 0.1uF/10V
15 IDE_DA1
1 3 IDERST# IDE_DA0
16,17,29,31,33 PLTRST# 15 IDE_DA0
Q17 IDE_DCS1#
15 IDE_DCS1#
DTC144EUA IDE_DA2
15 IDE_DA2
IDE_DCS3#
15 IDE_DCS3#

B B

A A

PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
SATA HDD/CD-ROM 1A

Date: Friday, September 28, 2007 Sheet 28 of 44


5 4 3 2 1
5 4 3 2 1

29
D D
LANVCC

LANVCC

R22

61

45

40

65

36
37
35
34

66
67
68
69
70
71
72
73
74
U7

1
4.7K/F
CLOSE CHIP

VDDO_TTL_MAIN

EPAD

SPI_CLK

SPI_DO

GND
GND
GND
GND
GND
GND
GND
GND
GND
VDDO_TTL

VDDO_TTL

VDDO_TTL

VDDO_TTL

SPI_CS

SPI_DI
C54 0.1uF/10V PERP_C_2 49
16 PCIE_RX2+ TX_P
10 LOM_DISABLE_R# R23 *0 LAN_DISABLE# 15
C53 0.1uF/10V PERN_C_2 LOM_DISABLEn
16 PCIE_RX2- 50 TX_N
VAUX_AVLBL 12 LANVCC
16 PCIE_TX2+ 54 RX_P
11 C96
SWITCH_VCC
16 PCIE_TX2- 53 RX_N *1U/10V
VMAIN_AVAL 47
17,31 ICH_PCIE_WAKE# 6 WAKEn
SWITCH_VAUX 9 Install for 8039
2 CLK_PCIE_LAN 55 REFCLKP FOR 8039
24 R27 *2K
HSDACP
2 CLK_PCIE_LAN# 56 REFCLKN
HSDACN 25 R28 2K
5 R28 4.87K/F
16,17,28,31,33 PLTRST# PERSTn
RSET 16
30 TRD0+ 17 MDIP[0] R29 NC
4 CTRL_25
CTRL25
30 TRD0- 18 MDIN[0]
C 3 CTRL_12 C

LANVCC 30 TRD1+ 20 MDIP[1] 88E8039/88E8055 CTRL12


NI for 8039
8039 P/N:AJ080390005
30 TRD1- 21 MDIN[1]
TSTPT 29
30 TRD2+ 26 MDIP[2]
TESTMODE 46
30 TRD2- 27 MDIN[2]

30 TRD3+ 30 MDIP[3] LED_ACTn 59


R37 R35
C126 4.7K/F 4.7K/F 31 60
0.1uF/10V 30 TRD3- MDIN[3] LED_LINK10/100n
U8
LED_LINK1000n 62
1 A0 SCL 6 38 VPD_CLK
2 A1 SDA 5 LED_LINKn 63
3 A2 41 VPD_DATA C116 27pF/50V
8 7 42 15 XTAL1
VCC WP SMCLK XTALI
4 GND R39 43 14

AVDDL

AVDDL

AVDDL

AVDDL

AVDDL

AVDDL

AVDDL

VDD25
SMDATA XTALO

AVDD
*0 R29 Y7

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD
AT24C08AN-10SI-2.7
25MHZ
*1M_NC
XTAL2

13

33

39

44

48

58

19

22

28

32

51

52

57

23

64
88E8055_A3
C117
27pF/50V
120 ohms@100Mhz VDD AVDD25
LANVCC L7 HI0805R800R-00/5A L-F
B VDD B

C24 R11
C23 C22
10U/6.3V_8 10U/6.3V_8 0.1uF/10V 4.7K/F
C70 C81 C104 C49 C107 C90 C65 C106

0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 1000pF/50V 1000pF/50V 1000pF/50V 1000pF/50V


3
Q9
CTRL_25 1 2SA1797T100Q AVDD25

AVDD25
2

om
C31 C113 C111 C47 C52 C32 C112 C115 C51 C114 C50

l.c
C35
10U/6.3V_8 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 1000pF/50V 1000pF/50V 1000pF/50V 1000pF/50V 1000pF/50V

ai
LANVCC L8 HI0805R800R-00/5A L-F

tm
120 ohms@100Mhz C44 R16

ho
C42
10U/6.3V_8 0.1uF/10V 4.7K/F LANVCC

f@
in
3

C71 C80 C97 C66 C48 C105

xa
Q10
CTRL_12 2SA1797T100Q VDD 0.1uF/10V 0.1uF/10V 0.1uF/10V 1000pF/50V 1000pF/50V 1000pF/50V

he
1
A A
2

C46
C55 PROJECT : SW7
10U/6.3V_8 0.1uF/10V

Quanta Computer Inc.


Size Document Number Rev
MARVELL 8039/8055 1A

Date: Friday, September 28, 2007 Sheet 29 of 44


5 4 3 2 1
A B C D E

AVDD25
C479
0.01uF/25V
C478
0.01uF/25V
30
U26
4 4

1 24 MCT1 R122 75/F


TCT1 MCT1
29 TRD3+ 2 23 X-TX3P
TD1+ MX1+
29 TRD3- 3 22 X-TX3N
TD1- MX1-

CON10
4 21 MCT2 R123 75/F AMP rj45-c100g7-100b-8p-h
TCT2 MCT2
29 TRD2+ 5 20 X-TX2P
TD2+ MX2+ X-TX0P 1 TX1+
29 TRD2- 6 19 X-TX2N X-TX0N 2
TD2- MX2- X-TX1P TX1-
3 RX1+
X-TX2P 4
X-TX2N TX2+
5 TX2-
7 18 MCT3 R124 75/F X-TX1N 6
TCT3 MCT3 X-TX3P RX1-
7 RX2+
8 17 X-TX1P X-TX3N 8
29 TRD1+ TD3+ MX3+ RX2-

CHSGND1
CHSGND2
9 16 X-TX1N
29 TRD1- TD3- MX3-

3 3

10 15 MCT4 R125 75/F


TCT4 MCT4

9
10
11 14 X-TX0P
29 TRD0+ TD4+ MX4+
12 13 X-TX0N
29 TRD0- TD4- MX4-
LAN_1

1
C477 C476 DB0ZH1LAN06
0.01uF/25V 0.01uF/25V C481 10/100 Transformer PN:
Giga Transformer PN: 1000P_3KV

2
FCE: DBED2LLAN05
FCE: DB0ZH1LAN06 BOT: DB0TW3LAN12
GOT: DBKN1NLAN03
HYT: DB0MW1LAN17

TRD0+ TRD2+

2 TRD0- TRD2- 2

TRD1+ TRD3+

TRD1- TRD3-

49.9/F 49.9/F 49.9/F 49.9/F


R116 R117 R102 R103
R100 R101 R98 R99
49.9/F 49.9/F 49.9/F 49.9/F

0.1uF/10V 0.1uF/10V C256 C255

C259 C257 0.1uF/10V 0.1uF/10V

1 1

PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
LAN Transformer & Conn. 1A

Date: Friday, September 28, 2007 Sheet 30 of 44


A B C D E
1 2 3 4 5 6 7 8

L55 +1.5V_CARD
USBP7 D-
Express Card
31
16 USBP7- 1 2
16 USBP7+ 4 3 USBP7 D+

1
*DLW21SN900SQ2B +1.5V_CARD Max. 650mA, Average 500mA.
C594 C593
R421 0 0.1uF/10V 0.1uF/10V +3V_CARD Max. 1300mA, Average 1000mA.

2
1 2

R418 0
1 2
+1.5V_RUN +3V 3VSUS +3V_CARDAUX +3V_CARD +1.5V_CARD
A U35 A
Please the cap
near connector.
17 AUXIN AUXOUT 15
+3V_CARD 2 3
CN10 3.3VIN_0 3.3VOUT_0
4 3.3VIN_1 3.3VOUT_1 5
EXPRESSCARD-SD-TMJS-001-26P 12 11
1.5VIN_0 1.5VOUT_0
1 GND_1 14 1.5VIN_1 1.5VOUT_1 13
1

USBP7 D- 2 R395 *100K/F


C584 C578 C580 USBP7 D+ USB-
3 USB+ +3V 2 1
0.1uF/10V 0.1uF/10V 4.7uF/6.3V_6 CPUSB# 4 ExpressSwitch +3V
2

CPUSB# CARD_RESET#
5 RSV_0 33 NEWCARD_DISABLE#
6 R394 *100K/F 20 8
ICH_SMBCLK RSV_1 SHDN# PERST# CPPE# R412
Please the cap 2,17 ICH_SMBCLK 7 SMBCLK +3V 2 1 1 STBY# CPPE# 10 2 1 *100K/F
near connector. ICH_SMBDATA 8 CP_RST# 6 9 CPUSB# R409 2 1 *100K/F
2,17 ICH_SMBDATA SMBDATA SYSRST# CPUSB#
9 +1.5V_0 OC# 19
+1.5V_CARD 10 +1.5V_1 16 NC
11 3VSUS 7 18
17,29 ICH_PCIE_WAKE# WAKE# GND0 RCLKEN
+3V_CARDAUX 12 +3.3VAUX
CARD_RESET# 13 PERST# R5538D001-TR-F
+3V_CARD 14 +3.3V_1
15 C535
CARD_CLK_REQ# +3.3V_2
2 NEW-CARD_CLK_REQ# 16 CLKREQ#
CPPE# 17 0.1uF/10V
CPPE# U29 +3V_CARDAUX +3V_CARD +1.5V_CARD
2 CLK_PCIE_EXPCARD# 18 REFCLK-

5
2 CLK_PCIE_EXPCARD 19 REFCLK+
20 PLT_RST-R# 2
GND_2 7,16 PLT_RST-R#

1
21 4 CP_RST#
16 PCIE_RX6- PERn0
22 1 C600 C587 C601
16 PCIE_RX6+ PERp0
23 0.1uF/10V 0.1uF/10V 0.1uF/10V

2
GND_3 TC7SH08FU
B 24 B

3
16 PCIE_TX6- PETn0
25

NC1
NC2
NC3
NC4
16 PCIE_TX6+ PETp0
26 GND_4
Please the cap Please the cap Please the cap
near pin 15 near pin 3 & 5 near pin 11 &

27
28
29
30
+1.5V_RUN +3V 3VSUS (AUXOUT). (3.3VOUT). 13(1.5VOUT).

1
JAE PX10FS16PH-26P
C602 C579 C592
PCI-Express TX and RX direct to connector. 0.1uF/10V 0.1uF/10V 0.1uF/10V

2
Please the cap Please the cap Please the cap
near pin 12 & near pin 2 & 4 near pin 17
14(1.5VIN). (3.3VIN). (AUXIN).

Place caps close to


MiniCard WLAN connector +1.5V_RUN 3VSUS
connector.

1
+3V +3V +1.5V_RUN
R317 0 LFRAME#/FWH4 C510 C513 C509
LFRAME#/FWH4 15,33
J9 0.047uF/10V 0.047uF/10V 0.1uF/10V

2
C C

ICH_PCIE_WAKE# 1 2
R319 WAKE# 3.3V_1
19 WLAN_ACTIVE_R 1 2 0 3 RESERVED_1 GND0 4
R320 1 2 0 5 6
19 BT_AVTIVE_R RESERVED_2 1.5V_1
MINICLK_REQ# 7 8
T22 CLKREQ# UIM_PWR
9 GND1 UIM_DATA 10 LAD3/FWH3 15,33
2 CLK_PCIE_MINI# 11 REFCLK- UIM_CLK 12 LAD2/FWH2 15,33
13 14 LPC Debug +3V
2 CLK_PCIE_MINI REFCLK+ UIM_RESET LAD1/FWH1 15,33
15 GND2 UIM_VPP 16 LAD0/FWH0 15,33 +3V

1
17 18 R315 R314 R318 R313
UIM_C8 GND3 R316 0 10K/F 10K/F C517 C512 C514 C516 C511
19 20

om
2 CLK_PCI_DBP UIM_C4 W_DISABLE# RF_OFF# 33
21 22 *10K *10K 0.1uF/10V 0.047uF/10V 0.1uF/10V 0.047uF/10V 4.7uF/6.3V_6

2
GND4 PERST# PLTRST# 16,17,28,29,33
16 PCIE_RX1- 23 PERn0 3.3VAUX1 24 3VSUS

l.c
16 PCIE_RX1+ 25 PERp0 GND5 26
27 28

ai
GND6 1.5V_2
29 GND7 SMB_CLK 30 CLK_SCLK 2,14

tm
31 32 2 2 Q27
16 PCIE_TX1- PETn0 SMB_DATA CLK_SDATA 2,14 IRLML5103
16 PCIE_TX1+ 33 PETp0 GND8 34

ho
35 36 USBP6- 16 Q28
GND9 USB_D- *IRLML5103
37 RESERVED_3 USB_D+ 38 USBP6+ 16

f@
39 40
3

3
RESERVED_4 GND10 R312 0
PCI-Express TX and RX direct to connector 41 RESERVED_5 LED_WWAN# 42 RF_LINK1 19

in
43 RESERVED_6 LED_WLAN# 44
R129 *0 45 46 R311 *0

xa
17 ICH_CL_CLK1 RESERVED_7 LED_WPAN# BLUELED 19
R128 *0 47 48
17 ICH_CL_DATA1 RESERVED_8 1.5V_3
R127 *0

he
17 CL_RST#1 49 RESERVED_9 GND11 50
D 51 RESERVED_10 3.3V_2 52 D
CLK_PCI_DBP H29 H28
MBSW7001012 MBSW7001012
1

MLX_67910-5700

R130
*10 PROJECT : SW7
1 2

Quanta Computer Inc.


C272
*10pF/50V Size Document Number Rev
2

Express card & Mini Card 1A

Date: Friday, September 28, 2007 Sheet 31 of 44


1 2 3 4 5 6 7 8
5 4 3 2 1

32
D D

5VSUS
L48 BLM18PG181SN1
Ext Right Side JUSB7
U33 +USB_SIDE_PWR1_1 1 2 +USB_SIDE_PWR1
2 7 +USB_SIDE_PWR1_1 L45 1 5
VCC OUT1 +USB_SIDE_PWR2_1 USBP0_D- VDD GND5
OUT2 6 16 USBP0- 1 2 2 D- GND6 6
3 4 3 USBP0_D+ 3 7
EN1 16 USBP0+ D+ GND7
1

4 EN2 OC1 8 4 GND4 GND8 8


C557 1 5 *DLW21SN900SQ2B
0.1uF/10V GND OC2 + C543
2

G546B2P1UF R333 0 C541 020173MR004G552ZR


SSOP8 1 2 0.1uF/10V 100U/6.3V_C
2nd source AL002062005.
R328 0
1 2

L49BLM18PG181SN1
Ext Right Side JUSB9
+USB_SIDE_PWR2_1 1 2 +USB_SIDE_PWR2
L51 1 5
USBP1_D- VDD GND5
16 USBP1- 1 2 2 D- GND6 6
4 3 USBP1_D+ 3 7
16 USBP1+ D+ GND7
4 GND4 GND8 8
C *DLW21SN900SQ2B C
+ C572
R373 0 C566 100U/6.3V_C 020173MR004G552ZR
1 2 0.1uF/10V

R368 0
1 2
5VSUS USB Con.
U27
80mil Ext Left Side 1st PN: DFHS04FR920(SUY)
L43 BLM18PG181SN1 JUSB8
5 1 USBPWR8 1 2 +USB_LEFT_PWR 2nd PN: DFHS04FRB11(AOP)
IN OUT L22
3 NC 1 VDD GND5 5
80mil 1 2 USBP2_D- 2 6
16 USBP2- D- GND6
1

4 2 4 3 USBP2_D+ 3 7
EN GND 16 USBP2+ D+ GND7
C263 4 8
0.1uF/10V + C292 *DLW21SN900SQ2B GND4 GND8
G5240
2

100U/6.3V_C C286
R132 0 C290 C282 020173MR004G552ZR
1 2 2200pF/50V 0.1uF/10V 0.1uF/10V

R131 0
1 2

B B
Int USB Con.
1st PN: DFHD04MR876(EIC)
2nd PN: DFHD04MR981(PTI)
5VSUS
CN7

1
16 USBP3- 2 6
16 USBP3+ 3 5
4
3800-E04N-00R

1
C8
0.1uF/10V
2

A A

PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
USB PORTS 1A
Date: Friday, September 28, 2007 Sheet 32 of 44
5 4 3 2 1
5 4 3 2 1

3VPCU

33
U9
3 9 C118 0.1uF/10V
17,23 SERIRQ SERIRQ VCC1
4 22 C94 0.1uF/10V
15,31 LFRAME#/FWH4 LFRAME VCC2
10 33 C136 0.1uF/10V
15,31 LAD0/FWH0 LAD0 VCC3
8 96 C143 0.1uF/10V
15,31 LAD1/FWH1 LAD1 VCC4
7 111 C144 0.1uF/10V
15,31 LAD2/FWH2 LAD2 VCC5
5 125 C108 0.1uF/10V
15,31 LAD3/FWH3 LAD3 VCC6
12 67 C137 4.7uF/6.3V_6
2 CLK_PCI_EC PCICLK AVCC
R43 100 13
16,17,28,29,31 PLTRST# PCIRST/GPIO5
17,23 CLKRUN# 38 CLKRUN
SCI1# 20
D SCI/GPIOE TEMP_MBAT D
15 GATEA20 1 GA20/GPIO0 AD0/GPI38 63 TEMP_MBAT 35
15 RCIN# 2 64 MBATV
KBRST/GPIO1 AD1/GPI39 MBATV 35
3920_RST# 37 65
ECRST AD2/GPI3A LIGHT_SENSE 22
66 SYS_I
AD3/GPI3B SYS_I 35
MX0 55
20 MX0 KSI0/GPIO30
MX1 56 68 CC-SET
20 MX1 KSI1/GPIO31 DA0/GPO3C CC-SET 35
MX2 57 70 CELL_SLT
20 MX2 KSI2/GPIO32 DA1/GPO3D CELL_SLT 35
MX3 58 71 3VPCU
20 MX3 KSI3/GPIO33 DA2/GPO3E 3VPCU
MX4 59 72 D/C#
20 MX4 KSI4/GPIO34 DA3/GPO3F D/C# 35
MX5 60
20 MX5 KSI5/GPIO35
MX6 61 21 R250
20 MX6 KSI6/GPIO36 PWM1/GPIOE EC_BRIGHT_PWM 22
MX7 62 23
20 MX7 KSI7/GPIO37 PWM2/GPIO10 10K/F 1M byte
MY0 39 26
20 MY0 KSO0/GPIO20 FANPWM1/GPIO12 VFAN_1 5 SPI BIOS
MY1 40 27 R263
20 MY1 KSO1/GPIO21 FANPWM2/GPIO13
MY2 41 28 U21
20 MY2 KSO2/GPIO22 FANFB1/GPIO14 FANSIG_1 5
MY3 42 29 BIOS_CS# 1 8 10K/F
20 MY3 KSO3/GPIO23 FANFB2/GPIO15 CE# VDD
MY4 43 SPI_CLK R262 0 SCK 6
20 MY4 KSO4/GPIO24 SCK
MY5 44 77 MBCLK BIOS_WR# R255 0 SPI_SI 5
20 MY5 KSO5/GPIO25 SCL1/GPIO44 MBCLK 5,35 SI
MY6 45 78 MBDATA BIOS_RD# R251 0 SPI_SO 2 7 SPI_7P
20 MY6 KSO6/GPIO26 SDA1/GPIO45 MBDATA 5,35 SO HOLD#
MY7 46 79
20 MY7 KSO7/GPIO27 SCL2/GPIO46
MY8 47 80 SPI_3P 3 4
20 MY8 KSO8/GPIO28 SDA2/GPIO47 WP# VSS
MY9 48
20 MY9 KSO9/GPIO29
MY10 49 SCK C425 *18pF/50V W25X80VSSIG
20 MY10 KSO10/GPIO2A
MY11 50
20 MY11 KSO11/GPIO2B
MY12 51
20 MY12 KSO12/GPIO2C
MY13 52
20 MY13 KSO13/GPIO2D
MY14 53 6 SUSB#
20 MY14 KSO14/GPIO2E GPIO4 SUSB# 17
MY15 54
20 MY15 KSO15/GPIO2F
C 81 14 HWPG C
KSO16/GPIO48 GPIO7 HWPG 36,37,40
82 15 PM_BATLOW1#
KSO17/GPIO49 GPIO8
83 16 SUSC#
PSCLK1/GPIO4A GPIOA SUSC# 17
84 PSDAT1/GPIO4B GPIOB 17
85 18 SWI#1
PSCLK2/GPIO4C GPIOC
39 ACIN 86 PSDAT2/GPIO4D GPIOD 19 NBSWON# 20
87 25 BL/C#
19 TPCLK PSCLK3/GPIO4E GPIO11 BL/C# 35
19 TPDATA 88 PSDAT3/GPIO4F GPIO16 30 MBATLED1# 20
31 PWR_LED#
GPIO17 PWR_LED# 20
BIOS_RD# 119 32 KBSMI#1
BIOS_WR# RD GPIO18
120 WR
BIOS_CS# 128 34 VRON
SELMEM/SPICS GPIO19 VRON 37,38
R45 *0 89 36 NUMLED#
16,23 PCI_SERR# SELIO/GPIO50 GPIO1A NUMLED# 20
7,17 ECPWROK 76 SELIO2/GPIO43
109 D0/GPXD0
110 D1/GPXD1
112 D2/GPXD2
114 D3/GPXD3 GPIO40 73
115 D4/GPXD4 GPIO41 74 FANLESS# 3
116 75 DNBSWON#1
D5/GPXD5 GPIO42
117 D6/GPXD6 GPIO52 90 THERM_CPUDIE# 3
118 D7/GPXD7 GPIO53 91 CAPSLED# 20
GPIO54 92 NEWCARD_DISABLE# 31
BIOS_A0 97 93
A0/GPXA0 GPIO55 SCROLED# 20
SUSON 98 95 RSMRST_EC#
40,41 SUSON A1/GPXA1 GPIO56
MAINON 99 121
35,37,39,40,41 MAINON A2/GPXA2 GPIO57 VOLMUTE# 26
AUX_EN 100 126 SPI_CLK
41 AUX_EN A3/GPXA3 GPIO58
S5_ON 101 127
41 S5_ON A4/GPXA4 GPIO59 MXLID# 22
B
102 A5/GPXA5 B
103 C150 15pF/50V
20 POWERLED_AMBER A6/GPXA6
104 123 CRY2 CRY2
31 RF_OFF# A7/GPXA7 XCLKO

3
19 BT_OFF# 105 A8/GPXA8
106 Y8
A9/GPXA9 CRY1 CRY1
107 A10/GPXA10 XCLKI 122 32.768KHZ
108 A11/GPXA11
1

2
GND1 11
24 C152 15pF/50V
GND2
GND3 35
124 V18R GND4 94
113 RSMRST_EC# R46 100 +3V R40 *10K HWPG
GND5 RSMRST# 17
R48 10K/F BIOS_A0 69
AGND R30 10K/F NBSWON#
3VPCU

KB3926
R36 4.7K/F MBCLK
R38 4.7K/F MBDATA
R42 *8.2K PM_BATLOW1#

R41 10K/F TPCLK


5VSUS
R44 10K/F TPDATA
R17 470K 3920_RST# C95 1uF/6.3V
3VPCU

om
SCI1# D10 1 2 CH501H-40PT SCI# 17

l.c
A A

ai
PM_BATLOW1# D12 1 2 CH501H-40PT BATLOW# 17

tm
ho
DNBSWON#1 D9 1 2 CH501H-40PT DNBSWON# 17 PROJECT : SW7

f@
KBSMI#1 D8 1 2 CH501H-40PT KBSMI# 17 Quanta Computer Inc.

in
xa
Size Document Number Rev
SWI#1 D11 1 2 CH501H-40PT 1A
SWI# 17 KB3926/ROM

he
Date: Friday, September 28, 2007 Sheet 33 of 44
5 4 3 2 1
5 4 3 2 1

H18

1
H23
*H-TE335X276BC316D236P2*HOLE-h-c276d118p2
H13
*HOLE-h-c315d118p2
H17
*h-te332x365bc330d118p2
H22
*H-h-te335x276bc276d118p2

H26

MBSW1002017
FAN
H27

MBSW1002017
3VSUS +3V +3V
34
1

1
AGND
H12 H11 H14 H15

1
D D
*H-C294D191X163P2-8 *H-C296D163P2-8 *h-tc294bc185d185p2-8 *H-C296D185P2-8 H10 H20 C533 C585 C567 C526 C548 C596
6 5 6 5 6 5 6 5 *HOLE-h-c315d118p2 *H-TC138BC177D87P2 4700P/25V 4700P/25V 4700P/25V 4700P/25V 4700P/25V 4700P/25V

7 4 7 4 7 4 7 4

8 3 8 3 8 3 8 3
1

1
MCH VIN
H16
H21 H7 H19 *h-tc291bc315d236p2-8 H9 H30 H24 H25 H8
*HOLE-h-tc217bc276d118p2
*HOLE-h-c197d110p2 *HOLE-h-c315d118p2 6 5 *HOLE-h-te331be236x181d118x181p2 MBSW7001012 *h-c165d165n *h-c315d118p2 MBSW7002010

2
MTH7 C12 C141 C43 C21 C370 C45 C25 C93 C145 C206
7 4
0.1uF/50V_6 0.1uF/50V_6 0.1uF/50V_6 0.1uF/50V_6 0.1uF/50V_6 0.1uF/50V_6 0.1uF/50V_6 0.1uF/50V_6 0.1uF/50V_6 0.1uF/50V_6

1
8 3
1

1
GND Place along VIN power plane for EMI.

C C
EMI
PV20 PV18 PV19 PV17 PV7 PV8 PV9 PV13 5VPCU
PV16 PV15 PV21
*EMI_2520-N1_NC
EMI_SU_27G EMI_SU_27G EMI_SU_27G EMI_SU_27G *PAD197X98_NC *PAD197X98_NC *PAD197X98_NC EMI_504025-N7 *EMI_2520-N1_NC FDSW1003015

1
C92 C140 C615 C270
C91 C139 C614 C271
GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND
0.1uF/10V 0.1uF/10V 0.1uF/10V 1000pF/50V 1000pF/50V 1000pF/50V 0.1uF/10V 1000pF/50V

2
1

1
+3V

瞶絬 PV12 PV14 PV11 PV10


FDSW1003015

1
FDSW1003015 FDSW1003015 EMI_2520-N1 C69 C372 C110
C127 C109 C68 C41
0.1uF/10V 0.1uF/10V 0.1uF/10V 1000pF/50V 1000pF/50V 1000pF/50V 0.1uF/10V

2
GND

GND

GND

GND

B B
1

3VPCU

1
C138 C597
C396 C412 C142
EMI for DDR DIMM. 0.1uF/10V 0.1uF/10V 0.1uF/10V 1000pF/50V 1000pF/50V

2
+1.8VSUS

5VSUS
C403 C146 C404 C402 C147 C159 C401 C158 C406 C400
4700P/25V 4700P/25V 4700P/25V 4700P/25V 4700P/25V 4700P/25V 4700P/25V 4700P/25V 4700P/25V 4700P/25V

1
C280 C264 C267
C277 C268
+1.8VSUS 0.1uF/10V 0.1uF/10V 1000pF/50V 1000pF/50V 1000pF/50V

2
A C185 C26 A
4700P/25V 4700P/25V

PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
Screw Holes & EMI 1A

Date: Friday, September 28, 2007 Sheet 34 of 44


5 4 3 2 1
1 2 3 4 5

Adapter:19V/3.45A 65W
19V/3.95A 75W
19V/4.75A 90W
B:For battery discharg.

PD24
*SMD24PT
BAT+

PL8 HI0805R800R-00/5A L-F JP7


35
1 2
PRWSRC
200045MR009S515ZL-9P-R
PQ11 PL7
A 1 8 BATT+ A
1
B:For inrush 2 7 4
current. 3 6 HI0805R800R-00/5A L-F
CON9 PL11 VA PR131 VIN BATDIS_G 2 3
4 5 10
PD25 VAD AO4430 PR23
FBMJ3216HS480NT(6A) PDS1040/40V/10A 0.01/1W/3720 5
PQ40 11
1 2 AO4407 100K/F PR20 6 8
2 3 8 1 1 2 9
3 PC114 PC115 1 7 2 33 MBATV PR19
7
0.1uF/50V_6

4 6 3

1P

2P
0.1uF/50V_6

5 PR130 B:For inrush 5 PC14


6 current. PR21 330
3VPCU

0.01uF/25V
10K_8 330 PR18

4
PC123 8724_3D3_LDO 14K/F_6
PR133 100/F 1U/25V/X5R/08
PWR_CON ACOK_IN 10K/F

8724CSSN
8724CSSP
5,33 MBCLK
B:For PQ35 power 8724_3D3_LDO
C stage PR134 47K/F on/off. TEMP_MBAT 33
BATDIS_G
VH28 PR110 5,33 MBDATA

1
PD8

1
PD26 *SW1010CPT PD9
1 2 100K/F PC30
BATDIS_G 39
B:For PQ35 power PR109 100K/F VAD-1

UDZS5.6B
UDZS5.6B

0.01uF/25V
on/off. B:For batt
C:For power VAD CELL_SLT = 1 -- 3 S
discharge.

2
3
sequence. VAD-1 B:modify pin error. VAD-1
CELL_SLT = 0 -- 4 S
PR38 PR30 PQ30
PR36 PD10
3

8724CELLS
PQ19 PD14 PC103 1uF/25V_8 2 CELL_SLT 33 10K/F BAT54S

8724LDO
IMD2 825/F_6 1.33K/F_6 PC26 1
VH28

SW1010CPT L-F
B 2N7002E B
3
PD23 PC91 VIN

27

26
PR41

4
PU11 0.01uF/25V 2
1 PC101 PC102 PC110 PC111

CSSP

CSSN
33_6
4

PQ14

1
SW1010CPT L-F

1uF/10V
PC106 PC24 PR40
IMZ2

2200pF/50V

0.1uF/50V_6

10U/25V_12

10U/25V_12
33,37,39,40,41 MAINON 8724DCIN 1 17 1uF/10V 0.1uF/50V_6 100K
DCIN CELLS

2
39 8724ACIN 8724ACIN 10 2

2
PR113 ACIN LDO
ICTL 13 22 8724DLOV
33 CC-SET ICTL DLOV
0 24 8724BST PR116 B:discharge.
ACOK# BST PR32 47K/F
39 ACOK# 11 ACOK
25 8724DHI 0_6
DHI

39 8724LDO 8724LDO 15 PC95 PQ32


VA PC96 VCTL 0.1uF/50V_6 G1 BAT+
1 D1 8
PD18 CH501H-40PT 8724_3D3_LDO 12 SI4914DY-T1-E3 PR33 47K/F
VAD-1 REFIN 8724LX PR111
2 1 LX 23 2 D1 S1/D2 7
0.1uF/10V PL9 0.02/1W/3720 VIN VAD-1
21 8724DLO 3 G2 6 1 2 8724LXR 1 2 BAT+
DLO
1

PR114 PR120 PR118 12.4K/F 9 ICHG PD12

2
20 4 S2 5 4.7uH/5.5A PC19 PC92 PC94 PD13

1P

2P
75K/F_6 PGND
33 SYS_I 28 IINP

10U/25V_12

10U/25V_12

*10U/25V_12

*SW1010CPT L-F

SW1010CPT L-F
100K/F
PR117
2

8724ACIN 19 8724CSIP

1
PR112 12.4K/F 8724SHDN CSIP 8724CSIN
8 SHDN CSIN 18
C PC99 C
PR43 8724CCV 7 16 BATT+ PC20
CCV BATT
0.01uF/25V

25.5K/F_6 20K/F 8724CCI 6 B:for meet PU8


8724CCS 5 CCI 8724REF ACOK_IN 0.1uF/50V_6

5
CCS REF 4 application SPEC. TL331
PR122 PR123 MP:power
8724CLS + 3
3 saveing.
GND

GND

1K/F CLS PC104 5VPCU 4


B:for meet 1
PC109 PC108 39.2K/F 3VPCU -
application SPEC. 3VPCU
PC105 PR28 PR29
29

14

10K/F
1uF/6.3V

2
MAX8724 PR44 PQ37 22K

3
0.1uF/10V

0.01uF/25V

0.01uF/25V

3VPCU VIN PR126 DTC144EUA


30K/F_6 PC112 PR128
1000pF/50V 0A 2 D/C# 33
1 PR124 PU12 22K PC13

5
PD15 475K/F LMV331 PR127 220pF/50V

1
SW1010CPT 1 + *0A
4
2

3 -
BL/C# D/C# M/A# Status

om
Battery Low = 8V PC113 PR129
0 0 0 Chareg A batt

2
0 0 1 Charge M batt PR125
3
1000pF/50V

l.c
0 1 0 Diccharge A batt 332K/F 220K
0 1 1 Discharge M batt

ai
1 0 0 Free Dicharge 2 BL/C# 33
PQ36

tm
1 0 1 Free Dicharge
1 1 0 Free Dicharge 2N7002E

ho
D D
1 1 1 Free Dicharge
1

f@
C stage

in
xa
PROJECT : SW7

he
Quanta Computer Inc.
Size Document Number Rev
SYSTEM CHARGER (MAX8724) 1A

Date: Friday, September 28, 2007 Sheet 35 of 44


1 2 3 4 5
5 4 3 2 1

DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+12V_ALW


PR103 390K

36

1
PD21 PR105 PR169 VIN

1
VIN

*UDZS5.6B
150K/F_6

2
0

2
PC151 PC150 PC149 PC160 PC158 PC163
D D
I_lim*MOSFET(RDSON)=V_ILIM(mV)/10

2
5V_AL PR168 +5V_VCC1

1
1000pF/50V
V_ILIM(mV)=5uA*R_ILIM

0.1uF/50V_6

10U/25V_12
1000pF/50V
+

10U/25V_12
PR100 PC159 +

0.1uF/50V_6
2 1
0_8

1
PR170 47_6

2
*0 1uF/10V TOPN: OUT1/OUT2

2
GND=400KHz/500KHz
REF = 400KHz /300KHz
PC155 PC152 VCC5=200KHz/300KHz

1
PR167
5VPCU

1
PC146

0.1uF/50V_6
1uF/10V
3VPCU

5
6
7
8
*0 0.1uF/10V
PQ56
0.02A B:for OCP.
0.06A

2
2 1 4

8
7
6
5
SI4800BDY L-F
PR165
OCP=12A PC161 0 +5V_VCC1

42
B:for OCP. OCP=12A

8
7

6
5
4
3
2

1
5V_DH PC145 PL17 3VPCU
Vout=0.7(Ra+Rb)/Rb 4
PR102 0 *0.1uF/10V *0.1uF/10V 2.2uH_MPL73-2R2

PAD
LDOREFIN

IN
RTC

VCC
TON
LDO

ONLDO

REF
5VPCU 2 1 9 32 PR162 PC88 PC154 PC82

3
2
1
BYP REFIN2 340K/F_6 3V_LX
Rb around 49.9k 2 1 10
11
OUT1
31 1 2
1 2
PC83
PL16 PC85 PQ57 PR101 01 FB1 ILIM2
2 12 ILIM1

*0.1uF/50V_6

330U/6.3V/ESR-25
PC86 PC84 PC148 PR172 2.2uH_MPL73-2R2 1 PGOOD1 13 30
2
3
PGOOD1 OUT2

5
6
7
8

1
0.1uF/50V_6

2.2uF/6.3V_6
SI4800BDY L-F PR171 340K/F_6 14 PU14 29
ON1 SKIP

1
1 2 5V_LX 15

1
DH1

2
C ISL6236 PGOOD2 C
16 LX1 PGOOD2 28
36 4 PR161

2
PAD
2

8
7
6
5
330U/6.3V/ESR-25

37 PAD ON2 27
1

2
*0.1uF/50V_6

0
Ra 38 PAD
1

2
2.2uF/6.3V_6

0.1uF/50V_6

*0 39 26 3V_DH

1
5V_DL PAD DH2 PQ59
4 40

SECFB
1

PAD

AGND
PGND
PC162 AO4704

BST1

BST2
25

VDD
PAD
PAD
PAD
PAD
2

LX2

DL1

DL2

3
2
1
2
PC144 Rds(on) 16m ohm
2

0.1uF/50V_6

41
35
34
33
17
18
19
20

21
22
23

24
PR173 PR174 PR166

1
PQ58 0.1uF/50V_6
1
2
3

0 AO4704 3V_DL
Rb B:for OCP. 0_6 0_6
B:for OCP.
1

Rds(on) 16m ohm 5VPCU


PC156 5V_AL PR163 0
1 0.1uF/50V_6 PGOOD2 2 1 HWPG 33,37,40
PD22 3 2 1
5VPCU PJ8 PGOOD1 2 1
2

2
PC157 PR175 0 3VPCU 3VPCU
B:for cost down.
5V_S5
2

PC89 BAT54S *SHORT-1A

0.1uF/50V_6
B:for timing.
3

1 B:for cost down.

3
PQ55 PC153
0.1uF/50V_6

0.01A
1

1
2
5
6
PD20 3 4.7uF/6.3V_6 PR159
2 AO3416 0/04
41 S5_OND
2 3 2 1 2 PQ51
41 LAN_ON 41 S5_OND
5V_S5 AO3416
S0-S5 BAT54S SECFB -2V PQ20
PR104 AO6402L
1

4
1

2
B +12V_ALW +12V_ALWP 1 2 PC140 B
5V_S5 18,41

1
PR106 *.01U/25V/04
2

PC143 39K/F

1
0.1uF/10V PR107 PC87 200K/F LANVCC 3V_S5
1

2
0.1uF/50V_6 LANVCC 29,41 3V_S5 16,17,18,41
100K/F
1

PR99 100K/F
2 1 1 2 PC32 PC141
5 SYS_SHDN# 0.1uF/10V

5VPCU
PR176 0

3VPCU
0.1uF/10V
LANVCC
5V_AL 3VPCU
B:for cost down.
0.7A
S0-S5 3V_S5
5
6
7
8

5VPCU
B:for timing.

1
2
5
6
PQ53
0.07A
5
6
7
8

4 3
41 MAIND AO4468
+5V
PR158
0/04
PQ50 41 SUSD
PQ54 3VSUS
5
6
7
8

AO6402L
2 1 4 S0-S5
0.48A

4
PQ52 41 MAIND AO4468 3VSUS
+5V
6.14A
2

4 AO4468 PC138
+3V
3
2
1

41 SUSD *.01U/25V/04 +3V


S0-S3
5VSUS
1

5VSUS
S0-S1
6.57A
3
2
1

PC147 PC142
0.1uF/10V
A 0.1uF/10V
1.74A 3VSUS 17,19,27,31,34,37,41 A
3
2
1

+5V 3,5,10,18,20,21,22,25,26,28,41
PC137
S0-S1
PC139 0.1uF/10V
S0-S3
+3V 2,5,7,9,10,12,14,15,16,17,18,19,21,22,23,24,25,26,28,31,33,34,38,41
0.1uF/10V
5VSUS 17,19,22,32,33,34,39,41
PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
5V/3V/+12V_ALW(MAX8778) 1A

Date: Friday, September 28, 2007 Sheet 36 of 44


5 4 3 2 1
5 4 3 2 1

37
D D

VIN

+1.5V_RUN 8717BST2 8717BST1

1
VIN
PD19

2.64A
PC76 PC79 PC80
DAP202U PC67 PC68 PC66 PC65 +1.05V_VCCP
5VPCU

17.15A

3
10U/25V_12

0.01uF/25V

1000pF/50V
PC71 PR156
OCP=6A 8717VCC PC77

8
7
6
5

1000pF/50V

0.01uF/25V

10U/25V_12

10U/25V_12
10_6 C stage
OCP=20A

5
6
7
8
1uF/10V 1uF/10V
S0-S1 PQ25 4
PC133
SI4800BDY L-F PR155 4 PQ23

1
+1.5V_RUN 0.1uF/50V_6 0_6
13 17 IRF7413Z
S0-S1
DCR 13m OHM

VCC
BST2 VDD PR94 PC78
8717DH2 14 23 DCR 3.8m OHM

1
2
3
PC136 PC134 PC135 PL15 DH2 BST1 +1.05V_VCCP
C 3,4,10,18,31 +1.5V_RUN 8717LX2 15 22 8717DH1 0_6 0.1uF/50V_6 PL14 C

3
2
1
LX2 DH1

8
7
6
5
3.8UH/6A L-F 21 8717LX1 PC129 PC128 PC63 PC130
LX1 +1.05V_VCCP 2,3,4,6,9,10,15,18
150U/2V/ESR-15/SP

PR157 PQ24 1.5UH/20A-MPO104-1R5

5
6
7
8
1.33K/F_6 4 8717DL2 16 20 8717DL1
DL2 DL1
1
2.2uF/6.3V_6

0.1uF/10V

1
0.1uF/10V

2.2uF/6.3V_6

330UF_2.0V_ESR9

*220U/2.5V_ESR15
SI4800BDY L-F 8717CSH2 12 24 8717CSH1 PR146
CSH2 CSH1 PQ22
4 +
2

11 25

2
CSL2 CSL1 IRF8113 1.78K/F_6
Rc

2
PC132 0.22uF/10V_6 10 26 8717FB1
1
2
3

PC73 FB2 FB1


PR93 PC75 PC74 PC131 PR91 PC72
PR154 *100pF/50V 8717REF *100pF/50V
Ra

3
2
1
47pF/50V
5.11K/F_6 3 0.22uF/10V_6 *100pF/50V
8717FB2 1.33K/F_6 8717_ON1 REF
6 ON1
PR148 8717_ON2 7 PR152 511/F_6
ON2 PC70
33,38 VRON
PR89 8717ILIM2 8 0.22uF/10V_6
*0 ILIM2
10K/F PR86 8717ILIM1 28 PR149 0 1.78K/F_6
PR147 0 ILIM1 8717PG1
Rb MAINON PGOOD1 27
Rd
9 8717PG2 Vout=(Rc+Rd)/Rd PR92
1K/F PGOOD2
33,35,39,40,41 MAINON 8717REF 3VSUS
PR153 0 10K/F
1 2
Rd around 10k
2 5 8717REF
SKIP1 FSEL

1
B B
Vout=(Ra+Rb)/Rb

AGND
AGND

PGND
PD28 PC69 4 PR150 0 PR151
SKIP2
SW1010CPT L-F 1uF/6.3V 100K/F
Rb around 10k 29 FSET: GND=200KHz
19

18

2
PU10 REF = 300KHz
8717REF VCC5=00KHz HWPG 33,36,40
MAX8717

PJ7 PD29
2 1 VRON 33,38
PR88
1

*SHORT-1A 8717LX2 8717LX1


PR85 CH501H-40PT

1
C stage 102K/F_6 140K/F_6
PC81 PC64
2

8717ILIM1 8717ILIM2 2200pF/50V 2200pF/50V

2
Vcs=I_L(A)*L_DCR(mOHM)=V_ILIM(mV)/10
1

om
PR87 PR90

100K/F 100K/F For EMI

l.c
2

ai
tm
A A

ho
f@
PROJECT : SW7

in
xa
Quanta Computer Inc.

he
Size Document Number Rev
+1.5V_RUN/+1.05V_VCCP (MAX8717) 1A

Date: Friday, September 28, 2007 Sheet 37 of 44


5 4 3 2 1
1 2 3 4 5
5VPCU

PR80

0_6
PC120 PC55 PC51 PC50
VIN

PC52
38

2
PC49
PD17

1
2200pF/50V

0.1uF/50V_6

10U/25V_12

10U/25V_12

10U/25V_12
CH501H-40PT

10U/6.3V_8
A PR76 A
VIN

2
5
10_6

8771VCC
PR54 4 PQ38
PC46
237K/F/06 PR78

1
PC48 AOL1414 ( 44A )

19

25
2.2uF/6.3V_6
2.2_6 0.22uF/10V_6 VCC_CORE

2
8 8771TON PL13

VCC

VDD

3
2
1
TON
30 8771BST1_R 0.45_25A_SPM10040T
BST1 PC57 PC60 PC62 PC127
PR60 0 28 8771LX1 1 2
7,17 DELAY_VR_PWRGOOD 2
LX1
VCC_CORE

4
PWRGD

5
29 8771DH1
DH1

*330UF_2.0V_ESR9
PR61 0 #CLKEN 1
17 VR_PWRGD_CK410# CLKEN

2
*0.1uF/50V_6

330UF_2.0V_ESR9

330UF_2.0V_ESR9
4 CPU_VID0
PR77 0 31
DL1 26 8771DL1 4 PQ43 4
MP stage 44A

2
D0

2
PR75 0 32
4 CPU_VID1 D1
PR74 0 33 27 AOL1412 PR81
4
4
CPU_VID2
CPU_VID3
PR73 0 34
D2
D3
PGND1 2.55K/F OCP=50A
PR72 0 35 PR55 PC37
4 CPU_VID4 D4
PR70 0 36 1 2 PQ42 PR82 PR145
4 CPU_VID5

3
2
1

3
2
1

1
PR68 0 D5 *4700P/04 AOL1412
4 CPU_VID6 37

8771FB
D6 *3.48K/F/04
4.02K/F NTC 10K_6-B4.25K/06
B PR63 PR62 B
PR59 0 8771PSI 3 12 PC45
3 PM_PSI# PSI FB TP_VCCSENSE 4
0.22uF/10V_6
PR67 0 #SHDN 38 3.48K/F 100 8771CSP1
33,37 VRON SHDN PR53 PR71
3,7,15 H_DPRSTP# PR64 0 DSTP 40 PC42 PR83 8771CSN1
PC43 DPRSTP 1000pF/50V 100 VIN
PR66 0 DPSLP 39 20K/F 0
7,17 PM_DPRSLPVR DPRSLPVR PC38
VCC_CORE
*0.1uF/10V PC39 10 8771CCI 1 2 8771CCI2
8771CCV CCI PC121 PC54 PC119 PC53 PC118
C stage 1 2 9 CCV 470pF/50V PR65 VIN
100pF/50V 13 8771GNDS
GNDS TP_VSSSENSE 4
reserve for power up PR56 8771TIME 7 TIME

10U/25V_12

10U/25V_12

10U/25V_12
sequence ---andrew 17 8771CSP1 100
CSP1

2200pF/50V

0.1uF/50V_6
71.5K/F PC40 16 8771CSN1 PR84
CSN1

1
8771REF 11 PC41
REF 8771CSN2 100
CSN2 15
0.22uF/10V_6 18 1000pF/50V

2
GND 8771CSP2 PQ39 VCC_CORE
41 EP CSP2 14 4

PR51
8771THRM 6 21 8771DH2 AOL1414 PL12
8771VCC THRM DH2
10K/F 24 8771DL2
+3V PR52 DL2 PC56 0.45_25A_SPM10040T PC61 PC124 PC59

3
2
1
*NTC 10K_6-B4.25K 22 8771LX2 1 2
LX2
5

4
VRHOT BST2_R
BST2 20

5
PR57 8771POUT 4 POUT

1
330UF_2.0V_ESR9

330UF_2.0V_ESR9

330UF_2.0V_ESR9
C 23 C
56 PGND2
2

2
*0.1uF/50V_6
PU9 MAX8770 4 PQ44 4
PR58 PR79 MP stage

2
2
1
10K/F PC47 AOL1412 PR140
PJ9 2.2_6 0.22uF/10V_6 2.55K/F
POUT 1

PQ41 PR142 PR144

3
2
1

3
2
1

1
8771BST2 AOL1412
PC36 *SHORT-1A
4.02K/F NTC 10K_6-B4.25K/06 distribute evenly between N side and S
1

0.1uF/10V side, preferably on secondary side.


PD16 PC44
CH501H-40PT Use differential routing away from switch nodes
8771CSP2 0.22uF/10V_6 8771LX1 and 8771LX2
2

8771CSN2 PR69
C:For power 0
sequence. 5VPCU Sense lines are 18 mil wide, Z0=27.4 Ohm.
Use differential routing with 7 mil spacing.
Route external layer with solid GND reference
(no split planes).
Use 25 mil separation from any other signal.

Add layout note on pins 22 and 28 of MAX8771


controller. These nets have large voltage swings.
Need to route them away from the sensitive areas that
D are trying to detect small changes in voltage, such as D
the voltage sense VccSense VssSense lines.

PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
VCC_CORE(MAX8770) 1A

Date: Friday, September 28, 2007 Sheet 38 of 44


1 2 3 4 5
5 4 3 2 1

39
E E
8724LDO 35
ACOK 3 1 8724LDO BATDIS_G 35
BATDIS_G

3
PR34 PQ9 100R PR27
10K/F
DTA124EU

2
2 PQ12
33 ACIN ACOK# 2N7002E

VH28 PR37

1
15K PC9

1
PD27 1UA/10V ACOK# 35
UDZS5.6BTE-17
8724ACIN 35

2
8724ACIN
D
VAD-1 VAD-1 D

3
PR141

1
8724ACIN
200K PR16 PD7
PR139 PR137 2 PQ10

3
0 PQ46 1M

1
200K CH501H-40PT 2N7002E

2
2SB1197K
2 2

1
3
PR143 PQ45

3
2N7002E

1
2 200K

PR138
PQ47
200K 2N7002E

1
C C
C stage

+1.8VSUS

PC116 PC117
10U/6.3V_8

PU13
1

3 VIN NC 5
+1.25V
0.1uF/10V
2

G966-25ADJ
PC125 PC126 PC58
B
PR132 0
EMI VO 6 +1.25V 7,10,18 B

33,35,37,40,41 MAINON 2 VEN


1

5VSUS 4 VPP GND 8


10U/6.3V_8

10U/6.3V_8

0.1uF/10V

om
2
ADJ

1 POK GND1 9
PC122

l.c
7

ai
PR136

tm
0.1uF/10V

+1.25V

ho
PR135 56.2K/F_6
EMI

f@
R1
1.28A

in
R2
100K/F

xa
Vo=0.8(R1+R2)/R2

he
R2<120Kohm
A
S0-S1 A
PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
+1.25V&+2.5V 1A

Date: Friday, September 28, 2007 Sheet 39 of 44


5 4 3 2 1
A B C D E

PR25
5VPCU
40
0_6 PR15
4 4
51116_V5IN 51116_V5FILT
PC12
10_6 PC11
+1.8VSUS

2
4.7uF/6.3V_6
VIN PD11 +

1uF/10V
PR24
CH501H-40PT

1
7.15K/F_6

11.86A PC22 PC21 PC97 PC100

1
51116_BST_2

51116_CS
10U/25V_12

10U/25V_12
OCP=16A

0.1uF/50V_6

2200pF/50V
PR39

8
7
6
5
PC23

15

14
S0-S3 0_6

V5IN

V5FILT
4 CS 16
0.1uF/50V_6 51116_BST 22 PR13 0
VBST 51116_PGOOD
PGOOD 13 HWPG 33,36,37
PQ33
+1.8VSUS 51116_DRVH 21 12
DRVH NC
PL10 SI4684 11 51116_S5 PR9 0
SUSON 33,41

1
2
3
PC35 PC31 PC28 PC29 S5
7,9,10,14,34,39,41 +1.8VSUS 51116_LX 20 10 51116_S3 PR10 0
LL S3 MAINON 33,35,37,39,41

8
7
6
5
1.5UH/20A-MPO104-1R5 23 +1.8VSUS
VLDOIN
*330U/2V/ESR-9/SP

330UF_2.0V_ESR9

2.2uF/6.3V_6

0.1uF/50V_6

3 PQ35 4 51116_DRVL 19 3
DRVL
+ + +
NC 7
PC16 PC17 PC18 PC93
EMI
Ra

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8
PR11 FDS6676AS 1
PR12 VTTGND
18 PGND

1
0.1uF/10V
PC7 17
0 CS_GND +1.8VSUS
4

1
2
3
*2K_BF 51116_VDDQSNS MODE
8

2
*100pF/50V VDDQSNS PR22 0
51116_VDDQSET 9 24
VDDQSET VTT +0.9V_DDR_VTT

VTTSNS 2

VTTREF
51116_V5IN 51116_COMP6 25
51116_V5IN COMP PAD
26

GND
PAD
PAD
PAD
PR14 0 PAD
PR8 0
Rb +0.9V_DDR_VTT

3
29
28
27
PU7
PR7 PR17

TI51116 0.9V/10mA
Fix 1.8V Output *10K_BF 0
V_DDR_MCH_REF S0-S1
V_DDR_MCH_REF V_DDR_MCH_REF 7,14

0.9V/10mA PC10
PC8

220pF/50V
0.22uF/10V_6
2
Ra=Vout-0.75/0.75*Rb S0-S1 2

Rb value from 100K to 300K ohm EMI

VDDQSET VDDQ(V) VTTREF and Vtt Note


Mode Discharge Mode
GND 2.5 V_ vddqsns/2 DDR
V5IN No discharge V_TRIP(mV)=R_TRIP(Kohm)*10(uA)
I_OCP=V_trip/Rds_on+I_Ripple/2 V5IN 1.8 V _vddqsns/2 DDR2
VDDQ Tracking discharge
FB adjustable V_VDDQSNS/2 1.5V<VDDQ<3V
Gnd Non-tracking discharge

1 1

PROJECT : SW7
Quanta Computer Inc.
Size Document Number Rev
DDRII +1.8VSUS/+0.9V_DDR_VTT 1A

Date: Friday, September 28, 2007 Sheet 40 of 44


A B C D E
1 2 3 4 5

41
A A

VIN
VIN 3VSUS 5VSUS +1.8VSUS +12V_ALW LANVCC
+12V_ALW

PR42 PR95 PR160 PR108 PR31


PR121 PR48 PR115
1M/F 22_8 22_8 22_8 1M/F

1M/F 22_8 1M/F


SUSON_G SUSD
SUSD 36
LAN_POWER_G LAN_ON
LAN_ON 36

3
3

3
PQ15 PR26 PQ26 PQ49 PQ8 PQ7 PC15 PQ17
2 2 2 2 2N7002E PQ31
2 2 PR119 PC98
33 AUX_EN

2
33,40 SUSON

1
1M/F 2 2
2N7002E 2N7002E 2N7002E 2N7002E 2200pF/50V
DTC144EUA PQ34 1M/F 2200pF/50V
1

2
2N7002E
DTC144EUA

1
B SUSON_G B
LAN_POWER_G

PC90
*33pF/50V_6 PC107
*33pF/50V_6

EMI
EMI

VIN 5V_S5 3V_S5 +12V_ALW VIN +5V +3V +12V_ALW

PR98 PR96 PR47 PR45 PR164 PR97 PR35

PR50 1M/F 22_8 22_8


22_8 22_8 1M/F 1M/F
1M/F
MAINON_G
MAIND 36
S5_ONG S5_OND
S5_OND 36

3
C C

3
PC25
3

1
PR46 PQ48 PQ28 PQ13
3

3
2
PR49 PQ29 PQ27 PQ18 2 2 2200pF/50V

2
2 2 2 2 PC33 2
33 S5_ON 33,35,37,39,40 MAINON
1

1M/F 2N7002E 2N7002E


1M/F 2N7002E

1
PQ21 2N7002E 2N7002E 2N7002E 2200pF/50V PQ16
1

1
DTC144EUA DTC144EUA
1

MAINON_G
S5_ONG

PC27

om
PC34 *33pF/50V_6
*33pF/50V_6

l.c
EMI

ai
EMI

tm
ho
D D

f@
in
xa
PROJECT : SW7

he
Quanta Computer Inc.
Size Document Number Rev
DISCHARGE 1A

Date: Friday, September 28, 2007 Sheet 41 of 44


1 2 3 4 5

S-ar putea să vă placă și