Design and Analysis of a Bulk Micromachined Distributed
Digital Microwave Phase Shifter on Glass Substrate
Min Miao 1,2*, Yufeng Jin1, Guoying Wu1, Yilong Hao1
1.National Key Laboratory on Micro/Nano Fabrication, Inst., of Microelectronics, Peking Univ., Beijing 100871, China
2. Dept. of Information & Telecom Engineering, Beijing Information Tech. Inst., Beijing 100101, China
* Email: miaomin@ime.pku.edu.cn, Tel: +86ˉ10ˉ62752536
Abstract
In this paper, the design and analysis of a bulk
micromachined distributed digital microwave phase
shifter is introduced. This device, with nonlinear delay
line architecture, utilizes 12 butterfly-like microbridges
on glass substrates as loading varactors to deliver true
time delay performance. The loading capacitance
switches between two values, with the pull-in and
deformation of the microbridges, introducing phase shift
proportional to frequency. Microwave performance is
analysed with finite element method. The phase shift
anticipation conforms to the test result, which is over
180eat 20 GHz, with a return loss less than ˉ10dB
( 5~23GHz). The tested insertion loss is 3.8~7dB, due to
thin metalization of CPW. The microbridge design not
only eliminates thermal mismatch between all-metal
bridge and dielectric substrate and ensures stability
under high temperature, but also guarantees much lower
creeping and fatigue probabilties than metal bridges.
Key Words: RF MEMS, bulk micromaching, phase
shifter, finite element method, nonlinear delay line
1. Introduction
Phase shifters have been crucial components in phased
array radar [1] and smart antenna [2], for steering T/R
beam. Most researches in this arena have been centered
around ferrite and semiconductor devices [3]. Micro
electro-mechanical system(MEMS) technology, is now
reforming the outlook of microwave passive components,
and bringing a new breed of phase shifters demonstrating
significant advantages over GaAs MMICs [4]. However,
MEMS phase shifters ever reported use surface micro-
machined pure metal bridges over coplanar waveguide
(CPW) or microstrip transmission line (TL), as loading
varactor or path switch [4-6]. There are several issues in
these designs, including thermal incompatibility between
micro-bridges and substrate and metal creeping, etc..
A bulk micromachined distributed phase shifter has been
demonstrated by the authors. Its Si based microbridge,
with laminated layers, is fabricated on Pyrex 7740 glass
substrate. As far as we know, it is the first bulk
micromachined phase shifter ever reported. The principle,
structure design, electromagnetic analysis and test results
will be presented in detail in this paper
1-4244-0161-5/06/$20.00 ©2006 IEEE
2. Principle
The device is based on nonlinear delay line (NDL)
concept proposed by Zhang W.M.[7], which has true
time delay and helps to remove beam squinting in
phased array. NDL is periodically loaded by varactors.
As the distributed capacitance of the NDL changes with
the varactor capacitance, such properties of this synthetic
TL as characteristic impedance and phase velocity can be
adjusted by varactor DC bias voltage, which is the
essence underlying distributed phase shifter circuit. Ref.
[7]-[10] have given detailed formulae.
3. Device and fabrication process design
3.1 Device design
The microbridge design (Fig.1, 12 in total), along with
the CPW, can be regarded as a switch Cm (between
midsection Au layer and CPW Signal) in series with 2
parallel capacitors Cs (between sidewing Au layer and
CPW GND). The loading capacitance seen by CPW is
Cload= 2CmCs/(2Cs+Cm). (1)
The total area of both sidewings’ Au layers (175×200μm
each) is far larger than that of the midsection overlapping
CPW Signal (50×100μm), Cload § Cm with no DC voltage
applied (denoted as UP state). Intrinsic stress make the
bridge dome upward [Fig.1(a)] with a level midsection
(having uniform air gap of about 10μm beneath). Cm is
so small that the bridges exerts negligible loading on
CPW, and the CPW characteristic impedance is 75Ÿѽҏ to
ensure return loss <ˉ10dB.
When a DC voltage over a threshold is applied between
its Si layer and CPW, the bridge is pulled down [DOWN
state, Fig.1(b)]: the mid-section snaps onto CPW Signal,
and the sidewings’ edges along x-axis contact CPW
GNDs. Stiffness of the sidewings prevents their
flattening, and thus 2 almost fixed capacitors (i.e.
CsDOWN) form between their Au layer and CPW GNDs.
Cm increases by 80 times and Cload approximately equals
to 2CsDOWN. Thus a binary variation of Cload with a
UP:DOWN value ratio of 1:4 is realized, and all the
bridges together introduces a large digital phase shift.
The microbridge design, with heavily B doped single
crystal silicon (SCS) layer as its skeleton, eliminates
thermal mismatch between pure metal bridge and
dielectric substrate, since the thermal mismatch between
SCS and Pyrex glass is minimal over a wide temperature
 Heavily B doped (P+) single crystal Si Layer (2Pm)
Bridge midsection Folded flexure suspension

Anchor ( Only P+ Si Layer) SiO2(200nm)

CPW Signal
Pyrex
Au(800nm)

z y SiN(200nm)

x
Folded
suspension CPW Ground (GND) Bridge sidewing
flexure ( Only
P+ Si Layer)
y direction view
˄a˅ Unbiased (UP State) ˄b˅The collapse of the bridge mid-section˄the second
pull-in of the bridge, DOWN state˅
Figure 1. The structure and binary actuation of a loading bridge (varactor).
SiO2 P+ Si
Si

(a) KOH shallow trench etching, defining the height of the bridge.
Au
SiN
(c) LPCVD SiO2 Depositing˄2000 Å˅ü> Cr/Au Sputtering
˄8000 Å˅ ü>PECVD SiN˄2000 Å˅ü>Patterning of B++
layer (ICP).
Figure 2.
range. Thus reliability at elevated temperature is
guaranteed. In addition, the SCS skeleton may greatly
lower creeping and fatigue failure probabilities. Twenty
samples have been kept in a oven with N2 atmosphere at
240ćfor 240 hours, and no performance variation is
observed afterwards.
The SCS is also patterned into resistor lines for biasing,
which eliminates additional steps to fabricate Si alloy
lines as in [8-10]. No DC blocking capacitors are needed
when realizing a multi-bit device.
3.2 Fabrication process design
The fabrication process flow is briefly displayed in Fig.2
and the fabricated device is shown in Fig. 3.
(b) Heavy Boron Doping, defining the thickness of the micro bridge Si layer.
SiO2
Pyrex 7740
(d) Anodic bonding of Si wafer onto Pyrex substrate. Thinning down with
KOH or TMAH or dry etching.
Bulk Si micromachining of the device.
4. Electromagnetic Analysis
Mechanical analysis has been discussed in detailed in a
paper by the authors [11]. In the microwave performance
analysis, 3 dimensional modeling (Fig.3) and finite
element method are utilized. With its ports set to lumped
gap source, the microwave performance of the device
can be simulated with simulation tools, such as HFSSTM
(Ansoft Corp., www.ansoft.com).
5. Results and discussions
The analysis results are compared with tested results
(with HP 8510C Vector Network Analyzer and Cascade
Probing Station) in Fig.5. The phase shift anticipation

Air

Microbridge
Substrate
Lumped Gap Port
Figure 4. Solid model of the phase shifter, for
Figure 3. Fabricated microbridge array finite element analysis (FEA).

Figure 5. Simulated Current density distribution
at the lumped port.
˄a˅UP state
˄b˅DOWN state
Figure 5. Comparison of the simulated and tested
performance of the phase shifter
conforms to the test result, which is over 180eat 20
GHz, with good return loss (<ˉ10dB) at frequency
5~23GHz. However, the tested insertion loss is higher,
3.8~7dB, due to thin metalization of CPW (8000Å).
6. Summary
The design and analysis of a bulk micromachined
distributed digital phase shifter has been introduced. The
microbridges design ensures a loading capacitance
switching between two fixed values, and implements
digital phase shift. Its microwave performance is
analysed with finite element method. The phase shift
anticipation conforms to the test result, which is over
180e@20GHz, with return loss <ˉ10dB@ 5~23GHz.
The tested insertion loss is a little higher, 3.8~7dB.
The mechanical design not only eliminate the thermal
mismatch between all metal bridge and dielectric
substrateˈand ensure stability under high temperature but
also ensure much lower creeping and fatigue failure
probability than all-metal bridges. Besides, using heavily
B-doped SCS as biasing lines eliminates additional steps
to fabricate alloy biasing lines and no DC blocking
capacitors are need to realize a multi-bit device.
Acknowledgments
The research has been sponsored by National Natural
Science Foundation of China ( Project 60501007) ,
Beijing Municipal Commission of Education (Project
KM200610772003, China) and National Key Laboratory
on Micro/Nano Fabrication Technology Foundation
(China). The authors hereby express their thankfulness to
Nanjing Electronic Devices Institute (China) for their
help with the use of Ansoft HFSS software.
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