Documente Academic
Documente Profesional
Documente Cultură
FETs. Making the switch to GaN involves assessing how the devices behave
compared to Si LDMOS to understand what aspects of a design need to be
rethought. This application note compares device behavior between the two
technologies and highlights issues that are important to traditional LDMOS
designers.Substrates for GaN RF Devices
GaN is primarily offered on silicon (Si), silicon carbide (SiC), and sapphire
substrates and it is sometimes difficult to understand the pros and cons of the
various substrates. This application note gives an overview of GaN substrates
and the advantages and disadvantages of each.Bias Sequencing and Temperature
Compensation of GaN HEMTs (UPDATED June 2009) Click HERE for the
related spreadsheet
GaN HEMTs are depletion mode devices, meaning a negative gate voltage and
gate-drain bias sequencing is required for proper operation. The circuits to
implement these functions are well understood by GaAs FET users and can be
reused by GaN users. This application note discusses proper biasing requirements
and bias circuit recommendations, highlighting the mistakes most commonly made
when using depletion mode devices.Broadband Performance of GaN HEMTs
Broadband applications are the heart of today’s market for GaN RF power devices.
The higher operating voltage and power density of GaN results in significant
performance advantages for GaN in broadband applications. This application note
shows theoretical and practical broadband matching techniques and limitations,
and a methodology for modeling devices and synthesizing an output matching
network. Broadband capability of GaAs FETs, Si LDMOS, and GaN HEMTs is compared
and a design example with measured results using a Nitronex device is
presented.Thermal Considerations for GaN Technology
GaN HEMTs offer much higher power density than competing technologies, providing
significant performance advantages in many applications. However, this also
leads to a thermal challenge of removing the heat from a relatively small FET
area. This application note illustrates thermal design challenges and offers
measured and simulated results for various circuit board and flange mounting
configurations. Recommendations are made for junction temperature limits and
choosing the proper device for a given application.