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Hardware Software Systems and Network Nathaniel Lee Weng Chuan

Individual Assignment TP016753

Table of Contents
Table of Contents............................................................................................................ 1
Gantt Chart..................................................................................................................... 2
Abstract.......................................................................................................................... 3
Section 1: Operating Systems, Question 2.....................................................................4
Introduction................................................................................................................. 4
Main Body....................................................................................................................4
Virtual Memory.........................................................................................................4
Paging......................................................................................................................5
Demand Paging........................................................................................................ 8
Swapping..................................................................................................................9
Conclusion................................................................................................................. 10
Section 2 : Computer Systems Architecture, Question 2..............................................11
Introduction............................................................................................................... 11
Main Body.................................................................................................................. 12
Reasons for Registers.............................................................................................12
Types of Registers.................................................................................................. 13
Conclusion................................................................................................................. 15
Frequently Asked Questions (FAQ)................................................................................16
Section 1, Operating System.....................................................................................16
Section 2, Computer System Architecture.................................................................17
Limitations.................................................................................................................... 18
Bibliography / References.............................................................................................19

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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
Individual Assignment TP016753

Gantt Chart

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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
Individual Assignment TP016753

Abstract
In this modern age, many of us use computers to carry out our daily activities. But many of us do
not know how the computer carries out its memory management and uses Central Processing Unit
(CPU) in order to carry out the processes necessary for the program to run. This report will cover
how the Unix operating system manages memory , strategies used, problems faced by memory
management and solutions to solve them. Besides that, this report will cover the computer systems
architecture such as the registers. Areas discussed would be reasons for registers, types of registers,
register size and a few other topics.

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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
Individual Assignment TP016753

Section 1: Operating Systems, Question 2


Introduction
The operating system that I have chosen to cover memory management on is the Unix operating
system. Memory managements basically is the act of managing computer memory. In computers,
memory is a very vital resource therefore it needs to be managed properly. Memory that is available
for the operating system to manage is the volatile cache in the Central Processing Unit, volatile
memory in the Random Access Memory and the non-volatile hard-disk storage. The part of the
operating system that manages it is called the memory manager. Its main task is to keep track of
which parts of memory are in use and which parts are not in use, to allocate memory to processes
when they need it and deallocate it when they are done, and to manage swapping between main
memory and disk when main memory is too small to hold all the processes.1 There are many
different schemes in memory management.

Main Body

Virtual Memory
Before virtual memory came about, computers had to have enough available memory or more

1 Tanenbaum, 2001.
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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
Individual Assignment TP016753
memory to run the programs if not the programs would not be able to run due to lack of memory.
For example, if a program requires 32MB to run then the computer would need 32MB of available
memory or more to run that particular program. This was where virtual memory was introduced to
help solve this problem. Virtual memory is a feature of the operating system that enables a process
to use a memory (RAM) address space that is independent of other processes in the same system,
and use a space that is larger than the actual amount of RAM present, temporarily relegating some
contents from RAM to a disk, with little or no overhead.2 How this works is that the program is
broken down to smaller pieces called overlays. The total amount of overlays that was formed from
the breaking down of a program may exceed the amount of physical memory therefore a larger
programs would be able to run successfully even though there is less physical memory than the
program needs to execute. Some of the overlays will be kept in the RAM and the other overlays of
the program will be kept in the disk. It is then the job of the operating system to choose which
overlays would be needed to be used in memory then swapping it from the disk to the memory as
shown in Figure 1.

Figure 1.
Source :http://cs.nyu.edu/~gottlieb/courses/2001-02-fall/arch/lectures/lecture-22.html

Paging
Most operating systems that utilizes virtual memory for its memory management scheme will use a
technique called paging. In physical memory, some programs will be too large to be able to run.
With paging, programs are able to run even though it may not fit in the memory entirely. How this
works is that the program produces memory addresses based on things like indexing, base

2 Regev, 2009.
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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
Individual Assignment TP016753
registers, and other values. These addresses are called virtual addresses and they form the virtual
address space. Then, these addresses are used in the Memory Management Unit (MMU) . The
Memory Management Unit is a part of the Central Processing Unit (CPU) that has a small amount
of memory that holds a cache table of recently used mappings of virtual addresses to physical
addresses.3 This table is known as the Translation Lookaside Buffer (TLB). Another table involved
in paging is the page table. The page table also holds the table matching virtual addresses to
physical addresses but the physical addresses here usually refer to the disk. In the page table, the
virtual address space is divided up into units called pages and the corresponding units in the
physical memory are called page frames.4 The main reason for the page table is to map the pages
into the page frames.

Figure 2.
Source :http://cs.nyu.edu/~gottlieb/courses/2001-02-fall/arch/lectures/lecture-22.html

Figure 2 shows the relationship of the elements involved in paging. When a program is running, not
all the pages are in the memory at one time because the memory may not be big enough to
accommodate all of it. Therefore, pages are transferred in and out of the memory when needed by
the program. For example, when the program wants to access a virtual address, the page table will
be read to determine the physical address. Once the physical address is determined from the page
table, then the physical address and the virtual address will be written to the TLB. After the both
3 Internet.com, 2001.
4 Tannenbaum and Woodhull, 1997.
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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
Individual Assignment TP016753
addresses is written to the TLB, then now the program can use the page frame that is mapped from
the page in the page table. If the program tries to access a page of memory and the page table tells
the MMU that the page is not present in the physical memory which is the disk, the the CPU will
interrupt the program and will pass the control to the operating system.5 The operating system will
then take a seldom used page frame and writes its contents back to the disk. Then it fetches the page
just referenced into the page frame just freed, changes the map and restarts the instruction.6

One major problem with using paging is that the amount of addresses on the page table can be
extremely high. Therefore, it can be very difficult for the computer to locate the virtual address to
the corresponding physical address because the page table is too large. To solve this problem, many
computers use a multilevel page table. The main key to the multilevel page table is to prevent the
memory to keep the page table in memory all the time. So those that is not needed in the memory
will not be kept around.

Figure 3.
Source: http://cgi.cse.unsw.edu.au/~cs3231/lectures.php

5 Webster, 2000.
6 Tanenbaum, 2001.
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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
Individual Assignment TP016753

Figure 3 shows the workings of a multilevel page table. The first table on the left of the diagram is
the top-level page table. The top-level page table consist of all the index of the virtual address
assigned by the MMU. In order to locate the physical address, the top-level table's indexes are used.
The entry located by indexing into the top-level page table yields the address or the page frame
number of the second-level page table.7

Demand Paging
The Unix operating system utilizes the demand paging memory management scheme for its
operations. The demand paging memory management scheme is a more specific and detailed form
of paging. The principle behind demand paging is that the pages are only loaded into memory when
it is demanded by memory and not all at once. Therefore not all the pages are in memory at one
time. The pages brought in that consist of text, data and stack segments are brought in one at a time
as they get referenced.

7 Tanenbaum, 2001.
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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
Individual Assignment TP016753
Figure 4
Source: http://cs.nyu.edu/~gottlieb/courses/2001-02-fall/arch/lectures/lecture-22.html
In the above figure, it shows that the virtual addresses are loaded into its respective locations on the
memory. When the memory needs another page from the page table it 'demands' it and the old page
will get swapped out for the new page. For example, based on Figure 4, the page with virtual
address 24K-28K is in Frame 1 in the memory. So if it needs the page that has the virtual memory
of 28K-32K, then the page of virtual address of 24K-28K will be swapped out with 28K-32K page
because the memory 'demands' it. Only pages that exist in the page table will be swapped with the
one in the memory.

Swapping
Besides virtual memory, the memory management scheme called swapping is used to run processes
when there is lack of physical memory to hold them. The excess processes will be taken out of the
memory and stored onto the disk. The main strategy of swapping consists of bringing in each
process in its entirety, running it for a while, then putting it back on the disk.

Figure 5.

The swapping system is illustrated in the above figure. At first, process A is in the memory in
Figure 5(a). Later, process B comes into memory joined with process C. These processes either can

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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
Individual Assignment TP016753
be swapped from the disk or just newly created by the user. Process A is then swapped out onto the
disk to make room for another incoming process. In Figure 5 (d), it shows that process A has been
swapped out therefore leaving just leaving process B and C in the memory. Then process D take the
previous space of process A because if process A was still there, process D would not be able to fit
in memory as there is insufficient space for process D. Finally, process A comes in again and is
situated at a different location on the memory.

Conclusion
In conclusion, the Unix operating system handles its programs with a very memory efficient
memory management system. It is able to run large programs without the need to have large
physical memory which is the Random Access Memory (RAM). This in turn, will benefit the users
of the Unix operating system. This is because firstly, the user does not have to buy larger RAM
which can be expensive. Secondly, the user will be able to run more programs simultaneously as
the Unix operating system has the ability to manage many programs and processes well and
effectively.

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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
Individual Assignment TP016753

Section 2 : Computer Systems Architecture,


Question 2.
Introduction
The most important part of a computer is of course is its Central Processing Unit (CPU). The CPU
is basically the brains of the entire computer. Most of the computers calculations take place here in
the CPU.8 The primary part of the CPU is the Arithmetic Logic Unit (ALU), the Control Unit (CU),
and its registers. In this section, the part of the CPU that will be covered in this section would be
about the registers in the CPU. Registers are essentially a fast and small storage place within the
CPU that temporarily stores data to be processed by the CPU.9 The registers are made out of flip-
flops. Also, depending on the type of CPU used the total number of registers can differ from each
one.

8 Internet.com, 2001.
9 Shepley, 2010.
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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
Individual Assignment TP016753

Main Body

Reasons for Registers


The speed of which information is transferred between the CPU and the physical memory which is
the Random Access Memory (RAM) is very slow. For example, if the CPU were to calculate some
number and send the answer to be store onto the RAM while the CPU calculates another group of
numbers and then retrieves the previous answer to be calculated with the new answer it will take
too long for the process to be carried out. Therefore, to increase efficiency and save time, the
register exist to temporarily save these values in the CPU instead of the RAM.

Figure 6.
Source: http://schoolnet.gov.mt/keith.aquilina/resources/storage/Data_registers.htm

Figure 6 shows the components within the CPU. In a nutshell, the register is like a workspace for
the CPU to do its calculations. It holds values that the CPU is currently working with and stores
then onto the register itself. Then as soon as the calculations are processed, the information is sent
back to the main memory. For example, if the user wants to add 10 to a value in the memory
location, the CPU will load the initial value from the RAM into the register on the CPU. It then add
the 10 to the register and send the final value to the RAM from the register. This is done because
the CPU is unable to directly perform arithmetic functions in the memory and thus has to bring it
into the CPU. This transferring of information between the CPU and the RAM happens very fast.

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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
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Types of Registers.
The number of registers a CPU has depends on the type and model of the CPU. The total number of
registers in the CPU can vary from about ten to hundreds. The number of registers that the CPU has
and the size of register measured by the number of bits help determine the power and the speed of
the CPU.10 For instance, a 64 bit CPU is a CPU where each single register is 64 bits in size.
Therefore, each instruction carried out by the CPU is able to have a maximum of 64 bits of data.
Which means that the workspace of the CPU is able to accommodate a unit measurement of 64 bits
of data for calculation before it sends it back to the RAM.

There many types of registers in the CPU but the main ones are:
• Accumulator Register
 The accumulator register is a register that has a built-in adder that adds an input number to the
contents of the register.11 If it were not for the accumulator register, the CPU would have to
write the results of each calculation back to the RAM only to read it again for the next
instruction. An example in the use of a accumulator register is the adding of a list of
numbers. The initial value of the accumulator register is set to zero, then each number will
from the list of numbers will be added to the accumulator register. Once all the numbers in
the list are added to the accumulator register, then the final value will be sent to the
memory.

10 Aquilina, K., Schoolnet.


11 Farlex, 2008.
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• Status Register
 The status register which is also known as the flag register is a collection of flag bits
that
tells the CPU the current status of different mathematical operations.12 The flags
assigned by the CPU each has its own individual meaning relative to its own different
type of CPU the computer uses. Examples of types of common flags used by the CPU;
Z = Zero Flag The result of the mathematical operation
equals zero.

C = Carry Flag The result of an operation has produced an


answer greater than the number of available bits

N = Negative Flag The result of a mathematical operation is a


negative number.

V = Overflow Flag A register or memory location has


overflowed its number of available bits.
I = Interrupt Flag Interrupts can be enabled or disabled by setting
or clearing this flag.

• Instruction Register
 The instruction register is a register in the CPU that holds an instruction as it is retrieved
from the memory, the instruction is then interpreted within the instruction register
itself.13 The instruction register is also involved in the instruction cycle. The instruction
cycle consists of four main task which are fetch instruction, decode instruction, execute
instruction and store the results.14 Firstly, the CPU fetches the instruction from the
RAM and places it in the instruction register. Then, the Control Unit of the CPU
decodes the instruction in the instruction register. The decode instruction is then sent to
the Arithmetic Logic Unit (ALU) to carry out mathematical and logical operations on
them. The results of the mathematical computation is then sent back to the instruction
register momentarily before it is sent to the memory for storage. This is cycle is then
repeated over and over again from the time the computer is started up till it shuts down.

• Program Counter
 The program counter is a counting register that increments the instruction cycle to obtain
12 WordIQ, 2010.
13 Parker, S., (ed), 2003.
14 Agarwal, B., 2004.
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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
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the program sequence from the memory locations.15 The program counter is another
register that is involved in the instruction cycle. The job of the program counter is to
take note of the address of the next memory instruction that is going to be executed by
the CPU next even before the current instruction is finished being executed. The
advantage of having the program counter as a register in the CPU is that it improves the
overall efficiency because it straight away know where the next memory address of the
instructions.
• Buffer Register
 The buffer register's main task is to store data going to and from the RAM. As the name
suggest, the buffer register acts as a buffer to the CPU. This is so that the mathematical
and logical operations are not affected by values leaving and coming into the CPU.

Conclusion
In conclusion, the registers in the CPU play a vital role in the processing of instructions within the
CPU. These registers work together to allow data and information to pass through the CPU to be
processed. The registers also act as a medium for the Control Unit (CU) and the Arithmetic Logic
Unit (ALU) to communicate with the Random Access Memory (RAM). This is because all the

15 Daintith, J., 2004.


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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
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instruction in the RAM has to be sent to the register first before it can be interpreted and executed
by the CPU. The size of the register will also determine how much data and instruction the CU and
ALU will be able to handle. Therefore, if the size of the each register has a larger size in bit then
more data and instruction is able to be executed by the CPU per instruction cycle. This would in
turn, maximize the amount of processing and increase the efficiency of the CPU.

Frequently Asked Questions (FAQ)


Section 1, Operating System
1. What is the difference between paging and demand paging in Unix?
In paging, the page frames brought into the main memory may not be in close proximity of
each other because the page frame will occupy the spaces available on the memory which
will not be necessary in one large space. But if it is able to find a large space available on
the memory, then the page frames might be close to one another. So the the page frames in
paging can be either be together one group on the memory or it can be scattered every

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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
Individual Assignment TP016753
where on the memory. Where as in demand paging, only the required page frames are
brought into the main memory and the idle page frames will be swapped out onto the disk to
make room for the incoming page frames. This gives the page frames more space available
and thus will the page frames will be in next to each another though the entire program will
not be able to fit onto the memory.
2. Is it possible to have unlimited virtual memory since it is 'virtual'?
Even though the utilization of virtual memory may increase the amount of memory in the
physical memory, virtual memory is still limited because it has to be stored somewhere on
your computer. The user may be able to adjust how much virtual memory is allocated in the
disk but it still has a maximum value.

Section 2, Computer System Architecture


1. Does a larger register size cause the computer to slow down because the time of a
instruction cycle takes longer?
A larger size register will not hinder the performance of the computer. Although the register
will be larger therefore there will be more instruction to interpret and execute, it will not be
any slower than a smaller size register. Nowadays, Central Processing Units are made with
even higher specifications and with the latest technologies. The instruction cycle happens so
fast no matter the size of the register. The slows down that may be experience is caused by
the data and instruction being sent to and received from the Random Access Memory
(RAM). The speed of which the RAM runs is very much slower that the CPU, therefore the
transferring of data to and fro is the cause of the sluggish computer.
2. Are CPU registers considered as volatile or non-volatile memory?

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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
Individual Assignment TP016753
The registers in a standard CPU is considered as volatile memory. When there is a
sudden power cut, then the data stored in the registers will be lost.

Limitations
1. Size of Random Access Memory – When a program is ran, it will occupy space on the
RAM. Because of its fixed amount of RAM in computer, only a limited amount of programs
are able to be ran at one time. Even though, the user will be able to upgrade the RAM, the
user might still be limited to the amount of RAM the operating system can detect due to its
32 bit.
2. Size of Virtual Memory – The amount of virtual memory in the operating system is
limited to the amount allocated. Although user has the ability to manipulate the amount of
virtual memory, it is still limited by the space in the disk.
3. Speed of Random Access Memory – Even though it may take a the CPU a very small
amount of time to carry out its instruction cycle, the computer will be slowed down by the
time it take the information that is already processed to be retrieved by the RAM.

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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
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Bibliography / References
1) Tanenbaum, A., 2001., Modern Operating System, 2nd Edition, New Jersey, Prentice-Hall.
2) Regev, H., 2009, Virtual Memory [online], England, Search Storage, Available from
http://searchstorage.techtarget.com/sDefinition/0,,sid5_gci213300,00.html , [Accessed 11th
September 2010]
3) Lectures, New York University, 2002, [online], Available from :
http://cs.nyu.edu/~gottlieb/courses/2001-02-fall/arch/lectures/lecture-22.html , [Accessed 11th
September 2010]
4) Internet.com, 2001, [online], Available from http://www.webopedia.com/TERM/M/MMU.html ,
[Assessed 11th September 2010]
5) Tanenbaum, A., and Woodhull, A., 1997, Operating Systems Design and Implementation, 2nd
Edition, New Jersey, Prentice-Hall.
6) Webster, 2000, [online], Available from
http://homepage.mac.com/randyhyde/webster.cs.ucr.edu/index.html , [Accessed 12th September
2010]

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Hardware Software Systems and Network Nathaniel Lee Weng Chuan
Individual Assignment TP016753
7) Elphinstone, K., and ,Ryzhyk, L., 2010, [online], Lectures, Australia, University of New South
Wales, Available from http://cgi.cse.unsw.edu.au/~cs3231/lectures.php , [Accessed 13th
September]
8) Internet.com, 2001, [online], Available from
9) http://www.webopedia.com/TERM/C/cpu.html , [Accessed 13th September]
10) Shepley, P., 2010, What are the components of the CPU?, [online], USA, Wisegeek, Available
from http://www.wisegeek.com/what-are-the-components-of-a-cpu.htm , [Accessed 13th
September]
11) Aquilina, K., Schoolnet, [online], Available from
http://schoolnet.gov.mt/keith.aquilina/resources/storage/Data_registers.htm , [Accessed 13th
September 2010]
12) Jeff, Kioskea.net, [online], Available from http://en.kioskea.net/contents/pc/processeur.php3 ,
[Accessed 13th September]
13) Farlex, 2008, Accumulator Register, [online], Princeton University, Available from
http://www.thefreedictionary.com/accumulator+register , [Accessed 13th September]
14) WordIQ, 2010, Status Register, [online], Available from
http://www.wordiq.com/definition/Status_register , [Accessed 13th September]
15) Parker, S., (ed), 2003, McGraw-Hill Dictionary of Scientific and Technical Terms, 6th Edition,
USA, McGraw-Hill.
16) Agarwal, B., 2004, Instruction Fetch Execute Cycle, [online], Available from :
http://www.cs.montana.edu/~bosky/cs518/ife/IFE.pdf. [Accessed 13th September 2010]
17) Daintith, J., 2004, A Dictionary of Computing, Encyclopedia.com, Available
from ::http://www.encyclopedia.com/doc/1O11-programcounter.html , [Accessed 13th
September]

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