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DATA SHEET
TDA8359J
Full bridge vertical deflection output
circuit in LVDMOS
Product specification 2002 Jan 21
Supersedes data of 13 March 2000
Filed under Integrated Circuits, IC02
Philips Semiconductors Product specification
ORDERING INFORMATION
TYPE PACKAGE
NUMBER NAME DESCRIPTION VERSION
TDA8359J DBS9P plastic DIL-bent-SIL power package; 9 leads (lead length SOT523-1
12/11 mm); exposed die pad
2002 Jan 21 2
Philips Semiconductors Product specification
BLOCK DIAGRAM
8 3 6
GUARD
CIRCUIT M5
D2
D3
M2
Vi(p-p)
D1
VI(bias) 7 OUTA
INA 1
M4
0
INPUT 9
FEEDB
AND
FEEDBACK
Vi(p-p) CIRCUIT
VI(bias) INB 2 M1
4 OUTB
0
M3
TDA8359J
5
MGL862
GND
PINNING
MGL863
2002 Jan 21 3
Philips Semiconductors Product specification
Protection
The output circuit contains protection circuits for:
• Too high die temperature
• Overvoltage of output A.
2002 Jan 21 4
Philips Semiconductors Product specification
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VP supply voltage − 18 V
VFB flyback supply voltage − 68 V
Vn DC voltage
pin OUTA note 1 − 68 V
pin OUTB − VP V
pins INA, INB, GUARD and FEEDB −0.5 VP V
In DC current
pins OUTA and OUTB during scan (p-p) − 3.2 A
pins OUTA and OUTB at flyback (peak); t ≤ 1.5 ms − ±1.8 A
pins INA, INB, GUARD and FEEDB −20 +20 mA
Ilu latch-up current current into any pin; pin voltage is − +200 mA
1.5 × VP; note 2
current out of any pin; pin voltage is −200 − mA
−1.5 × VP; note 2
Ves electrostatic handling voltage machine model; note 3 −500 +500 V
human body model; note 4 −5000 +5000 V
Ptot total power dissipation − 10 W
Tstg storage temperature −55 +150 °C
Tamb ambient temperature −25 +85 °C
Tj junction temperature note 5 − 150 °C
Notes
1. When the voltage at pin OUTA supersedes 70 V the circuit will limit the voltage.
2. At Tj(max).
3. Equivalent to 200 pF capacitance discharge through a 0 Ω resistor.
4. Equivalent to 100 pF capacitance discharge through a 1.5 kΩ resistor.
5. Internally limited by thermal protection at Tj = 170 °C.
THERMAL CHARACTERISTICS
In accordance with IEC 60747-1.
SYMBOL PARAMETER CONDITIONS MAX. UNIT
Rth(j-c) thermal resistance from junction to case 3 K/W
Rth(j-a) thermal resistance from junction to ambient in free air 65 K/W
2002 Jan 21 5
Philips Semiconductors Product specification
CHARACTERISTICS
VP = 12 V; VFB = 45 V; fvert = 50 Hz; VI(bias) = 880 mV; Tamb = 25 °C; measured in test circuit of Fig.3; unless otherwise
specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supplies
VP operating supply voltage 7.5 12 18 V
VFB flyback supply voltage note 1 2 × VP 45 66 V
Iq(P)(av) average quiescent supply current during scan − 10 15 mA
Iq(P) quiescent supply current no signal; no load − 45 75 mA
Iq(FB)(av) average quiescent flyback supply during scan − − 10 mA
current
Inputs A and B
Vi(p-p) input voltage (peak-to-peak value) note 2 − 1000 1500 mV
VI(bias) input bias voltage note 2 100 880 1600 mV
II(bias) input bias current source − 25 35 µA
Outputs A and B
Vloss(1) voltage loss first scan part note 3
Io = 1.1 A − − 4.5 V
Io = 1.6 A − − 6.6 V
Vloss(2) voltage loss second scan part note 4
Io = −1.1 A − − 3.3 V
Io = −1.6 A − − 4.8 V
Io(p-p) output current − − 3.2 A
(peak-to-peak value)
LE linearity error Io(p-p) = 3.2 A; notes 5 and 6
adjacent blocks − 1 2 %
non adjacent blocks − 1 3 %
Voffset offset voltage across RM; Vi(dif) = 0 V
VI(bias) = 200 mV − − ±15 mV
VI(bias) = 1 V − − ±20 mV
∆Voffset(T) offset voltage variation with across RM; Vi(dif) = 0 V − − 40 µV/K
temperature
VO DC output voltage Vi(dif) = 0 V − 0.5 × VP − V
Gv(ol) open-loop voltage gain notes 7 and 8 − 60 − dB
f− 3dB(h) high −3 dB cut-off frequency open-loop − 1 − kHz
Gv voltage gain note 9 − 1 −
∆Gv(T) voltage gain variation with the − − 10−4 K−1
temperature
PSRR power supply rejection ratio note 10 80 90 − dB
2002 Jan 21 6
Philips Semiconductors Product specification
V max – V min
b) LE = ------------------------------- × 100 % (non adjacent blocks)
V avg
6. The linearity errors are specified for a minimum input voltage of 300 mV (p-p). Lower input voltages lead to voltage
dependent S-distortion in the input stage.
V OUTA – V OUTB
7. G v ( ol ) = -------------------------------------------
-
V FEEDB – V OUTB
10. VP(ripple) = 500 mV (RMS value); 50 Hz < fP(ripple) < 1 kHz; measured across RM.
11. This value specifies the internal voltage loss of the current path between pins VFB and OUTA.
2002 Jan 21 7
Philips Semiconductors Product specification
APPLICATION INFORMATION
GUARD
CIRCUIT M5
Vi(p-p)
D2
D3
VI(bias)
M2
0
I I(bias) D1
7 OUTA
INA 1
RCV1 M4 RL
2.2 kΩ RS 3.2 Ω
(1%) INPUT 9 FEEDB
AND 2.7 kΩ
I i(dif)
FEEDBACK
CIRCUIT
CM RM
I I(bias) 10 nF 0.5 Ω
M1
INB 2
RCV2 4 OUTB
2.2 kΩ
(1%) M3
Vi(p-p)
TDA8359J
VI(bias)
5
0
GND MGL864
2002 Jan 21 8
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Philips Semiconductors
in LVDMOS
Full bridge vertical deflection output circuit
VP = 14 V
RGRD
12 kΩ VFB = 30 V
VP VFB C1 C2
GUARD C3 220 µF
47 µF C4
8 3 6 100 nF (100 V) 100 nF (25 V)
GUARD
Vi(p-p) CIRCUIT M5 D4
D2 (14 V)
VI(bias) D3
M2 RCMP
0
680 kΩ
D1
7 OUTA
INA 1
M4 RD1 deflection
RCV1
C6 270 Ω coil CD
2.2 kΩ RS 5 mH
2.2 nF (1%) INPUT 9 FEEDB 47 nF
6Ω
TV SIGNAL
9
RCV2 4 OUTB
C7 2.2 kΩ
2.2 nF (1%) M3
Vi(p-p) TDA8359J
VI(bias) 5
GND MBL364
0
Product specification
TDA8359J
fvert = 50 Hz; tFB = 640 µs; II(bias) = 400 µA; Ii(p-p) = 290 µA; Io(p-p) = 2.4 A.
INB
The required power supply voltage VP for the second part
2 of the scan is given by:
RCV2
C7
2.2 nF 2.2 kΩ V P ( 2 ) = I coil ( peak ) × ( R coil + R M )
+ L coil × 2I coil ( peak ) × f vert ( max ) + V loss ( 2 )
Ii2(p-p) MBL366
The minimum required supply voltage VP shall be the
II(bias) highest of the two values VP(1) and VP(2). Spread in supply
voltage and component values also has to be taken into
0 account.
EXAMPLE
Measured or given values: II(bias) = 400 µA; Ii1(p-p) = Ii2(p-p)=
290 µA.
The differential input voltage will be:
V i ( dif ) ( p – p ) = 290µA × 2.2kΩ – ( – 290µA × 2.2kΩ ) = 1.27V
2002 Jan 21 10
Philips Semiconductors Product specification
Calculation of the power dissipation of the vertical The value of the heatsink can be calculated in a standard
output stage way with a method based on average temperatures. The
required thermal resistance of the heatsink is determined
The IC total power dissipation is given by the formula: by the maximum die temperature of 150 °C. In general we
Ptot = Psup − PL recommend to design for an average die temperature
not exceeding 130 °C.
The power to be supplied is given by the formula:
2002 Jan 21 11
Philips Semiconductors Product specification
300 Ω
1
MBL100
2 INB
300 Ω
2
MBL102
3 VP
6
4 OUTB
5 GND
6 VFB 3
7 OUTA
5
MGS805
2002 Jan 21 12
Philips Semiconductors Product specification
MBL103
9 FEEDB 300 Ω
9
MBL101
2002 Jan 21 13
Philips Semiconductors Product specification
PACKAGE OUTLINE
DBS9P: plastic DIL-bent-SIL power package; 9 leads (lead length 12/11 mm); exposed die pad SOT523-1
q1
non-concave
x
Eh
Dh
D
D1 view B: mounting base side
P A2
k
q2
E B
L3
L2
L1
L
1 9
Z e1 w M Q c v M
bp
e m e2
0 5 10 mm
2.7 0.80 0.58 13.2 6.2 14.7 3.0 12.4 11.4 6.7 4.5 3.4 1.15 17.5 1.65
mm 3.5 3.5 2.54 1.27 5.08 2.8 4.85 3.8 0.8 0.3 0.02
2.3 0.65 0.48 12.8 5.8 14.3 2.0 11.0 10.0 5.5 3.7 3.1 0.85 16.3 3.6 1.10
Notes
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
2. Plastic surface within circle area D1 may protrude 0.04 mm maximum.
98-11-12
SOT523-1
00-07-03
2002 Jan 21 14
Philips Semiconductors Product specification
SOLDERING The total contact time of successive solder waves must not
exceed 5 seconds.
Introduction to soldering through-hole mount
packages The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
This text gives a brief insight to wave, dip and manual
specified maximum storage temperature (Tstg(max)). If the
soldering. A more in-depth account of soldering ICs can be
printed-circuit board has been pre-heated, forced cooling
found in our “Data Handbook IC26; Integrated Circuit
may be necessary immediately after soldering to keep the
Packages” (document order number 9398 652 90011).
temperature within the permissible limit.
Wave soldering is the preferred method for mounting of
through-hole mount IC packages on a printed-circuit Manual soldering
board.
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
Soldering by dipping or by solder wave
2 mm above it. If the temperature of the soldering iron bit
The maximum permissible temperature of the solder is is less than 300 °C it may remain in contact for up to
260 °C; solder at this temperature must not be in contact 10 seconds. If the bit temperature is between
with the joints for more than 5 seconds. 300 and 400 °C, contact may be up to 5 seconds.
Suitability of through-hole mount IC packages for dipping and wave soldering methods
SOLDERING METHOD
PACKAGE
DIPPING WAVE
DBS, DIP, HDIP, SDIP, SIL suitable suitable(1)
Note
1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
2002 Jan 21 15
Philips Semiconductors Product specification
PRODUCT
DATA SHEET STATUS(1) DEFINITIONS
STATUS(2)
Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DEFINITIONS DISCLAIMERS
Short-form specification The data in a short-form Life support applications These products are not
specification is extracted from a full data sheet with the designed for use in life support appliances, devices, or
same type number and title. For detailed information see systems where malfunction of these products can
the relevant data sheet or data handbook. reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
Limiting values definition Limiting values given are in
for use in such applications do so at their own risk and
accordance with the Absolute Maximum Rating System
agree to fully indemnify Philips Semiconductors for any
(IEC 60134). Stress above one or more of the limiting
damages resulting from such application.
values may cause permanent damage to the device.
These are stress ratings only and operation of the device Right to make changes Philips Semiconductors
at these or at any other conditions above those given in the reserves the right to make changes, without notice, in the
Characteristics sections of the specification is not implied. products, including circuits, standard cells, and/or
Exposure to limiting values for extended periods may software, described or contained herein in order to
affect device reliability. improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
Application information Applications that are
the use of any of these products, conveys no licence or title
described herein for any of these products are for
under any patent, copyright, or mask work right to these
illustrative purposes only. Philips Semiconductors make
products, and makes no representations or warranties that
no representation or warranty that such applications will be
these products are free from patent, copyright, or mask
suitable for the specified use without further testing or
work right infringement, unless otherwise specified.
modification.
2002 Jan 21 16
Philips Semiconductors Product specification
NOTES
2002 Jan 21 17
Philips Semiconductors Product specification
NOTES
2002 Jan 21 18
Philips Semiconductors Product specification
NOTES
2002 Jan 21 19
Philips Semiconductors – a worldwide company
Contact information
Printed in The Netherlands 753504/25/02/pp20 Date of release: 2002 Jan 21 Document order number: 9397 750 08868
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