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Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

Faculty of Engineering

Communication and Electronics Engineering

Amplifier Circuits

Multistage Amplifier Analysis: Based on the two-port approach, the multistage amplifier is clearly shown in the figure below. Each of these stages could be one of the previously studied BJT, FET transistor amplifiers.

The loaded voltage gain of an amplifier is always less than the no-load level.

From the Figure shown above let the under loaded system voltage gain

is

. Then the total current gain could be

A

v

T

, where

A

i

T A
A
A
A v
v
v
v
T
1
2
3
I
 V
R
o
o
L
I i V
Z
i
i

A

v

n

A

 

v T

Z

i

1

.

R L

found as

The no-load parameters can be used to determine the loaded gains as

 follows:  Fig. 5.77 Substituting the internal elements for Fig. 5.76 Two-port system the two-port system of Fig. 5.76  Fig. 5.80 Including the effects of the source resistance Rs. Fig. 5.79 Applying a load to the two-port system of Fig. 5.77.

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

Applying the voltage-divider rule to the output circuit of Fig 5.79 results in

V

o

A

 V i R L R L  R o V o  A v NL R L Vi R L  R o

A

v

NL

v

The fraction of the applied signal reaching the input terminals of the amplifier of Fig 5.80 is also determined by the voltage-divider rule again

V

i

V

s

and

V

o

R

i

R

i

R

A

s

v

A

v

NL

V

i

A

v

s

V

o

V

s

A

v

NL

R

i

R

i

R

s

At the existence of both of R s and R L , the voltage gain equation will be modified as:

A

v

s

V

o

V

s

A

v

NL

R i R

L

R

i

R

s

R

L

R

o

For the current gain

I

i

I

s

V V

i

s

R

i

R

s

R

i

A 

i

and

A

i

s

A

v

R

i

R

L



A

v

s

R

i

R

s

R

L

The larger the source resistance and/or smaller the load resistance, the less the overall gain of an amplifier Ex. For the given single-stage amplifier, with R L =4.7
k and R s =0.3 k, determine:
(a) Avs, (b) A v , (c) A i .
The two-port parameters for the fixed-bias
configuration are Z i =1.071k, Zo=3k, and Av NL =-
2 80.11.

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky Ex: The two-stage system of the given Fig. employed a transistor emitter-follower

configuration prior to a common-base configuration to ensure that the maximum percent of the applied signal appears at the input terminals of the common-base amplifier. In this Fig., the no-load values are provided for each system, with the exception of Zi and Zo for the emitter-follower, which are the loaded values. For the given configuration, determine:

 (a) The loaded gain for each stage. (b) The total gain for the system, Av and Avs. (c) The total current gain for the system. (d) The total gain for the system if the emitter-follower configuration were removed. Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky  Ex.: For the given RC-coupled BJT amplifier given below, calculate the following

a) the no-load voltage gain and the output voltage

b)

the ov erall gain if a 10-kload is applied to the second stage and compare it to the results of (a)

c) the input impedance of the first stage and the output once of the second stage.

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky Note: The name of RC-coupled is derived from the fact that the coupling capacitor is combined with the input impedance of the next stage to perform the load on the stage itself. The coupling capacitor prevents the two stages from DC viewpoint.

Solution

a) The DC analysis of both transistors gives

20  

V -V

15

  

V

B

B

15

4.7 4V

R

L



R

c

BE

//

r

e

R

c

R

c

2.2 k

6.5

V

i

4.7V

Z

i

2

I

V

E

E R

E

R

1

//

R

2

//

4 m

A

V E

A

v

1

A

v

2

//(

r

e

)





338.46

r

e

34.6

10

3

25

10

6

 

r

e

o

A

v

T

(

NL

)

V

 

I

I

E

B

20 A, and



865

665.2

6.5



10

3

V

102.3

A

v

T (

b)b)

A

v

T

TheThe overalloverall gaingain withwith thethe 11 0k0kload load applied applied is is

V

o

V

i

A

v

T

(

NL

)

R

L

R

L Z

o

10

10

2.2

34.6

10

3

28.4

10

3

r e

NL

c) The input impedance of the first stage

Z

i

1

R

1

//

R

2

//

r

e

953.6

)

26

m

4

m

34.6

6.5

10

3

Whereas the output impedance for the second stage is

Z

o

2

R k

c

2.2

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

Ex. 8.16: Calculate the dc

b i a s ,

voltage gain, input

impedance, output

impedance, and resulting

output voltage for the

the Fig. 8.49. Calculate the

is connected across the

output. Fig. 8.49

Cascade amplifier circuit for Example 8.16.

S olution:

Using the dc biasing techniques to find the Q-values,

plot the curve of the Shockley equation

I

D

I

DSS

 

1

V

GS V P

2

plot the dc load line from the GS loop, in this case V GS =-I S R S From these two plots V GSQ =-1.9V and I DQ =2.8mA.

g

m 2 I
V
DSS
GS
1

V
V
P
P

2.6 mS

T he two JFET stages are CS, thus t

A 



A

v

1

v

2

g

g

m

m

R

D

R

D

//

R

L

R

i

2

 6.24

he voltage gain for each of them is

R

G



g

m

R

D



6.24

 

A

v

T

38.4

The

The output impedance Z =R =2.4kassuming that r The resulting output voltage V o = A v V i =384mV The output voltage across the load resistor

input impedance Z i =R G =3.3M

o

D

V

L

R

L

V

o R

L

Z

o

310

mV

d

is

amplifier of Fig.8.50, use the

dc bias calculated in the

previous examples to

calculate input impedance,

Lecturer: Dr. Omar Daoud Part I
6

Fig. 8.50

Cascaded JFET-BJT amplifier for Example 8.17

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

output impedance, voltage gain and resulting output voltage.

Solution:

g

A



v

1

m

R

D

//

R

L

R

1

A

v

2



R

C

r

e

 338.46

V

o

Z

Z

i

o

AV

v

i

0.6V

3.3

M

k

2.2

//

R

2

//

r

e



g

m

R

D

// 953.5



1.77

A

v

T

599.1

-

C ascoded Systems:

The cascode configuration has one of two configurations. In each case the collector of the leading stage is connected to the emitter of the following stage.

The arrangements provide relatively high-input impedance with low

to ensure minimum input Miller

capacit ance, whereas the following CB stage provides an excellent high-frequency response.

voltage gain for the first stage Fig. 5.86: Cascode configuration.

Lecturer: Dr. Omar Daoud 7

Part I

Fig.5.87: Practical cascode circuit for Example 5.19.

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

Ex. 5.19: Calculate the no-load voltage gain for the casc

Fig. 5.87.

ode configuration of

Solution:

Applying the voltage-divider rule to find the Base voltages,

V

B

V

B

r e

4.7

1

18

2

18

26

 4.95V

  10.8V

4.7

4.7

5.6

5.6

6.8

4.7

5.6

6.8

  6.8

3.8

V

E

V

B

1

0.7

4.27V

I

E

4.25

1.1 k

3.8

m

A

Note: The loading on the first transistor is the input of the second one. The

result is the replacement of R C wit h the input impedance of a CB configuration

(R C =r e ).

For the first stage (CE), the voltage gain could be calculated as:

R

A 1   1

v

c

r e

While the voltage gain for the second stage (CB) is

R

A 2   265

v

c

r e

A

v

T

A

v

1

A

v

2

 265

Note: The CE stage provides higher input impedance than can be expected from the CB

stage.

Power Amplifier Classes:

- Class-A Power Amplifier :

The output signal varies for a full 360° of the cycle. Thus, this requires the Q-point to be biased at a level so that at least half the signal swing of the

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

output may vary up and down without going to a high-enough voltage to be limited by the su pply voltage level or too low to approach the lower supply level, or 0 V in this description.

It has a very poor efficiency, especially with small input signals, when very little ac power is delivered to the load. In fact, the maximum efficiency of a class A circuit, occurring be tween 25% to 50% which is

due to that it uses a good

amount of power to maintain bias , even with no input signal and the dc

based on the circuit configuration. This is

bias is at the half of the supply voltage level.

There are two types of configuration: 1) Series-Fed

Main Specifications:

-

-

-

-

-

In this type we can use the simple fixed-bias circuit connection as shown in the Fig,

To be used as a power transistor, it is used in the range of a few to tens of Watts,

<100,

Capable of handling large power or current while not providing much voltage gain,

It is not the best choice to be used as a l arge-signal amplifier because of its p oor power efficiency.

DC Bias Operation:

- The importance of the dc bias is to determine

the operating point (the intersection of the dc bias value of IB with the dc load line).

- The quiescent-point values could be calculated as

I

V

CC

0.7

B R

B

I

C

I

B

V

CE

V

CC

I

C

R

C

- If the dc bias collector current is set at one-half

(between 0 and

the possible signal swing Fig. 12.3

Transistor characteristic showing

VCC

/RC), the largest collector c ur rent swing will be possible.

- If the quiescent collector–em itter voltage is

set at

one-half the supply voltage, the largest voltage swing will be possible. With the Q-point set at this optimum bias point.

AC

Operation:

Lecturer: Dr. Omar Daoud

Part I 9

Fig. 12.4 Amplifier input and output signal variation.

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

- An input ac signal is applied to the amplifier, thus the output will vary from its dc bias operating voltage and current as shown in the Fig. 12.4.

- A small in put signal will cause the base current to vary above and below the dc bias point, which will then cause the collector current (output) to vary from the dc bias

poi

nt set as well as th

e collector–emitter voltage to vary around its dc bias value.

- As the input signal is made larger, the output will vary further around the established dc bias point until ??? (either the current or the voltage reaches a limiting condition; for the current this limiting condition is either zero current at the low end or VCC/RC at the high end of its swing. For the collector–emitter

voltage, the limit is either 0 V or the supply voltage, VCC).

Power Considerations:

- The power into an amplifier is provided by the supply Wi

current

supply is

drawn

th

. is the collector bias current, ICQ, The power then drawn from the

no input signal, the dc

Pi(dc)= VCCICQ

- Even with an ac signal applied, the average current drawn from the supply remains the same, so that it represents the input power supplied to the class A series-fed amplifier.

Output Power:

- The larger the input signal, the larger the output swing, up to the maximum set by the circuit.

- The ac power delivered to the load (RC) can be expressed in a number of ways.

a) Using rms signals:

b) Using peak signals:  c) Using peak-to-peak signals:

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

Efficiency: - The efficiency of an amplifier represents the amount of ac power delivered (transferred) from the dc source. - Maximum efficiency could be calculated as follows:

The maximum power output can be calculated as

V

CE

max

I

C

max

V

CC

V

C

C

R

C

P

o

(

ac

) max

2

CC

V

8R

C

The maximum power input can be calculated using the dc bias current set to one-half the maximum value:

P

i

(

dc

) max

V

CC

I

C

max

V

CC V
CC
2
R
V
C
CC
2 2 R
C

The maximum efficiency is The maximum efficiency of a class A series-fed amplifier is thus seen to be 25%. Since this maximum efficiency will occur only for ideal conditions of both voltage swing and current swing, most series-fed circuits will provide efficiencies of much less than 25%.

Ex. Calculate the input power, output power, and efficiency of the amplifier circuit in the given Fig. below for an input voltage that result in a base current of 10 mA peak.

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky Solution:

The Q-point can be determined to be  2) Tra nsformer-Coupled Ma in Specifications: -
A form of class A amplifier havin
maximum efficiency of 50% uses
g
a
transformer to couple the output signa l
to the load as shown in Fig.

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

Operation of Amplifier Stage:

 - The transformer (dc) winding resistance determines the dc load line for the circuit. Typically, this dc resistance is small (ideally=0) and, as shown in the given Fig., a 0 dc load line is a straight vertical line. - A practical transforme r winding resistance would be a few ohms, but only the ideal case will be considered in this discussion. - T here is no dc voltage drop across the 0dc load resis tance, and the load line is drawn straight vertically from the voltage point, VCEQ = VCC.

b) Signal Swing and Output AC Power

- The ac power developed across the transformer pr imary can be calculated

using  The ac power calculated is that developed across the primary of the transformer. Assuming an ideal transformer (a highly efficient transformer has an efficiency of well over 90%), the power delivered by the secondary to the load is approximately that calculated using the previous Eq.

- The output ac power can also be determined using the voltage delivered to the load.

The voltage delivered to the load can be calculated

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky The power across the load can then be expressed as The output ac power then calculated using  Ex. Calculate the ac power delivered to the 8speaker for the given circuit. The circuit component values result in a dc base current of 6 mA, and the input signal (Vi) results in a peak base current swing of 4 mA. Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky  Efficiency:

- The input (dc) power obtained from the supply is calculated from the supply dc voltage and the average power drawn from the supply:

Pi(dc) = VCCICQ

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

- For the transforme r-coupled amplifier, the power dissipated by the

transformer is sma ll (due to the small dc resistance of a coil ) and will be ignored in the present calculations. Thus the only power loss

considered here is tha and calculated using.

t dissipated by the power transistor (as a heat)

PQ =

Pi(dc) - Po(ac)

- For a class A tra nsformer-coupled amplifier, the maximum theoretical efficiency g oes up to 50%. Based on the signals obtained using the amplifier, the efficiency can be expressed as The larger the value of VCEmax and the smaller the value of VCEmin, the closer the efficiency approaches the theoretical limit of 50%.

Ex. For the circuit in the previous example, calculate the dc input power, power dissipated by the transistor, and efficiency.

Solution: Ex. Calculate the efficiency of a transformer-coupled class A amplifier for a supply of 12 V and outputs of :

 (a) V(p) = 12 V. (b) V(p) = 6 V. (c) V(p) =2 V.

Solution : Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

- Clas s-B Power Amplifier

A class B circuit provides an output signal varying over one- half the input signal cycle, or for 180° of signal.

The dc bias po int for class B is therefore at 0 V, with the output then varying from this bias point for a half-cycle.

Obviously, the output is not a faithful reproduction of the input if only one half-cycle is present. Two class B operations—one to

provide output on the positive-output half-cycle and another to prov ide

ycle are necessary. The combined

half-cycles then provide an output for a full 360° of operation (This type operation on the nega

tive-output half-c

of connection is referred to as push-pull operation).

Class B operation, with no dc bias power for no input signal, can be shown to provide a maximum efficiency that reaches 78.5%.

In put (DC) Power:

The amount of this input power can be calculated using

Pi(dc) = VCCIdc

where I dc is the average or dc current drawn from the power supplies.

Note: In class B operation, the current drawn from a single power supply has the form of a full-wave rectified signal, while that drawn from two power supplies has the form of a half-wave rectified signal from each supply.

In either case, the value of the average current drawn can be expressed as Then the dc power input results in Output (AC) Power:

The output power can be calculated as Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

Efficiency: (using I(p)=V L (p)/R L ). The previous equation shows that the larger the peak voltage, the higher the circuit efficiency, up to a maximum value when V L (p)=V CC , this maximum efficiency then being Power Dissipated by Output Transistor:

The power dissipated (as heat) by the output power transistors is the difference between the input power delivered by the supplies and the output power delivered to t he load.

P2Q= Pi(dc) - Po(ac)

where P2Q is the power dissipated by the two output power transistors. The dissipated power handled by each transistor is then half of the P2Q.

Ex. For a class B amplifier providing a 20-V peak signal to a 16load (speaker) and a

power supply of VCC = 30 efficiency.

V, determine the input power, output power, and circuit Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

Maximum Power Consider ations:

For cla

V CC:

ss B operation, the

maximum output power is delivered to the load when V L(p) = The corresponding peak ac current I(p) is then so that the maximum value of average current from the power supply is Using this current to calculate the maximum value of input power results in The maximum power dissipated by the two output transis tors occurs when the output voltage across the load is for a maximum transistor power dissipation of Ex. For a class B amplifier using a supply of VCC=30 V

determine the maximum input power, output power, and trans istor dissipation.

and driving a load of 16, Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

Ex. Calculate the efficiency of a class B amplifier for a supply voltage of VCC =24 V with peak output voltages of:

 (a) VL(p) = 22 V. (b) VL(p) = 6 V. - C lass-AB Power Amplifier :

An amplifier may be biased at a dc level above

the zero

above one-half the supply voltage level of

base current level of class B and

 cla ss A; this bias condition is class A B. This is to reduce the crossover distortion that

happened in class B.

Class AB operation still requires a push-pull connection to achieve a full output cycle, but th e dc bias level is usually closer to the zero ba se current level for better power efficiency, as described shortly.

For class AB operation, the output signal sw ing occurs between 180° and 360° and is n either class A nor class B operation.

v e rage power supplied by each source

The a

and the average power dissipated in each transistor are larger than the one for class B, which results in less power efficiency.

Power Considerations:

- Each transistor draws current for a half-cycle, then

the dc current is

I

dc

I

C

Then the input power delivered by the source is

P

i

(

dc

)

V

CC

I

dc

V

CC

I

C

- The ac output power could be calculated as

P

o(ac)rms

v i

o

o

P

o(ac) p I
I
v CEQ
C V
CC
C
2
2
4  Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

Efficiency: - Class-C Power Amplifier :

The output of a class C amplifier is biased for operation at less than 180° of the cycle and will operate only with a tuned (resonant) circuit, which provides a full cycle of operation for the tuned or resonant frequency. This operating class is therefore used in special areas of tuned circuits, such as radio or communications.

The power dissipated of the transistor is low because it is ON for a small percentage only of the input cycle.

The Basic Concept of Operation:

A common emitter class C amplifier with a resistive load is shown in the given figure.

It is biased below cutoff with the negative V BB supply. The ac source has a peak value that is slightly greater than V BB +V BE so that the base voltage exceeds the barrier potential of the BE- junction for a short time near th e positive peak of each cycle.

Du ring this short interval the transistor is turned ON and then the ideal maximum collector current is I C(sat) and the ideal minimum collector voltage is V CE(sat) . The Power Dissipation:

If the output swings over the entire load, the maximum collector current is

I C(sat) and the ideal minimum collector voltage is V , therefore the power

dissipation du ring the ON could be defined as

CE(sat)

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Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

P D(ON) = I C(sat) V CE(sat)

P

( )

D avg

   t   P

T

on

D on

(

)

   t   I

on

T

C (sat)

V

CE (sat) Ex. A Class C amplifier is driven by a 200kHz signal. The transistor is ON for 1s, and the amplifier is operating over 100 percent of its load line. If the I C(sat) =100mA and V CE(sat) =0.2V, what is the average power dissipation?

Solution:

T

1

200

kHz

5

s

P

(

D avg

)

Tuned Operation:

   1

5

s

s

100mA0.2V4mV

The resistively loaded Class C power amplifier is of no value in linear applications. ???? (The output is not a replica of the input ). Thus, class C with parallel resonant circuit appears as shown in the figure. The short pulse of collector current on each cycle of the input initiates and sustains the oscillation of the tank circuit so that the output sinusoidal voltage is produced.

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

The resonant frequency of the circuit is determined by the formula of

f r

1 .
2
LC

The current pulse charges the capacitor to approximately V CC . After the pulse, the capacitor quickly discharges, thus charging the inductor. Then, after the capacitor completely discharges, the inductor's magnetic field collapses and then quickly recharges C to near V CC in a direction opposite to the previous charge (This completes one half-cycle of the oscillation ). The capacitor discharges again, increasing the inductor's magnetic field. The inductor then quickly recharges the capacitor back to a positive peak slightly less than the previous one??? (due to energy loss in the winding resistance), which completes one full cycle and then the peak-to-peak voltage is therefore approximately equal to 2V CC . Note: The amplitude of each successive cycle of the oscillation is less than that of the previous cycle ??? (Because of energy loss in the resistance of tank circuit) and the oscillation will eventually die out. However, the regular recurrence of the collector pulse re-energizes the resonant circuit and sustains the oscillation at constant amplitude.

Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

When the tank circuit is tuned to the frequency of the input signal, re- energizing occurs on each cycle of the tank. A class C amplifier operates as a frequency multiplier. By tuning the resonant tank circuit to higher harmonics.  Module: Electronics II

Module Number: 650321

Electronic Devices and Circuit Theory, 9 th ed., Boylestad and Nashelsky

UMaximum Output Power and Efficiency:

The voltage developed across the tank circuit has a peak-to-peak value of approximately 2VR CC R, the maximum output power can be expressed as:

P out

2

rms

V

0.707 V

CC

2

2

CC

V

R

C

R

C

2 R

C

where RR C R is equivalent parallel resistance of the collector tank circuit and represents the parallel combination of the coil resistance and the load resistance.

The total power that must be supplied to the amplifier is

PR T R=PR out R+PR D(avg)

Therefore, the efficiency is

P out

P out

P

(

D avg

)

, when P

out



P

(

D avg

)

the class C efficiency closely approaches1

- Class-D Power Amplifier :

This operating class is a form of amplifier operation using pulse (digital) signals, which are on for a short interval and off for a longer interval.

Using digital techniques makes it possible to obtain a signal that varies over the full cycle (using sample-and-hold circuitry) to recreate the output from many pieces of input signal.

The major advantage of class D operation is that the amplifier is on (using power) only for short intervals and the overall efficiency can practically be very high.

Class D operation can achieve power efficiency over 90% and provides the most efficient operation of all the operating classes. 