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QFET ®
FQP9N25C/FQPF9N25C
250V N-Channel MOSFET
D
{
◀ ▲
G{ ●
●
TO-220 GD S
TO-220F
G DS
FQP Series FQPF Series {
S
Thermal Characteristics
Symbol Parameter FQP9N25C FQPF9N25C Units
RθJC Thermal Resistance, Junction-to-Case 1.69 3.29 °C/W
RθJS Thermal Resistance, Case-to-Sink Typ. 0.5 -- °C/W
RθJA Thermal Resistance, Junction-to-Ambient 62.5 62.5 °C/W
Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 250 -- -- V
∆BVDSS Breakdown Voltage Temperature
ID = 250 µA, Referenced to 25°C -- 0.30 -- V/°C
/ ∆TJ Coefficient
IDSS VDS = 250 V, VGS = 0 V -- -- 10 µA
Zero Gate Voltage Drain Current
VDS = 200 V, TC = 125°C -- -- 100 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2.0 -- 4.0 V
RDS(on) Static Drain-Source
VGS = 10 V, ID = 4.4 A -- 0.35 0.43 Ω
On-Resistance
gFS Forward Transconductance VDS = 40 V, ID = 4.4 A (Note 4) -- 7.0 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V, -- 545 710 pF
Coss Output Capacitance f = 1.0 MHz -- 115 150 pF
Crss Reverse Transfer Capacitance -- 45.5 60 pF
Switching Characteristics
td(on) Turn-On Delay Time -- 15 40 ns
VDD = 125 V, ID = 8.8 A,
tr Turn-On Rise Time -- 85 180 ns
RG = 25 Ω
td(off) Turn-Off Delay Time -- 90 190 ns
(Note 4, 5)
tf Turn-Off Fall Time -- 65 140 ns
Qg Total Gate Charge VDS = 200 V, ID = 8.8 A, -- 26.5 35 nC
Qgs Gate-Source Charge VGS = 10 V -- 3.5 -- nC
Qgd Gate-Drain Charge (Note 4, 5) -- 13.5 -- nC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 5.9mH, IAS = 8.8A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 8.8A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
VGS
Top : 15.0 V
10.0 V
8.0 V 1
1
10 7.0 V 10
6.5 V
6.0 V o
5.5 V 150 C
5.0 V
Bottom : 4.5 V
o
25 C o
-55 C
0 0
10 10
※ Notes : ※ Notes :
1. 250µ s Pulse Test 1. VDS = 40V
2. TC = 25℃ 2. 250µ s Pulse Test
-1 -1
10 10
10
-1
10
0
10
1 2 4 6 8 10
1.25
Drain-Source On-Resistance
1.00 10
1
RDS(ON) [Ω ],
0.50 10
0
2000 12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd VDS = 50V
10
VDS = 125V
VGS, Gate-Source Voltage [V]
1500
VDS = 200V
8
Capacitance [pF]
Ciss
1000 6
Coss
4
Crss
500
※ Notes :
2
1. VGS = 0 V
2. f = 1 MHz ※ Note : ID = 8.8A
0 0
10
-1
10
0
10
1
0 5 10 15 20 25 30
1.2 3.0
Drain-Source Breakdown Voltage
2.5
Drain-Source On-Resistance
1.1
BVDSS, (Normalized)
RDS(ON), (Normalized)
2.0
1.0 1.5
1.0
0.9 ※ Notes :
1. VGS = 0 V
※ Notes :
2. ID = 250 µA 0.5
1. VGS = 10 V
2. ID = 4.4 A
0.8 0.0
-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200
o o
TJ, Junction Temperature [ C] TJ, Junction Temperature [ C]
2 2
10 Operation in This Area 10 Operation in This Area
is Limited by R DS(on) is Limited by R DS(on)
10 µs
100 µs
ID, Drain Current [A]
10
1
10
1 100 µs
1 ms
10 ms 1 ms
DC 10 ms
0 0 DC
10 10
※ Notes : ※ Notes :
o o
1. TC = 25 C 1. TC = 25 C
o o
2. TJ = 150 C 2. TJ = 150 C
3. Single Pulse 3. Single Pulse
-1 -1
10 10
0 1 2 0 1 2
10 10 10 10 10 10
Figure 9-1. Maximum Safe Operating Area Figure 9-2. Maximum Safe Operating Area
for FQP9N25C for FQPF9N25C
10
8
ID, Drain Current [A]
0
25 50 75 100 125 150
0
ZθJC(t), Thermal Response 10 D = 0 .5
※ N o te s :
0 .2 1 . Z θ J C ( t) = 1 .6 9 ℃ /W M a x .
2 . D u ty F a c to r , D = t 1 /t 2
0 .1 3 . T J M - T C = P D M * Z θ J C ( t)
10
-1 0 .0 5
0 .0 2
0 .0 1 PDM
s in g le p u ls e
t1
t2
-2
10
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
D = 0 .5
ZθJC(t), Thermal Response
0
10
0 .2 ※ N o te s :
1 . Z θ J C ( t) = 3 . 2 9 ℃ /W M a x .
0 .1 2 . D u t y F a c to r , D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C ( t)
0 .0 5
-1 0 .0 2
10
0 .0 1
PDM
s in g le p u ls e
t1
t2
-2
10
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
VGS
Same Type
50KΩ
as DUT Qg
12V 200nF
300nF 10V
VDS
VGS Qgs Qgd
DUT
3mA
Charge
RL VDS
VDS 90%
VGS VDD
RG
10%
VGS
10V DUT
td(on) tr td(off)
tf
t on t off
L 1 BVDSS
VDS EAS = ---- L IAS2 --------------------
2 BVDSS - VDD
BVDSS
ID
IAS
RG
VDD ID (t)
DUT +
VDS
I SD
L
Driver
RG
Same Type
as DUT VDD
IRM
VSD VDD
Body Diode
Forward Voltage Drop
TO-220
9.90 ±0.20 4.50 ±0.20
1.30 ±0.10
(8.70)
2.80 ±0.10
(1.70)
+0.10
ø3.60 ±0.10 1.30 –0.05
18.95MAX.
(3.70)
15.90 ±0.20
9.20 ±0.20
(1.46)
(3.00)
(45°
)
(1.00)
13.08 ±0.20
10.08 ±0.30
10.00 ±0.20
Dimensions in Millimeters
TO-220F
3.30 ±0.10
6.68 ±0.20
15.87 ±0.20
15.80 ±0.20
(1.00x45°)
MAX1.47
9.75 ±0.30
0.80 ±0.10
(3
0°
)
#1
0.35 ±0.10 +0.10
0.50 –0.05 2.76 ±0.20
2.54TYP 2.54TYP
[2.54 ±0.20] [2.54 ±0.20]
4.70 ±0.20
9.40 ±0.20
Dimensions in Millimeters
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PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems 2. A critical component is any component of a life support
which, (a) are intended for surgical implant into the body, device or system whose failure to perform can be
or (b) support or sustain life, or (c) whose failure to perform reasonably expected to cause the failure of the life support
when properly used in accordance with instructions for use device or system, or to affect its safety or effectiveness.
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
Advance Information Formative or In This datasheet contains the design specifications for
Design product development. Specifications may change in
any manner without notice.
Preliminary First Production This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.