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An interrupt is an event that alters the sequence in which a processor executes instructions. The address of the program handler is calculated by the Interrupt Vector Table. An interrupt may be initialized either by the user programs, or by the hardware: keyboard, timer (hardware interrupt) a key advantage to the interrupt concept is that it provides a low-overhead means of gaining the attention of the CPU.
An interrupt is an event that alters the sequence in which a processor executes instructions. The address of the program handler is calculated by the Interrupt Vector Table. An interrupt may be initialized either by the user programs, or by the hardware: keyboard, timer (hardware interrupt) a key advantage to the interrupt concept is that it provides a low-overhead means of gaining the attention of the CPU.
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An interrupt is an event that alters the sequence in which a processor executes instructions. The address of the program handler is calculated by the Interrupt Vector Table. An interrupt may be initialized either by the user programs, or by the hardware: keyboard, timer (hardware interrupt) a key advantage to the interrupt concept is that it provides a low-overhead means of gaining the attention of the CPU.
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Attribution Non-Commercial (BY-NC)
Formate disponibile
Descărcați ca DOC, PDF, TXT sau citiți online pe Scribd
On a computer system, an interrupt is an event that alters the sequence in which
a processor executes instructions. This is a signal on which the processor stops execution of the current command sequence and transfer control to the program- handler of the interrupt. The address of the program handler is calculated by the interrupt vector table. An interrupt may be initialized either by the user programs, while working with disks, screen, printer etc (program interrupts), or by the hardware: keyboard, timer (hardware interrupt). Interrupt Vector Table (IVT) is a table containing values of address of the programs that handle interrupt, located at lowest addresses (0000:0000 – 0000:03FF) and has 256, 4 bytes addresses (interrupt vectors). Interrupt vector is an element of interrupt vector table which contains address of an interrupt handler. When an interrupt occurs • The operating system gains control. • The operating system saves the status of the interrupted process. In many systems this information is stored in the interrupted process’s process control block (PCB). • The operating system analyzes the interrupt and passes control to the appropriate routine to handle the interrupt. • The interrupt handler routine processes the interrupt. • The state of the interrupted process is restored. • The interrupted process is executes. An interrupt may be specifically initialized by a running process (in which case it is often called a trap and synchronous with the operation of the process), or it may be caused by some event that may not be related to the running process (in which case it is said to be asynchronous with the operation of the process). A key advantage to the interrupt concept is that it provides a low-overhead means of gaining the attention of the CPU. This eliminates the need for the CPU to remain busy pooling to see if devices require its attention. Interrupt Classes There are six classes. These are • SVC (Supervisor Call) Interrupts. These are initiated by a running process that executes the SVC instruction. An SVC is a user-granted request for a particular system service such as performing input/output, obtaining more storage, or communicating with the system operator. The SVC mechanism helps keep the operating system secure from the users. A user may not arbitrarily enter the operating system; rather the user must request a service through an SVC. The operating system is thus aware of all user attempts to cross its borders, and it may refuse certain requests if the user does not have appropriate privileges. • I/O Interrupt. These are initiated by the input/output hardware. They signal to the CPU that the status of a channel or device has changed. I/O interrupts are caused when an I/O operation completes, when an I/O error occurs, or when a device is made ready, for example. • External Interrupt. These are caused by various events including the expiation of a quantum on an interrupting clock, the pressing of the console’s interrupt key by the operator, or the receipt of a signal from another processor on a multiprocessor system. • Restart Interrupt. These occur when the operator pressed the console’s restart button, or when a restart SIPG (signal processor) instruction arrives from another processor on a multiprocessor system. • Program Check Interrupt. These are caused by a wide range of problems that may occur as a program’s machine language instructions are executed. These problem include o Division by zero, o Arithmetic overflow or underflow, o Data (being operate upon) is in the wrong format , o Attempt to reference a memory location beyond the limits of real memory, o Attempt by a user process to execute a privileged instruction, and o An attempt to reference a protected resource. Many systems give users the option to specify their own routines to be executed when a program check interrupt occurs. • Machine check Interrupt. These are caused by malfunctioning hardware.