Sunteți pe pagina 1din 8

Ist internals solutions

PES SCHOOL OF ENGINEERING


HOSUR ROAD (1KM BEFORE ELECTRONIC CITY), BANGALORE-100
Test I Solutions
Name of faculty: Mrs. AnuSophia/ Ms. Swapna

Q1.With a neat diagram, explain the architecture of 8086 microprocessor along


with the functions of each block and registers. 10marks
20
Adder

Bus Interface
ES Unit
CS
SS Instruction
DS queue

IP

AX AH(8) AL(8) Control Control


BH(8) BL(8) Unit lines
BX General
CX CH(8) CL(8) Registers
DX DH(8) DL(8)

SP Execution
BP
ALU Unit
DI
SI
Flags

A1.The execution unit contains the data and address registers, the arithmetic and logic
unit and control unit. The bus interface unit contains bus interface logic, segment
registers, memory addressing logic and a 6 byte instruction object code queue. The
EU and BIU operate asynchronously.

EXECUTION UNIT AND BUS INTERFACE UNIT

i) BIU sends out the address, fetches instructions from memory, reads data from ports
and memory and writes data to port and memory. It handles all transfers of data and
address on the buses for EU.

ii) EU tells BIU where to fetch instructions or data from, decodes instructions and
executes instructions.

* EU consists of control circuitry which directs internal operation.

* Decodes translates instructions fetched from memory into a series of actions


which EU carries out.

*ALU:
performs add, subtract, AND,OR,XOR,increment,decrement,complement or shift
operations.

* It consists of pointer register and index register which is used to get the data
from memory or write data into the memory. The pointer registers are Base pointer,

1
Ist internals solutions

Source Pointer and Index Pointer. The index registers are Source Index and
Destination Index.

FLAG REGISTERS: A flag is a flip flop that indicates some condition produced by
execution of instruction or controls certain operations of EU.

* General purpose registers are 8 in number AX (AH & AL), BX (BH & BL),
CX(CH & CL),DX(DH &DL) which can be used

For temporary storage of 8 bit or 16 bit data. The data can be accessed much
more quickly than it could be accessed in external memory.

* QUEUE: BIU stores the fetched 6 instructions in FIFO register called


queue.

* Segment Register: Segment register is used to hold the upper 16-bit bits of
starting address for each of the segments.

* Instruction pointer is a 16-bit register which contains offset address of next


instruction to be executed.

* Code Segment register points to the base or start of the current code
segment.IP contains offset or distance from this base address to the next instruction
byte to be fetched.

* The stack pointer register in EU holds the 16-bit offset from the start of the
segment to the memory location where a word was most recently stored on stack.

* Base pointer consists of 16-bit source index register (SI) and 16-bit
destination index register (DI) which is used for temporary storage of data just like
general purpose register.

* DI and SI hold the 16-bit offset of a data word in one of the segments.

Q2) List out the different addressing modes in 8086 and differentiate between
the with an example.10 marks

1. REGISTER ADDRESSING MODE

Fastest addressing mode because processing the data between the register involves no
reference to the memory. Size of operand should be the same.
Segment registers can also be used as operand with an exception that CS register
cannot be the destination operand.
Example: mov cx, ax cx=7418h, ax=3429h
After execution cx=ax=3429h

2
Ist internals solutions

2. IMMEDIATE ADDRESSING MODE


In immediate addressing mode an immediate number is specified in the instructions.
However immediate numbers cannot be used as destination operand. Immediate
operands can be accessed quickly because they are available directly from instruction
Queue.
Example: mov 4000h, dx = invalid since here immediate data is destination operand
mov ah,1000h = valid

3. DIRECT ADDRESSING MODE


In this addressing mode 16 bit offset address of memory location is directly specified
as a part of the instruction. The no. of bytes to be copied is determined by the size of
the destination.
Example: mov ax, [5000h]

4. INDIRECT ADDRESSING MODE


6 types of indirect addressing mode exists
a) Base register IAM: Offset address of the data to be accessed is available in
base register BX.
Example: MOV AX, [BX] ; Access the data at offset address specified in BX
register and copy into AX register.Bp register is used only when 8 bit or 16 bit
displacement.

b) Base register IAM with displacement: Part of the offset address of the data is
stored in the register BX or BP and remaining part of the offset address is
specified as displacement.
Example: MOV AX, 23H [BX]; copies a word from data segment memory at
the offset address: [BX] +23H
MOV 50H [BP], 1234H

c) Indexed AM: Offset address of the data to be accessed is available in index


registers SI or DI.
Example: MOV AX,[SI] ;Access the data at offset address specified in SI
register and copy into AX register

d) Indexed AM with displacement: Part of the offset address of the data is stored
in the register SI or DI and remaining part of the offset address is called
effective offset address is specified as displacement.
Example: MOV AX, 23H [SI] ;copies a word from data segment memory at
the offset address :(SI)+23H

e) Base indexed AM: Part of the offset address of the data is stored in the register
BX or BP and SI or DI. Effective offset address is obtained by adding the
contents of BX/BP+SI/DI
Example: MOV AX,[BX+SI] ; access the data at offset address specified in
BX+SI Register and copy into AX register.

f) Base indexed AM with displacement: Effective offset address is obtained by


adding the base register, index register and displacement specified in the
instruction.

3
Ist internals solutions

Example : MOV AX,1000H[BX+SI] ; Access the data at offset address


specified in BX+SI register+ displacement and copy into AX register.

Q3) Explain the following instructions with an example of each.10marks

1. AAA: ASCII adjustment after addition

Description: This instruction is used to make sure the result is correct unpacked
BCD.
Function:
1. Clear the higher order nibble of AL
2. If lower nibble of AL is greater than 9 or AF=1 then
a) add 6 to AL
b) add 1 to AH
c) set AF and CF to 1
Flags Affected: AF and CF
PF,SF,OF and ZF are left undefined.
Example: AL: 0011 0101
BL: 0011 1001
ADD AL,BL Result AL=0110 1110=6EH which is incorrect
AAA Now AL=0000 0100 and CF=1 which is 14 correct answer

2. RCL: Rotate through carry left

Description: Instruction rotates all the bits in a specified word or byte some number
of bit positions to the left. .
Functions: Operation is circular because the MSB of the operand is rotated into the
carry flag and the bit in the carry flag is rotated around into the LSB of the operand.
For multibit rotates, CF will contain the bit most recently rotated out of the
MSB.Destination operand can be a register or in a memory location. Count when
more than one is loaded into the CL register.
Flags affected: Affects only carry flag and overflow flag
Example: Cf=0, BH=10110011
RCL BH, 1; BH= 01100110
Cf=1, OF=1 because MSB Changed

3. DAS: Decimal Adjustment after Subtraction

Description: Used to make sure the result of adding two unpacked BCD nos is
adjusted to be legal BCD number.
Function:
1.If lower nibble of AL after an addition is greater than 9 or AF=1 then subtract 6 to
the lower nibble
2.If now the upper nibble of AL is greater than 9 or CF=1 Subtract 60H to AL.
Flags affected: AF,CF,PF,ZF OF is undefined
Example: AL=0100 0010=42h
BL=0010 1001=29h
SUB AL,BL AL=0001 1001=19H

4
Ist internals solutions

DAS subtract 6 to AL since 1001>9


AL=AL-6
AL=13 ( Since we take 2’s complement of 29h carry gets complemented)

4.IMUL:Integer multiplication

Description:Multiplies a signed byte from some source operand to a signed byte in


AL or a signed word to a signed word
in AX register.
If two signed bytes are multiplied the result is sored in Ax and if two signed word are
multiplied then the higher
order word is stored in Dx and lower order word is stored in AX.
Flags affected: OF and CF
AF,PF,SF and ZF are left undefined.
Example:IMUL BH: Signed byte in AL times signed byte in BH.
result in AX.

5. XLAT:

Description : Used to translate a byte from one code to another code. Replaces a byte
in al register with a byte pointed to by BX in a look up table in memory. Before the
execution of the instruction the look up table containing the values for the new code
must be put in memory and the offset of the starting address of the look up table must
be loaded in BX.
It puts the byte to be translated in AL . To point to the desired byte in the look up
table , the instruction adds the byte in al to the offset of the start of the table in BX.It
then copies the byte from the address pointed to by (bx+al) back into al register.

Flags affected : None

Example : MOV BX, OFFSET EBCDIC_TABLE ; point bx at start of EBCDIC table


In data segment.
XLATB ; replace ascii in al with ebcdic from table

Q4.a) What are the advantages of segmentation of memory? 5marks

Advantages of the segmented memory:


1. Allows the memory capacity to be 1MB although the actual address to be handled
is of 16 bit size.
2. Allows the placing of code, data and stack portions of the same program in
different parts (segment) of memory, for data and code protection.
3. Permits a program and/or its data to be put into different areas of memory each
time program is executed.
4. Faster execution time & segments are distinct.
5. As we have different segments debugging is lot easier.

5
Ist internals solutions

Q4.b) With respect to the code segment register and instruction pointer register,
explain the calculation of the physical address of code byte with an
example.5marks

The instruction pointer register holds 16-bit address of the next code byte within the
code segment. The CS register points to the base or start of the current code segment.
The value contained in IP is referred to as an offset because this value must be added
to the segment base address in CS to produce the required 20=bit physical address
sent out to by BIU.The IP contains the distance or offset from this base address to the
next instruction byte to be fetched.
Physical address(20-bit)=(CS)*10H+IP

CS 3 4 8 A 0
IP + 4 2 1 4
---------------------
PHYSICAL ADDRESS 3 8 A B 4

Q5) Explain execution of following 8086 instruction. What will be the content of
destination register? Also mention effect on flags and pointers after execution of
instruction.10marks

A5) i) DAA if AL = 8AH, CF=0,AF=0.


AL=10001010
lower byte of AL is 10 i.e.>9
add 6 of lower byte,AF is set

1000 1010
0110
---------
1001 0000 here higher byte not > 9
so destinstion register has 1001 0000 =90H
Carry flag and auxilliary flag is effected.

ii) AND AX,0FF0H if Ax =5678,CF=0

AX = 0101 0110 0111 1000


Adding 0000 1111 1111 0000
-------------------
0000 0110 0111 0000

now mask out upper 8 bits


since AX = 0000 0110 0111 0000
CF=0,OF=0.PF,SF & ZF are updated,AF is undefined.

6
Ist internals solutions

iii) DIV BH if AX=0050H,BX=1000H

AX=0050H
BH=10H
DIV AX/BH
AL=05H=5 decimal.
The quotient is stored in AL register while the remainder is stored in AH
register.AH=0H

iv)ROR AX,CX if AX =0420H,CX=0002H

The bits in the AX register is rotated towards right by the no. of times
specified in the CX register.

AX = 0000 0100 0010 0000


after rotation

AX = 0000 0001 0000 1000

v)PUSH CX if CX=4020H,SP=00FFFH

The value of CX register is pushed into the stack at a memory location which
is pointed to by the stack
pointer.The stack pointer points to the top of the stack where the new element
is pushed.

After the completion of the push operation the SP is decremented by 2 to point


to the next memory location
which now the top of the stack.Since CX is a word SP is decremented by 2
else for a byte it is decremented by 1.

SP = 0000 0000 1111 1111 1111


subtract 0000 0000 0000 0000 0010
------------------------
0000 0000 1111 1111 1101

SP = 00FFD.

Q6) What happens when the following assembler directives are


executed?10marks

1. X dw ?

* dw directive tells the assembler to define a variable of type word.


* dw-define word.
* it allocates memory for a word.
* ? Signifies that the memory is uninitialized.

7
Ist internals solutions

2. ARRAY db 10 dup(0)

* db directive tells the assembler that a variable of type byte is being defined.
* db-define byteA
* 10 byte location are allocated in memory and is given the name array.
* All the 10 memory locations are initialised to 0.

3. BCD_BIN endp

* BCD_BIN is a procedure.
* endp signifies the end of procedure BCD_BIN.
* proc along with endp is used to bracket a procedure.

4. ADD AX,word ptr[BX]

* The directive ptr tells the assembler to manipulate the byte or word pointed to by
BX.
* It adds a word in AX to a word word pointed to by BX.
* The keyword word tells the assembler that the pointed to by BX is to be added.

5. ASSUME DS:DATA

* ASSUME directive is used to tell the assembler the name of the logical segment it
should use for the specified segment.
* DS:DATA tells the assembler that the logical segment DATA is to be used for
data.

_____________________________________________________________________

S-ar putea să vă placă și