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M

MCP41XXX/42XXX

Single/Dual Digital Potentiometer with SPI Interface

Features

• 256 taps for each potentiometer

• Potentiometer values for 10 k, 50 kand 100 k

• Single and dual versions

• SPI™ serial interface (mode 0,0 and 1,1)

• ±1 LSB max INL & DNL

• Low power CMOS technology

• 1 µA maximum supply current in static operation

• Multiple devices can be daisy-chained together (MCP42XXX only)

• Shutdown feature open circuits of all resistors for maximum power savings

• Hardware shutdown pin available on MCP42XXX only

• Single supply operation (2.7V - 5.5V)

• Industrial temperature range: -40°C to +85°C

• Extended temperature range: -40°C to +125°C

Block Diagram RS SHDN V DD V PB0 SS Resistor Wiper Control Array 0 Register
Block Diagram
RS
SHDN
V
DD
V
PB0
SS
Resistor
Wiper
Control
Array 0
Register
Logic
PA0
PW0
PB1
CS
Wiper
Resistor
16-Bit
PA1
Register
Array 1*
SI
Shift
PW1
Register
SCK

S0

*Potentiometer P1 is only available on the dual MCP42XXX version.

Description

The MCP41XXX and MCP42XXX devices are 256- position, digital potentiometers available in 10 k, 50 kand 100 kresistance versions. The MCP41XXX is a single-channel device and is offered in an 8-pin PDIP or SOIC package. The MCP42XXX con- tains two independent channels in a 14-pin PDIP, SOIC or TSSOP package. The wiper position of the MCP41XXX/42XXX varies linearly and is controlled via an industry-standard SPI interface. The devices con- sume <1 µA during static operation. A software shut- down feature is provided that disconnects the “A” terminal from the resistor stack and simultaneously con- nects the wiper to the “B” terminal. In addition, the dual MCP42XXX has a SHDN pin that performs the same function in hardware. During shutdown mode, the con- tents of the wiper register can be changed and the potentiometer returns from shutdown to the new value. The wiper is reset to the mid-scale position (80h) upon power-up. The RS (reset) pin implements a hardware reset and also returns the wiper to mid-scale. The MCP42XXX SPI interface includes both the SI and SO pins, allowing daisy-chaining of multiple devices. Chan- nel-to-channel resistance matching on the MCP42XXX varies by less than 1%. These devices operate from a single 2.7 - 5.5V supply and are specified over the extended and industrial temperature ranges.

Package Types

PDIP/SOIC

MCP41XXX CS 1 8 SCK 2 7 SI 3 6 V 4 5 SS
MCP41XXX
CS
1
8
SCK
2
7
SI
3
6
V
4
5
SS

V DD

PB0

PW0

PA0

PDIP/SOIC/TSSOP

MCP42XXX CS 1 14 V DD SCK 2 13 SO SI 3 12 SHDN V
MCP42XXX
CS
1 14
V
DD
SCK
2 13
SO
SI
3 12
SHDN
V
4 11
RS
SS
PB1
5 10
PB0
PW1
6 9
PW0
PA1
7 8
PA0

MCP41XXX/42XXX

MCP41XXX/42XXX 1.0 ELECTRICAL CHARACTERISTICS DC CHARACTERISTICS: 10 k Ω VERSION Electrical Characteristics: Unless
MCP41XXX/42XXX 1.0 ELECTRICAL CHARACTERISTICS DC CHARACTERISTICS: 10 k Ω VERSION Electrical Characteristics: Unless

1.0 ELECTRICAL CHARACTERISTICS

DC CHARACTERISTICS: 10 kVERSION

Electrical Characteristics: Unless otherwise indicated, V DD = +2.7V to 5.5V, T A = -40°C to +85°C (TSSOP devices are only specified at +25°C and +85°C). Typical specifications represent values for V DD = 5V, V SS = 0V, V B = 0V, T A = +25°C.

Parameters

 

Sym

Min

 

Typ

 

Max

Units

 

Conditions

Rheostat Mode

Nominal Resistance

R

8

 

10

 

12

k

A = +25°C (Note 1)

T

Rheostat Differential Non Linearity

R-DNL

-1

 

±1/4

 

+1

LSB

Note 2

Rheostat Integral Non Linearity

R-INL

-1

 

±1/4

 

+1

LSB

Note 2

Rheostat Tempco

R AB /T

 

800

 

ppm/°C

 

Wiper Resistance

R

W

 

52

 

100

V

 

DD = 5.5V, I W = 1 mA, code 00h

R

W

 

73

 

125

V

 

DD = 2.7V, I W = 1 mA, code 00h

Wiper Current

I

W

-1

 

 

+1

mA

 

Nominal Resistance Match

 

R/R

 

0.2

 

1

%

MCP42010 only, P0 to P1; T A = +25°C

Potentiometer Divider

Resolution

N

8

 

 

Bits

 

Monotonicity

N

8

 

 

Bits

 

Differential Non-Linearity

DNL

-1

 

±1/4

 

+1

LSB

Note 3

Integral Non-Linearity

INL

-1

 

±1/4

 

+1

LSB

Note 3

Voltage Divider Tempco

V W /T

 

1

 

ppm/°C

Code 80h

Full Scale Error

V

WFSE

-2

 

-0.7

 

0

LSB

Code FFh, V DD = 5V, see Figure 2-25

V

WFSE

-2

 

-0.7

 

0

LSB

Code FFh, V DD = 3V, see Figure 2-25

Zero Scale Error

V

WZSE

0

 

+0.7

 

+2

LSB

Code 00h, V DD = 5V, see Figure 2-25

V

WZSE

0

 

+0.7

 

+2

LSB

Code 00h, V DD = 3V, see Figure 2-25

Resistor Terminals

Voltage Range

V

A,B,W

0

 

V DD

 

Note 4

Capacitance (C A or C B )

 

 

15

 

pF

f

= 1 MHz, Code = 80h, see Figure 2-30

Capacitance

C

W

 

5.6

 

pF

f

= 1 MHz, Code = 80h, see Figure 2-30

Dynamic Characteristics (All dynamic characteristics use V DD = 5V)

 

Bandwidth -3dB

BW

 

1

— —

 

MHz

V

B = 0V, Measured at Code 80h,

Output Load = 30 PF

Settling Time

t

S

 

2

— —

 

µS

A = V DD ,V B = 0V, ±1% Error Band, Transition

V

from Code 00h to Code 80h, Output Load = 30 pF

Resistor Noise Voltage

e

NWB

 

9

— —

 

nV/Hz

A = Open, Code 80h, f =1 kHz

V

Crosstalk

C

T

 

-95

— —

 

dB

A = V DD , V B = 0V (Note 5)

V

Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation

 

Schmitt Trigger High-Level Input Voltage

V

IH

0.7V DD

 

——V

   

Schmitt Trigger Low-Level Input Voltage

V

IL

 

0.3V DD

V

 

Hysteresis of Schmitt Trigger Inputs

V

HYS

0.05V DD

 

   

Low-Level Output Voltage

 

V

OL

 

 

0.40

V

I OL = 2.1 mA, V DD = 5V

High-Level Output Voltage

 

V OH

V DD - 0.5

 

 

V

I OH = -400 µA, V DD = 5V

Input Leakage Current

I LI

-1

 

 

+1

µA

CS = V DD , V IN = V SS or V DD , includes V A SHDN=0

Pin Capacitance (All inputs/outputs)

C IN , C OUT

 

10

 

pF

V

DD = 5.0V, T A = +25°C, f c = 1 MHz

Power Requirements

Operating Voltage Range

V

DD

2.7

 

 

5.5

V

 

Supply Current, Active

I DDA

 

340

 

500

µA

V

DD = 5.5V, CS = V SS , f SCK = 10 MHz,

   

SO = Open, Code FFh (Note 6)

Supply Current, Static

I DDS

 

0.01

 

1

µA

CS, SHDN, RS = V DD = 5.5V, SO = Open (Note 6)

Power Supply Sensitivity

PSS

 

0.0015

0.0035

%/%

V

DD = 4.5V - 5.5V, V A = 4.5V, Code 80h

PSS

 

0.0015

0.0035

%/%

V

DD = 2.7V - 3.3V, V A = 2.7V, Code 80h

Note

1:

V AB = V DD , no connection on wiper.

2:

Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum

3:

resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. I W = 50 µA for V DD = 3V and I W = 400 µA for V DD = 5V for 10 kversion. See Figure 2-26 for test circuit. INL and DNL are measured at V W with the device configured in the voltage divider or potentiometer mode. V A = V DD and V B = 0V. DNL

4:

specification limits of ±1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit. Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured

5:

using Figure 2-25. Measured at V W pin where the voltage on the adjacent V W pin is swinging full-scale.

6:

Supply current is independent of current through the potentiometers.

MCP41XXX/42XXX

MCP41XXX/42XXX DC CHARACTERISTICS: 50 k Ω VERSION Electrical Characteristics: Unless otherwise indicated, V D D =
MCP41XXX/42XXX DC CHARACTERISTICS: 50 k Ω VERSION Electrical Characteristics: Unless otherwise indicated, V D D =

DC CHARACTERISTICS: 50 kVERSION

Electrical Characteristics: Unless otherwise indicated, V DD = +2.7V to 5.5V, T A = -40°C to +85°C (TSSOP devices are only specified at +25°C and +85°C). Typical specifications represent values for V DD = 5V, V SS = 0V, V B = 0V, T A = +25°C.

Parameters

 

Sym

Min

 

Typ

 

Max

Units

 

Conditions

Rheostat Mode

Nominal Resistance

 

R

35

 

50

 

65

k

A = +25°C (Note 1)

T

Rheostat Differential Non-Linearity

R-DNL

-1

 

±1/4

 

+1

LSB

Note 2

Rheostat Integral Non-Linearity

R-INL

-1

 

±1/4

 

+1

LSB

Note 2

Rheostat Tempco

R AB /T

 

800

 

ppm/°C

 

Wiper Resistance

 

R

W

 

125

 

175

V

DD = 5.5V, I W = 1 mA, code 00h

 

R

W

 

175

 

250

V

DD = 2.7V, I W = 1 mA, code 00h

Wiper Current

 

I

W

-1

 

 

+1

mA

 

Nominal Resistance Match

 

R/R

 

0.2

 

1

%

MCP42050 only, P0 to P1;T A = +25°C

Potentiometer Divider

Resolution

 

N

8

 

 

Bits

 

Monotonicity

 

N

8

 

 

Bits

 

Differential Non-Linearity

DNL

-1

 

±1/4

 

+1

LSB

Note 3

Integral Non-Linearity

INL

-1

 

±1/4

 

+1

LSB

Note 3

Voltage Divider Tempco

V W /T

 

1

 

ppm/°C

Code 80h

Full-Scale Error

V

WFSE

-1

 

-0.25

 

0

LSB

Code FFh, V DD = 5V, see Figure 2-25

V

WFSE

-1

 

-0.35

 

0

LSB

Code FFh, V DD = 3V, see Figure 2-25

Zero-Scale Error

V

WZSE

0

 

+0.25

 

+1

LSB

Code 00h, V DD = 5V, see Figure 2-25

V

WZSE

0

 

+0.35

 

+1

LSB

Code 00h, V DD = 3V, see Figure 2-25

Resistor Terminals

Voltage Range

V

A,B,W

0

 

V DD

 

Note 4

Capacitance (C A or C B )

 

 

11

 

pF

f

=1 MHz, Code = 80h, see Figure 2-30

Capacitance

C

W

 

5.6

 

pF

f

=1 MHz, Code = 80h, see Figure 2-30

Dynamic Characteristics (All dynamic characteristics use V DD = 5V)

 

Bandwidth -3dB

BW

 

280

— —

 

MHz

V

B = 0V, Measured at Code 80h,

Output Load = 30 PF

Settling Time

 

t

S

 

8

— —

 

µS

A = V DD ,V B = 0V, ±1% Error Band, Transition

V

from Code 00h to Code 80h, Output Load = 30 pF

Resistor Noise Voltage

e

NWB

 

20

— —

 

nV/Hz

A = Open, Code 80h, f =1 kHz

V

Crosstalk

 

C

T

 

-95

— —

 

dB

A = V DD , V B = 0V (Note 5)

V

Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation.

 

Schmitt Trigger High-Level Input Voltage

V

IH

0.7V DD

 

——V

   

Schmitt Trigger Low-Level Input Voltage

 

V

IL

 

0.3V DD

V

 

Hysteresis of Schmitt Trigger Inputs

V

HYS

0.05V DD

 

   

Low-Level Output Voltage

 

V

OL

 

 

0.40

V

I OL = 2.1 mA, V DD = 5V

High-Level Output Voltage

 

V OH

V DD - 0.5

 

 

V

I OH = -400 µA, V DD = 5V

Input Leakage Current

 

I LI

-1

 

 

+1

µA

CS = V DD , V IN = V SS or V DD , includes V A SHDN=0

Pin Capacitance (All inputs/outputs)

C IN , C OUT

 

10

 

pF

V

DD = 5.0V, T A = +25°C, f c = 1 MHz

Power Requirements

Operating Voltage Range

V

DD

2.7

 

 

5.5

V

 

Supply Current, Active

I DDA

 

340

 

500

µA

V

DD = 5.5V, CS = V SS , f SCK = 10 MHz,

   

SO = Open, Code FFh (Note 6)

Supply Current, Static

I DDS

 

0.01

 

1

µA

CS, SHDN, RS = V DD = 5.5V, SO = Open (Note 6)

Power Supply Sensitivity

PSS

 

0.0015

0.0035

%/%

V

DD = 4.5V - 5.5V, V A = 4.5V, Code 80h

PSS

 

0.0015

0.0035

%/%

V

DD = 2.7V - 3.3V, V A = 2.7V, Code 80h

Note

1:

V AB = V DD , no connection on wiper.

2:

Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum

3:

resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. I W = V DD /R for +3V or +5V for 50 kversion. See Figure 2-26 for test circuit. INL and DNL are measured at V W with the device configured in the voltage divider or potentiometer mode. V A = V DD and V B = 0V. DNL

4:

specification limits of ±1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit. Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured

5:

using Figure 2-25. Measured at V W pin where the voltage on the adjacent V W pin is swinging full scale.

6:

Supply current is independent of current through the potentiometers.

MCP41XXX/42XXX

MCP41XXX/42XXX DC CHARACTERISTICS: 100 k Ω VERSION Electrical Characteristics: Unless otherwise indicated, V D D
MCP41XXX/42XXX DC CHARACTERISTICS: 100 k Ω VERSION Electrical Characteristics: Unless otherwise indicated, V D D

DC CHARACTERISTICS: 100 kVERSION

Electrical Characteristics: Unless otherwise indicated, V DD = +2.7V to 5.5V, T A = -40°C to +85°C (TSSOP devices are only specified at +25°C and +85°C). Typical specifications represent values for V DD = 5V, V SS = 0V, V B = 0V, T A = +25°C.

Parameters

 

Sym

Min

 

Typ

 

Max

Units

 

Conditions

Rheostat Mode

Nominal Resistance

 

R

70

 

100

 

130

k

A = +25°C (Note 1)

T

Rheostat Differential Non-Linearity

R-DNL

-1

 

±1/4

 

+1

LSB

Note 2

Rheostat Integral Non-Linearity

R-INL

-1

 

±1/4

 

+1

LSB

Note 2

Rheostat Tempco

R AB /T

 

800

 

ppm/°C

 

Wiper Resistance

 

R

W

 

125

 

175

V

DD = 5.5V, I W = 1 mA, code 00h

 

R

W

 

175

 

250

V

DD = 2.7V, I W = 1 mA, code 00h

Wiper Current

 

I

W

-1

 

 

+1

mA

 

Nominal Resistance Match

 

R/R

 

0.2

 

1

%

MCP42010 only, P0 to P1;T A = +25°C

Potentiometer Divider

Resolution

 

N

8

 

 

Bits

 

Monotonicity

 

N

8

 

 

Bits

 

Differential Non-Linearity

DNL

-1

 

±1/4

 

+1

LSB

Note 3

Integral Non-Linearity

INL

-1

 

±1/4

 

+1

LSB

Note 3

Voltage Divider Tempco

V W /T

 

1

 

ppm/°C

Code 80h

Full-Scale Error

V

WFSE

-1

 

-0.25

 

0

LSB

Code FFh, V DD = 5V, see Figure 2-25

V

WFSE

-1

 

-0.35

 

0

LSB

Code FFh, V DD = 3V, see Figure 2-25

Zero-Scale Error

V

WZSE

0

 

+0.25

 

+1

LSB

Code 00h, V DD = 5V, see Figure 2-25

V

WZSE

0

 

+0.35

 

+1

LSB

Code 00h, V DD = 3V, see Figure 2-25

Resistor Terminals

Voltage Range

V

A,B,W

0

 

V DD

 

Note 4

Capacitance (CA or CB)

 

 

11

 

pF

f

=1 MHz, Code = 80h, see Figure 2-30

Capacitance

C

W

 

5.6

 

pF

f

=1 MHz, Code = 80h, see Figure 2-30

Dynamic Characteristics (All dynamic characteristics use V DD = 5V.)

 

Bandwidth -3dB

BW

 

145

— —

 

MHz

V

B = 0V, Measured at Code 80h,

Output Load = 30 PF

Settling Time

 

t

S

 

18

— —

 

µS

A = V DD ,V B = 0V, ±1% Error Band, Transition

V

from Code 00h to Code 80h, Output Load = 30 pF

Resistor Noise Voltage

e

NWB

 

29

— —

 

nV/Hz

A = Open, Code 80h, f =1 kHz

V

Crosstalk

 

C

T

 

-95

— —

 

dB

A = V DD , V B = 0V (Note 5)

V

Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation.

 

Schmitt Trigger High-Level Input Voltage

V

IH

0.7V DD

 

——V

   

Schmitt Trigger Low-Level Input Voltage

 

V

IL

 

0.3V DD

V

 

Hysteresis of Schmitt Trigger Inputs

V

HYS

0.05V DD

 

   

Low-Level Output Voltage

 

V

OL

 

 

0.40

V

I OL = 2.1 mA, V DD = 5V

High-Level Output Voltage

 

V OH

V DD - 0.5

 

 

V

I OH = -400 µA, V DD = 5V

Input Leakage Current

 

I LI

-1

 

 

+1

µA

CS = V DD , V IN = V SS or V DD , includes V A SHDN=0

Pin Capacitance (All inputs/outputs)

C IN , C OUT

 

10

 

pF

V

DD = 5.0V, T A = +25°C, f c = 1 MHz

Power Requirements

Operating Voltage Range

V

DD

2.7

 

 

5.5

V

 

Supply Current, Active

I DDA

 

340

 

500

µA

V

DD = 5.5V, CS = V SS , f SCK = 10 MHz,

   

SO = Open, Code FFh (Note 6)

Supply Current, Static

I DDS

 

0.01

 

1

µA

CS, SHDN, RS = V DD = 5.5V, SO = Open (Note 6)

Power Supply Sensitivity

PSS

 

0.0015

0.0035

%/%

V

DD = 4.5V - 5.5V, V A = 4.5V, Code 80h

PSS

 

0.0015

0.0035

%/%

V

DD = 2.7V - 3.3V, V A = 2.7V, Code 80h

Note

1:

V AB = V DD , no connection on wiper.

2:

Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum

3:

resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. I W = 50 µA for V DD = 3V and I W = 400 µA for V DD = 5V for 10 kversion. See Figure 2-26 for test circuit. INL and DNL are measured at V W with the device configured in the voltage divider or potentiometer mode. V A = V DD and V B = 0V. DNL

4:

specification limits of ±1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit. Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured

5:

using Figure 2-25. Measured at V W pin where the voltage on the adjacent V W pin is swinging full-scale.

6:

Supply current is independent of current through the potentiometers.

MCP41XXX/42XXX

MCP41XXX/42XXX Absolute Maximum Ratings † V D D All inputs and outputs w.r.t. V S S
MCP41XXX/42XXX Absolute Maximum Ratings † V D D All inputs and outputs w.r.t. V S S

Absolute Maximum Ratings †

V DD

All inputs and outputs w.r.t. V SS

Storage temperature Ambient temp. with power applied

ESD protection on all pins

7.0V

-0.6V to V DD +1.0V

-60°C to +150°C -60°C to +125°C

2 kV

AC TIMING CHARACTERISTICS

† Notice: Stresses above those listed under “maximum rat- ings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Expo-

sure to maximum rating conditions for extended periods may affect device reliability.

Electrical Characteristics: Unless otherwise indicated, V DD = +2.7V to 5.5V, T A = -40°C to +85°C.

 

Parameter

 

Sym

Min.

Typ.

Max.

Units

Conditions

Clock Frequency

 

F

CLK

10

MHz

V DD = 5V (Note 1)

Clock High Time

 

t

HI

40

ns

 

Clock Low Time

 

t

LO

40

ns

 

CS Fall to First Rising CLK Edge

t

CSSR

40

ns

 

Data Input Setup Time

 

t

SU

40

ns

 

Data Input Hold Time

 

t

HD

10

ns

 

SCK Fall to SO Valid Propagation Delay

 

t

DO

 

80

ns

C L = 30 pF (Note 2)

SCK Rise to CS Rise Hold Time

 

t

CHS

30

ns

 

SCK Rise to CS Fall Delay

 

t

CS0

10

ns

 

CS Rise to CLK Rise Hold

 

t

CS1

100

ns

 

CS High Time

 

t

CSH

40

ns

 

Reset Pulse Width

 

t

RS

150

ns

Note 2

RS Rising to CS Falling Delay Time

t

RSCS

150

ns

Note 2

CS rising to RS or SHDN falling delay time

 

t

SE

40

ns

Note 3

CS low time

 

t

CSL

100

ns

Note 3

Shutdown Pulse Width

 

t

SH

150

ns

Note 3

Note

1:

When using the device in the daisy-chain configuration, maximum clock frequency is determined by a combination of propagation delay

2:

time (t DO ) and data input setup time (t SU ). Max. clock frequency is therefore ~ 5.8 MHz based on SCK rise and fall times of 5 ns, t HI = 40 ns, t DO = 80 ns and t SU = 40 ns. Applies only to the MCP42XXX devices.

3:

Applies only when using hardware pins to exit software shutdown mode, MCP42XXX only.

MCP41XXX/42XXX

MCP41XXX/42XXX t CSH CS 1/F CLK t CSSR t CHS t HI t LO t CSO
MCP41XXX/42XXX t CSH CS 1/F CLK t CSSR t CHS t HI t LO t CSO
t CSH CS 1/F CLK t CSSR t CHS t HI t LO t CSO
t
CSH
CS
1/F CLK
t CSSR
t CHS
t HI
t LO
t CSO
t CS1
SCK
t SU
t HD
SI
msb in
t DO
(First 16 bits out are always zeros)
SO
t S
±1%
±1% Error Band
V
OUT

FIGURE 1-1:

Detailed Serial interface Timing.

Wiper position is changed to mid-scale (80h) if RS is held low for 150 ns
Wiper position is changed to
mid-scale (80h) if RS is held
low for 150 ns
Code 80h is latched
on rising edge of RS
CS
t
RSCS
t
RS
RS
t
S
±1%
±1% Error Band
V
OUT
FIGURE 1-2: Reset Timing. t CSL CS t SE t RS RS t SE t
FIGURE 1-2:
Reset Timing.
t
CSL
CS
t
SE
t
RS
RS
t
SE
t
SH
SHDN
FIGURE 1-3:
Software Shutdown Exit Timing.

MCP41XXX/42XXX

MCP41XXX/42XXX 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a
MCP41XXX/42XXX 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a

2.0 TYPICAL PERFORMANCE CURVES

Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

Note: Unless otherwise indicated, curve represents 10 k, 50 kand 100 kdevices, V DD = 5V, V SS = 0V, T A = +25°C, V B = 0V.

1 V DD = +3V to +5V 0.8 0.6 0.4 R R WB WA 0.2
1
V DD = +3V to +5V
0.8
0.6
0.4
R
R
WB
WA
0.2
0
0
32
64
96
128
160
192
224
256
Normalized Resistance (
)Ω

Code (Decimal)

14 R 12 AB 10 8 R WB Code = 80h 6 4 2 MCP41010,
14
R
12
AB
10
8
R
WB
Code = 80h
6
4
2
MCP41010, MCP42010 (10 kΩ potentiometers)
0
-40
-25 -10
5
20
35
50
65
80
95
110 125
Nominal Resistance (k
)Ω

Temperature (°C)

FIGURE 2-1:

Normalized Wiper to End

FIGURE 2-4:

Nominal Resistance 10 k

Terminal Resistance vs. Code.

vs. Temperature.

0.5 T A = -40°C to +85°C 0.4 Refer to Figure 2-25 0.3 0.2 0.1
0.5
T A = -40°C to +85°C
0.4
Refer to Figure 2-25
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
0
32
64
96
128
160
192
224
256
Potentiometer INL Error (LSB)

Code (Decimal)

70 60 R AB 50 40 30 R WB 20 Code = 80h 10 MCP41050,
70
60
R
AB
50
40
30
R
WB
20
Code = 80h
10
MCP41050,
MCP42050 (50 kΩ potentiometers)
0
-40
-25
-10
5
20
35
50
65
80
95
110 125
Nominal Resistance (k
)Ω

Temperature (°C)

FIGURE 2-2:

Potentiometer INL Error vs.

FIGURE 2-5:

Nominal Resistance 50 k

Code.

vs. Temperature.

70 T A = -40°C to +85°C 60 V A = 3V 50 40 30
70
T A = -40°C to
+85°C
60
V A = 3V
50
40
30
20
10
0
-10
0
32
64
96
128
160
192
224
256
Potentiometer Mode TempCo
(ppm / °C)

Code (Decimal)

140 120 R AB 100 80 R WB Code = 80h 60 40 20 MCP41100,
140
120
R AB
100
80
R
WB
Code = 80h
60
40
20
MCP41100, MCP42100 (100 kΩ potentiometers)
0
-40
-25
-10
5
20
35
50
65
80
95
110 125
Nominal Resistance (k
)Ω

Temperature (°C)

FIGURE 2-3:

Potentiometer Mode

FIGURE 2-6:

Nominal Resistance 100 k

Tempco vs. Code.

vs. Temperature.

MCP41XXX/42XXX

MCP41XXX/42XXX Note: Unless otherwise indicated, curve represents 10 k Ω , 50 k Ω and 100
MCP41XXX/42XXX Note: Unless otherwise indicated, curve represents 10 k Ω , 50 k Ω and 100

Note: Unless otherwise indicated, curve represents 10 k, 50 kand 100 kdevices, V DD = 5V, V SS = 0V, T A = +25°C, V B = 0V.

0.5 Refer to Figure 2-27 0.4 0.3 0.2 T A = +85°C 0.1 0 T
0.5
Refer to Figure 2-27
0.4
0.3
0.2
T A = +85°C
0.1
0
T A = +25°C
-0.1
-0.2
T A = -40°C
-0.3
-0.4
-0.5
0
32
64
96
128
160
192
224
256
Rheostat INL Error (LSB)

Code (Decimal)

280 230 V DD = 5V F CLK = 3 MHz Code = FFh 180
280
230
V DD = 5V
F CLK = 3 MHz
Code
= FFh
180
130
80
V DD = 3V
30
-40 -25
-10
5
20
35
50
65
80
95 110 125
Active Supply Current (µA)

Temperature (°C)

FIGURE 2-7:

Rheostat INL Error vs.

FIGURE 2-10:

Active Supply Current vs.

Code.

Temperature.

3000 T A = -40°C to +85°C, V A = no connect, 2500 R WB
3000
T A
= -40°C to +85°C,
V A = no connect,
2500
R WB measured
2000
1500
1000
500
0
0
32
64
96
128
160
192
224
256
Rheostat Mode TempCo
(ppm / °C)

Code (Decimal)

1000 A 5.5V, Code - V DD = = AAh 900 B - V DD
1000
A 5.5V, Code
- V DD
=
=
AAh
900
B - V DD
=
3.3V, Code = AAh
800
C - V DD
=
5.5V, Code = FFh
D - V DD
=
3.3V, Code = FFh
B
700
600
500
400
A
C
300
200
100
D
0
1k
10k
100k
1M
10M
Active Supply Current (mA)

Clock Frequency (Hz)

FIGURE 2-8:

Rheostat Mode Tempco vs.

FIGURE 2-11:

Active Supply Current vs.

Code.

Clock Frequency.

1000 100 10 1 -40 -25 -10 5 20 35 50 65 80 95 11
1000
100
10
1
-40 -25 -10
5
20
35
50
65
80
95
11
12
0
5
Static Current (nA)

Temperature (°C)

1 V DD = 5.5V 0 -1 -2 -3 -4 -5 -6 -7 RS &
1
V DD = 5.5V
0
-1
-2
-3
-4
-5
-6
-7
RS & SHDN Sink Current (mA)

0246

RS & SHDN Pin Voltage (V)

FIGURE 2-9:

Static Current vs.

FIGURE 2-12:

Reset & Shutdown Pins

Temperature.

Current vs. Voltage.

MCP41XXX/42XXX

MCP41XXX/42XXX Note: Unless otherwise indicated, curve represents 10 k Ω , 50 k Ω and 100
MCP41XXX/42XXX Note: Unless otherwise indicated, curve represents 10 k Ω , 50 k Ω and 100

Note: Unless otherwise indicated, curve represents 10 k, 50 kand 100 kdevices, V DD = 5V, V SS = 0V, T A = +25°C, V B = 0V.

180 MCP41010,MCP42010 160 Code = 00h, Sample Size = 400 140 120 100 80 60
180
MCP41010,MCP42010
160
Code =
00h,
Sample
Size
= 400
140
120
100
80
60
40
20
0
47
48
49
50
51
52
53
54
55
56
57
58
59
Number of Occurrences

Wiper Resistance ()

FIGURE 2-13:

Resistance Histogram.

10 kDevice Wiper

140 MCP41050, MCP41100, MCP42050, MCP42100 120 Code = 00h, Sample Size = 796 100 80
140
MCP41050,
MCP41100,
MCP42050,
MCP42100
120
Code
= 00h,
Sample Size = 796
100
80
60
40
20
0
115
117
119
121
123
125
127
129
131
133
Number of Occurrences

Wiper Resistance ()

C L = 27 pF FFh V OUT 00h CS
C L = 27 pF
FFh
V OUT
00h
CS

FIGURE 2-16:

Full-Scale Settling Time.

C L = 27 pF Code = 80h V OUT CS
C L = 27 pF
Code = 80h
V OUT
CS

FIGURE 2-14:

50 k, 100 kDevice Wiper

FIGURE 2-17:

Digital Feed through vs.

Resistance Histogram.

Time.

C L = 17 pF Code = 7Fh Code = 80h V OUT CS
C L = 17 pF
Code = 7Fh
Code = 80h
V OUT
CS

FIGURE 2-15:

One Position Settling Time.

6 Code = FFh 0 Code = 80h -6 Code = 40h -12 Code =
6
Code = FFh
0
Code = 80h
-6
Code = 40h
-12
Code = 20h
-18
Code = 10h
-24
Code = 08h
-30
Code = 04h
-36
Code = 02h
-42
Code = 01h
-48
C
=
30pF, Refer
to
Figure
2-29
L
-54
MCP41010,
MCP42010
(10kΩ potentiometers)
-60
100
1k
10k
100k
1M
10M
Gain (dB)

Frequency (Hz)

FIGURE 2-18:

Gain vs. Frequency for

10 kPotentiometer.

MCP41XXX/42XXX

MCP41XXX/42XXX Note: Unless otherwise indicated, curve represents 10 k Ω , 50 k Ω and 100
MCP41XXX/42XXX Note: Unless otherwise indicated, curve represents 10 k Ω , 50 k Ω and 100

Note: Unless otherwise indicated, curve represents 10 k, 50 kand 100 kdevices, V DD = 5V, V SS = 0V, T A = +25°C, V B = 0V.

6 Code = FFh 0 Code = 80h -6 Code = 40h -12 Code =
6
Code = FFh
0
Code = 80h
-6
Code = 40h
-12
Code = 20h
-18
Code = 10h
-24
Code = 08h
-30
Code = 04h
-36
Code = 02h
-42
-48
Code = 01h
= 30pF, Refer
to
Figure
2-29
C L
-54
MCP41050,
MCP42050 (50kΩ potentiometers)
-60
100
1k
10k
100k
1M
10M
Gain (dB)

Frequency (Hz)

FIGURE 2-19:

50kPotentiometer.

Gain vs. Frequency for

6 Code = FFh 0 Code = 80h -6 Code = 40h -12 Code =
6
Code
= FFh
0
Code
= 80h
-6
Code
= 40h
-12
Code
= 20h
-18
Code
= 10h
-24
Code
= 08h
-30
Code
= 04h
-36
Code
= 02h
-42
Code
= 01h
-48
C L = 30pF, Refer to Figure
2-29
-54
MCP41100,
MCP42100 (100kΩ potentiometers)
-60
100
1k
10k
100k
1M
Gain (dB)

Frequency (Hz)

40 = 4.5V to 5.5V, V DD Code = 80h, 35 10 kΩ Potentiometer C
40
= 4.5V to 5.5V,
V DD
Code = 80h,
35
10 kΩ
Potentiometer
C L = 27 pF,
V A = 4V
30
Refer to Figure 2-28
25
20
50 kΩ Potentiometer
15
10
100 kΩ
Potentiometer
5
0
1k
10k
100k
1M
10M
PSRR (dB)

Frequency (Hz)

FIGURE 2-22:

Ratio vs. Frequency.

Power Supply Rejection

700 MCP41010, MCP42010 Iw = 1 mA, Code = 00h, 600 Refer to Figure 2-27
700
MCP41010, MCP42010
Iw = 1 mA, Code = 00h,
600
Refer to Figure 2-27
V DD = 2.7V
500
400
300
200
V DD = 5V
100
0
Wiper Resistance (
)Ω

012345

Terminal B Voltage (V)

FIGURE 2-20:

Gain vs. Frequency for

FIGURE 2-23:

10 kWiper Resistance vs.

100kPotentiometer.

Voltage.

0 -6 1.06 MHz 145 kHz -12 279 kHz 10 kΩ -18 -24 50 kΩ
0
-6
1.06 MHz
145 kHz
-12
279 kHz
10 kΩ
-18
-24
50 kΩ
-30
C L = 30 pF,
Code = 80h
100 kΩ
Refer to
Figure 2-29
-36
1k
10k
100k
1M
10M
Gain (dB)

Frequency (Hz)

FIGURE 2-21:

-3 dB Bandwidths.

450 Code = 00h 400 Refer to Figure 2-27 350 300 V DD = 2.7V
450
Code = 00h
400
Refer to
Figure 2-27
350
300
V DD = 2.7V
250
200
150
V DD = 5V
100
50
0
Wiper Resistance (
)Ω

012345

Terminal B Voltage (V)

FIGURE 2-24:

Resistance vs. Voltage.

50 k& 100 kWiper

MCP41XXX/42XXX

MCP41XXX/42XXX 2.1 Parametric Test Circuits V+ = V DD 1LSB = V+/256 A V+ W B
MCP41XXX/42XXX 2.1 Parametric Test Circuits V+ = V DD 1LSB = V+/256 A V+ W B

2.1 Parametric Test Circuits

V+ = V DD 1LSB = V+/256 A V+ W B + DUT V -
V+ = V DD
1LSB = V+/256
A
V+
W
B
+
DUT
V
-

MEAS *

*Assume infinite input impedance

FIGURE 2-25:

Linearity Error Test Circuit (DNL, INL).

Potentiometer Divider Non-

No Connection

A I W W B DUT + V - MEAS *
A
I
W
W
B
DUT
+
V
-
MEAS *

*Assume infinite input impedance

FIGURE 2-26:

Resistor Position Non-

Linearity Error Test Circuit (Rheostat operation DNL, INL). A Rsw = 0.1V Isw Code =
Linearity Error Test Circuit (Rheostat operation
DNL, INL).
A
Rsw = 0.1V
Isw
Code = 00h
W
DUT
+
I
B
SW
0.1V
-
V SS = 0 to V DD
FIGURE 2-27:
Wiper Resistance Test
Circuit.
V A V A DD V+ W B + DUT V MEAS * - V+
V A
V
A
DD
V+
W
B
+
DUT
V MEAS *
-
V+ = V DD ± 10%
∆V DD
PSRR (dB) = 20LOG (
)
∆V MEAS
PSS (%/%) = ∆V DD
∆V MEAS
*Assume infinite input impedance

FIGURE 2-28:

Test Circuit (PSS, PSRR).

Power Supply Sensitivity

A

~ DUT B 2.5V DC
~
DUT
B
2.5V DC

+5V

W + V -
W
+ V
-

OUT

V IN

OFFSET

GND

FIGURE 2-29: Gain vs. Frequency Test Circuit. DUT B A +5V V - OUT ~
FIGURE 2-29:
Gain vs. Frequency Test
Circuit.
DUT
B
A
+5V
V
-
OUT
~
+
V IN
MCP601
2.5V DC
Offset
B A +5V V - OUT ~ + V IN MCP601 2.5V DC Offset FIGURE 2-30:

FIGURE 2-30:

Capacitance Test Circuit.

MCP41XXX/42XXX

MCP41XXX/42XXX 3.0 PIN DESCRIPTIONS 3.1 PA0, PA1 Potentiometer Terminal A Connection. 3.2 PB0, PB1 Potentiometer Terminal