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HARDWARE IMPLEMENTATION OF DIVISION UNIT USING VEDIC MATHEMATICS

Abhijeet Kumar*, Siddhi*, Dilip Kumar**, Jyoti Kedia***


*Student ME (2nd year), Deptt. Of ECE, PEC, Chandigarh, 160012, India **Design Engineer, CDAC, Mohali, India Lecturer, Deptt. Of ECE, PEC, Chandigarh, 160012, India abhi_459@yahoo.co.in, Siddhisri_21@yahoo.com , dilipkant@rediffmail.com
Abstract- Division is one of the elementary mathematical operations extremely important for core computing process. To keep pace with the technology, high speed applications require faster methods of division. This paper reports a new faster algorithm for division based on ancient Indian mathematics, called Vedic Mathematics. The design for the architecture of division is proposed and described using VHDL hardware description language. The code description is simulated using Modelsim SE 5.7f and synthesized using ISE Xilinx 6.2i for the FPGA device Spartan XC3S5000, Speed Grade-5. The synthesis showed reduced time delay as well as less area requirement for the division. The proposed design is also compared with other existing methods, resulting in improved efficiency in both speed and area.

I.INTRODUCTION With the rapid development and wide application of computer technology, high performance applications have become extremely popular in modern computer systems, requiring enhanced computation capabilities at low cost and power consumption. Division exhibits the largest latency among basic arithmetic operations. Although less frequent than addition and multiplication, there are important applications such as rendering systems, artificial intelligence and graphics compression, that require this operation This paper presents a novel architecture for division attempting to provide the solution of the aforesaid problems by adopting the aphorism of Vedic Mathematics called Urdhva Tiryakbhyam. This paper is organized in the following way: Section II provides the brief description of the Vedic Mathematics and its aphorisms or sutras. Section III provides an overview of the division method and algorithm and architecture of the proposed division. Section IV demonstrates the results from the synthesis tool and the comparative study of the proposed architecture and other existing architectures. Section V concludes the paper. II.VEDIC MATHEMATICS Vedic mathematics is the name given to the ancient system of mathematics, or, to be precise, a unique technique of calculations based on simple rules and principles with which any mathematical problem can be solved be it arithmetic, algebra, geometry or trigonometry. The system is based on 16 Vedic sutras or aphorisms, which are actually word formulae

describing natural ways of solving a whole range of mathematical problems. Vedic mathematics was rediscovered from the ancient Indian scriptures between 1911 and 1918 by Sri Bharati Krishna Tirthaji (1884-1960), a scholar of Sanskrit, mathematics, history and philosophy [3]. He studied these ancient texts for years and, after careful investigation, was able to reconstruct a series of mathematical formulae called sutras. Vedic mathematics is the easy and natural way to do mathematics. It helps increase speed, accuracy and analytical power and answers appear in one line. An introduction to Vedic mathematics is like entering Alice's wonderland, where logic is turned upside down. Division can be a process of multiplication and addition, and multiplication is by either cross subtraction or cross addition. The simplicity of approach exposes the top heavy processes of our logicdriven world. All the Vedic methods can be properly explained and they are more interrelated than the current methods: division for example is just multiplication reversed. One other advantage of Vedic mathematics is that it offers choices. The same calculation can be done by different methods. This way, Vedic mathematics actually helps in holistic development of the brain and children become more creative, inventing their own methods and understanding what they are doing. There is also often a choice about whether to calculate from left to right or from right to left. The Vedic mathematics approach is totally different and considered very close to the way a human mind works. A large amount of work has so far been done in understanding various methodologies (sutras). The Sutras (aphorisms) apply to and cover each and every part of each and every chapter of each and every branch of mathematics (including arithmetic, algebra, geometry plane and solid, trigonometry plane and spherical, conics- geometrical and analytical, astronomy, calculus differential and integral etc., etc. In fact, there is no part of mathematics, pure or applied, which is beyond their jurisdiction. Even if applications of the Sutras were demonstrated in all the main areas of modern mathematics we would still probably not understand why and how the Sutras form a basis for mathematics in general. The only option is to show that the Sutras themselves have some sort of universality and can thereby form a set of principles that inevitably cover all of mathematics. In fact we can go further and say that if sixteen Sutras cover all of mathematics they must express universal principles and they must in some way form a

complete set. With so many advantages, Vedic Mathematics provides with the possibility of solving the same problem in different alternative ways. III.THE DIVISION METHOD It is simple application of Urdhwa-Tiryak Sutra. Sri Bharati Krishna Tirthaji, in his famous book 'Vedic Mathematics', has given several methods based on different sutras for performing division. However, he describes the Urdhwa-Tiryak method and the sutra as the "crowning gem of all the sutras". The other methods have limitation that they are applicable to a particular class of problems. On the other hand, UrdhwaTiryak is very general method and quicker compared to our conventional method. Division by conventional method 5 3 4 <== quotient Divisor ==> 73) 3 8 9 8 3 <== dividend -365 248 - 219 293 - 292 1 <== remainder As one can see, our conventional method is some what long and cumbersome due to the large products (multiplication table of the divisor) involved. The Vedic Maths method goes as followsThe details of the method: 5 3 4 7 / 3) 3 8 9 8 / 3 Gross dividend => 39 38 / 13 Actual dividend => 38 24 29 / 1 1.Write the divisor in two parts, separating the parts by a slant line. Here, the divisor 73 is written as 7 / 3. The right hand part is called as Dhwajanka or the flag digit. 2.Write the dividend, in front of the divisor as in the conventional method, but keep the digits well spaced, so that we may write the next two lines under them in a more legible way. Divide this number also into two parts by a slant line, so that the number of digits on the right hand part is same in, both, the divisor and the dividend. Thus, we have divided 38983 as 3898 / 3. 3.Set up the next two lines for writing the intermediate gross dividend and intermediate actual dividend. Set the space above the dividend for writing the answer (the quotient) as usual. 4.Now, write the starting two digits of the divisor i.e. 38 on the 'actual dividend' line. 5.Divide this number 38, by the first digit of the divisor i.e. 7. The quotient would be 5 and the remainder would be 3 (38 - 7x5 = 38 - 35 = 3). Write the quotient at its usual place, at the top. To be systematic, write it above 8 of 38. Write the remainder 3, in the 'Gross dividend' line, between 8 and 9 of the main dividend.

6.Take down the next digit of the main dividend i.e. 9 and write it to the right of the remainder 3. These two digits together make the next gross dividend 39. 7.The actual dividend, however, would be this gross dividend minus the product of the last quotient and the flag digit. It would be, in the present case, 39 - 5x3 = 39 - 15 = 24. Write it down on the 'actual dividend' line, exactly below the gross dividend 39. 8.Divide this 24 again by 7 of the divisor; write the quotient 3 on the top line and the remainder 3 on the 'gross dividend' line. Pull the next digit of the main dividend to the right of remainder 3, making gross dividend 38. The actual dividend would be 38 - 3x3 = 29, which is written at the appropriate place. 9.Continue this procedure until all the digits of the main dividend are exhausted. The number obtained in the top most line is the quotient (here, 534) and in the actual dividend line after the slant line is the remainder. VEDIC DIVISION ALGORITHM AND ARCHITECTURE The Division architecture takes N bits of dividend and N bits of divisor to generate the quotient and the reminder. The architecture is based on Straight (At Sight) Division algorithm of Ancient Indian Vedic Mathematics. To simplify the understanding of the algorithm, it is explained in Table-1 for 3 digits by 2 digits number along with an example. The algorithm can be generalized for N digit/bit by N digit/bit number. The processing power of division architecture can easily be increased by increasing the input and output data bus widths since it has a quite a regular structure. Such a regular structure of the architecture has also ramifications for deep submicron designs.
TABLE 1

3 digits by 2 digits Vedic Division Algorithm X2 X1 X0 by Y0Y1 X2 X1: X0 Y0 C1 : C0 Y1 _________ Z1 Z0 : RD Steps: 1. First do X2/Y0 (divide) to get Z1 as quotient and C1 as remainder. 2. Call Procedure ADJUST (Z1, C1, X1, Y1, Y0). Now take the next dividend as K= (C1 * 10+X1)-(Y1 * Z1). 3. Do K/Y0 (divide) to get Z0 as quotient and C0 as remainder 4. Call procedure ADJUST (Z0, C0, X0, Y1, Y0). Now Our required remainder, RD= (C0 * 10+X0)-(Y1 * Z1). Hence the Quotient= Qt=Z1Z0 Remainder=RD Procedure ADJUST (H, I, E, A, B) { While ((I * 10+E) < B * H) { H=H-1;

I=I+ A; }}

NonRestore Division Vedic Division

Spartan

3s5000fg11565

6616

2.828

For example 35001/77 will work as follows 3 5 0 0: 1 7 7 7: 7 7 ---------------4 5 4: 43 1. Divide 35 by 7 and get 5 as the quotient and 0 as the remainder. 2. Call ADJUST (5,0, 0,7,7) => modified quotient=5 and remainder 7 Next Dividend K= ( 7 * 10 + 0)-(7 * 4)=42 3. Do K/ 7 and get 6 as quotient and 0 as remainder. 4. Call ADJUST (6, 0, 0, 7, 7). => modified quotient 5 and remainder 7 Next dividend K= (7 * 10+0)-(7 * 4) =42 5. Do K/7 and get 6 as quotient and 0 as remainder 6. Call ADJUST (6, 0, 1, 7, 7) => modified quotient= 4 and remainder 7 Remainder RD=(7 * 10+1)-(7 * 4)=43 Therefore Quotient =454 and Remainder=43 IV.RESULTS AND COMPARISONS The main objective of any design to be implemented on FPGA is the minimum chip area together with reasonable speed. In this study, the algorithm for the proposed design is described in VHDL Hardware Description Language and the logic is tested in ModelSim SE 5.7f simulator. The simulated design is synthesized to gate level, and optimized for speed and area using Xilinx family for the device XILINX: SPARTAN 3:XC3S5000; Speed Grade: -5. The proposed architecture shows a faster response than Restore Division and Non Restore Division which are implemented on the same device. The results are shown in the Table II below: It has been found that for Vedic division is the fastest. For the Xilinx, Spartan family the maximum combinational path delay is found to be 1.106 s while it is 2.838 s for restore division and 2.828 s for non restore division,. A comparison histogram of timing delays and the total cell usage of the divider are given in Fig 1 and Fig 2 respectively. TABLE II
Method Restore Division Family Spartan Device 3s5000fg11565 Area 14077 Delay(s) 2.838

Spartan

3s5000fg11565

10782

1.106

3 2.5 2 1.5 1 0.5 0 Delay RD NRD VD

FIG.1. COMPARISON OF MULTIPLIERS WITH RESPECT TO TIME DELAY IN SPARTAN FPGA

15000 10000 5000 0 AREA

RD NRD VD

FIG. 2.COMPARISON OF MULTIPLIERS WITH RESPECT TO TOTAL CELL USAGE OF SPARTAN FPGA

V.CONCLUSIONS The need for high speed processing has been increasing as a result of expanding computer applications. Since in performing division a computer spends a considerable amount of its processing time, an improvement in the speed for performing division is highly required. Compared to other conventional methods, Vedic mathematical methods, derived from ancient systems of computations, are computationally faster and easy to perform. This work concludes that a 12 bit by 12 bit divider based on Vedic algorithms is more efficient in performance than the Restore Division and Non Restore Division. The performance parameters are timing delay and the percentage area of the target device utilized in the design.

REFERENCES
[1] Chidgupkar, P. D. and Karad, M.T.,The Implementation of Vedic Algorithms in Digital Signal Processing, Global Congress on Engineering Education, Vol. 8, No.2, 2004. [2] Sjoholm, S. and Lindh, L., VHDL for Designers, Prentice-Hall PTR (1997). [3] Jagadguru Swami Sri Bharati Krisna Tirthaji Maharaja, Vedic Mathematics: Sixteen Simple Mathematical Formulae from the Veda. Delhi (1965). [4] VedicMaths.org (2004) http://www.vedicmaths.org [5] Deschamps, Jean-Pierrie and Sutter, D. Gustavo, Synthesis of Arithmetic Circuits, FPGA, ASIC and Embedded Systems, John Wiley & Sons Inc Publication (2006) [6] Perry, Douglas, VHDL Programming by Example, McGraw Hill Publication (2002) [7] Morris Mano, Computer System Architecture, pp 346-347, 3rd edition, PHI.1993 [8] Beiu, Microprocessor and a digital signal processor including adder and multiplier circuits employing logic gates having discrete and weighted inputs, United States Patent, 6,516,331, February 4, 2003. [9] A.P. Nicholas, K.R Williams, J. Pickles, Application of Urdhava Sutra, Spiritual Study Group, Roorkee (India), 1984. [10] A.P. Nicholas, K.R Williams, J. Pickles, Lectures on Vedic Mathematics,Spiritual Study Group, Roorkee (India),1982.

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