MS Microelectronics(Syllabus) MS Micro Electronics FIRST SEMESTER Subject Code MEL 601 MEL 603 MEL 605 MEL 607

7 MEL 609 MEL 611 Subject Name Foundations of VLSI CAD Microelectronics Fabrication Technology Physics of Semiconductor Devices CMOS Analog Integrated Circuit Design Digital VLSI Design Elective I Term Paper-I TOTAL Second Semester Nanomaterials and Nanoelectronics 03 Mixed Signal IC Design 03 System on Chip Design 03 Design for Manufacturability and Yield 03 Management Elective II 03 Elective III 03 Term Paper-II -TOTAL 18 THIRD & FOURTH SEMESTER Project Work -Theory Credits 03 03 03 03 03 03 -18 Lab Credits 01 01 01 01 01 01 -06 01 01 01 01 01 01 -06 -Total Credits 04 04 04 04 04 04 01 25 04 04 04 04 04 04 01 25 40 90

MEL 602 MEL 604 MEL 606 MEL 608 MEL 610 MEL 612

Total Number of Credits to Award Degree

MEL 611 Elective I: MEL 611.1 RF Microelectronics Chip Design MEL 611.2 Introductions to MEMS Technology MEL 611.3 Advanced Logic Synthesis MEL 611.4 High Level Digital Design & Testing MEL 611.5 Embedded System Design MEL 610 Elective II: MEL 610.1 Artificial Neural Networks MEL 610.2 Failure Analysis and Design MEL 610.3 Digital Signal Process MEL 610.4 High Speed VLSI Design MEL 612 Elective III: MEL 612.1 Quantum Information Science MEL 612.2 Optical Integrated Circuits MEL 612.3 Macro Electronics (Large Area Microelectronics)

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MS Microelectronics(Syllabus) MEL 612.4 Low Power VLSI Design FIRST SEMESTER MEL 601 Foundations of VLSI CAD Matrices: Linear dependence of vectors, solution of linear equations, bases of vector spaces, orthogonality, complementary orthogonal spaces and solution spaces of linear equations. Graphs: representation of graphs using matrices; Paths, connectedness; circuits, cutsets, trees; Fundamental circuit and cutset matrices; Voltage and current spaces of a directed graph and their complementary orthogonality. Algorithms and data structures: efficient representation of graphs; Elementary graph algorithms involving bfs and dfs trees, such as finding connected and 2- connected components of a graph, the minimum spanning tree, shortest path between a pair of vertices in a graph; Data structures such as stacks, linked lists and queues, binary trees and heaps. Time and space complexity of algorithms. References K. Hoffman and R.E. Kunze, Linear Algebra, Prentice Hall (India), 1986 N.Balabanian and T.A. Bickart, Linear Network Theory :Analysis, Properties, Design and Synthesis, Matrix Publishers, Inc.,1981. T.Cormen, C.Leiserson and R.A.Rivest, Algorithms, MIT Press and McGraw-Hill, 1990.

MEL 603 Microelectronics Fabrication Technology Environment for VLSI Technology: Clean room and safety requirements. Wafer cleaning processes and wet chemical etching techniques. Impurity incorporation: Solid State diffusion modelling and technology; Ion Implantation modelling, technology and damage annealing; characterization of Impurity profiles. Oxidation : Kinetics of Silicon dioxide growth both for thick, thin and ultrathin films. Oxidation technologies in VLSI andULSI; Characterisation of oxide films; High k and low k dielectrics for ULSI. Lithography: Photolithography, E-beam lithography and newer lithography techniques for VLSI/ULSI; Mask generation. Chemical Vapour Deposition techniques : CVD techniques for deposition of polysilicon, silicon dioxide, silicon nitride and metal films; Epitaxial growth of silicon; modelling and technology.

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MS Microelectronics(Syllabus) Metal film deposition : Evaporation and sputtering techniques. Failure mechanisms in metal interconnects; Multi-level metallisation schemes.Plasma and Rapid Thermal Processing: PECVD, Plasma etching and RIE techniques; RTP techniques for annealing, growthand deposition of various films for use in ULSI. Process integration for NMOS, CMOS and Bipolar circuits; Advanced MOS technologies. References: C.Y. Chang and S.M.Sze (Ed), ULSI Technology, McGraw Hill Companies Inc, 1996. S.K. Ghandhi, VLSI Fabrication Principles, John Wiley Inc., New York, 1983. S.M. Sze (Ed), VLSI Technology, 2nd Edition, McGraw Hill, 1988. MEL 605 Physics of Semiconductor Devices Introduction to semiconductor Physics: Review of quantum mechanics, Electrons in periodic lattices, E-k diagrams, Quasiparticles in semiconductors, electrons, holes and phonons. Boltzmann transport equation and solution in the presence of low electric and magnetic fields - mobility and diffusivity; Carrier statistics; Continuity equation, Poisson's equation and their solution; High field effects: velocity saturation, hot carriers and avalanche breakdown. Semiconductor junctions: Schottky, homo- and hetero-junction band diagrams and I-V characteristics, and small signal switching models; Two terminal and surface states devices based on semiconductor junctions. MOS structures: Semiconductor surfaces; Theideal and nonideal MOS capacitor band diagrams and CVs; Effects of oxide charges, defects and interface states; Characterization of MOS capacitors: HF and LF CVs, avalanche injection; High field effects and breakdown. Characterization of semi conductors: Four probe and Hall measurement; CVs for dopant profile characterization; Capacitance transients and DLTS. References J. P. McKelvey, introduction to Solid State and Semiconductor Physics, Harper and Row and John Weathe Hill, 1966. E. H. Nicollian and J. R. Brews, MOS Physics and Technology, John Wiley, 1982. K. K. Ng, Complete Guide to Semiconductor Devices, McGraw Hill, 1995. D.K. Schroder, Seminconductor Material and Device Characterization, John Wiley, 1990. S. M. Sze, Physics of Semiconductor Devices, 2nd edition John Wiley, 1981. C. T. Sah, Fundamentals of Solid-State Electronic Devices, Allied Publishers and World Scientific, 1991. E. F. Y. Waug, Introduction to Solid State Electronics North Holland, 1980.

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MS Microelectronics(Syllabus) MEL 607 CMOS Analog Integrated circuit design

MEL 607 CMOS Analog Integrated Circuit Design Introduction and Background: MOS Device Basics, MOS Device Models, RC Circuits, Passive Devices, Layout, Design Rules. 3 hours Single Stage Amplifiers: Common Source Amplifiers, Source Follower Common Gate, Cascode Structures and Folded Cascode Structures. 3 hours Differential Amplifier: Introduction to Differential Pair Amplifier, Quantitative Analysis to Differential Pair Amplifier, Common Mode Response, Differential Amplifiers with Different Loads, Effects of Mismatches. 4 hours Current Mirrors/Sources: Simple Current Mirrors/Sources, Cascode Current Mirrors/Sources, Differential Pair with Current Mirror Load. 4 hours Output Stages: Operational Amplifiers: Op Amps Low Frequency Analysis, Telescopic Op Amps, Folded Cascode Op Amps, Two Stage Op Amps, Common Mode Feedback. 4 hours Frequency Response: Frequency Response of Common Source Amplifiers, Source Follower Common Gate, Cascode Structures and Folded Cascode Structures, Differential Amplifiers, Single Ended Differential Pair. 4 hours Feedback: Voltage-Voltage, Current -Voltage, Voltage-Current & Current-Current Feedback, Loading. 3 hours Frequency Compensation & Stability: Frequency Compensation Techniques in Telescopic Op Amps, Folded Cascode Op Amps, Two Stage Op Amps. 4 hours Operational Amplifier Applications: Filters, Applications, A/D's & D/A's, Pipeline A/D with Open Loop Op Amp Wireless Circuits, RF Frontend and Review. 3 hours Text Book Design of Analog CMOS Integrated Circuits, Behzad Razavi, McGraw-Hill, 2000. References Analysis and Design of Integrated Circuits, Paul R. Gray, Paul J. Hurst, Stephen H. Lewis, Robert G. Meyer, 4th Ed., Wiley, 2001. Analog Integrated Circuit Design, D. Johns and K.Martin, Wiley, 1997. The Designers Guide to SPICE & SPECTRE,K. S. Kundert, Kluwer Academic Press, 1995. Operation and Modeling of the MOS Transistor, Y. Tsividis, McGraw-Hill, 2nd Edition, 1999.

MEL609 Digital VLSI Design Introduction: Logic families VLSI technology trends performance measures and Moores law Comparisons of technology trends MOS devices and Circuits: MOS transistors. Study of depletion and enhancement mode operations. Threshold Voltage. Body effect and other second order effects. MOS Device design equations NMOS inverters. CMOS inverters. BiCMOS and

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MS Microelectronics(Syllabus)
GaAs devices and circuits. Comparison of MOS,CMOS,BICMOS technologies. Realization of basic logic gates using MOS,CMOS, BICMOS technologies. Fabrication of ICs: Lithographic process of MOS NMOS process,PMOS process CMOS fabrication- N-well, P-well and twin tub processes. Latch-up in CMOS. Physical origin of Latch-up Latch-up prevention Internal Latch-up prevention techniques I/O Latch-up prevention SOI process. VLSI Yield and economics. VLSI Circuit Design: Pass transistors and transmission gates. Implementation of Boolean functions and combinational circuits using switch logic & gate logic. Pseudo NMOS inverter, Dynamic and clocked CMOS inverters. Clocking strategies, single and two phase clocking, Clock distribution. Scaling of MOS circuits. Digital circuit design Implementation of Boolean functions using basic gates Synchronous and Asynchronous Sequential circuitsFlipFlops,Registers,Counters Mealy and Moore state machines Clocked sequential circuits and combinational circuits using switch logic & gate logic.ROM, PAL, PLA Layout Generations: MOS Circuit designs Layer representations CMOS Design rules-spacing and dimension checks Stick diagrams Layouts of basic gates using different CMOS logicsBasic circuit concepts and performance estimation : Sheet resistance, Standard unit of capacitance. Estimation of delay in NMOS and CMOS inverters. Driving of large capacitive loads. Super buffers. Estimation of power. Power reduction techniques. System design methods Design description domains and design strategies-Hierarchy, regularity, Modularity,Locality Design methods Bhavioral synthesis RTL synthesys Logic optimization structural to Layout synthesis placement, routing Sub system design Issues in Subsystem design. Design examples such as Adders-Serial,parallel adders,carry save addition,Carry lookahead adder, carry select adder design of simple ALU, Shifters Array shifters using transmission gates Memories: Static RAM four transistor SRAM cell and six transistor SRAM cell Dynamic RAMs-one transistor DRAM cell, three transistor DRAM cell different topologies and performance analysis. References: 1. Pucknell D.A and Eshraghian K, Basic VLSI Design, PHI publication. 2. West N and Eshraghian K, Principles of CMOS VLSI Design, Addison Wesley Publication. 3. Tsividis and Yannis, Operation and Modeling of the MOS Transistors, 2nd Edn. Oxford University Press. 4. Amar Mukherjee, Introduction to NMOS & CMOS VLSI systems Design, PHI publication. 5. Allen, CMOS Analog Circuit Design, 2nd Edn. Oxford University Press. 6. Priciples of CMOS VLSI Design 2nd Edn.-Neil H. E. Weste Kamran Eshraghian

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MS Microelectronics(Syllabus) MEL 611 Elective I: MEL 611.1 RF Microelectronics Chip Design Introduction to RF and Wireless Technology: Complexity, design and applications. Choice of Technology. Basic concepts in RF Design: Nonlinearly and Time Variance, intersymbol Interference, random processes and Noise. Definitions of sensitivity and dynamic range, conversion Gains and Distortion. Analog and Digital Modulation for RF circuits: Comparison of various techniques for power efficiency. Coherent and Non coherent defection. Mobile RF Communication systems and basics of Multiple Access techniques. Receiver and Transmitter Architectures and Testing heterodyne, Homodyne, Image-reject, Direct-IF and sub-sampled receivers. Direct Conversion and two steps transmitters. BJT and MOSFET behavior at RF frequencies Modeling of the transistors and SPICE models. Noise performance and limitation of devices. Integrated Parasitic elements at high frequencies and their monolithic implementation. Basic blocks in RF systems and their VLSI implementation : Low Noise Amplifiers design in various technologies, Design of Mixers at GHz frequency range. Various Mixers, their working and implementations, Oscillators: Basic topologies VCO and definition of phase noise. Noise-Power trade-off. Resonatorless VCO design. Quadrature and single-sideband generators, Radio Frequency Synthesizes: PLLS, Various RF synthesizer architectures and frequency dividers, Power Amplifiers design. Linearisation techniques, Design issues in integrated RF filters. Reference B.Razavi, RF Microelectronics, Prentice-Hall PTR,1998 T.H.Lee. Design of CMOS Radio-Frequency Integrated Circuits, Cambridge University Press, 1998. MEL 611.2 Introductions to MEMS Technology
Historical Background: Silicon Pressure sensors, Micromachining, MicroElectroMechanical Systems Microfabrication and Micromachining : Integrated Circuit Processes, Bulk Micromachining : Isotropic Etching and Anisotropic Etching, Wafer Bonding, High Aspect-Ratio Processes (LIGA) Physical Microsensors : Classification of physical sensors, Integrated, Intelligent, or Smart sensors, Sensor Principles and Examples : Thermal sensors, Electrical Sensors, Mechanical Sensors, Chemical and Biosensors Microactuators : Electromagnetic and Thermal microactuation, Mechanical design of microactuators, Microactuator examples, microvalves, micropumps, micromotors-Microactuator systems : Success Stories, Ink-Jet printer heads, Micro-mirror TV Projector Surface Micromachining: One or two sacrificial layer processes, Surface micromachining requirements, Polysilicon surface micromachining, Other compatible materials, Silicon Dioxide, Silicon Nitride, Piezoelectric materials, Surface Micromachined Systems : Success Stories, Micromotors, Gear trains, Mechanisms Application Areas: All-mechanical miniature devices, 3-D electromagnetic actuators and sensors, RF/Electronics devices, Optical/Photonic devices, Medical devices e.g. DNA-chip, micro-arrays.

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MS Microelectronics(Syllabus)
References Stephen D. Senturia, "Microsystem Design" by, Kluwer Academic Publishers, 2001. Marc Madou, Fundamentals of Microfabrication by, CRC Press, 1997.Gregory Kovacs, Micromachined Transducers Sourcebook WCB McGraw-Hill, Boston, 1998. M.-H. Bao, Micromechanical Transducers: Pressure sensors, accelrometers, and gyroscopes by Elsevier, New York, 2000. MEL 611.3 / DES 612.1 / EDA604 Advanced Logic Synthesis: UNIT-1 Introduction to logic synthesis ,Two-level logic synthesis Introduction, Boolean algebra concepts , Minimization using k-map (up to 5 variables). [3 hours] UNIT-2 Minimization using Tabular method(up to 5 variables) Consensus theorem , Iterative Consensus theorem [3 hours] UNIT-3 Recursive computation , Unate covering problem, Reduction technique MIS algorithm Branch and bound algorithm (Example) [3hours] UNIT-4 Sequential logic synthesis. Introduction , Basics of FSM concept ,Minimization of completely specified FSM ,Equivalent partition algorithm [3hours] UNIT-5 Minimization of Incompletely specified FSM, Compatible table ,Maximum compatibles ,Prime compatibles [3hours] UNIT-6 Minimization using Merger graph,Merger Table,closed covering. [3hours] UNIT-7 Binate covering problem, FSM traversal algorithms , Depth first search ,Breadth first search,Shortest path (3hours) UNIT-8 State encoding and optimization, Multilevel logic synthesis , Introduction, Algebraic and Boolean Division (3hours) UNIT-9 Kernels and Cokernels ,Algebraic and Boolean resubtitution methods (3hours) UNIT-10 Technology mapping, Graph covering and Technology mapping (3 hours) UNIT-11 Tree covering by Dynamic programming,Decomposition (3 hours) UNIT-12 Delay optimization and Graph covering (3 hours) TEXT BOOK: Gary D. Hachtel and Fabio Somenzi (Kluwer Academic Publishers) Reference Books 1. Logic Synthesis and Verification Algorithms 2. Gary D. Hachtel and Fabio Somenzi (Kluwer Academic Publishers) 3. Logic Minimization Algorithms For VLSI Synthesis 4. Robert K. Brayton ,Gary D. Hachtel, Curtis T. McMullen and Alberto L. Sangiovanni-Vincentelli (Kluwer Academic Publishers) 5. Switching and finate automata theory by ZVI KOHAVI

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MS Microelectronics(Syllabus) MEL 611.4 High Level Digital Design & Testing A. VHDL: 1.0 2.0 3.0 4.0 5.0 6.0 7.0 Introduction to HDL based design VHDL data types. Operators Behavioral Model Subprograms Data flow modeling Structural Model Generic constants Generate statements Configuration statements

B. Verilog: 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 Introduction to Verilog Hierarchical Modeling Concepts Basic Concepts Modules and Ports Gate-Level Modeling Data flow Modeling Behavioral Modeling Tasks and Functions Modeling Techniques Timing and Delays Switch Level Modeling

C. Testing: 12.0 13.0 14.0 15.0 16.0 Introduction to Digital Testing Fault modeling Fault Simulation Testing for Single stuck faults Design For Testability (DFT) Ad-Hoc DFT Scan based designs Built-In Self-Test (BIST)

Reference Books

Introductory VHDL From Simulation to Synthesis by Sudhakar Yalamanchili, Pearson Education, 2001

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MS Microelectronics(Syllabus) Verilog HDL by Samir Palnitkar, Pearson Education, 2001. Digital Systems Testing and Testable Design by Miron A, Melvin A.B., Arthur D.F.

SECOND SEMESTER
MEL 602 NANOMATERIALS AND NANOELECTRONICS
MEL602 Nanomaterials and Nanoelectronics 1.Introduction to nanomaterials & nanotechnology-3 Hrs 1.1Introduction 1.1.1What is nanotechnology? 1.1.2History of nanomaterials 1.1.3Influence on properties by "nano-structure induced effects" 1.1.4Applications of nanomaterials in different fields 1.1.5Societal implications of Nanoscience and Nanotechnology 2.Atoms, molecules and nanomaterials 3 Hrs 2.1 Introduction 2.1.1Molecular orbital theory 2.1.2 Angular momentum quantum number , ,, ,. 2.1.3.Chemical bond theory 3.Preparation/Synthesis of nanomaterials - 6 Hrs 3.1Methods for creating nanostructures 3.1.1Gas phase clusters 3.1.2Self assembled monolayers 3.1.3Nano powders 3.1.4Nanoshells 3.1.5Nno crystals 3.2Chemical Synthesis 3.2.1catalysis 3.2.2Solgel method 3.2.3Sonochemical method 3.3Physical Synthesis 3.3.1Chemical Vapor Synthesis 3.3.2Spray Pyrolysis 3.3.3Laser Pyrolysis/ Photochemical Synthesis 3.3.4Thermal Plasma Synthesis 3.3.5Flame Synthesis 3.3.6Low-Temperature Reactive Synthesis 3.4Biomimetic processes 3.4.1Supramolecular chemistry 3.4.2Molecular recognition 3.4.3Molecular template 4Analytical tools for characterizing nano-materials 3Hrs 4.1Electon probe micro-ananlysis 4.2Scanning probe microscopy 4.3Atomic force microscopy 4.4Scanning tunneling microscopy 4.5Chemical force microscopy

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MS Microelectronics(Syllabus)
4.6Other kind of microscopies 5Introduction to Carbon nanotubes 5.1Single wall and multi wall nanotubes 5.2Synthesis of carbon nanotubes 5.3Structure of nanotubes 5.4Properties ( Kinetics,thermal,electrical) 5.5Application of carbon nanotube 5.6Fullerenes 5.7Percolation theory 6 Properties of materials due to the scaling of size 6.1Physical 6.1Friction and wear 6.1.2Nanotribology 6.2Mechanical 6.2.1Strength and composite 6.3Optical 6.3.1Absorption of light in semiconductor materials 6.3.2Surface plasmon 6.4 Thermal 6.5Chemical 6.6Magnetic 7Quantum dot 7.1Preparation and synthesis 7.2Qantum confinement and energy model 7.3Qantum well 7.4Qantum tunneling 7.5Application 8NENO SENSORS 8.1Different types of senors 8.2Fabrication 8.2.1Top down approach 8.2.1.1bulk micromaching 8.2.1.2surface micromachining 8.2.1.3steolithography and LIGA 8.2.2Bottom up approach 8.2.2.1Effect of scaling 8.2.2.2Semiconducting polymers 8.2.2.3Self assembled monolayers 9 Nano- applications 3 Hrs 9.1Snsors 9.2Nano machine 9.3energy 9.4Quantum dot application 9.5Medical application 10Nano electronics 3 Hrs 10.1Quantum size effect in nanoparticles 10.2Single electron transistor. 10.2.1Coulomb blockade 3Hrs

3 Hrs

3 Hrs

6 Hrs

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MS Microelectronics(Syllabus)
10.3Qubits 10.4Phase change memory 10.5Millipede 10.6The red brick wall in microelectronics 10.7Future needs References: Nano- the essentials by T. PradeepMcGraw Hill Nanotechnology by Richard Brooker and Earl Boyson Wiley Microsensors, MEMS and Smart material by J.W.Gardner, V.K.Vardan, O.O.Awadelkarim Wiley

MEL 604 MIXED SIGNAL IC DESIGN I.Brief review of various building blocks II Advanced Continuous Time Filter 1. Design of MOSFET-C Filter 2. Design of Gm-C Filters III Sample and Holds, Voltage References and Translinear Circuits IV Review of Discrete-Time Signals V Advanced switched capacitor circuits 1. Design of switched capacitor amplifiers and Integrators 2. Design of switched capacitor filters VI Design of data converters 1. Nyquist rate AID converters (Flash, interpolating, folding flash, SAR and pipelined architectures), Nyquist rate D/A converters (voltage, current and charge mode converters) hybrid and segmented converters 2. Oversampled A/D and D/A converters 3. Delta-Sigma data converters VII Design of PLL's, DLL's and frequency synthesizers References R. Jacob Baker:CMOS Mixed Signal Circuits Design, Weslly-IEEE 2002 R. Gregorian and Ternes:Analog MOS integrated circuits for signal processing, JosseyBass, 1986. R.Gregorian:Introduction to CMOS OP-AMPs and comparators, John-Wiley, 1999. D.Johns and K.Martin:Analog integrated circuit design, John-Wiley, 1997. Monolithic Phase-locked loops and clock recovery circuits: Theory and design, IEEE Press, 1996.

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MS Microelectronics(Syllabus)

MEL 606 SYSTEM ON CHIP DESIGN 8085 Architecture, I/O Devices 8355/8755, DMA Controller 8237, 8279 8253 Programmable Peripheral Interface 8255 Interrupt System, Digital Interfacing, Multiple Microprocessor Systems, 8051 Microcontroller Architecture, 8051 Microcontroller System design Architecture of 16/32/ 64 bit Microcontroller, System Architecture, Different aspects of architecture design, Macros, CPU Organization, Data Path Design, Memory Organization, Control Design System on Chip Design Issues, SOC Design Methodology, Power Considerations, SOC Case study, Design Consideration Challenges, Memories, Parameterized Systems-on-a- Chip , System-on-achip Peripheral Cores , SOC and interconnect centric Architectures IP Core Design issues, IP Core Design Methodology, Reusability and intellectual property, IP Core Applications Micro Networks, SoC protocols, OC, VSI, Hardware/Software Co-Design Reference Books: 1. Edwards M.D, Automatic Logic Synthesis Techniques for Digital Systems', Macmillan New Electronic series, 1992. 2. F. Balarin, Hardware-software co-design of embedded systems: Kluwer academic publishers, 1997. 3. J.Rozenblit, K.Buchenrieder: Co-design: Computer-Aided software/hardware engineering, Piscataway, NJ; IEEE Press, 1995. 4. Myke Predko, Programming and Customizing the 8051 Microcontroller, Tata McGraw Hill, ISBN: 0-07-042140-4, 1999. 5. Barry B.Brey, Intel Microprocessors, Architecture, Programming and Interfacing, Prentice-Hall India, ISBN: 81-203-1220-1, 2000. MEL 608 DESIGN FOR MANUFACTURABILITY AND YIELD MANAGEMENT

1. Design for Manufacturability of VLSI

Course Objective
The course objectives are to give comprehensive coverage of the process and design variables that determine the ease and feasibility of fabrication (or manufacturability) of contemporary VLSI systems and circuits. This course progresses from semiconductor processing to electrical design to system architecture. The material provides a theoretical background as well as case studies, examining the entire design for the manufacturing path from circuit to silicon. Each chapter includes tutorial and practical applications coverage.

Course Outline
Introduction Defect Monitoring and Characterization Digital CMOS Fault Modeling and Inductive Fault Analysis

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MS Microelectronics(Syllabus)
Functional Yield Modeling Critical Area and Fault Probability Prediction Statistical Methods of Parametric Yield and Quality Enhancement Architectural Fault Tolerance Design for Test and Manufacturability Testing Solutions for MCM Manufacturing

Books for Design for manufacturability & Yield management 1. Integrated Circuit Manufacturability: by Jose Pineda de Gyvez, IEEE Circuits and Systems Society 2. Design for Manufacturability and Statistical Design: A Constructive Approach, Michael Orshansky, Sani Nassif, Duane Boning, 2008, ISBN# 978-0-387-30928-6, Publisher: Springer

MEL 610 ELECTIVE II MEL 610.1 Artificial Neural Networks Introduction: Biological neurons and memory: Structure and function of a single neuron; Artificial Neural Networks (ANN); Typical applications of ANNs : Classification, Clustering, Vector Quantization, Pattern Recognition, Function Approximation, Forecasting, Control, Optimization; Basic Approach of the working of ANN - Training, Learning and Generalization. Supervised Learning: Single-layer networks; Perceptron-Linear separability, Training algorithm, Limitations; Multi-layer networks-Architecture, Back Propagation Algorithm (BTA) and other training algorithms, Applications. Adaptive Multi-layer networks-Architecture, training algorithms; Recurrent Networks; Feed-forward networks; Radial-Basis-Function (RBF) networks. Unsupervised Learning: Winner-takes-all networks; Hamming networks; Maxnet; Simple competitive learning; Vector-Quantization; Counter propagation networks; Adaptive Resonance Theory; Kohonen's Self-organizing Maps; Principal Component Analysis. Associated Models: Hopfield Networks, Brain-in-a-Box network; Boltzmann machine. Optimization Methods: Hopfield Networks for-TSP, Solution of simultaneous linear equations; Iterated Gradient Descent; Simulated Annealing; Genetic Algorithm. References K. Mehrotra, C.K. Mohan and Sanjay Ranka, Elements of Artificial Neural Networks, MIT Press, 1997 - [Indian Reprint Penram International Publishing (India), 1997] Simon Haykin, Neural Networks - A Comprehensive Foundation, Macmillan Publishing Co., New York, 1994.

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MS Microelectronics(Syllabus) A Cichocki and R. Unbehauen, Neural Networks for Optimization and Signal Processing, John Wiley and Sons, 1993. J. M. Zurada, Introduction to Artificial Neural Networks, (Indian edition) Jaico Publishers, Mumbai, 1997.

MEL 610.2 Failure Analysis and Design I Overview of device fabrication II Overall View of Failure Analysis of Microelectronic Devices 1. What is Failure Analysis? 2. Failures in different level-material, wafer, board and assembly, component, contacts and connector, packaging and electrical failures 3. Techniques used to focus on the root causes of failures III Imaging Techniques (Theory & Applications) 1. Optical Microscopy 2. Electron Microscopy 3. Force Microscopy 4. Focussed Ion Beam Technique 5. X-ray imaging IV Surface and Material Analytical Techniques (Theory & Applications) 1. Auger Electron Spectrscopy 2. ESCA 3. SIMS 4. IR spectroscopy 5. Vibrational spectroscopy V Other method for Failure Analysis 1. FA techniques using electrical stimulation 2. ESD Defects and Characterization 3. Life Time Studies 4. Failure Analysis using Electrical Test Data VI FA Lab Management VII Failure Analysis & Diagnosis Future: Needs, Challenges VIII Statistical design and Analysis of Experiments 1. Statistical Tools 2. Statistical Distributions 3. Experiments of Evaluation

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MS Microelectronics(Syllabus) 4. Experiments of Comparison 5. Accelerated Experiments 6. Sequential Experiments 7. Fatigue Experiments

MEL 610.3 Digital Signal Process Review: Signals and systems, Time and frequency analysis of signals and systems, Z Transform. Discrete Fourier Transform: Frequency domain sampling and reconstruction of discrete time signals DFT, DFT as a linear transformation, properties of the DFT, use of DFT in linear filtering, filtering of long data sequences Efficient computation of the DFT: FFT Algorithms Radix 2 DITFFT and DIFFFT, in-place COMPUTATION. Goertzel Algorithm. Implementation of Discrete time Systems: Structures for FIR systems Direct form, cascade form, Frequency sampling and lattice structures. Structures for IIR systems Direct form, cascade and parallel form, lattice ladder structures. Design of IIR filters: Classical design by impulse invariance, bilinear transformation and matched Z transform, characteristics and design of commonly used filters butter worth, chebyshev and elliptic filters, Spectral transformations, Direct design of IIR filters.

Design of Digital FIR Filters: General considerations, Linear phase FIR Filters, Symmetric and antisymmetric impulse response, Design using windows, frequency sampling design, Optimum design, Remez Algorithm. Power Spectrum Estimation: Estimation of power spectra from Finite duration of observation of signals. Non-parametric and Parametric methods of power spectrum estimation. 06 hrs. Digital Signal Processors: Architecture, features and instructions of Fixed point and Floating Point Processors(TMS320c25 and TMS32030). Applications of DSP: Image Processing, Speech processing, Noise cancellation, Bio-Medical Signal Processing, Communication Signal Processing. References:1. A.V.Oppenheim and R.W.Schafer, Descrete time signal Processing, PHI. 2. J.G.Proakis and D.G.Manolakis, Introduction to Digital Signal Processing 3. J.R.Johnson, Introduction to Digital Signal Processing PHI. 4. Rabiner & Gold, Theory and applications of digital signal processing, PHI. 5. Wills J.Tompkins, Biomedical Digital Signal Processing, Prentice-Hall

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MS Microelectronics(Syllabus) 6. Texas Instruments DSP Processors (320 family) data hand book.

MEL 610.4 High Speed VLSI Design Introduction to High speed Digital Design Frequency, time and distance, Capacitive and inductive effects. High speed properties of logic gates, speed and power, wire modeling and transmission lines. Signaling convention and circuits Signaling modes for transmission lines, signaling over RC interconnect, driving lossy LC lines, bidirectional signaling, terminators. Signaling Standards, Chip-to-Chip Communication Networks, ESD Protection Power distribution and noise Power supply network, IR drops, power supply isolation. Noise sources in digital system, cross talk, inter symbol interference. Timing convention and synchronization Timing fundamentals, Clocking Styles, Clock Jitter, Clock Skew, Clock Generation, Clock Distribution, synchronization failure and meta-stability, PLL and DLL based clock aligners. Asynchronous Clocking Techniques. Clocked & non clocked Logics Single-Rail Domino Logic, Dual-Rail Domino Structures, Latched Domino Structures, Clocked Pass Gate Logic, Static CMOS, DCVS Logic, Non-Clocked Pass Gate Families. Latching Strategies Basic Latch Design, and Latching single-ended logic and Differential Logic, Race Free Latches for Pre-charged Logic Asynchronous Latch Techniques. Text Books: 1. Kerry Bernstein & et. al., High Speed CMOS Design Styles, Kluwer, 1999. 2. Evan Sutherland, Bob stroll, David Harris, Logical Efforts, Designing Fast CMOS Circuits, Kluwer, 1999. 3. David Harris, Skew Tolerant Domino Design. 4. William S. Dally & John W. Poulton; Digital Systems Engineering, Cambridge University Press, 1998. 5. Howard Johnson & Martin Graham; High speed Digital Design : A hand book of Black Magic, Prentice Hall PTR, 1993. 6. Jan M. Rabaey , et all; Digital Integrated Circuits: A Design perspective, second edition, 2003

MEL 612 ELECTIVE III MEL 612.1 Quantum Information Science Finite dimensional vector space, inner-product, complex numbers, linear adjoints, unitary maps, projectors, tensor product of Hilbert spaces, bit, qubit, entanglement, no-cloning, quantum circuits, quantum gates, Shor's algorithm, Grover's algorithm, quantum teleportation, quantum key-

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MS Microelectronics(Syllabus) exchange, teleportation and measurement based quantum computing, decoherence, quantum errorcorrection, mixed states, quantum information. References Gruska, J. (1999) Quantum Computing. McGraw-Hill. Nielsen, M. and Chuang, I. L. (2000) Quantum Computation and Quantum Information. Cambridge University Press MEL 612.2 Optical Integrated Circuits Optical Waveguide Modes, Theory of Optical Waveguides,Waveguide Fabrication Techniques, Polymer and Fiber Integrated Optics, Losses in Optical Waveguides, Waveguide Input and Output Couplers, Coupling Between Waveguides, Electro-Optic Modulators, Acousto-Optic Modulators, Basic Principles of Light Emission in Semiconductors, Optical Amplifiers, Semiconductor Lasers Heterostructure, Confined-Field Lasers, Distributed Feedback Lasers, Direct Modulation of Semiconductor Lasers, Integrated Optical Detectors, Quantum Well Devices, Micro-electro-optical-mechanical Devices (MEMs) Optoelectronic Devices in Wireless Systems, Application of Integrated Optics and Current Trends References Integrated Optics: Theory and Technology, R. G. Hunsperger, Springer-Verlag, 5th edition.

MEL 612.3 Macro Electronics (Large Area Microelectronics) Amorphous amd Micro/Nano crystalline semiconductors : Introduction, Growth of amorphous and micro /nano crystalline hydrogenated silicon (a-Si:H) and it`s alloys like a-SiC:H, aSiGe:H,etc, Doping in amorphous semiconductors, Physics and electronic properties. Defect desities, Electronic transport , Optoelectronics properties , Contact, Interfaces, Multilayers Device configuration and Applications : P-I-N devices, Thin film transistors , LEDs , Memory Switches , Novel Processing Technology for Macroelectronics, Amorphous silicon Solar cells ,TFT based LCD displays, Passive and Active Matrix displays , Photoreceptors, Large Area Image Sensor Arrays , Image pick up tubes or Vidicons, High energy Radiation imaging, Multilayer Color Detectors, Thin Film Position Sensitive Detectors: From 1D to 3D Applications Organic & Polymer Semiconductors devices: Introduction to organic semiconductors, Electronics structure, Transport, Optoelectronic properties, Device configurations , Applications: Optoelectronics devices ,Solar cells, Photodiodes, LEDs ,Active Matrix displays , Organic Thin

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MS Microelectronics(Syllabus) film transistors, Device structure and characteristics , Circuit systems based on organic devices, Organic Lasers, Other application Flat panel Display Technologies : LCD displays , Plasma Displays (PDP), Electroluminescent Displays(EL), Electrophoretic Displays (Electronic paper), Field emission displays (FED), Introduction to the concept of Flexible Electronics. References 1.Hydrogenated amorphous silicon , R.A.Street, Cambridge University Press 1991 2.The Physics and Technology of Amorphous silicon A.Madan & M.P.Shaw, Elsevier Science & Technology books 1988. 3.Technology and Applications of Amorphous Silicon: Technology and Applications ed. Robert A. Street Springer-Verlag New York, LLC Series: Series in Materials Science. 2001 4.Properties of Amorphous Silicon and Its Alloys, Tim.M..Searle, IEE Publication 1998. 5.Latest MRS conference proceedings on amorphous and nanocrystalline semiconductors 6. Stephen Forrest, Paul Burrows, & Mark Thompson , IEEE Spectrum August 2000 Volume 37 Number 8 The dawn of Organic Electroncis 7. Prospects and Applications for Organic Light Emitting Devices," by P.E. Burrows, S.R. Forrest, and M.E. Thompson in Current Opinion in Solid State and Materials Science, Vol. 2, pp. 236-243 (1997). 8. "Ultrathin Organic Films Grown by Organic Molecular Beam Deposition and Related Techniques," by S.R. Forrest, Chemical Reviews, Vol. 97, pp. 1793-1896 (1997). 9. Additional references Special issues on Conducting polymers and Flat panel displays in journals MRS Bulletin, IEEE Proceedings & Electronic Devices and SID Information Display magazine. MEL 612.4 Low Power VLSI Design Introduction top Low Power VLSI Design Need for low power VLSI Design, Sources of power dissipation on Digital Integrated circuits. Physics of power dissipation in CMOS devices. Emerging Low power approaches. Device & Technology Impact on Low Power: Dynamic dissipation in CMOS, Transistor sizing & gate oxide thickness, Impact of technology Scaling, Technology & Device innovation Power estimation, Simulation Power analysis: SPICE circuit simulators, gate level logic simulation, capacitive power estimation, static state power, gate level capacitance estimation, architecture level analysis, data correlation analysis in DSP systems, Monte Carlo simulation. Probabilistic power analysis: Random logic signals, probability & frequency, probabilistic power analysis techniques, signal entropy. Low Power Design techniques Circuit level: Power consumption in circuits. Flip Flops & Latches design, high capacitance nodes, low power digital cells library Logic level: Gate reorganization, signal gating, logic encoding, state machine encoding, precomputation logic Low power Architecture & Systems: Power & performance management, switching activity reduction, parallel architecture with voltage reduction, flow graph transformation, low power arithmetic components, low power memory design.

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MS Microelectronics(Syllabus) Low power Clock Distribution: Power dissipation in clock distribution, single driver Vs distributed buffers, Zero skew Vs tolerable skew, chip & package co design of clock network Algorithm & architectural level methodologies: Introduction, design flow, Algorithmic level analysis & optimization, Architectural level estimation & synthesis. Text Books: 1. Gary K. Yeap, Practical Low Power Digital VLSI Design, KAP, 2002 2. Rabaey, Pedram, Low power design methodologies Kluwer Academic, 1997 3. Kaushik Roy, Sharat Prasad, Low-Power CMOS VLSI Circuit Design Wiley, 2000

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