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Using the term "Embedded Systems" in our name is confusing to some. In this case, people either have no idea what the term means - or they have a very strict definition in mind, such as "assembly language on a chip". But the work that we do is so much broader than that! A general-purpose definition of embedded systems is that they are devices used to control, monitor or assist the operation of equipment, machinery or plant. "Embedded" reflects the fact that they are an integral part of the system. In many cases their embedded nature may be such that their presents is far from obvious to the casual observer and even the more technically skilled might need to examine the operations of a piece of equipment for some time before being able to conclude that an embedded control system was involved in its function. " Huh?.....Doesnt this sound like Blah Blah Blah Blah Blah Lets make it very simple An embedded system is a special-purpose computer system designed to perform one or a few dedicated functions, often with real-time computing constraints. It is usually embedded as part of a complete device including hardware and mechanical parts. In contrast, a general-purpose computer, such as a personal computer, can do many different tasks depending on programming. Embedded systems control many of the common devices in use today. Another one: Any electronic system that uses a computer chip, but that is not a general-purpose workstation, desktop or laptop computer. Such systems use microcontrollers (MCUs) or microprocessors (MPUs), or they may use custom-designed chips. Deployed by the billions each year in myriad applications, the embedded systems market uses the lion's share of all the electronic components in the world. Most of the definitions of embedded systems revolve around the idea of it being a general purpose computer designed to perform a specific task.
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Uses: Embedded systems are employed in automobiles, planes, trains, space vehicles, machine tools, cameras, consumer electronics, office appliances, network appliances, video games, cell phones, PDAs, GPS navigation as well as robots and toys. Low-cost consumer products can use microcontroller chips that cost less than a dollar. Characteristics: 1) Embedded systems are designed to do some specific task, rather than be a general-purpose computer for multiple tasks. Some also have real time performance constraints that must be met, for reasons such as safety and usability; others may have low or no performance requirements, allowing the system hardware to be simplified to reduce costs. 2) Embedded systems are not always standalone devices. Many embedded systems consist of small, computerized parts within a larger device that serves a more general purpose. For example, the Gibson Robot Guitar features an embedded system for tuning the strings, but the overall purpose of the Robot Guitar is, of course, to play music. Similarly, an embedded system in an automobile provides a specific function as a subsystem of the car itself. 3) The program instructions written for embedded systems are referred to as firmware, and are stored in read-only memory or Flash Memory chips. They run with limited computer hardware resources: little memory, small or non-existent keyboard and/or screen.
Listing buzz-words (Micro-controllers, micro-processors, ARM, Thumb, AVR, PIC, 8051, OS, Real time, RTOS, firmware, Linux, RT Linux, Assembly language, C, Java, BSP, Endian-ness, (cross)compiler, CISC, RISC, Debugger, Emulator, Simulator, POSIX, MISRA, Device driver, Programmer, Flash, DSP, platform, architecture, system Programmer, system software, application software, GUI, HMI, fuzzy logic, GNU, kernel, scheduler, context switch, data structures, linker, locator, multi-processing, multi-tasking, multithreading, interrupts, hex code, object code, polling, pre-emption, protocol stack, TCP/IP, CAN, I2C, SPI,
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Zigbee, profiler, reentrant, recursive, simulator, interpreter, UML, Vxworks, Watchdog, Wince, FSF, open source, closed source) These are some of the Buzz Words that one comes across whenever we talk about Embedded Systems. The Layered Architecture categorizes them into different layers. The layered Architecture:
Architecture Exclusions
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Since embedded system use microcontrollers (MCUs), lets get to know microcontrollers more into details:
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Riding on its success, Intel begins its work on an 8- bit microprocessor 8008, and soon after that, 8080. Both these devices were well recieved. Suddenly there was a surge of interest in microprocessors. Fagin left Intel to form his own company, Zilog. Z80, an 8-bit microprocessor was the 1st product of Zilog. Motorola, a car radio company, jumps into the field of microprocessors with its 6800 an 8-bit microprocessor. Note that microcontrollers were not invented yet! All these devices were microprocessors. In 1976- Intel introduce an 8-bit microcontroller, the MCS-48. 4 years later, Intel comes up with another 8-bit microcontroller the 8051. This was a legend. Variants of the 8051 are still used dearly by many people. Later, Intel kept the architecture of 8051 on market. Many companies adopted this architecture and started making variants of 8051. The momentum kept growing. And Companies like Atmel and Microchip are coming out with more advanced microcontrollers like AVR and PIC respectively. George Moore, co-founder of Intel, predicted that the number of transistors on a chip will double every year. This was just an observation, which happened to be true during the last two decades. It is famously known as Moores Law. The quest for better and bigger processors continued. Today, we have attained the expertise to design a 64-bit microprocessor. So lets answer some questions that we call silly, but still need to be cleared.. What is a microprocessor? Microprocessor is a collection of commonly used functions, (like arithmetic operations, logical operations..) integrated in an IC. This device enables us to use these function on our choice of data, in any order we want, any number of times. That is why we call it a general purpose device. Then what is a microcontroller? Microprocessors lack the ability to store data permanently. Hence it needs to be connected to external memories for essential operations. Hence, microprocessor cannot be used as a stand-alone device. This generated the need for microcontrollers. Microcontrollers come with a microprocessor and memory integrated in a single IC. Microcontrollers are also packed with other features like I/O pins, timers etc.. www.thinklabs.in Page 5
Different families of Microcontrollers Some widely used families and what communities have to say about them (courtesy: Spark fun electronics) 8051 The '8051 core' was the de facto standard in 8bit (and 4bit!) microcontrollers. Developed by Intel in the 1980s, it still seems to be the instruction set they love to teach you in college. They are based on archaic, but field proven instruction sets. Very old tech in my humble opinion, but these ICs have been significantly improved over the years (now Flash based, ADC, SPI, etc.). 68HC08/11 Another very common instruction set developed by Motorola. Extremely popular, and a micro commonly taught at university, it's the microcontroller I love to hate. These original micros often lack onboard RAM and flash based memory. PIC - This is the classic micro from Microchip. Very simple, very proven, but it lacks many of the features that other mfg's are building into their chips. This is a big deal for me. I was a diehard PIC person for years and I've started to see the limits of PICs and the benefits of other micros!
AVR This (Atmel) is basically a direct competitor of PICs. They do everything a PIC does, but in my new opinion, better, faster, cheaper, and simpler. MSP These are very good micros by Texas Instruments (TI), not as beefy as AVR or PICs. However they truly excel at lowpower applications. More on this later, but imagine running a complete system on one AA battery for 5 years. This is in the realm of nanoamp current consumption years. Crazy! ARM Why are all these three letters? I don't know actually... ARMs are the new kids on the block and they are huge. Very powerful, very lowcost, extremely low power consumption they are taking over the world (85% of 32bit market is owned by ARM) but can be really intimidating if you've never played with a micro before. Overkill in majority of applications except mobiles, consumer multimedia items and SBCs
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I/O PORTs
The 1st Feature that needs to be learnt in any microcontroller is its Input-Output function. Lets know about the specific case of AVR series microcontroller, ATmega128. Though we are discussing specific to a microcontroller here, try to understand the general concept behind the I/O Ports, its usage, Its functionality through the following discussion. ATmega128 has a total of 64 pins. Of these, 53 pins can be used as Input or Outputs. These pins are divided into 7 ports : PORT A PORT B PORT C PORT D PORT E PORT F PORT G 8 pins 8 pins 8 pins 8 pins 8 pins 8 pins 5 pins
Each of these pins can can be individually programmed as Inputs or Outputs. So you can use all 53 pins as input or all 53 pins as outputs or any how... But there are some steps that we need to perform to configure the pins as either. Each port is associated with 3 registers: DDRx, PORTx, PINx. Each bit of these registers correspond to each pin of the port. For example, the pin 3 of port D is associated with BIT 3 of DDRD, BIT 3 of PORTD and BIT 3 of PIND Here, we review how to configure pins as required.
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Output:
DDRx: Data Direction Register Whichever pin is supposed to be an output, write 1 in the corresponding DDRx bit. PORTx: Write whatever data that needs to be output in the corresponding pins. Example: Make pins 1,2,3 and 4 of PORTB as an output port and write 1 0 1 0 on those pins respectively: DDRB: 7 Data: 0 6 0 5 0 4 1 3 1 2 1 1 1 0 0 = 1E (Hexadecimal)
Input:
DDRx: Data Direction Register Whichever pin is supposed to be an input, write 0 in the corresponding DDRx bit. PORTx: To enable pull up registers, (which should always be done if not for any special cases), write 1 in the corresponding PORTx bit. PINx: Read the input of the pins at the corresponding bits. Example: Configure the pins 0,1,2 & 3 of port D as input and read the value at the pins. DDRD: 7 Data: 0 6 0 5 0 4 0 3 0 2 0 1 0 0 0 = 00 (Hexadecimal)
Code: DDRD = 0x00; PORTD = 0x0F; Value = PIND; //read status of Input Pins Value = Value & 0x0F; //to mask the higher 4 bits. www.thinklabs.in Page 8
Here, a switch is connected at the input pin of a microcontroller. Note the absence of a pull up resistor. When the switch is closed, the pin is directly grounded and the input pin reads a logic level 0. Thus logic level 0 should indicate that the switch is closed. Now consider when the switch is open. The input pin is not connected to anything else, hence the pin in open. Thus the input pin is said to be kept floating. i.e. the voltage at the pin may vary from 0 V to 5V randomly. Thus we cannot be sure every time that when the logic at pin is 0, it is because of the closed switch or the floating voltage. Hence this circuit is not appropriate. Now consider the circuit below:
VCC / \ | | | -------------| |-----| |-----| |---------
/ _____/ | | \ / GND
This circuit will eliminate our problem of floating pin. It is obvious that when the pin is open, the voltage at the input pin is Vcc. But now imagine what will happen if the switch is closed.. What do you think will the voltage be at the input pin? You dont have the time to calculate that! You have shorted Vcc and ground of your Power Supply! This is a very wrong method to eliminate our original problem of floating voltage.
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/ _____/ | | \ / GND
When the switch is closed, the pin is directly connected to ground and reads logic level 0. When the switch is opened, the pin is connected to Vcc through a high value resistor; hence it reads a logic value 1. Thus, the use of pull up resistor has solved our problem. Note that a high value pull up resistor must be used to limit the current flow to ground when the switch is closed.
http://www.thinklabs.in T hi
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LCD PROGRAMMING
LCD or Liquid Crystal Display is nowadays fast becoming a preferred choice for an interface device due to its ease of use, cheap rates and value for money performance. Every LCD needs a LCD driver to interface between the microcontroller and LCD module. This driver is included on the LCD module. The LCD we are using is 16 X 2 LCD, which means 16 columns and 2 rows. 1 . . . . . . . . . . . . . . . . . . . . . . . . .16
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The LCD uses three control lines. They are referred to as EN, RS, and RW. The EN line is called "Enable." This control line is used to tell the LCD that you are sending it data. To send data to the LCD, your program should make sure this line is low (0) and then set the other two control lines and/or put data on the data bus. When the other lines are completely ready, bring EN high (1) and wait for the minimum amount of time required by the LCD datasheet (this varies from LCD to LCD), and end by bringing it low (0) again. The RS line is the "Register Select" line. When RS is low (0), the data is to be treated as a command or special instruction (such as clear screen, position cursor, etc.). When RS is high (1), the data being sent is text data which should be displayed on the screen. For example, to display the letter "T" on the screen you would set RS high. The RW line is the "Read/Write" control line. When RW is low (0), the information on the data bus is being written to the LCD. When RW is high (1), the program is effectively querying (or reading) the LCD. Only one instruction ("Get LCD status") is a read command. All others are write commands--so RW will almost always be low.
4 Bit Mode:
The LCD can work in 8 bit parallel mode or a 4 bit mode. We will use the 4 bit mode as it reduces the number of pins and simplifies the circuit. The only difference with the 8bit version is DB0, DB1, DB2 and DB3 on the display module side. These lines are not connected to the processor. Leave those lines unconnected. In 4-bit mode, we have to read and write data bytes and command bytes in two separate 'nibbles' (4bit parts).
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To initialize some more parameters, or otherwise, you can use the following command table:
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The initialization process normally consists of setting the baud rate, setting frame format and enabling the Transmitter or the Receiver depending on the usage.
Bit 7 RXC: USART Receive Complete This flag bit is set when there are unread data in the receive buffer and cleared when the receive buffer is empty (i.e. does not contain any unread data). If the Receiver is disabled, the receive buffer will be www.thinklabs.in Page 15
flushed and consequently the RXC bit will become zero. The RXC Flag can be used to generate a Receive Complete interrupt. Bit 6 TXC: USART Transmit Complete This flag bit is set when the entire frame in the Transmit Shift Register has been shifted out and there are no new data currently present in the transmit buffer (UDR). The TXC Flag bit is automatically cleared when a transmit complete interrupt is executed, or it can be cleared by writing a one to its bit location. The TXC Flag can generate a Transmit Complete interrupt. Bit 5 UDRE: USART Data Register Empty The UDRE Flag indicates if the transmit buffer (UDR) is ready to receive new data. If UDRE is one, the buffer is empty, and therefore ready to be written. The UDRE Flag can generate a Data Register Empty interrupt. UDRE is set after a reset to indicate that the Transmitter is ready. Bit 4 FE: Frame Error This bit is set if the next character in the receive buffer had a Frame Error when received (i.e., when the first stop bit of the next character in the receive buffer is zero). This bit is valid until the receive buffer (UDR) is read. The FE bit is zero when the stop bit of received data is one. Always set this bit to zero when writing to UCSRA. Bit 3 DOR: Data OverRun This bit is set if a Data OverRun condition is detected. A Data OverRun occurs when the receive buffer is full (two characters), it is a new character waiting in the Receive Shift Register, and a new start bit is detected. This bit is valid until the receive buffer (UDR) is read. Always set this bit to zero when writing to UCSRA. Bit 2 PE: Parity Error This bit is set if the next character in the receive buffer had a Parity Error when received and the parity checking was enabled at that point (UPM1 = 1). This bit is valid until the receive buffer (UDR) is read. Always set this bit to zero when writing to UCSRA. Bit 1 U2X: Double the USART transmission speed This bit only has effect for the asynchronous operation. Write this bit to zero when using synchronous operation. Bit 0 MPCM: Multi-processor Communication Mode
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This bit enables the Multi-processor Communication mode. When the MPCM bit is written to one, all the incoming frames received by the USART Receiver that do not contain address information will be ignored. The Transmitter is unaffected by the MPCM setting.
UCSRB
Bit 7 RXCIE: RX Complete Interrupt Enable Writing this bit to one enables interrupt on the RXC Flag. A USART Receive Complete interrupt will be generated only if the RXCIE bit is written to one, the Global Interrupt Flag in SREG is written to one and the RXC bit in UCSRA is set. Bit 6 TXCIE: TX Complete Interrupt Enable Writing this bit to one enables interrupt on the TXC Flag. A USART Transmit Complete interrupt will be generated only if the TXCIE bit is written to one, the Global Interrupt Flag in SREG is written to one and the TXC bit in UCSRA is set. Bit 5 UDRIE: USART Data Register Empty Interrupt Enable Writing this bit to one enables interrupt on the UDRE Flag. A Data Register Empty interrupt will be generated only if the UDRIE bit is written to one, the Global Interrupt Flag in SREG is written to one and the UDRE bit in UCSRA is set. Bit 4 RXEN: Receiver Enable Writing this bit to one enables the USART Receiver. The Receiver will override normal port operation for the RxD pin when enabled. Disabling the Receiver will flush the receive buffer invalidating the FE, DOR and PE Flags. Bit 3 TXEN: Transmitter Enable Writing this bit to one enables the USART Transmitter. The Transmitter will override normal port operation for the TxD pin when enabled. The disabling of the Transmitter (writing TXEN to zero) will not become effective until ongoing and pending transmissions are completed (i.e., when the Transmit Shift Register and Transmit Buffer Register do not contain data to be transmitted). When disabled, the Transmitter will no longer override the TxD port. Bit 2 UCSZ2: Character Size www.thinklabs.in Page 17
The UCSZ2 bits combined with the UCSZ1:0 bit in UCSRC sets the number of data bits (Character Size) in a frame the Receiver and Transmitter use. Bit 1 RXB8: Receive Data Bit 8 RXB8 is the ninth data bit of the received character when operating with serial frames with nine data bits. Must be read before reading the low bits from UDR. Bit 0 TXB8: Transmit Data Bit 8 TXB8 is the ninth data bit in the character to be transmitted when operating with serial frames with nine data bits. Must be written before writing the low bits to UDR.
UCSRC
Bit 7 URSEL: Register Select This bit selects between accessing the UCSRC or the UBRRH Register. It is read as one when reading UCSRC. The URSEL must be one when writing the UCSRC. Bit 6 UMSEL: USART Mode Select This bit selects between Asynchronous and Synchronous mode of operation. Bit 5:4 UPM1:0: Parity Mode These bits enable and set type of Parity Generation and Check. If enabled, the Transmitter will automatically generate and send the parity of the transmitted data bits within each frame. The Receiver will generate a parity value for the incoming data and compare it to the UPM0 setting. If a mismatch is detected, the PE Flag in UCSRA will be set. Bit 3 USBS: Stop Bit Select This bit selects the number of stop bits to be inserted by the transmitter. The Receiver ignores this setting. Bit 2:1 UCSZ1:0: Character Size
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The UCSZ1:0 bits combined with the UCSZ2 bit in UCSRB sets the number of data bits (Character Size) in a frame the Receiver and Transmitter use. Bit 0 UCPOL: Clock Polarity This bit is used for Synchronous mode only. Write this bit to zero when Asynchronous mode is used. The UCPOL bit sets the relationship between data output change and data input sample, and the synchronous clock (XCK). UMSEL bit setting UMSEL 0 1 Mode Asynchronous Operation Synchronous Operation
UMSEL 0 0 1 1
UPM0 0 1 0 1
UPM Bits setting Mode Disabled Reserved Enable, Even Parity Enabled, Odd Parity
USBS Bit Setting USBS 0 1 UCSZ Bits Setting UCSZ2 0 UCSZ1 0 UCSZ0 0 Character Size 5-bit Page 19 Stop Bits(s) 1-bit 2-bit
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0 0 0 1 1 1 1
0 1 1 0 0 1 1
1 0 1 0 1 0 1
USBS 0 1
UCPOL Bit Setting Transmitted Data Changed Received Data Sampled (Input on RxD Pin) (Output of TxD Pin) Falling XCK Edge Rising XCK Edge Falling XCK Edge Rising XCK Edge
UBRR
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Bit 15 URSEL: Register Select This bit selects between accessing the UBRRH or the UCSRC Register. It is read as zero when reading UBRRH. The URSEL must be zero when writing the UBRRH. Bit 14:12 Reserved Bits These bits are reserved for future use. For compatibility with future devices, these bit must be written to zero when UBRRH is written. Bit 11:0 UBRR11:0: USART Baud Rate Register This is a 12-bit register which contains the USART baud rate. The UBRRH contains the four most significant bits, and the UBRRL contains the eight least significant bits of the USART baud rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud rate is changed. Writing UBRRL will trigger an immediate update of the baud rate prescaler.
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3 3 1 0
8 7 3 1
4 4 -
0.0% -7.8% -
9 8 4 -
4 4 -
8.5% 0.0% -
10 9 4 -
1.158 Mbps
2.304Mbps
1.25 Mbps
25 Mbps
Frame Formats : A serial frame is defined to be one character of data bits with synchronization bits (start and stop bits), and optionally a parity bit for error checking. The USART accepts all 30 combinations of the following as valid frame formats: 1 start bit 5, 6, 7, 8, or 9 data bits no, even or odd parity bit 1 or 2 stop bits
A frame starts with the start bit followed by the least significant data bit. Then the next data bits, up to a total of nine, are succeeding, ending with the most significant bit. If enabled, the parity bit is inserted after the data bits, before the stop bits. When a complete frame is transmitted, it can be directly followed by a new frame, or the communication line can be set to an idle (high) state. Figure Below illustrates the possible combinations of the frame formats. Bits inside brackets are optional.
St ---Start bit, always low. (n) ----Data bits (0 to 8). P ----Parity bit. Can be odd or even. Sp ----Stop bit, always high. IDLE ----No transfers on the communication line (RxD or TxD). An IDLE line must be high.
The frame format used by the USART is set by the UCSZ2:0, UPM1:0 and USBS bits in UCSRB and UCSRC. The receiver and transmitter use the same setting. Note that changing the setting of any of these bits will corrupt all ongoing communication for both the receiver and transmitter.
The USART Character SiZe (UCSZ2:0) bits select the number of data bits in the frame. The USART Parity mode (UPM1:0) bits enable and set the type of parity bit. The selection between one or two stop bits is done by the USART Stop Bit Select (USBS) bit. The receiver ignores the second stop bit. An FE (Frame Error) will therefore only be detected in the cases where the first stop bit is zero.
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Bit 7:6 REFS1:0: Reference Selection Bits These bits select the voltage reference for the ADC. If these bits are changed during a conversion, the change will not go in effect until this conversion is complete (ADIF in ADCSRA is set). The internal voltage reference options may not be used if an external reference voltage is being applied to the AREF pin. Bit 5 ADLAR: ADC Left Adjust Result The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register. Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conversions. Bits 4:0 MUX4:0: Analog Channel Selection Bits The value of these bits selects which analog inputs are connected to the ADC. If these bits are changed during a conversion, the change will not go in effect until this conversion is complete (ADIF in ADCSRA is set).
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REFS1 0
Voltage Reference selections for ADC Voltage Reference Selection REFS0 0 AREF, Internal Vref turned off
REFS1 0 1 1
REFS0 1 0 1
Voltage Reference selections for ADC Voltage Reference Selection AVcc with external capacitor at AREF pin Reserved Internal 2.56V Voltage Reference with external capacitor at AREF pin
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1110 1111
ADCSRA
Bit 7 ADEN: ADC Enable Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning the ADC off while a conversion is in progress, will terminate this conversion. Bit 6 ADSC: ADC Start Conversion In Single Conversion mode, write this bit to one to start each conversion. In Free Running mode, write this bit to one to start the first conversion. The first conversion after ADSC has been written after the ADC has been enabled, or if ADSC is written at the same time as the ADC is enabled, will take 25 ADC clock cycles instead of the normal 13. This first conversion performs initialization of the ADC. ADSC will read as one as long as a conversion is in progress. When the conversion is complete, it returns to zero. Writing zero to this bit has no effect. Bit 5 ADFR: ADC Free Running Select When this bit is set (one) the ADC operates in Free Running mode. In this mode, the ADC samples and updates the Data Registers continuously. Clearing this bit (zero) will terminate Free Running mode. Bit 4 ADIF: ADC Interrupt Flag This bit is set when an ADC conversion completes and the Data Registers are updated. The ADC Conversion Complete Interrupt is executed if the ADIE bit and the I-bit in SREG are set. ADIF is cleared by hardware when executing the corresponding interrupt Handling Vector. Alternatively, ADIF is cleared by writing a logical one to the flag. Beware that if doing a Read-Modify- Write on ADCSRA; a pending interrupt can be disabled. Bit 3 ADIE: ADC Interrupt Enable When this bit is written to one and the I-bit in SREG is set, the ADC Conversion Complete Interrupt is activated. Bits 2:0 ADPS2:0: ADC Prescaler Select Bits www.thinklabs.in Page 26
These bits determine the division factor between the XTAL frequency and the input clock to the ADC.
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When an ADC conversion is complete, the result is found in these two registers. If differential channels are used, the result is presented in twos complement form. When ADCL is read, the ADC Data Register is not updated until ADCH is read. Consequently, if the result is left adjusted and no more than 8-bit precision is required, it is sufficient to read ADCH. Otherwise, ADCL must be read first, then ADCH. The ADLAR bit in ADMUX, and the MUXn bits in ADMUX affect the way the result is read from the registers. If ADLAR is set, the result is left adjusted. If ADLAR is cleared (default), the result is right adjusted.
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