Sunteți pe pagina 1din 47

Future Technology Devices International Ltd V-Eval Board

Document Version 1.0


Future Technology Devices International Ltd (FTDI) 373 Scotland Street, Glasgow G5 8QB United Kingdom Tel.: +44 (0) 141 429 2777 Fax: + 44 (0) 141 429 2758

E-Mail (Support): vinculum.support@ftdichip.com Web: http://www.vinculum.com


Vinculum is part of Future Technology Devices International Ltd. Neither the whole nor any part of the information contained in, or the product described in this manual, may be adapted or reproduced in any material or electronic form without the prior written consent of the copyright holder. This product and its documentation are supplied on an as-is basis and no warranty as to their suitability for any particular purpose is either made or implied. Future Technology Devices International Ltd will not accept any claim for damages howsoever arising as a result of use or failure of this product. Your statutory rights are not affected. This product or any variant of it is not intended for use in any medical appliance, device or system in which the failure of the product might reasonably be expected to result in personal injury. This document provides preliminary information that may be subject to change without notice. No freedom to use patents or other intellectual property rights is implied by the publication of this document. Future Technology Devices International Ltd, 373 Scotland Street, Glasgow G5 8QB United Kingdom. Scotland Registered Number: SC136640

Copyright 2007 Future Technology Devices International Ltd

V-Eval Board Version 1.0

Table of Contents 1 Introduction ............................................................................................................................................... 6 1.1 1.2 2 Handling the board ........................................................................................................................... 6 Environmental requirements ............................................................................................................ 6

Board description ...................................................................................................................................... 7 2.1 2.2 V-Eval Board features ...................................................................................................................... 7 Specifications ................................................................................................................................... 7

V-Eval Board components and interfaces. ............................................................................................... 8 3.1 3.2 3.2.1 3.2.2 Block Diagram .................................................................................................................................. 9 Functional Block Description. ......................................................................................................... 10 Components. ..................................................................................................................10 Interfaces. ......................................................................................................................11

4 5

Testing the board. ................................................................................................................................... 12 Detailed description of board components. ............................................................................................ 13 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 5.10 5.11 5.12 5.13 5.14 5.15 5.16 5.17 5.18 5.19 5.20 5.21 Power select jumper JP9................................................................................................................ 13 ADBUS port connector CN6........................................................................................................... 14 ACBUS connector CN8 .................................................................................................................. 15 BDBUS port connector CN11......................................................................................................... 16 UART interface connector CN9...................................................................................................... 17 SPI interface connector CN12........................................................................................................ 18 FIFO interface connector CN5 ....................................................................................................... 19 Prototyping area ............................................................................................................................. 20 USB1 interface CN2 ....................................................................................................................... 22 USB2 interface CN3. ...................................................................................................................... 22 PS2-1 interface. CN10. .................................................................................................................. 23 PS2-2 interface. CN7. .................................................................................................................... 24 Monitor port mode select jumpers JP1, JP2 .................................................................................. 25 User LEDs. LED6 LED10. ........................................................................................................... 26 LED enable/disable jumpers JP10 JP14..................................................................................... 26 User push button switches ............................................................................................................. 27 Host USB power jumpers JP15, JP16. .......................................................................................... 27 PS2-1, PS2-2 Enable jumpers JP4, JP5, JP5, JP6. ...................................................................... 28 Remote Wakeup jumper JP3. ........................................................................................................ 28 Reset Push-button Switch .............................................................................................................. 29 PROG LED ................................................................................................................................... 29

Connecting to host PC ............................................................................................................................ 30 6.1 Drivers installation. ......................................................................................................................... 30

V-Eval Board Control Panel application.................................................................................................. 34 7.1 Terminal Mode ............................................................................................................................... 34

Copyright 2008 Future Technology Devices International Ltd

V-Eval Board Version 1.0

7.1.1 7.1.2 7.1.3 7.1.4 7.2 7.3 8 9

Options - Mode tab .......................................................................................................34 Options - RS232 Setup tab: .........................................................................................35 Options - Disk Transfer tab...........................................................................................36 Options - Slave File I/O tab ..........................................................................................37 Spy Mode ....................................................................................................................................... 38 Programming Mode........................................................................................................................ 39

V-Eval Board Schematics. ...................................................................................................................... 40 Contact Information................................................................................................................................. 41

Copyright 2008 Future Technology Devices International Ltd

V-Eval Board Version 1.0

List of Tables
Table 1.0 Table 1-1 Table 4-1 Table 4-2 Table 4-3 Table 4-4 Table 4-5 Table 4-6 Table 4-7 Table 4-8 Table 4-9 Table 4-10 Table 4-11 Table 4-12 Table 4-13 Table 4-14 Table 4-15 Table 4-16 Document references.......................................................................................................5 Acronyms and Abbreviations ...........................................Error! Bookmark not defined. ADBUS port connector CN6. .........................................................................................14 ACBUS port connector CN8 ..........................................................................................15 BDBUS port connector CN11 ........................................................................................16 UART interface connector CN9 .....................................................................................17 SPI Interface connector CN12 .......................................................................................18 FIFO Interface connector CN5.......................................................................................19 Prototyping area.............................................................................................................21 USB1 host/slave connector. CN2 ..................................................................................22 USB2 host/slave connector. CN3 ..................................................................................22 PS2-1 connector. CN10 .................................................................................................23 PS2 - 2 connector. CN7 .................................................................................................24 Monitor interface type selection jumpers JP1, JP2........................................................25 User LEDs connections..................................................................................................26 LED Enable/Disable jumpers. ........................................................................................26 User Switches ................................................................................................................27 PS2 enable jumpers.......................................................................................................28

Copyright 2008 Future Technology Devices International Ltd

V-Eval Board Version 1.0

List of Figures
Figure 3-1 Figure 3-2 Figure 4-1 Figure 5-1 Figure 5-2 Figure 5-3 Figure 5-4 Figure 5-5 Figure 5-6 Figure 5-7 Figure 5-8 Figure 5-9 Figure 5-10 Figure 5-11 Figure 5-12 Figure 5-13 Figure 5-14 Figure 5-15 Figure 5-16 Figure 5-17 Figure 5-18 Figure 5-19 Figure 5-20 Figure 5-21 Figure 6-1 Figure 6-2 Figure 6-3 Figure 6-4 Figure 6-5 Figure 6-6 Figure 7-1 Figure 7-2 Figure 7-3 Figure 7-4 Figure 7-5 Figure 7-6 Board layout. ....................................................................................................................8 Block diagram. .................................................................................................................9 Power connector. ...........................................................................................................12 Power select jumper.......................................................................................................13 ADBUS port connector...................................................................................................14 ACBUS port connector CN8. .........................................................................................15 BDBUS port connector CN11. .......................................................................................16 UART interface connector CN9. ....................................................................................17 SPI interface connector CN12. ......................................................................................18 FIFO interface connector CN5. ......................................................................................19 Prototyping area.............................................................................................................20 USB1 interface CN2.......................................................................................................22 USB2 interface CN3.......................................................................................................22 PS2 - 1 interface CN10. .................................................................................................23 PS2 - 2 interface CN7. ...................................................................................................24 Monitor mode select jumpers JP1, JP2. ........................................................................25 User LEDs. .....................................................................................................................26 LED Enable/Disable jumpers. ........................................................................................26 User push button switches. ............................................................................................27 USB power enable jumpers. ..........................................................................................27 USB power enable jumpers. ..........................................................................................28 Remote Wakeup jumper. ...............................................................................................28 Reset Switch ..................................................................................................................29 LED PROG ...................................................................................................................29 Drivers installation..........................................................................................................30 Drivers installation..........................................................................................................30 Drivers installation..........................................................................................................31 Drivers installation..........................................................................................................31 Drivers installation..........................................................................................................32 Drivers installation..........................................................................................................32 Control Panel Terminal mode .....................................................................................34 Control Panel Options RS232 Setup .......................................................................35 Control Panel Options Disk Transfer .......................................................................36 Control Panel Options Slave File I/O .......................................................................37 Control Panel Spy Mode .............................................................................................38 Control Panel Programming Mode..............................................................................39

Copyright 2008 Future Technology Devices International Ltd

V-Eval Board Version 1.0

Reference
This document does not describe the hardware interfaces required to connect a microcontroller to a VNC1L device, nor does it provide application notes. The following documents are available from FTDI and other sources for this purpose:

Document reference
Vinculum Website

Description
The main website for the Vinculum family of USB Host Controllers http://www.vinculum.com Vinculum Embedded USB Host Controller IC Data Sheet http://www.vinculum.com Vinculum Embedded USB Host Controller IC Firmware User Manual http://www.vinculum.com FT2232D Data Sheet http://www.ftdichip.com Universal Serial Bus Specification Revision 2.0 USB Implementers Forum http://www.usb.org

DS_VNC1L-1A

Vinculum Firmware User Manual

FTDI FT2232

USB 2.0

Table 1.0

Document references.

Copyright 2008 Future Technology Devices International Ltd

V-Eval Board Version 1.0

1 Introduction
The V-Eval Kit is a hardware platform that designers can use to develop embedded USB host systems based on FTDIs VNC1L devices. Features include: Inbuilt VNC1L USB device programmer / terminal emulator / command monitor hardware. Two VNC1L USB Host / Slave ports. Generous Prototyping area for standard DIP and SIL devices. Multiple IO port connectors grouped by port name and/or function. LEDs and switches for user interaction. PS/2 keyboard and mouse ports. Downloadable programming, terminal emulation and debug monitor software. Downloadable HID class example project ( VNC1L controlled USB Rocket Launcher ) including PIC source code in C. The V-Eval kit includes the following hardware items as standard 1 x V-Eval development board. 1 x 5V/1A universal plug top PSU UK, US, European and Japanese versions available. 1 x USB A/B cable to connect to a host PC in programming / terminal emulation or debugging modes. 1 x USB gender changer for USB slave mode applications.

Before you proceed please check that all the contents of the package are not damaged. Ensure that your kit includes a proper version of power supply, depending on the region where you live V-Eval application software and project examples can be downloaded from: www.vinculum.com/prd_v-eval.htm

1.1

Handling the board


Static discharge precaution Without proper anti-static handling the board can be damaged. Therefore, take anti-static precautions while handling the board.

1.2

Environmental requirements
The V-Eval Board must be stored between -40C and 80C. The recommended operating temperature is between 0C and 55C

Copyright 2008 Future Technology Devices International Ltd

V-Eval Board Version 1.0

2 Board description
V-Eval Board is intended to use as a hardware platform for easy evaluation of FTDIs Vinculum VNC1 series embedded USB host devices. The V-Eval Board includes all the components you need to start developing USB host systems based on VNC1L devices.

2.1

V-Eval Board features


VNC1L Embedded USB host chip Two USB type A connectors for connecting to USB slave peripherals VNC1L IO port connectors grouped by port name and/or function. PS/2 Keyboard and Mouse connectors FT2232D dual USB-UART device for VNC1L programming & debug functions One USB type B connector for PC host connection to FT2232D. Five user-programmable LEDs. Two of them are driven by default firmware. Five user- programmable push-button switches.

2.2

Specifications
Board supply voltage: Board supply current: IO connectors power output: Dimensions: 4.75V 5.25V 60mA (with no USB devices on USB1 or USB2 port) 5V/150mA, 3.3V/150mA 130mm x 146mm x 15mm (L x W x H)

Copyright 2008 Future Technology Devices International Ltd

V-Eval Board Version 1.0

3 V-Eval Board components and interfaces.


This chapter describes the operational and connectivity information for V-Eval Board major components and interfaces.

Figure 3-1

V-Eval Board layout.

Copyright 2008 Future Technology Devices International Ltd

V-Eval Board Version 1.0

3.1

Block Diagram
Host USB1 CN2 Host USB2 CN3 Slave USB CN4

PS2 2 CN7

PS2 1 CN10

SPI IF

CH.A

VNC1L UART IF

74CBT3257

FT2232D
CH.B

FIFO IF

ADBUS[7..0]

ACBUS[6..0]

BDBUS[7..0]

Keyboard & LEDs

Prototype area

Figure 3-2

V-Eval Board block diagram.

Copyright 2008 Future Technology Devices International Ltd

PROG#,RESET

BCBUS

V-Eval Board Version 1.0

3.2

Functional Block Description.

3.2.1 Components.
Component VNC1L IC USB-UART bridge Configuration memory UART multiplexer 3.3V regulator 12MHz crystal 6MHz crystal Single 5V DC power supply Power switch Power source select Reset button Keyboard User LEDs Power LED A_RX LED A_TX LED B_RX LED PROG LED LEDs enable jumpers MODE-0 and MODE-1 jumpers (1) PS2 jumpers REMOTE WAKEUP VBUS jumpers USB terminal ON/OFF Notes (1) Board designator U2 U3 U4 U5 U1 Y1 Y2 CN1 SW1 JP9 SW2 SW3-SW7 LED6-LED10 LED1 LED3 LED4 LED5 LED2 JP10-JP14 JP1, JP2 JP4-JP7 JP3 JP15, JP16 JP8 Description VNC1L Embedded USB Host device FT2232D Dual USB UART/FIFO device

9346 Serial SPI EEPROM for FT2232 configuration data 74CBT3257 4-bit, 1to2, FET Multiplexer/Demultiplexer AIC1735-33 Ultra low dropout 3.3V voltage regulator 12MHz crystal for VNC1-L 6MHz crystal for FT2232D Board adapter for included 5V DC power supply Power On/Off switch Power source selection jumper. Push-button switch for manual reset of VNC1L device Five user push-button switches Five green user LEDs Green LED Green LED Yellow LED Green LED Red LED Enable/disable user-defined LEDs Monitor interface select jumpers PS2 interface enable jumpers. VNC1L remote wakeup jumper USB1, USB2 power bus enable jumpers USB terminal enable/disable jumper

refer to table 5-12 for more information about monitor interface configurations.

Table 3-1

V-Eval Board components.

Copyright 2008 Future Technology Devices International Ltd

10

V-Eval Board Version 1.0

3.2.2 Interfaces.
Component USB1, USB2
(2) (3)

Board designator CN2, CN3 CN10, CN7 CN12

Description VNC1L USB host ports 1&2 VNC1L PS2 ports 1&2 VNC1L SPI interface pins VNC1L UART interface pins VNC1-L FIFO interface pins VNC1L ADBUS IO port pins VNC1L ACBUS IO port pins VNC1L BDBUS IO port pins All of VNC1-L IO ports and PROG#, RESET# pins are brought on to this area

PS2-1, PS2-2 SPI (4) UART FIFO


(4)

CN9 CN5 CN6 CN8 CN11 -

(4)

AD[7..0] (4) AC[6..0] (4) BD[7..0] (4) Prototyping area (4) Notes (2) (3) (4)

When a VDSC firmware is loaded in to the VNC1L flash memory USB1 (CN2) connector is configured as a slave USB port. You need to use a gender changer supplied to connect this port to USB host port. PS2-1 (CN10) and PS2-2 (CN7) ports are not used in any of current VNC1Ls firmware versions. Those pins are shared between different areas and connectors on the board. You can use only one device at time connected to those pins.

Table 3-2

V-Eval Board interfaces.

Copyright 2008 Future Technology Devices International Ltd

11

V-Eval Board Version 1.0

4 Testing the board.


Make sure that the Power Select jumper JP9 is in P.S. position (pins 2&3 shorted). Connect the 5V DC/1A power supply included in V-Eval Kit to the power adapter connector (CN1), connect USB A/B cable to USB B connector (CN4) on V-Eval Board and to a free USB port on host PC. Switch SW1 to the ON position (towards board edge). LED1 POWER should now be on.

Figure 4-1

Power connector.

All of the board components draw power either directly from this 5V supply or from 3.3V regulator that is powered by this 5V supply. The V-Eval Board comes with VDAP Disk And Peripheral Firmware version pre-programmed in to the VNC1L program flash memory. After the power is applied to the board the POWER LED (LED1) illuminating and VNC1L (loaded with default firmware) starting to play 2 seconds LED pattern on user LEDs - LED7 and LED8. For more information about firmware functionality please refer to the Vinculum web site at http://www.vinculum.com/documents.html#vfwspecs in the Vinculum Firmware Specifications section.

Copyright 2008 Future Technology Devices International Ltd

12

V-Eval Board Version 1.0

5 Detailed description of board components. 5.1 Power select jumper JP9.

Figure 5-1

Power select jumper.

V-Eval Board can draw its power either from wall 5V/1A DC Power Supply or from USB B type connector (CN4) when connected to the host PC. To enable USB power supply feature, switch the jumper JP9 to USB position, pins 1&2 shorted (pin 1 has a rectangle shape on the bottom side of the board). Warning! Please remember that every device connected to the PC through USB port can draw NO MORE than 500mA from host PC 5V power bus.

Copyright 2008 Future Technology Devices International Ltd

13

V-Eval Board Version 1.0

5.2

ADBUS port connector CN6.

Figure 5-2

ADBUS port connector.

The VNC1Ls eight ADBUS pins are brought on to this connector. Additionally there are 5V, 3.3V and GND power pins. Signal pins are shared between other IO connectors and prototyping area on the board. For more information refer to the V-Eval Board schematics.
Signal name AD0
(5)

Connector pin number 1 2 3 4 5 6 7 8 9 10 11 12

VCN1L pin name ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 31 32 33 34 35 36 37 38

VCN1L pin number IO IO IO IO IO IO IO IO -

IO type

Description ADBUS port, data bit0 ADBUS port, data bit1 ADBUS port, data bit2 ADBUS port, data bit3 ADBUS port, data bit4 ADBUS port, data bit5 ADBUS port, data bit6 ADBUS port, data bit7 3.3V power rail. Ground pin 5V power rail. Ground pin

AD1 (5) AD2 AD3


(5) (5)

AD4 (5) AD5


(5)

AD6 (5) AD7


(5)

3.3V (6) GND 5V


(7)

GND Notes: (5) (6) (7)

All VNC1Ls IO pins can be driven either from 3.3V LVTTL or 5V True TTL logic levels. Those pins are shared between different areas and connectors on the board. You can use only one device at time connected to these pins. This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. This pin is connected to the boards 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus.

Table 5-1

ADBUS port connector CN6.

Copyright 2008 Future Technology Devices International Ltd

14

V-Eval Board Version 1.0

5.3

ACBUS connector CN8

Figure 5-3

ACBUS port connector CN8.

The VNC1Ls eight ACBUS pins are brought on to this connector. Additionally there are 5V, 3.3V and GND power pins. Signal pins are shared between other IO connectors and prototyping area on the board. For more information refer to the V-Eval Board schematics.
Signal name AC0
(8)

Connector pin number 1 2 3 4 5 6 7 8 9 10 11 12

VCN1L pin name ACBUS0 ACBUS1 ACBUS2 ACBUS3 ACBUS4 ACBUS5 ACBUS6 ACBUS7

VCN1L pin number 41 42 43 44 45 46 47 48

IO type IO IO IO IO IO IO IO IO -

Description ACBUS port data bit0 ACBUS port data bit1 ACBUS port data bit2 ACBUS port data bit3 ACBUS port data bit4 ACBUS port data bit5 ACBUS port data bit6 ACBUS port data bit7 3.3V power rail. Can be used to power external devices Ground pin 5V power rail. Can be used to power external devices Ground pin

AC1 (8) AC2


(8)

AC3 (8) AC4 AC5


(8) (8)

AC6 (8) AC7 3.3V GND 5V


(10) (8) (9)

GND Notes: (8)

(9) (10)

All VNC1Ls IO pins can be driven either from 3.3V LVTTL or 5V True TTL logic levels. Those pins are shared between different areas and connectors on the board. You can use only one device at time connected to these pins. This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. This pin is connected to the boards 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus.

Table 5-2

ACBUS port connector CN8

Copyright 2008 Future Technology Devices International Ltd

15

V-Eval Board Version 1.0

5.4

BDBUS port connector CN11.

Figure 5-4

BDBUS port connector CN11.

The VNC1Ls eight BDBUS pins are brought on to this connector. Additionally there are 5V, 3.3V and GND power pins. Signal pins are shared between other IO connectors and prototyping area on the board. For more information refer to the V-Eval Board schematics.

Signal name BD0 (11) BD1 (11) BD2


(11)

Connector pin number 1 2 3 4 5 6 7 8 9 10 11 12

VCN1L pin name BDBUS0 BDBUS1 BDBUS2 BDBUS3 BDBUS4 BDBUS5 BDBUS6 BDBUS7

VCN1L pin number 11 12 13 14 15 16 18 19

IO type IO IO IO IO IO IO IO IO -

Description BDBUS port data bit0 BDBUS port data bit1 BDBUS port data bit2 BDBUS port data bit3 BDBUS port data bit4 BDBUS port data bit5 BDBUS port data bit6 BDBUS port data bit7 3.3V power rail. Can be used to power external devices Ground pin 5V power rail. Can be used to power external devices Ground pin

BD3 (11) BD4


(11)

BD5 (11) BD6 BD7 3.3V GND 5V


(13) (11) (11) (12)

GND Notes: (11) (12) (13)

All VNC1Ls IO pins can be driven either from 3.3V LVTTL or 5V True TTL logic levels. Those pins are shared between different areas and connectors on the board. You can use only one device at time connected to these pins. This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. This pin is connected to the boards 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus.

Table 5-3

BDBUS port connector CN11

Copyright 2008 Future Technology Devices International Ltd

16

V-Eval Board Version 1.0

5.5

UART interface connector CN9.

Figure 5-5

UART interface connector CN9.

For easy connection to peripherals all UART pins are brought on to this connector. Additionally there are 5V, 3.3V and GND power pins. Signal pins are shared between other IO connectors and prototyping area on the board. For more information refer to the V-Eval Board schematics.
Signal name TXD
(14)

Connector pin number 1 2 3 4 5 6 7 8 9 10 11 12

VCN1L pin name ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 ACBUS0 -

VCN1L pin number 31 32 33 34 35 36 37 38 41 O I O I O I I I O -

IO type Transmit data Receive data

Description

RXD (14) RTS# CTS#


(14) (14)

Request To Send. Clear To Send. Data Terminal Ready. Data Set Ready. Data Carrier Detect. Ring Indicator. Transmit Enable. 3.3V power rail. Can be used to power external devices Ground pin 5V power rail. Can be used to power external devices

DTR# (14) DSR# (14) DCD# (14) RI# (14) TXDEN# (14) 3.3V GND 5V
(16) (15)

Notes: (14) (15) (16)

All VNC1Ls IO pins can be driven either from 3.3V LVTTL or 5V True TTL logic levels. Those pins are shared between different areas and connectors on the board. You can use only one device at time connected to these pins. This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. This pin is connected to the boards 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus.

Table 5-4

UART interface connector CN9

Copyright 2008 Future Technology Devices International Ltd

17

V-Eval Board Version 1.0

5.6

SPI interface connector CN12.

Figure 5-6

SPI interface connector CN12.

For easy connection to peripherals all Serial Peripheral Interface (SPI) pins are brought on to this connector. Additionally there are 5V, 3.3V and GND power pins. Signal pins are shared between other IO connectors and prototyping area on the board. For more information refer to the V-Eval Board schematics.
Signal name 3.3V GND 5V
(19) (18)

Connector pin number 1 2 3 4 5 6 7 8

VCN1L pin name

VCN1L pin number -

IO type

Description 3.3V power rail. Can be used to power external devices Ground pin 5V power rail. Can be used to power external devices SPI interface Clock signal. SPI interface Data In signal. SPI interface Data Out signal. SPI interface Chip Select signal. Ground pin

SCLK (17) SDI


(17)

ADBUS0 ADBUS1 ADBUS2 ADBUS3

31 32 33 34

O I O O -

SDO (17) CS (17) GND Notes: (17) (18) (19)

All VNC1Ls IO pins can be driven either from 3.3V LVTTL or 5V True TTL logic levels. Those pins are shared between different areas and connectors on the board. You can use only one device at time connected to these pins. This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. This pin is connected to the boards 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus.

Table 5-5

SPI Interface connector CN12

Copyright 2008 Future Technology Devices International Ltd

18

V-Eval Board Version 1.0

5.7

FIFO interface connector CN5

Figure 5-7

FIFO interface connector CN5.

For easy connection to peripherals all FIFO interface pins are brought on to this connector. Additionally there are 5V, 3.3V and GND power pins. Signal pins are shared between other IO connectors and prototyping area on the board. For more information refer to the V-Eval Board schematics.
Signal name D0 D1
(20) (20)

Connector pin number 1 2 3 4 5 6 7 8 9

VCN1L pin name ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 ACBUS0

VCN1L pin number 31 32 33 34 35 36 37 38 41

IO type IO IO IO IO IO IO IO IO O

Description FIFO interface Data Bit0. FIFO interface Data Bit1. FIFO interface Data Bit2. FIFO interface Data Bit3. FIFO interface Data Bit4. FIFO interface Data Bit5. FIFO interface Data Bit6. FIFO interface Data Bit7. FIFO interface control line. When low data is available to read on D[7..0] pins FIFO interface control line. When low data can be written to the D[7..0] pins Write latch signal. Active high Read latch signal. Active low 3.3V power rail. Can be used to power external devices Ground pin 5V power rail. Can be used to power external devices

D2 (20) D3 D4 D5 D6
(20) (20) (20) (20)

D7 (20) RXF# (20) TXE# (20) WR (20) RD# (20) 3.3V GND 5V (22) Notes: (20) (21) (22)
(21)

10 11 12 13 14 15

ACBUS1 ACBUS2 ACBUS3 -

42 43 44 -

O I I -

All VNC1Ls IO pins can be driven either from 3.3V LVTTL or 5V True TTL logic levels. Those pins are shared between different areas and connectors on the board. You can use only one device at time connected to these pins. This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. This pin is connected to the boards 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus.

Table 5-6

FIFO Interface connector CN5

Copyright 2008 Future Technology Devices International Ltd

19

V-Eval Board Version 1.0

5.8

Prototyping area

Figure 5-8

Prototyping area.

A prototype area consisting of an array of 800 0.1-inch pitch holes is provided. This area can be used to add custom components to the V-Eval Board. Connections to the 5V, 3.3 V planes and ground plane of the V-Eval Board are included. The silk-screen text on the board indicates which holes are connected to which planes. Only top-most row is connected to VNC1L IO ports, power and ground planes. All the other holes are not connected to anything on the board. Signal pins are shared between other IO connectors on the board. For more information refer to the V-Eval Board schematics.
Signal name GND 5V
(25)

Connector pin number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

VCN1L pin name ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 ACBUS0 ACBUS1 ACBUS2 ACBUS3 ACBUS4 ACBUS5 ACBUS6 BDBUS0 BDBUS1 BDBUS2 BDBUS3 BDBUS4 BDBUS5

VCN1L pin number 31 32 33 34 35 36 37 38 41 42 43 44 45 46 47 11 12 13 14 15 16 -

IO type Ground pin

Description

3.3V GND AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AC0 AC1 AC2 AC3 AC4 AC5

(24)

5V power rail. Can be used to power external devices 3.3V power rail. Can be used to power external devices Ground pin ADBUS port Data Bit0. ADBUS port Data Bit1. ADBUS port Data Bit2. ADBUS port Data Bit3. ADBUS port Data Bit4. ADBUS port Data Bit5. ADBUS port Data Bit6. ADBUS port Data Bit7. ACBUS port Data Bit0. ACBUS port Data Bit1. ACBUS port Data Bit2. ACBUS port Data Bit3. ACBUS port Data Bit4. ACBUS port Data Bit5/MODE0. ACBUS port Data Bit6/MODE1. Ground pin BDBUS port Data Bit0. BDBUS port Data Bit1. BDBUS port Data Bit2. BDBUS port Data Bit3. BDBUS port Data Bit4. BDBUS port Data Bit5.

IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO

(23)

18 19 20 21 22 23 24 25 26

AC6 (23) GND BD0 BD1 BD2 BD3 BD4 BD5

Copyright 2008 Future Technology Devices International Ltd

20

V-Eval Board Version 1.0

BD6 BD7 BC0 BC1 BC2 BC3 GND PROG# RESET# GND GND 3.3V
(24)

27 28 29 30 31 32 33 34 35 36 37 38 39 40

BDBUS6 BDBUS7 BCBUS0 BCBUS1 BCBUS2 BCBUS3 PROG# RESET# -

18 19 20 21 22 23 10 9 -

IO IO IO IO IO IO I I -

BDBUS port Data Bit6. BDBUS port Data Bit7. BCBUS port Data Bit0. BCBUS port Data Bit1. BCBUS port Data Bit2. BCBUS port Data Bit3. Ground pin VNC1L PROG# pin VNC1L RESET# pin Ground pin Ground pin 3.3V power rail. Can be used to power external devices 5V power rail. Can be used to power external devices Ground pin

5V (25) GND Notes: (23) (24) (25)

Refer to table xx for more information about firmware functionality of these pins. This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus. This pin is connected to the boards 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus.

Table 5-7

Prototyping area

Copyright 2008 Future Technology Devices International Ltd

21

V-Eval Board Version 1.0

5.9

USB1 interface CN2

Figure 5-9

USB1 interface CN2.

VNC1L USB1 transceiver pins are brought on this connector. Depending of firmware version this port can be configured as host or slave port.
Signal name 5V (26) USB1-DM USB1-DP GND Shield Notes: (26) Connector pin number 1 2 3 4 5, 6 VCN1L pin name USB1 DM USB1 DP 26 25 VCN1L pin number IO IO IO type Description 5V power rail. Can be used to power external devices USB1 transceiver, data line Minus USB1 transceiver, data line Plus Ground pin Connector shield. Connected to ground.

This pin is connected to the boards 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus.

Table 5-8

USB1 host/slave connector. CN2

5.10

USB2 interface CN3.

Figure 5-10

USB2 interface CN3.

VNC1L USB2 transceiver pins are brought on this connector. Depending of firmware version this port can be configured as host or slave port.
Signal name 5V (27) USB1-DM USB1-DP GND Shield Notes: (27) Connector pin number 1 2 3 4 5, 6 VCN1L pin name USB1 DM USB1 DP VCN1L pin number 29 28 IO IO IO type Description 5V power rail. Can be used to power external devices USB2 transceiver, data line Minus USB2 transceiver, data line Plus Ground pin Connector shield. Connected to ground.

This pin is connected to the boards 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus.

Table 5-9

USB2 host/slave connector. CN3

Copyright 2008 Future Technology Devices International Ltd

22

V-Eval Board Version 1.0

5.11

PS2-1 interface. CN10.

Figure 5-11

PS2 - 1 interface CN10.

VNC1L has a two PS2 interfaces. PS2 1 interface pins are brought on this connector. PS2 Keyboard or Mouse can be connected to this connector. Currently PS2 ports are not implemented in any of current firmware versions.
Signal name PS2-1 CLK PS2-1 DATA 5V
(28)

Connector pin number 5 1 4 3 2 6 7

VCN1L pin name BCBUS0 BCBUS1 -

VCN1L pin number 20 21 -

IO type O IO -

Description PS2 interface 1 clock signal. PS2 interface 1 data signal 5V power rail. Can be used to power external devices Ground pin Not Connected Not Connected Connector shield. Connected to ground.

GND NC NC Shield Notes: (28)

This pin is connected to the boards 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus.

Table 5-10 PS2-1 connector. CN10

Copyright 2008 Future Technology Devices International Ltd

23

V-Eval Board Version 1.0

5.12

PS2-2 interface. CN7.

Figure 5-12

PS2 - 2 interface CN7.

VNC1L has a two PS2 interfaces. PS2 2 interface pins are brought on this connector. PS2 Keyboard or Mouse can be connected to this connector. Currently PS2 ports are not implemented in any of current firmware versions.
Signal name PS2-2 CLK PS2-2 DATA 5V (29) GND NC NC Shield Notes: (29) Connector pin number 5 1 4 3 2 6 7 VCN1L pin name BCBUS2 BCBUS3 VCN1L pin number 22 23 IO type O IO Description PS2 interface 2 clock signal. PS2 interface 2 data signal 5V power rail. Can be used to power external devices Ground pin Not Connected Not Connected Connector shield. Connected to ground.

This pin is connected to the boards 5V power rail. External device can draw no more than 100mA when board is powered from power supply and no more than 50mA when the board is powered from USB power bus.

Table 5-11 PS2 - 2 connector. CN7

Copyright 2008 Future Technology Devices International Ltd

24

V-Eval Board Version 1.0

5.13

Monitor port mode select jumpers JP1, JP2

Figure 5-13

Monitor mode select jumpers JP1, JP2.

Those jumpers provide an interface type selection for VNC1L command monitor. For more information about command monitor port modes please refer to VNC1L Firmware manual at http://www.vinculum.com/documents.html#vfwspecs
JP1 Pin 1,2 (30) SHORTED SHORTED OPENED OPENED Notes: (30) (31) Pin3,4 OPENED OPENED SHORTED SHORTED Pin 1,2 (30) SHORTED OPENED SHORTED OPENED JP2 Pin 3,4 OPENED SHORTED OPENED SHORTED UART (31) FIFO (31) SPI (31) UART (31)

Interface type

Pin No.1 has a rectangle shape on the bottom side of the board. For more detailed information about interface modes please refer to the VNC1L data sheet.

Table 5-12 Monitor interface type selection jumpers JP1, JP2

Copyright 2008 Future Technology Devices International Ltd

25

V-Eval Board Version 1.0

5.14

User LEDs. LED6 LED10.

Figure 5-14

User LEDs.

Five green LEDs is provided on board. LED7 & LED8 are controlled by default firmware. LED6, LED9, LED10 can be driven by using IOW (IO Write) command. For more information about IOW command please refer to VNC1L Firmware manual at http://www.vinculum.com/documents.html#vfwspecs

Designator LED6 LED7 LED8 LED9 LED10

VCN1L pin name BDBUS4 BDBUS5 BDBUS6 BDBUS7 ACBUS5

VCN1L pin number

Table 5-13 User LEDs connections.

5.15

LED enable/disable jumpers JP10 JP14.

Figure 5-15

LED Enable/Disable jumpers.

Every user-defined LED have an enable/disable jumper. When jumper is closed LED will be illuminate when driven low by one of the VNC1L pins. When jumper is opened LED is disconnected from the VCN1L pin.
Designator JP10 JP11 JP12 JP13 JP14 LED6 LED7 LED8 LED9 LED10 LED affected

Table 5-14 LED Enable/Disable jumpers.

Copyright 2008 Future Technology Devices International Ltd

26

V-Eval Board Version 1.0

5.16

User push button switches

Figure 5-16

User push button switches.

Push button switches connected straight to VNC1L pins. When switch is pressed down, logic LOW appears on VNC1Ls corresponding pin. The state of the SW3 SW7 can be read by using IOR (IO Read) command. For more information about IOR command please refer to VNC1L Firmware manual at http://www.vinculum.com/documents.html#vfwspecs
Designator SW3 SW4 SW5 SW6 SW7 VNC1L pin name BDBUS0 BDBUS1 BDBUS2 BDBUS3 ACBUS6 11 12 13 14 47 VNC1L pin number

Table 5-15 User Switches

5.17

Host USB power jumpers JP15, JP16.

Figure 5-17

USB power enable jumpers.

When either USB1 and/or USB2 ports are used as a host ports, the jumpers JP15 and/or JP16 accordingly should be closed to allow peripheral devices to draw power from boards +5V power rail. Warning! When you intended to use these ports as a USB slave ports you need to remove shunts from jumpers JP15, JP16. Failed to do so can cause damage either to the computer or to the V-Eval Board.

Copyright 2008 Future Technology Devices International Ltd

27

V-Eval Board Version 1.0

5.18

PS2-1, PS2-2 Enable jumpers JP4, JP5, JP5, JP6.

Figure 5-18

USB power enable jumpers.

These jumpers are provided to connect/disconnect PS2 ports from VNC1L device. Currently PS2 ports are not used in any firmware versions. Make sure that JP4, JP5, JP6 and JP7 are left opened.
Designator JP4 JP5 JP6 JP7 PS2-2 Data PS2-2 Clk PS2-1 Data PS2-1 Clk Signal name BCBUS3 BCBUS2 BCBUS1 BCBUS0 VNC1L pin

Table 5-16 PS2 enable jumpers

5.19

Remote Wakeup jumper JP3.

Figure 5-19

Remote Wakeup jumper.

Some versions of firmware are putting VNC1L device in to the Suspend Monitor (SUM) mode when it is idle to reduce the power consumption. To wakeup VNC1L every time data is arrived on its RXD pin JP3 jumper is provided to connect together RXD and RI# pins. When RI# pin is driven low, VNC1L will resume from the SUM mode immediately. To enable remote wakeup feature place shunt on jumper JP3.

Copyright 2008 Future Technology Devices International Ltd

28

V-Eval Board Version 1.0

5.20

Reset Push-button Switch

Figure 5-20

Reset Switch

To manually reset VNC1L device a RESET Push-button switch SW2 is provided.

5.21

PROG LED

Figure 5-21

LED PROG

This red LED is provided to indicate that VNC1L is in Flash programming mode.

Copyright 2008 Future Technology Devices International Ltd

29

V-Eval Board Version 1.0

6 Connecting to host PC
Connect USB A/B cable to boards CN4 USB connector. Connect the other end of cable to a free USB connector on your computer. Power up the board. The new hardware will be detected and Found New Hardware Wizard will run.

6.1

Drivers installation.

Figure 6-1

Drivers installation

Please select the No, not this time option and click Next button.

Figure 6-2

Drivers installation

Select Install from specific location (Advanced) option and click Next button.

Copyright 2008 Future Technology Devices International Ltd

30

V-Eval Board Version 1.0

Figure 6-3

Drivers installation

Click Browse button, navigate to drivers directory and click Next button.

Figure 6-4

Drivers installation

Click Continue Anyway button.

Copyright 2008 Future Technology Devices International Ltd

31

V-Eval Board Version 1.0

Figure 6-5

Drivers installation

The driver files will now be copied to your system.

Figure 6-6

Drivers installation

Click Finnish button to complete installation.

Copyright 2008 Future Technology Devices International Ltd

32

V-Eval Board Version 1.0

The USB device built into the V-Eval Board is a composite USB device. It has two USB Serial Converters and two USB Serial Ports. After you click Finish, a new Found New Hardware Wizard window appears asking to install drivers for another device. This is for the USB Serial Converter B part of the composite USB device. Follow the same instructions as above to install the drivers for this device. The Found New Hardware Wizard will appears two times more. This is to install the drivers for the USB Serial Port. Again, follow the same instructions above to install the drivers for this device. For more information about drivers installation please refer to the FTDIs web site at http://www.ftdichip.com/Drivers/D2XX.htm You can find a drivers installation guide is at http://www.ftdichip.com/Documents/InstallGuides.htm

Copyright 2008 Future Technology Devices International Ltd

33

V-Eval Board Version 1.0

7 V-Eval Board Control Panel application.


To demonstrate basic functions of the V-Eval Board the CD-ROM containing Control Panel application is supplied. Please run program VEval.exe. Form the drop-down list at the top of program window select V-Eval-1 Board port. Click Open button to open communication channel between V-Eval Board and Control Panel application. Control Panel can work in one of three modes:

7.1

Terminal Mode

This mode works similarly to Hyper Terminal program. Additionally there are few options to control the VNC1L device. Upper window is for sending commands and data to VNC1L device and displaying responses from it. Every character you type in this window will be immediately sent over USB Serial Port to VNC1L device monitor port. Lower window displays all communication traffic in HEX format. On right hand side of Control Panel window additional options to control the VNC1L device are provided.

7.1.1 Options - Mode tab

Figure 7-1

Control Panel Terminal mode

Reset VNC1 if you click this option the Control Panel will put VNC1L in reset state by pulling its RESET pin low. Run VNC1 click this option to release VNC1L from reset state by pulling RESET pin high. Suspend this option will put VNC1L device in suspend state. Resume button click this button to resume VNC1L device from suspend state. Command Mode when this option is enabled the VNC1L DSR# pin is pulled high by the Control Panel App. You can send commands to VNC1L monitor port to configure communication parameters or to configure a suitable FTDI device connected to USB1 port on V-Eval Board. Access to Flash Disk connected to USB2 port on V-Eval Board is also allowed.

Copyright 2008 Future Technology Devices International Ltd

34

V-Eval Board Version 1.0

Data Mode if this option is enabled the VNC1L is in data mode. The DSR# pin of VNC1L is pulled low. This mode is provided to send/receive data to/from any device connected to USB1 or USB2 ports on VNC1L EVB. The VNC1L will act like a bridge between device connected to his USB host ports and Control Panel Application. The commands will not be interpreted and executed by VNC1L command monitor. Enable RTS this option enables serial interface of Control Panel. V-Eval Board can send data to Control Panel receive buffer. Disable RTS if this option is checked the V-Eval Board is not allowed to send data to Control Panel App.

7.1.2 Options - RS232 Setup tab:

Figure 7-2

Control Panel Options RS232 Setup

Here you can change communication interface baudrate. Select desired baurate from BaudRate dropdown list and click Set button.

Copyright 2008 Future Technology Devices International Ltd

35

V-Eval Board Version 1.0

7.1.3 Options - Disk Transfer tab

Figure 7-3

Control Panel Options Disk Transfer

This tab is provided to demonstrate file transfer between Flash Disk connected to USB2 port on V-Eval Board and Control Panel App. Send File (OPW/WRF) button click this button to open the Open File dialog window. Navigate to file that you want to send to Flash Disk and click OK. First OPW (Open File For Writing) command is sent to VNC1L device if specified file name is not on Flash Disk, VNC1L device is creating the new file and open it for writing. Then WRF (Write File) command is sent followed by value of Block Size to use for Write edit box or if the Use File Size check box is checked the size of file is sent after the WRF command. After the prompt is received from VNC1L device the file contents are sent to Flash Disk. If Use File Size check box is checked entire file is sent to Flash Disk in one chunk of data. Receive File (RD) button click this button to specify name of file to read to (file with the same name must be on Flash Disk) click OK. The contents of file specified will be read back to your PCs hard disk. Receive File (OPR/RDF) button this button works similarly to Read File (RD) except you can specify Block Size to use for Read to read the file in specified pieces of data or check Use File Size to read entire file in one chunk of data.

Copyright 2008 Future Technology Devices International Ltd

36

V-Eval Board Version 1.0

7.1.4 Options - Slave File I/O tab

Figure 7-4

Control Panel Options Slave File I/O

This tab demonstrates ability to transfer data between an FTDI (FT232, FT245, FT2232) device connected to USB1, USB2 port on V-Eval Board and Control Panel App. Before data transmission is possible you need to Set Current (SC) device and switch VNC1L to data mode. Send File button click this button, navigate to file you want to sent and click OK. File will be sent to FT2xx slave device on USB1 port of V-Eval Board. Rcv File button click this button to open the Open File dialog and set the name of file you want to receive, Click OK. All data received from FT2xx device connected to USB1 or USB2 port on V-Eval Board will be saved on your PCs hard disk. After the file has been received please click Close File button.

Copyright 2008 Future Technology Devices International Ltd

37

V-Eval Board Version 1.0

7.2

Spy Mode

Figure 7-5

Control Panel Spy Mode

This mode is intended to track all communication between V-Eval Board and other serial device (e.g. Microcontroller) connected to V-Eval Board. To open spy select desired baudrate from drop-down list and click Set button, then click Open Spy button. You can change the baudrate when spy is already opened. Simply select new baurate and click Set button. Upper window displays data in ASCII format. All data received by VNC1L device is displayed in red colour and all data transmitted by VNC1L device is displayed in blue colour. Lower window displays data in HEX format for debug purposes. Like in ASCII window all data received by VNC1L device is displayed in red and all data transmitted by VNC1L is displayed in blue. If Track Commands check box is checked all decoded commands and answers will be displayed in green colour. You need to setup the Extended Cmd Set or Short Cmd Set and Input is Hex or Input is ASCII to spy to work properly, according to V-Eval Board communication parameters.

Copyright 2008 Future Technology Devices International Ltd

38

V-Eval Board Version 1.0

7.3

Programming Mode

Figure 7-6

Control Panel Programming Mode

You can reprogram VNC1L devices Flash Program Memory using this mode. The interface is very straight forward, and all reprogramming process is done automatically. Simply click Select File button, navigate to VNC1Ls ROM file and then click Program button.

Copyright 2008 Future Technology Devices International Ltd

39

V-Eval Board Version 1.0

8 V-Eval Board Schematics.


The V-Eval Board schematics can be found at the end of this document.

Copyright 2008 Future Technology Devices International Ltd

40

V-Eval Board Version 1.0

9 Contact Information
Head Office - Glasgow, UK
Future Technology Devices International Limited 373 Scotland Street Glasgow G5 8QB United Kingdom Tel: +44 (0) 141 429 2777 Fax: +44 (0) 141 429 2758 E-Mail (Sales): vinculum.sales@ftdichip.com E-Mail (Support): vinculum.support@ftdichip.com E-Mail (General Enquiries): admin1@ftdichip.com Web Site URL: http://www.vinculum.com Web Shop URL: http://apple.clickandbuild.com/cnb/shop/ftdichip

Branch Office - Taiwan


Future Technology Devices International Limited (Taiwan) 4F, No 16-1, Sec. 6 Mincyuan East Road Neihu District Taipei 114 Taiwan, R.O.C. Tel: +886 2 8791 3570 Fax: +886 2 8791 3576 E-Mail (Sales): tw.sales1@ftdichip.com E-Mail (Support): tw.support1@ftdichip.com E-Mail (General Enquiries): tw.admin1@ftdichip.com Web Site URL: http://www.vinculum.com

Branch Office - Hillsboro, Oregon, USA


Future Technology Devices International Limited (USA) 7235 NW Evergreen Parkway, Suite 600 Hillsboro, OR 97124-5803 USA Tel: +1 (503) 547-0988 Fax: +1 (503) 547-0987 E-Mail (Sales): us.sales@ftdichip.com E-Mail (Support): us.support@ftdichip.com E-Mail (General Enquiries): us.admin@ftdichip.com Web Site URL: http://www.vinculum.com

Distributors and Sales Representatives


Please visit the Sales Network page of the FTDI Web site for the contact details of our distributor(s) in your country.

Copyright 2008 Future Technology Devices International Ltd

41

VCC3V3

VCC3V3 FB1 LED2 Red Programming Mode R4 330R VCC5V C6 100nF 600R/0.5A C7 10uF JP15 SIP2 CN2 1 VBUS 2 D3 D+ 4 GND CR1 CR2 USB SKT A

FB2 600R/0.5A

GND USB1DM USB1DP C9 47pF C10 47pF

C8 100nF

AD[7..0]

AD[7..0]

GND AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 31 32 33 34 35 36 37 38 (ADBUS0) (ADBUS1) (ADBUS2) (ADBUS3) (ADBUS4) (ADBUS5) (ADBUS6) (ADBUS7) (ACBUS0) (ACBUS1) (ACBUS2) (ACBUS3) (ACBUS4) (ACBUS5) (ACBUS6) (ACBUS7) (BDBUS0) (BDBUS1) (BDBUS2) (BDBUS3) (BDBUS4) (BDBUS5) (BDBUS6) (BDBUS7)

VCORE

VCCIO VCCIO VCCIO

AVCC

U2 VNC1-1L

R5 R6 10k 10k

17 30 40

PROG#

USB1DM USB1DP

26 25

R7 27R R8 27R

USB1DM 2xPGB1010603 GND USB1DP FB3 VCC5V USB2DM USB2DP GND USB2DM USB2DP RESET# PROG# RESET# PROG# C13 47pF C14 47pF C11 100nF 600R/0.5A C12 10uF JP16 SIP2 CN3 1 VBUS 2 D3 D+ 4 GND CR3 CR4 USB SKT A SHLD

AC[6..0] B

AC[6..0]

USB2DM USB2DP

29 28

R9 27R R10 27R

BD[7..0]

BD[7..0]

AC0 41 AC1 42 AC2 43 44 AC3 AC4 45 AC5 46 47 AC6 PLL_EN 48 BD0 BD1 BD2 BD3 BD4 BD5 BD6 BD7 BC0 BC1 BC2 BC3 11 12 13 14 15 16 18 19 20 21 22 23

RESET PROG

9 10

2xPGB1010603 GND PLLFLTR XTIN 7 4 1 Y1 12MHz C R11 180R C16 68pF C17 68pF C15 1nF C18 10nF R12 47k AC5 AC6 Interface mode select jumpers: VCC3V3 GND MODE0 | MODE1 | Interface type 0 | 0 | SERIAL UART 0 | 1 | SPI 1 | 0 | FIFO 1 | 1 | SERIAL UART GND Title JP1 JP2 R13 47k VCC3V3 Interface type configuration jumpers SHLD

BC[3..0] C

BC[3..0]

(BCBUS0)/PS2CLK1 (BCBUS1)/PS2DATA1 (BCBUS2)/PS2CLK2 (BCBUS3)/PS2DATA2 AGND GND GND GND GND

XTOUT TEST

5 8

1 24 27 39

PLL_EN AD1 R14 47k Remote Wakeup JP3 SIP2 AD7

C19 C20 C21 C22 100nF 100nF 100nF 100nF

C23 47uF

SIP3 MODE0 GND

SIP3 MODE1

GND Future Technology Devices International Ltd. 373 Scotland Street Glasgow, G5 8QB United Kingdom Tel: +44 (0) 141 429 2777 www.ftdichip.com 4 D

D XL1 XL2 XL3

GND

Decoupling capacitors. Place close to IC XL4 XL5

V-Eval-1 Board VNC1L Block


Number: 1 Revision: 1 Sheet 1 of 5

Size: A4

Date: 13/02/2008 Time: 09:31:07 JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm 1 2 File: VNC1L_Eval.SchDoc 3

VCC3V3 VCC5V A CN6 RP1 8x10k 12 11 10 9 8 7 6 5 4 3 2 1 GND C40 10uF C41 100nF GND VCC3V3 VCC5V CN8 RP2 8x10k 12 11 10 9 8 7 6 5 4 3 2 1 GND C48 10uF C49 100nF GND VCC3V3 VCC5V

VCC3V3 VCC5V CN5 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 GND A

VCC3V3 C36 100nF GND C37 10uF

VCC5V C38 10uF C39 100nF GND J1 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 PROTOTYPE_AREA

IO_AD7 IO_AD6 IO_AD5 IO_AD4 IO_AD3 IO_AD2 IO_AD1 IO_AD0 VCC5V

AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0

Header 12 GP PORT AD[7..0]

IO_AC3 IO_AC2 IO_AC1 IO_AC0 IO_AD7 IO_AD6 IO_AD5 IO_AD4 IO_AD3 IO_AD2 IO_AD1 IO_AD0 VCC3V3 C44 10uF

WR RD# TXE# RXF# D7 D6 D5 D4 D3 D2 D1 D0

VCC5V FB5 C42 C43 R34 100nF 10uF 4k7 GND IO_BC3 JP4 SIP2 IO_BC2 JP5 SIP2 R38 100R R43 100R C46 47pF C47 47pF CR7 CR8 CN7 1 2 3 4 5 6 S CN_PS2-6PIN R35 4k7 600R/0.5A

Header 16 FIFO INTERFACE

IO_RESET# IO_PROG# BC3 BC2 BC1 BC0 BD7 BD6 BD5 BD4 BD3 BD2 BD1 BD0 AC6 AC5 AC4 AC3 AC2 AC1 AC0 AD7 AD6 AD5 AD4 AD2 AD0 R36 R37 R39 R40 R41 R42 R44 R45 R46 R47 R48 R49 R50 R51 R52 R53 R54 R55 R56 R59 R60 R61 R62 R63 100R R65 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R IO_BC3 IO_BC2 IO_BC1 IO_BC0 IO_BD7 IO_BD6 IO_BD5 IO_BD4 IO_BD3 IO_BD2 IO_BD1 IO_BD0 IO_AC6 IO_AC5 IO_AC4 IO_AC3 IO_AC2 IO_AC1 IO_AC0 IO_AD7 IO_AD6 IO_AD5 IO_AD4 IO_AD3 IO_AD2 IO_AD1 IO_AD0

C45 100nF GND

VCC3V3 VCC5V CN9 AC6 AC5 AC4 AC3 AC2 AC1 AC0 12 11 10 9 8 7 6 5 4 3 2 1 GND

IO_AC6 IO_AC5 IO_AC4 IO_AC3 IO_AC2 IO_AC1 IO_AC0 VCC5V

Header 12 GP PORT AC[6..0]

IO_AC0 IO_AD7 IO_AD6 IO_AD5 IO_AD4 IO_AD3 IO_AD2 IO_AD1 IO_AD0 VCC3V3 C52 10uF

TXDEN# RI# DCD# DSR# DTR# CTS# RTS# RXD TXD

2xPGB1010603 GND VCC5V FB6 C50 C51 R57 100nF 10uF 4k7 GND R58 4k7 600R/0.5A SHLD PS2 MOUSE

Header 12 UART INTERFACE

C53 100nF GND

IO_BC1

JP6 SIP2

R64 100R R66 100R C58 47pF C59 47pF CR9 CR10

CN10 1 2 3 4 5 6 S CN_PS2-6PIN C

CN11 RP3 8x10k 12 11 10 9 8 7 6 5 4 3 2 1 GND C60 10uF C61 100nF VCC3V3 GND GND IO_BC0 VCC3V3 VCC5V BD7 BD6 BD5 BD4 BD3 BD2 BD1 BD0

JP7 SIP2

C56 C57 100nF 10uF GND

C54 100nF GND

C55 10uF GND

IO_BD7 IO_BD6 IO_BD5 IO_BD4 IO_BD3 IO_BD2 IO_BD1 IO_BD0 VCC5V

CN12 1 2 3 4 5 6 7 8 2xPGB1010603 GND SCLK SDI SDO CS SHLD PS2 KEYBOARD

Header 12 GP PORT BD[7..0]

IO_AD0 IO_AD1 IO_AD2 IO_AD3

Header 8 SPI INTERFACE

IO_AD1 IO_AD3 IO_RESET# IO_PROG#

IO_AD1 IO_AD3 IO_RESET# IO_PROG#

C62 10uF

C63 100nF GND

D AD[7..0] AC[6..0] BD[7..0] BC[3..0] AD[7..0] AC[6..0] BD[7..0] XL7 BC[3..0] JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm 1 2 3 4 5 XL8 XL9 XL10 Title

V-Eval-1 Board IO Connectors


Number: 2 Revision: 1 Sheet 2 of 5

Future Technology Devices International Ltd. 373 Scotland Street Glasgow, G5 8QB United Kingdom Tel: +44 (0) 141 429 2777 www.ftdichip.com 7 8

Size: A3

Date: 13/02/2008 Time: 09:31:57 File: VNC1L_Eval_IO.SchDoc 6

VBUS JP9 SW1 VCC5V U1 AIC1735-33CY/PY Vin Vout R1 220R C3 10uF C4 100nF LED1 Green B GND C1 47uF C2 100nF VCC3V3

SW-SPDT SIP3

3 2 1 Power Jack 2.1mm GND

CN1

R2

GND

POWER ON

No fit 1M C5 No fit 1nF/250V GND SHLD Shields to system ground connection, at power jack only C R3 0R GND SHLD C

FID1 FID_MARK D FID3 FID_MARK

FID2 FID_MARK FID4 FID_MARK

MH1 Mounting hole 3.5mm MH3 Mounting hole 3.5mm

MH2 Mounting hole 3.5mm MH4 Mounting hole 3.5mm LOG1 Vinculum Logo Logo Vinculum 15mm JUMPER-2.54mm XL16 Title

V-Eval-1 Board Power Supply


Number: 5 Revision: 1 Sheet 5 of 5

Future Technology Devices International Ltd. 373 Scotland Street Glasgow, G5 8QB United Kingdom Tel: +44 (0) 141 429 2777 www.ftdichip.com 4

Size: A4

Date: 13/02/2008 Time: 09:32:32 File: VNC1L_Eval_PWR.SchDoc 3

VCC3V3 User LEDs R73 100R B RESET# R74 100R R75 100R R76 100R SW2 SW3 SW4 SW5 SW6 R78 100R R72 100R SW7 R82 R83 GND GND GND GND GND GND LED Enable jumpers LOCAL KEYBOARD BD[7..0] C AC[6..0] 220R 220R AC6 R81 220R BD3 R80 220R BD2 BD1 BD0 LED10 Green LED9 Green LED8 Green LED7 Green LED6 B Green R79 220R JP10 SIP2 JP11 SIP2 JP12 SIP2 JP13 SIP2 JP14 SIP2 BD4 BD5 BD6 BD7 AC5

BD[7..0] C AC[6..0]

D XL11 XL12 XL13 XL14 XL15

Title

V-Eval-1 Board Keyboard & LEDs


Number: 3 Revision: 1 Sheet 3 of 5

Future Technology Devices International Ltd. 373 Scotland Street Glasgow, G5 8QB United Kingdom Tel: +44 (0) 141 429 2777 www.ftdichip.com 4

Size: A4

Date: 13/02/2008 Time: 09:32:59 JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm JUMPER-2.54mm 1 2 File: VNC1L_Eval_KBRD_LEDS.SchDoc 3

VBUS

VCC5V

VCC3V3

VCC3V3

R15 470R

C27 10uF

C28 C29 R16 R17 100nF 100nF 10k 10k

LED3 Green R18 220R A_RXLED# A_TXLED# B_RXLED#

LED4 Yellow R19 220R

LED5 Green

GND C65 10nF CN4 VBUS DD+ GND USB SKT-B CR5 R27 0R B SHLD GND R28 10k GND R31 20k CR6 C32 47pF C33 47pF C34 43 27pF C35 27pF FT_RESET# 4 48 VCC5V U4 8 7 6 5 VCC NC X16 GND CS SK DIN DOUT GND R32 10k 1 2 3 4 1 2 47 RESET EECS EESK EEDATA AGND GND GND GND GND TEST BCBUS0 BCBUS1 BCBUS2 BCBUS3 SI/WU B PWREN FT2232D B_RI# GND GND AD1 AD[7..0] AD[7..0] AD3 RESET# PROG# 1 VCC5V Y2 6MHz 44 XTOUT XTIN 1 2 3 4 GND GND GND GND R23 27R R25 27R R26 1k5 5 RSTOUT 8 7 C24 10uF C25 C26 100nF 100nF C30 100nF C31 100nF 6 U3 3V3OUT USBDM USBDP 3 42 14 31 46

R20 220R

ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 ACBUS0 ACBUS1 ACBUS2 ACBUS3 SI/WU A BDBUS0 BDBUS1 BDBUS2 BDBUS3 BDBUS4 BDBUS5 BDBUS6 BDBUS7

24 23 22 21 20 19 17 16 15 13 12 11 10 40 39 38 37 36 35 33 32 30 29 28 27 26 41

VCC VCC

VCCIOA VCCIOB

AVCC

R21 R22 R24

100R 100R 100R

A_TXD AD0 A_RTS# AD2 AD5 AD4 AD6 AD7

2xPGB1010603

A_RXLED# A_TXLED#

RESET# PROG# IO_AD1

RESET# PROG# IO_AD1 IO_AD3 IO_RESET# IO_PROG#

R29 R30

100R 100R

AD1 B_RTS# B_DTR# B_RI#

IO_AD3 IO_RESET# IO_PROG#

B_RXLED#

VCC3V3

VCC5V

R33 2k2

45

9 18

25 34

R67 10k 15 1 R68 100R R69 100R R70 100R R71 100R 4 7 9 12 8

C64 100nF U5 OE S 1A 2A 3A 4A GND SN74CBT3257D VCC 1B1 1B2 2B1 2B2 3B1 3B2 4B1 4B2 16 GND 2 3 5 6 11 10 14 13 A_TXD IO_AD1 A_RTS# IO_AD3 B_RTS# IO_RESET# B_DTR# IO_PROG#

EEPROM_93C46

JP8 R77 100R D GND SIP3 XL6 B_RI# Title GND

V-Eval-1 Board FT2232D Interface


Number: 4 Revision: 1 Sheet 4 of 5

Future Technology Devices International Ltd. 373 Scotland Street Glasgow, G5 8QB United Kingdom Tel: +44 (0) 141 429 2777 www.ftdichip.com 4

Size: A4

Date: 13/02/2008 Time: 09:33:30 JUMPER-2.54mm 1 2 File: VNC1L_Eval_FT2232D_IF.SchDoc 3

S-ar putea să vă placă și