ABSTRACT

KUANG, WEIWEI. TCAD Simulation and Modeling of AlGaN/GaN HFETs. (Under the direction of Dr. Robert J. Trew and Dr. Griff L. Bilbro).

This work focused on the TCAD simulation and modeling of AlGaN/GaN HFETs. AlGaN/GaN HFETs have demonstrated excellent RF performance, which benefits from the high sheet charge density in these hetero-structures, the high carrier mobility and saturation velocity in the channel, and the high breakdown voltage inherent in the GaN material. However, these devices experience physical phenomena that degrade their performance.

In particular, AlGaN/GaN HFETs often demonstrate Cgs variations with input power drive that are opposite to classical FET behavior. The transconductance is also degraded at high current levels. The behavior affects the frequency performance and linearity of the device. It has been numerically confirmed in this work that the nonlinear source resistance due to the on-set of space charge limited current transport condition existing in AlGaN/GaN HFETs is the origin of the extrinsic gm and Cgs degradation at high drain current levels.

AlGaN/GaN HFETs suffer from large gate leakage and reliability problems where dc drain current and RF output power are degraded as a function of stress time. In this work, TCAD simulations were performed to reproduce the measured bias-dependent and stress time-dependent drain current and gate current characteristics of AlGaN/GaN HFETs with excellent accuracy. A surface electron hopping model is proposed to explain the gate

leakage and the reliability problem associated with the high voltage operation of AlGaN/GaN HFETs. According to the model, electrons that tunnel from the gate can accumulate at the gate edge on the drain side and/or travel along the AlGaN surface toward the drain through a trap-to-trap hopping mechanism. The extracted value for the activation energy of the surface traps is in the range G = 0.25~0.35eV, which is consistent with the measured energy level associated with nitrogen vacancies and/or dangling bonds in the device.

A discussion of the AlGaN/GaN HFET device design and optimization was also presented in this work. It is suggested that reduced gate-to-source spacing can be used to reduce the nonlinear source resistance and to improve RF performance and linearity of the device. Various techniques including processing methods (using passivation to reduce or immobilize the surface states), field engineering methods (using field plates) and polarization control methods (using a GaN cap layer above the AlGaN layer, or growing the device in M-plane, or using a lower AlN mole fraction in AlGaN) can be employed to mitigate the large gate leakage current and reliability problems.

TCAD Simulation and Modeling of AlGaN/GaN HFETs

by Weiwei Kuang

A dissertation submitted to the Graduate Faculty of North Carolina State University In partial fulfillment of the Requirements for the degree of Doctor of Philosophy

Electrical Engineering

Raleigh, North Carolina March 2008

APPROVED BY:

_______________________________ Dr. Robert J. Trew Committee Chair

______________________________ Dr. Griff L. Bilbro Committee Co-Chair

_______________________________ Dr. Doug Barlage

______________________________ Dr. Zhilin Li

DEDICATION

Dedicated to my professors, family and friends

ii

BIOGRAPHY
Weiwei Kuang was born in Gaoan, China on June 15th, 1980. He graduated from the Affiliated High School of Jiangxi Normal University, China and attended Beijing University of Aeronautics and Astronautics, China in 1997. Upon his graduation with a Bachelor of Engineering degree in Materials Science and Engineering, he enrolled as a Master student in Singapore-MIT Alliance, a collaborated program between the National University of Singapore and Massachusetts Institute of Technology, Cambridge. He got his Master of Science degree in Advanced Materials for Micro- and Nano- Systems in 2002 and attended the Department of Electrical and Computer Engineering at North Carolina State University in Jan. 2003 as a Ph.D. student under the supervision of Dr. Robert J. Trew and Dr. Griff L. Bilbro. His Ph.D. research focused on the physics based TCAD simulation and modeling of AlGaN/GaN HFETs. He was a Device Engineer Intern at RF Micro Devices, Greensboro, NC during the fall semester of 2006. His research interests are physics-based solid-state device modeling/simulation and IIIV materials and devices.

iii

ACKNOWLEDGMENTS
I would like to thank my advisors, Dr. Robert J. Trew and Dr. Griff L. Bilbro. They have given me inspiration and a lot of guidance, as well as encouragement and support. They always kept me motivated and showed me what it is like to be a good researcher. What I learnt from them inspired me during my five years of research here and will help through my future career. I am so fortunate to be their students and it benefits me for my whole life. I would like to thank Dr. Doug Barlage for providing helpful suggestions and insights during my Ph.D. research, and for his encouragement and support. I also thank Dr. Zhilin Li, for serving as my committee member, and for his precious time in reviewing my thesis.

I would also like to thank other members of my research group, Yueying Liu, Ryan Schimizzi, Hong Yin and Danqiong Hou, for their support. I benefit from the discussions with them. Ryan is the first reader and commenter of this thesis, I really appreciate his help.

Special thanks and appreciation are given to my good friends here at NC State. Their encouragement, care and help made my life here enjoyable.

I am always indebted to my family. This work can not be done without their love, encouragement and support.

iv

TABLE OF CONTENTS

LIST OF FIGURES LIST OF TABLES

..................................... .....................................

ix xiv

Chapter 1
1.1 1.2 1.3 1.4 1.5 References

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GaN based high power devices . . . . . . . . . . . . . . . . . . . . . . . . . . . Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Original contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ....................................................

1 1 2 3 4 5 7

Chapter 2
2.1 2.2 2.2.1 2.2.2

Background. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Polarization in AlGaN/GaN HFETs . . . . . . . . . . . . . . . . . . . . . . . Surface states and defects in AlGaN/GaN HFETs . . . . . . . . . . . . Surface states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Space charge analysis in AlGaN/GaN HFETs. . . . . . . . . . . . . .

9 9 14 15 15

2.3 2.3.1 2.3.2 2.3.3 2.3.4 2.4 2.4.1 2.4.2 References

Trapping effects in AlGaN/GaN HFETs . . . . . . . . . . . . . . . . . . . . Current collapse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gate lag and drain lag. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Surface states related gate leakage and reliability . . . . . . . . . . . Virtual gate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TCAD simulation and modeling of AlGaN/GaN HFETs . . . . . . . TCAD introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Physics based numerical simulation using TCAD . . . . . . . . . . ....................................................

18 18 20 22 23 25 25 25 28

Chapter 3
3.1 3.2

TCAD simulation results . . . . . . . . . . . . . . . . . . . . . . . . . . .

Device structure under investigation . . . . . . . . . . . . . . . . . . . . . . . Primitive simple approach to account for 2DEG in AlGaN/GaN HFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Space charge components in AlGaN/GaN HFET and I-V fitting Internal electron concentration profile in AlGaN/GaN HFETs . . Internal potential profile in AlGaN/GaN HFETs . . . . . . . . . . . . . Internal electric field profile in AlGaN/GaN HFETs . . . . . . . . . . ....................................................

31 31 32

3.3 3.4 3.5 3.6 References

33 36 41 43 48

Chapter 4
4.1

Non-linear source resistance and corresponding performance degradation in AlGaN/GaN HFETs. . .

Space charge limited current conduction. . . . . . . . . . . . . . . . . . . .

49

50

vi

4.2 4.2.1 4.2.2 4.3

Nonlinear source resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . One-dimensional simulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . Source resistance in AlGaN/GaN HFETs . . . . . . . . . . . . . . . . . Transconductance degradation and impedance anomalies in AlGaN/GaN HFETs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Simplified equivalent circuit model to explain the origin of transconductance degradation and impedance anomalies . . . . . . . Discussion of impedance anomalies in AlGaN/GaN HFETs . . . . Cgs, Cgd and gm, gd as a function of drain current . . . . . . . . . . . . . Cutoff frequency degradation due to nonlinear source resistance ....................................................

51 51 54 56

4.4

58

4.5 4.6 4.7 References

59 60 63 67

Chapter 5

Gate tunnel leakage and reliability in AlGaN/GaN HFETs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Quantum-mechanical tunneling. . . . . . . . . . . . . . . . . . . . . . . . . . . Ids and Ig vs Vds and Vg of an AlGaN/GaN HFET . . . . . . . . . . . . .

69

5.1 5.2 5.2.1 5.2.2 5.2.3

70 73 73 74 75

DC Ids vs Vds and Vg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ig vs Vds and Vg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Surface electron velocity as adjustable parameter to reproduce measured Ig. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reliability of AlGaN/GaN HFETs. . . . . . . . . . . . . . . . . . . . . . . . . Analytical model for surface electron hopping . . . . . . . . . . . . . . . Effective tunnel mass. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ....................................................

5.3 5.4 5.5 References

77 81 85 88

vii

Chapter 6
6.1 6.1.1 6.1.2 6.1.3 6.2 6.2.1 6.2.2 6.2.3 6.3 6.4 6.5

AlGaN/GaN HFET device design and optimization. .

Device structure design optimization . . . . . . . . . . . . . . . . . . . . . . Gate-to-source spacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gate-to-drain spacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AlGaN barrier layer doping and thickness . . . . . . . . . . . . . . . . Polarization charge control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AlN mole fraction in AlGaN layer . . . . . . . . . . . . . . . . . . . . . . M-plane GaN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GaN cap layer above AlGaN . . . . . . . . . . . . . . . . . . . . . . . . . . . Field plate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Surface passivation / processing . . . . . . . . . . . . . . . . . . . . . . . . . . Other methods to improve the device performance of AlGaN/GaN HFETs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ....................................................

91 91 91 94 95 96 98 98 102 106 109 110

References

112

Chapter 7
7.1 7.2

Conclusion and future work. . . . . . . . . . . . . . . . . . . . . . . .

Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Future work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

116 116 118

viii

LIST OF FIGURES

Fig. 2.1 Fig. 2.2 Fig. 2.3

Ga-face and N-face Wurtzite GaN structure. . . . . . . . . . . . . . . . . . . . . . . Spontaneous and piezoelectric polarization in AlGaN/GaN HFET . . . . . (a) Cross section of an AlGaN/GaN HFET; (b) Corresponding energy band diagram; (c) Corresponding space charge components in the device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Schematic conduction band diagram for an AlGaN/GaN HFET with space charge components in the device. . . . . . . . . . . . . . . . . . . . . . . . . . . Schematic band diagram illustrating the surface donor model with the undoped AlGaN barrier thickness (a) less than, and (b) greater than the critical thickness for the formation of the 2DEG . . . . . . . . . . . . . . . . . . . Current-voltage characteristic collapse in AlGaN/GaN HFETs (i) onstate (before application of a high drain bias) (ii) off-state (after application of a high drain bias) Inset: collapse mechanism which is electron trapping in barrier layer at drain side of gate . . . . . . . . . . . . . . . (a) Gate lag measurements: Experimental Ids (t) transient in response to a gate turn-on pulse at Vds = 6 V; (b) Drain lag measurements: Drain current is normalized to the low-field value (Vds = 10100 mV). A: Representative response for a device on a High Resistive buffer. B: Device on a conductive buffer layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reliability characteristics of output drain current degradation and gate leakage under dc bias stress at Vds = 15V, and Vgs = 0V for 6.5 h . . . . . . Reliability characteristics of output power and dc current degradation under RF stress where Vds = 15V (solid) and 25V (dotted) . . . . . . . . . . .

10 13 14

Fig. 2.4

16

Fig. 2.5

18

Fig. 2.6

19

Fig. 2.7

21 22

Fig. 2.8

Fig. 2.9

23

Fig. 2.10 Model of the device showing the location of the virtual gate as the absence of net positive surface charge . . . . . . . . . . . . . . . . . . . . . . . . . . .

24

ix

Fig. 3.1 Fig. 3.2 Fig. 3.3

AlGaN/GaN HFET structure under investigation . . . . . . . . . . . . . . . . . . . Electron velocity vs lateral electric field in an AlGaN/GaN HFET . . . . . Graphical scheme of space charge components in an AlGaN/GaN HFET considered in TCAD model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Measured and simulated Ids vs Vds curves of an AlGaN/GaN HFET . . . . 2-D contours of electron concentration in an AlGaN/GaN HFET (Vg = 1V, Vds = 50V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Log and Linear scale of electron density vs depth in an AlGaN/GaN HFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Log and Linear scale of electron density under source, gate and drain in an AlGaN/GaN HFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electron density along the 2DEG channel in an AlGaN/GaN HFET (a) Vds = 15V, (b) Vds = 50V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-D contours of potential in an AlGaN/GaN HFET (Vg = 1V, Vds = 50V)

31 33 34

Fig. 3.4 Fig. 3.5

35 36

Fig. 3.6

37

Fig. 3.7

38

Fig. 3.8

40

Fig. 3.9

41 42

Fig. 3.10 Potential along the 2DEG channel in an AlGaN/GaN HFET (a) Vds = 15V, (b) Vds = 50V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fig. 3.11 2-D contours of lateral electric field in an AlGaN/GaN HFET (Vg = 1V, Vds = 50V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fig. 3.12 Lateral electric field along the 2DEG channel in an AlGaN/GaN HFET (a) Vds = 15V, (b) Vds = 50V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fig. 3.13 Lateral electric field along the AlGaN surface in an AlGaN/GaN HFET (a) Vds = 15V, (b) Vds = 50V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fig. 4.1 Fig. 4.2 Fig. 4.3 Resistivity vs current density for one-dimensional GaN slab . . . . . . . . . . Voltage drop vs current density for one-dimensional GaN slab . . . . . . . . Critical current density for space charge limited conduction vs background doping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Dynamic resistance vs drain current in AlGaN/GaN HFET . . . . . . . . . . .

44

45

47

52 53 54

Fig. 4.4

55

Fig. 4.5 Fig. 4.6 Fig. 4.7 Fig. 4.8 Fig. 4.9

gm vs Vgs for different Vds in an AlGaN/GaN HFET . . . . . . . . . . . . . . . . . Cgs vs Vgs for different Vds in an AlGaN/GaN HFET . . . . . . . . . . . . . . . . Simplified model for equivalent circuit of an AlGaN/GaN HFET . . . . . . Experimentally measured Cgs vs input power for an AlGaN/GaN HFET Cgs & Cgd vs Ids of an AlGaN/GaN HFET . . . . . . . . . . . . . . . . . . . . . . . . .

56 57 58 60 61 62 63 64

Fig. 4.10 gm & gd vs Ids of an AlGaN/GaN HFET . . . . . . . . . . . . . . . . . . . . . . . . . . Fig. 4.11 Cgs vs Ids for AlGaN/GaN HFETs with different 2DEG concentration . . Fig. 4.12 Inclusion of Cgd in the simplified equivalent circuit of an AlGaN/GaN HFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fig. 4.13 Intrinsic and Extrinsic fTs for an AlGaN/GaN HFET . . . . . . . . . . . . . . . Fig. 4.14 3-D map for fT vs Vgs & Vds of an AlGaN/GaN HFET . . . . . . . . . . . . . . . Fig. 5.1 Fig. 5.2 Fig. 5.3 Thermionic-field emission (TFE) model in an AlGaN/GaN HFET . . . . . Measured and TCAD simulated Ids vs Vds of an AlGaN/GaN HFET . . . . Measured and TCAD simulated Ig vs Vds of an AlGaN/GaN HFET using constant surface electron velocities for different gate and drain biases . . Measured and TCAD simulated Ig vs Vds of an AlGaN/GaN HFET using variable surface electron velocities for different gate and drain biases . . Surface electron velocity used in the Ig vs Vds fitting vs lateral electric field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Measured and TCAD simulated Ids and Ig vs stress time . . . . . . . . . . . . . Schematic illustration of virtual gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . Virtual gate length and surface electron velocity used in the TCAD to reproduce the measured reliability data of an AlGaN/GaN HFET . . . . . . Surface electron velocity used in the Ig vs Vds fitting vs lateral electric field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

65 66 71 74 75

Fig. 5.4

76

Fig. 5.5

77

Fig. 5.6 Fig. 5.7 Fig. 5.8

78 79 80

Fig. 5.9

81

xi

Fig. 5.10 Trap-to-trap surface electron hopping model for AlGaN/GaN HFETs . . Fig. 5.11 Fig. 5.12
G and s extraction for Ig vs Vds for an AlGaN/GaN HFET . . . . . . . . . .

82 83 84 86

G and s extraction for Ig vs stress time for an AlGaN/GaN HFET . . . .

Fig. 5.13 Virtual gate length and effective tunnel mass used in the TCAD to reproduce the measured reliability data of an AlGaN/GaN HFET . . . . . . Fig. 5.14 Effective mass used in the Ig vs stress time fitting vs electric field . . . . . Fig. 6.1 Fig. 6.2 Fig. 6.3 gm vs Vgs for for AlGaN/GaN HFETs with various Lsg . . . . . . . . . . . . . . . Cgs vs Vgs for AlGaN/GaN HFETs with various Lsg . . . . . . . . . . . . . . . . . Peak electric field at the gate edge as a function of the gate-to-drain spacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Peak electric field at the gate edge as a function of the AlGaN doping concentration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Peak electric field at the gate edge as a function of the AlGaN layer thickness (assuming the 2DEG density is constant for different AlGaN thickness) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Peak electric field at the gate edge as a function of the 2DEG density . . . Electric field along the AlGaN surface for devices with different polarization charges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electric field along the 2DEG channel for devices with different polarization charges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Simulated current-voltage characteristics for open-channel, pinch-off and a gate bias in between (a) Polarization charge density is 1.3E13 cm2 , the simulated data is shown together with the measured data; (b) Polarization charge density is 7.5E12 cm-2; (c) Polarization charge density is 2E12cm-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

86 93 93 94

Fig. 6.4

95

Fig. 6.5

96 97 100

Fig. 6.6 Fig. 6.7

Fig. 6.8

100

Fig. 6.9

101

Fig. 6.10 Graphical scheme of space charge components in GaN/AlGaN/GaN . . . Fig. 6.11 Absolute gate current for AlGaN/GaN HFET and GaN/AlGaN/GaN HFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

102 103

xii

Fig. 6.12 Spontaneous and piezoelectric polarization in GaN/AlGaN/GaN HFET Fig. 6.13 Gate current for devices with different negative polarization charge density . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fig. 6.14 Total electric field along the surface for devices with different negative polarization charge density . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fig. 6.15 2-D Electric field profile for devices with different field plate length . . . Fig. 6.16 Peak electric field at the gate edge as a function of the field plate length Fig. 6.17 Electron density along the 2DEG channel for devices with different field plate length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fig. 6.18 (a) Schematic conduction band diagram of conventional AlGaN/GaN HEMT, (b) schematic conduction band diagram of AlGaN/AlN/GaN HEMT. Polarization induced dipole in AlN increases the effective conduction band offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

104 105

106

107 108 108

111

xiii

LIST OF TABLES

Table 2.1

Piezoelectric tensors and spontaneous polarization values for GaN, AlN and InN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameters used in the TCAD simulation . . . . . . . . . . . . . . . . . . . . . . . . Surface electron velocities used in simulation to reproduce measured gate current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12

Table 3.1 Table 5.1

35 76

xiv

Chapter 1: Introduction

1.1 Overview Vacuum tubes have been mostly replaced by solid state devices since the invention of the bipolar transistor in 1947. Over the past 60 years, there has been a rapid progress of the development in the solid state device and integrated circuit (IC) technology, with a tremendous impact on our daily life.

Even though the most common solid state devices used in todays integrated circuits are silicon based metal-oxide-semiconductor field effect transistors (MOSFETs) and bipolar junction transistor (BJTs) [1], III-V devices, such as heterojunction bipolar transistors (HBTs), metal-semiconductor field effect transistors (MESFETs), and heterojunction field effect transistors (HFETs), have been natural choices for wireless communication and military applications operating between 1 and 100 GHz [2]. These III-V solid state devices used in microwave / RF electronic systems possess superior attributes such as high reliability, small size / weight and high energy efficiency over their counterparts made of vacuum tubes, but the RF applications for high power (kilowatts to megawatts), high frequency and high temperature (above 250 C) are still dominated by vacuum electronics.

Power combining and phased-array techniques can also be utilized to combine the outputs of multiple solid state devices and achieve high power levels, but the combining technology results in large modules. Furthermore, power combining is increasingly difficult to apply as

the operating frequency increases. The emergence of solid state devices made of wide band gap materials such as Silicon Carbide (SiC) and Gallium Nitride (GaN) makes it possible to achieve high power, high frequency and high temperature RF applications through solid state devices, due to the good transport properties in conjunction with a large tunable band gap and extremely high breakdown field in these materials [3, 4].

1.2 GaN based high power devices The excellent RF performance demonstrated in AlGaN/GaN HFETs results from the combination of high current density with high voltage operation, which benefits from the high sheet charge density in these hetero-structures (~ 1013 cm-2), the high carrier mobility (~ 1500 cm2/Vs) and saturation velocity (~ 1.5 107 cm/s) in the channel and the high breakdown voltage inherent in the GaN material [5, 6, 7]. The critical electric field for breakdown in GaN material is ~ 2 MV/cm. These devices are of particular interests because of their advantages for high power density applications, with more than 32 W/mm [8] output power at 4 GHz and 10 W/mm [9] at 40 GHz having already been reported.

AlGaN/GaN

HFET

microwave

power

amplifiers

are

attractive

components

for

communications base stations and radar transmitters. The RF performance of these devices is rapidly improving, and prototype devices are being sampled for use in next generation communications systems.

1.3 Motivation Although excellent behavior has been demonstrated in AlGaN/GaN HFETs for high power applications in microwave/RF systems, the performance of these devices was still found to be limited from the high-injection and high-field nonlinearities. There are three fundamental physical effects occurring during high-current and high-voltage operation conditions in these devices:

1) space charge effects in the gate-source region under high current injection, causing a nonlinear source resistance which results in a degradation in the linearity and RF performance of the device;

2) impact ionization and high field breakdown effects in the conducting channel which is related to the channel breakdown in the device;

3) electron reverse tunneling from the gate to the surface of the semiconductor, due to the extremely high electric field at the gate edge on the drain side as a result of high drain bias, which is responsible for the large gate leakage and reliability problem demonstrated in these devices where the dc current and RF output power decrease over time.

These effects were investigated using TCAD simulation and modeling. Device design and optimization issues were also discussed to mitigate these problems.

1.4 Original contributions In this work, several issues in AlGaN/GaN HFETs have been addressed and investigated with the help of TCAD simulation and modeling. The original contributions from this work include: Simulated the nonlinear behavior of the source resistance in AlGaN/GaN HFETs that results in the transconductance and frequency response degradation at high current levels. Investigated the impedance anomalies of AlGaN/GaN HFETs where Cgs decreases with the input power drive, which is opposite to the behavior of classical FETs. Demonstrated the space charge limited current transport as the origin of the nonlinear source resistance in AlGaN/GaN HFETs using TCAD simulation. Reproduced for the first time both the measured drain current and gate current as a function of stress time using TCAD simulation. Proposed an analytical surface electron trap-to-trap hopping model to account for the gate tunneling and the transport of the tunnel electrons on the surface of AlGaN layer, which could be used to explain the reliability characteristics of AlGaN/GaN HFETs. Employed TCAD simulation to demonstrate the application of a GaN cap layer on the AlGaN barrier layer as a effective method to reduce the peak electric field at the gate edge and to decrease the gate leakage current / improve the reliability characteristics of AlGaN/GaN HFETs.

These original contributions provide an insight into the physical effects associated with high voltage and high current operations in AlGaN/GaN HFETs, and could be helpful to the development and improvement of AlGaN/GaN HFETs for high power, high frequency and high temperature applications.

1.5 Outline In order to systematically describe and explain the physical effects in AlGaN/GaN HFETs, the dissertation begins from an introduction to the AlGaN/GaN HFETs and their physical limitations; followed by the TCAD simulation set-up and results; space charge effects in the gate-source region and the gate leakage/reliability problems are then explored in detail.

The dissertation is comprised of the following chapters: Chapter II provides the background information for the discussion in this work. It starts from the polarization effects and surface states in AlGaN/GaN HFETs which is critical to the device operation and performance, followed by the introduction of surface states and defects related trapping effects and phenomena that can be observed in the devices. At last, the TCAD simulation method is briefly introduced.

Chapter III includes the TCAD simulation results for the AlGaN/GaN HFETs. The device structure and simulation set-up are introduced before a closer look at the internal electron concentration, electric potential and electric field obtained from the simulation for devices biased at different conditions.

Chapter IV investigates the nonlinear source resistance and the corresponding performance degradation in AlGaN/GaN HFETs, as well as its physical origin. The transconductance degradation and impedance anomalies behavior are introduced: these phenomena are attributed to the space-charge limited current transport and the resulting effects of source resistance modulation, their effects on the frequency response are also presented. Chapter V explores the gate tunnel leakage and reliability problems in AlGaN/GaN HFETs, quantum mechanical tunneling based on thermionic field emission (TFE) theory was introduced, and TCAD calculation based on this theory was used to accurately reproduce the measured gate current and reliability data, then an analytical surface electron hopping model was proposed to explain the reliability characteristics of the devices.

Chapter VI discusses the device optimization and design issues for AlGaN/GaN HFETs. Various device structure optimization methods and polarization charge control methods which can be used to improve the device performance were discussed, as well as the application of field plates and surface passivation/processing methods.

Chapter VII summarizes the results of this work and proposes the guidelines for future work.

References

[1]

J. D. Plummer, M. D. Deal, P. B. Griffin, Silicon VLSI Technology, Prentice Hall, 2000.

[2] [3]

W. Liu, Fundamentals of III-V Devices, John Wiley & Sons, 1999. M. A. Khan, Q. Chen, J. Yang, M. Z. Anwar, M. Blasinggame, M. S. Shur, J. Burm, and L. F. Eastman, "Recent advances in III-V nitride electron devices," IEDM Tech. Dig., pp. 27-30, Dec. 1996.

[4]

R. J. Trew, Wide bandgap semiconductor transistors for microwave power amplifiers," IEEE Microwave Mag, No. 1, pp. 46-54, 2000.

[5]

B. Gelmont, K. S. Kim, and M. Shur, "Monte Carlo simulation of electron transport in gallium nitride," J. Appl. Phys., 74, 1818, 1993.

[6]

M. A. Khan, Q. Chen, C. J. Sun, M. S. Shur, and B. L. Gelmont, "Two-dimensional electron gas in GaNAlGaN heterostructures deposited using trimethylamine-alane as the aluminum source in low pressure metalorganic chemical vapor deposition," Appl. Phys. Lett., 67, 1429, 1995.

[7]

M. A. Khan, Q. Chen, M. S. Shur, B. T. Dermott, and J. A. Higgins, "Microwave Operation of GaN/AIGaN Doped Channel Heterostructure Field Effect Transistors," Electron Device Letters, IEEE, vol. 17, No. 7, pp. 325-327, 1996

[8]

Y. F. Wu, A. Saxler, M. Moore, R. P. Smith, S. Sheppard, P. M. Chavarkar, T. Wisleder, U. K. Mishra, and P. Parikh, "30-W/mm GaN HEMTs by field plate optimization," Electron Device Letters, IEEE, vol. 25, pp. 117-119, 2004.

[9]

T. Palacios, A. Chakraborty, S. Rajan, C. Poblenz, S. Keller, S. P. DenBaars, J. S. Speck, and U. K. Mishra, "High-power AlGaN/GaN HEMTs for Ka-band applications," Electron Device Letters, IEEE, vol. 26, pp. 781-783, 2005.

Chapter 2: Background

In this chapter, the background information for the research in this work is introduced. The chapter starts off with a discussion of Wurtzite crystal structure and polarization effects in AlGaN/GaN HFETs, followed by an introduction to surface states in AlGaN/GaN HFETs, an overview of surface states and defects related trapping effects and phenomena observed in the devices is then presented, focusing on current collapse, gate and drain lag, gate leakage, reliability, and the concept of virtual gate. The chapter finishes off with a discussion of the TCAD simulation method used in this work.

2.1 Polarization in AlGaN/GaN HFETs Nitride materials (GaN, AlN, InN and their ternaries) exist in two crystal structures: Wurtzite (WZ), and Zinc-Blende (ZB). Wurtzite is the most common crystal structure for nitride materials used in electronic devices. It is a structure of hexagonal crystal systems where tetrahedrally coordinated Ga (Al, In) and N atoms are stacked in an ABABAB fashion as shown in Fig. 2.1 [1], Due to the non-centro-symmetric nature of the Wurtzite structure, a nonzero volume dipole moment exists in the nitride crystal when there is no external strain or electric field, which results in spontaneous polarization in nitride materials. Futhermore, there are nonzero piezoelectric moduli when the wurtzite structure nitride materials are stressed along [0001] direction, resulting in piezoelectric effects. These piezoelectric effects and the difference in spontaneous polarization between AlGaN and GaN cause polarization charges and fields in AlGaN/GaN HFETs.

Fig. 2.1 Ga-face and N-face Wurtzite GaN structure [1]

The polarity of the crystal is decisive to the polarization [1]. As shown in Fig. 2.1, if the bonds along the c-direction are from Ga (cation sites) to the N (anion sites), its called Ga polarity crystal (Ga-face) and this direction is said to be [0001]; If the bonds along the cdirection are from N (anion sites) to Ga (cation sites), its called N polarity crystal (N-face) and this direction is said to be [000 1 ].

The piezoelectric field Ppz [2] can be given by:

Ppz ,i = d ijk jk = eijk jk

(2.1)

where dijk and eijk are piezoelectric tensors used to relate piezoelectric polarization field to the stress tensor jk and the strain tensor jk respectively.

The stress tensor ij is related to the strain tensor by 10

 ij = cijkl kl
where cijkl is the elastic tensor of the crystal.

(2.2)

dijk and eijk for the Wurtzite crystal structure contain three independent non-vanishing
components, respectively. eij is given by:

0 eij = 0 e 31

0 0 e31

0 0 e33

0 e15 0

e15 0 0

0 0 0

(2.3)

while dij is expressed similarly with three independent components d31, d33, and d15. Some values of the piezoelectric tensors, along with the spontaneous polarization values for GaN, AlN and InN are shown in Table 2.1 [3].

The piezoelectric polarization field is along the [0001] direction when a coherently strained AlGaN epitaxial layer is grown on a relaxed GaN bulk layer. Assuming a free-surface boundary condition where
zz

= 3 = 0, we have

3 = 2
where 1 can be expressed by

c13 1 c33

(2.4)

1 =

aGaN a a

(2.5)

with a representing the strain-relaxed in-plane lattice constant for the coherently strained AlGaN, and aGaN representing the in-plane lattice constant for a relaxed GaN layer.

11

Then the piezoelectric polarization along the [0001] direction can be expressed by

c Ppz , z = 2 e31 13 e33 1 c33

(2.6)

Table 2.1 Piezoelectric tensors and spontaneous polarization values for GaN, AlN and InN [3] Wurtzite GaN e31 (C/m2) e33 (C/m2) Psp (C/m2) -0.49 0.73 -0.029 Wurtzite AlN -0.60 1.46 -0.081 Wurtzite InN -0.57 0.97 -0.032

In an ideal AlxGa1-xN/GaN HFET where strain relaxation does not occur, both of the piezoelectric polarization and the difference in the spontaneous polarization can be calculated if x is known (x is a value between 0 and 1, representing the AlN mole fraction in the AlGaN barrier layer).

The c-plane lattice constant is 3.189 for GaN, and 3.112 and AlN. Therefore, for coherently strained AlxGa1-xN, the strain is 1 = 0.0495x, the piezoelectric polarization is Ppz = 2.66x 1013 cm-2 [4]. The difference in spontaneous polarization between AlxGa1-xN and GaN can be calculated using the Psp values for AlN and GaN in Table I: Psp = 3.25x 1013 cm-2. These two polarization effects are both pointing in the [000 1 ] direction for Ga-face device, as shown in Fig. 2.2.

12

Fig. 2.2 Spontaneous and piezoelectric polarization in AlGaN/GaN HFET [2]

According to Gausss Law, the polarization-induced electrostatic charge density pol , can be deduced by the spatial variations in the spontaneous and piezoelectric polarization fields [2] P = ( Psp + Ppz ) = pol

(2.7)

As a result of polarization effects, the polarization induced positive electrostatic charges are present at the AlGaN/GaN hetero-interface, while corresponding negative electrostatic charges are present at the AlGaN surface. These charges also result in an electric field. The charge density and the internal electric field in the AlGaN layer are determined by the sum of the difference in the spontaneous polarization between AlGaN and GaN, and the piezoelectric polarization resulting from the strain.

13

The polarization induced charges present in the hetero-interface induce a layer of twodimensional electron gas (2DEG) in the GaN layer immediately under the interface, as shown in Fig. 2.3 [5]. Due to the conduction band offset between AlGaN and GaN, the 2DEG is confined in a very thin channel.

Fig. 2.3 (a) Cross section of an AlGaN/GaN HFET; (b) Corresponding energy band diagram; (c) Corresponding space charge components in the device [5]

2.2. Surface states and defects in AlGaN/GaN HFETs

Due to the lack of a native substrate and relatively immature processing technologies, GaN is known to have a large variety of defects. Sapphire and SiC remain the most common substrates for nitride heteroepitaxy. Since there is a mismatch of about 13% between the lattice constant of GaN and sapphire, and 4% between GaN and SiC, large numbers of dislocations are inevitably formed in GaN materials. Moreover, the typical growth condition

14

of AlGaN results in surface cracks forming on the structures. The residual impurities such as O, Si, C and H, along with the native point defects such as nitrogen vacancies, gallium vacancies and nitrogen antisites are always present in the GaN materials [6, 7]

2.2.1 Surface states

The atomic structure at the surface of a semiconductor is different from that in the bulk because surface atoms are missing adjacent atoms above them [8]. These broken covalent bonds point in the direction which is normal to the semiconductor surface and they do not possess the minimum energy configuration. As a result, these bonds are very reactive and tend to adsorb atoms to reconstruct and reduce the surface energy. These bonds are called dangling bonds. Besides the dangling bonds, there might be crystal defects (traps) at the surface of the semiconductor due to process damage. The dangling bonds and surface traps introduce additional energy levels within the band gap. They are electrically reactive and responsible for trapping / de-trapping phenomena in the GaN based device. There are two types of traps, one type of traps are neutral when occupied and positively charged when empty, which are called donor traps; another type of traps are negatively charged when occupied and neutral when empty, which are called acceptor traps.

2.2.2 Space charge analysis in AlGaN/GaN HFETs

Ibbetson et al. [9] proposed that surface states on AlGaN/GaN HFETs may be the source for the 2DEG electrons according to the charge balance equation. The space charge components present in the AlGaN/GaN HFET structure include: charges due to spontaneous and

15

piezoelectric polarization at the AlGaN/GaN interface and the AlGaN surface; charges due to ionized surface states; charges due to ionized donors in the AlGaN barrier layer; charges due to the electrons in the two-dimensional electron gas channel; and charges due to the ionized traps in the GaN buffer layer. Fig. 2.4 shows a schematic conduction band diagram for an AlGaN/GaN HFET structure oriented in (0001) face with the space charge components included.

Fig. 2.4 Schematic conduction band diagram for an AlGaN/GaN HFET with space charge components in the device [9]

As mentioned in the polarization section, charges due to the polarization effects do not contribute to the net charges in the device because the positive and negative charges resulting from the polarization completely cancel each other due to the dipole nature of polarization. Furthermore, charges due to the ionized traps in the bulk are ignored because the buffer traps

16

should be lowered as much as possible in a good device; charges due to the ionized donors in the AlGaN can also be neglected because the 2DEG is present in the device even without intentional doping in the AlGaN layer. According to charge neutral constraints, the sum of all the space charges should be zero if there is no external field. Therefore, the relation between the 2DEG density and the charges due to ionized surface states can be given by

surface qn ss = 0

(2.8)

where surface is the charges due to ionized surface sates, nss is the electron density in 2DEG.

It can be seen in the above equation that donor-like surface states are responsible for the formation of the 2DEG, because donor-like surface states become positively charged when the electrons at the surface states are emptied and transferred to the 2DEG channel. If there are acceptor-like surface states present in the device, they are responsible for trapping the electrons at the expense of the 2DEG, and they become negatively charged when occupied by electrons.

As shown in Fig. 2.5, assuming the donor-like surface states at ED eV below the conduction band of the AlGaN are present in the device, and the surface states energy levels are deep enough which is below the Fermi level, EF. Under these conditions, these surface states are neutral because they are occupied by electrons and there is no 2DEG in the channel. When increasing the thickness of the AlGaN barrier layer, the electric field in the AlGaN layer increases accordingly. As a result, the energy level of the surface states approaches the Fermi level. If the thickness of the AlGaN barrier is large enough, the energy level of the surface

17

states is above the Fermi level. When this happens, electrons are emptied from the surface states and transferred to the 2DEG channel, while the surface states themselves become positively charged. It should be noted that if the AlGaN layer is too thick, strain relaxation occurs, resulting in reduced polarization effects. That is why reduced 2DEG density was sometimes observed in the measured data for AlGaN thickness larger than 15-30 nm, depending on the AlN mole fraction in the AlGaN layer.

Fig. 2.5 Schematic band diagram illustrating the surface donor model with the undoped AlGaN barrier thickness (a) less than, and (b) greater than the critical thickness for the formation of the 2DEG [9]

2.3 Trapping effects in AlGaN/GaN HFETs

2.3.1 Current collapse

AlGaN/GaN HFETs suffer from a current collapse problem where the dc drain current is reduced after the application of drain bias stress. The first paper on current collapse in AlGaN/GaN HFET was published by Khan et al. [10] in 1994. There are two states of

18

Current-Voltage characteristics found in this device, the first state is indicated in Fig. 2.6 curve (i) corresponding to a low resistance state which exists prior to the application of a large drain voltage, while the second state is a high resistance state, as shown in curve (ii) in Fig. 2.6, where the current collapse occurs after the application of a high drain bias.

Fig. 2.6 Current-voltage characteristic collapse in AlGaN/GaN HFETs (i) on-state (before application of a high drain bias) (ii) off-state (after application of a high drain bias) Inset: collapse mechanism which is electron trapping in barrier layer at drain side of gate [10]

The collapsed state persists for several seconds at room temperature after the removal of the drain bias, and it could be recovered into the low resistance state when optical radiation is applied. The collapse is attributed to the electron trapping in barrier layer at the drain side of the gate, where trapping of electrons causes the depletion of the channel resulting in dramatic

19

decrease in the channel conductance and the drain current. The radiation of certain energies can produce electron hole pairs and the positive holes compensate the negative charge of the trapped electrons, thus restoring the drain current.

Klein et al. [11] developed a method to investigate the properties of the traps responsible for current collapse. Based on the fact that the trapped carriers in the current collapsed device can be photoionized by incident light, the absorption photoionization spectrum can be measured to provide the information about the signature of the traps and the depth of the traps relative to the band edges.

2.3.2 Gate lag and drain lag

Gate lag refers to the drain current transient when the gate is pulsed from one state to another. If the gate is pulsed from pinch-off to open-channel, the gate turn-on characteristic is obtained; and the gate turn-off characteristic corresponds to the gate pulse from open-channel to pinch-off condition. Similarly, drain lag is the drain current transient when the drain is biased from one state to another. Binari et al. [12] claimed that for AlGaN/GaN HFETs, gate lag measurements are more sensitive to surface effects and drain lag measurements are more sensitive to buffer layer effects. Fig. 2.7 (a) shows a typical gate lag response [13].Instead of increasing instantaneously when the gate bias is turned on, the drain current demonstrates a transient characteristic. This behavior is attributed to the effects of surface states because the gate lag characteristic is very sensitive to the surface passivation. The time lag is related to

20

the response time associated with the electron de-trapping from the surfaces states when the device is recovered from the 2DEG depletion condition.

Typical drain lag characteristics of a high resistive buffer device and a conductive buffer device is shown in Fig. 2.7 (b) [12], Vgs is kept at 0V and Vds is from a low value of 10-100 mV to a high value of 15-20V and then back to the low value in the measurements. A typical long-term drain lag characteristic is shown in the device with a high resistive buffer, with the recovery time on the order of minutes; for the conductive buffer device, it exhibits a reduced degree of drain lag. The difference of the drain lag in these two cases is related to the conductivity of the buffer layer, for this reason, the drain lag is attributed to the traps located in the high resistive buffer layer. The conductive buffer layer has fewer traps or the traps are filled by shallow donors, which results in a reduced degree of drain lag.

Fig. 2.7 (a) Gate lag measurements: Experimental Ids (t) transient in response to a gate turnon pulse at Vds = 6 V; [13] (b) Drain lag measurements: Drain current is normalized to the low-field value (Vds = 10100 mV). A: Representative response for a device on a High Resistive buffer. B: Device on a conductive buffer layer [12]

21

2.3.3 Surface states related gate leakage and reliability

Surface states and traps play an important role in the reverse gate leakage, and the gate leakage results in a reliability problem in AlGaN/GaN HEMTs. A typical reliability characteristic of this device under dc stress test is shown in Fig. 2.8 [14]. It shows the drain current degradation and gate current as a function of dc stress time. The output drain current decreases as stress time because the negative charge density at the surface increases and the 2DEG is partially depleted after applying a dc stress. This can be verified with a drain resistance increase after the stress. The decrease in the gate leakage current observed can be attributed to the reduced electric field between the gate and drain.

Fig. 2.8 Reliability characteristics of output drain current degradation and gate leakage under dc bias stress at Vds = 15V, and Vgs = 0V for 6.5 h [14]

Similarly, if an RF stress is applied to an AlGaN/GaN HFET, a degradation in the dc drain current and RF output power can be observed, as shown in Fig. 2.9 [15].

22

Fig. 2.9 Reliability characteristics of output power and dc current degradation under RF stress where Vds = 15V (solid) and 25V (dotted) [15]

2.3.4 Virtual gate

The virtual gate was proposed by Barton and Ladbrooke [16], and Trew and Mishra [17], Ventury et al. [18] used the theory to explain the current collapse in AlGaN/GaN HFETs. As shown in Fig. 2.10, the lateral extension of the depletion region as increasing of the reverse gate bias suggests the presence of negative charge on the surface. The effect of surface negative charge is to act like a negatively biased gate, referred as virtual gate. Unlike the metal gate on which the potential is controlled by the applied gate bias, the virtual gate potential is controlled by the total amount of trapped charge in the gate drain access region. In turn, the drain current is controlled by the applied gate bias, as well as the ability to supply and remove charge from the virtual gate. The time constant associated with supplying and removing charges from the virtual gate results in the frequency dependence of the drain current.

23

Fig. 2.10 Model of the device showing the location of the virtual gate as the absence of net positive surface charge [18]

The mechanism of current collapse and drain current degradation over stress time can be explained by the virtual gate, where the stress time is defined from the time after drain bias is applied to the device. The formation of a virtual gate results from electron trapping on the surface donor-like states. When a drain bias is applied, current collapse depends on the rate that the reverse bias on the virtual gate increases; it is therefore dependent on the supply of electrons to the surface states. If these electrons are injected from the metal gate, this supply is then limited by the field at the gate edge that induces the leakage, and the surface mobility of these electrons which is very low. The depletion region extending toward the drain side as trapping proceeds is the result of the extension of the virtual gate. In this process, the electric field at the gate edge is reduced; therefore the gate leakage and the rate of electron trapping on the surface states are reduced.

24

2.4 TCAD simulation and modeling of AlGaN/GaN HFETs

2.4.1 TCAD introduction

Technology CAD (TCAD) tools are widely used today in the semiconductor industry and academia. TCAD simulation and modeling can be used to predict the device performance and expedite the device development / optimization process for new technology. They can also help us to understand device physics and operation mechanisms.

The TCAD tool used in this work is ATLAS, a PISCES based two-dimensional numerical device simulator from Silvaco [19]. The TCAD simulation work consists of the following steps: Use the device editor to virtually fabricate the device; Create an appropriate mesh for device simulation; Define simulation parameters and models; Perform numerical simulations and get device performance; Generate output plots.

2.4.2 Physics based numerical simulation using TCAD

After defining the mesh, a set of fundamental semiconductor equations are solved for every grid point. These equations include Poissons equation, continuity equations, and transport equations, which are derived from Maxwells equations.

Poissons equation relates the variations of electrostatic potential and electric field to the electrostatic charges including the contribution of mobile and fixed charges and ionized traps, it can be expressed by

25

 2 = E =

q + = ( p n + Nd Na )

(2.9)

where is the electric potential, E is the electric field, is the permittivity of the semiconductor, is the total charge density, q is the electron charge, p is free hole density, n is free electron density, Nd+ is the ionized donor charge density, and Na- is the ionized acceptor charge density.

The carrier continuity equations for electrons and holes are expressed by
n 1 = J n + Gn u t q p 1 = J p + Gp u t q

(2.10)

(2.11)

where Jn and Jp are electron and hole current density, Gn and Gp are excess electron and hole generation rate due to avalanche breakdown, tunneling, e-beam, x-rays, optical illumination and etc, and u is the recombination rate for electrons and holes.

The transport equations using the drift-diffusion model can be expressed by J n = q n nE + qDn n J p = q p pE qD p p (2.12) (2.13)

where n and p are the electron and hole mobility, Dn and Dp are electron and hole diffusivity. The first term in the equation represents the drift current, while the second term

26

represents the diffusion current. The mobility and the diffusion coefficient D are related by the Einstein relation: D

kT q

(2.14)

In the TCAD simulation of AlGaN/GaN HFETs, polarization charges are included using layers of positive and negative fixed sheets of charge at the AlGaN/GaN interface and at the AlGaN surface, while surface states are included using a layer of donors within 1 nm of the top of the AlGaN layer, which is uniformly distributed between source and drain. These charges, together with the traps defined through energy level, density and cross section, are incorporated in the Poissons equation. The carrier generation-recombination model used is the ShockleyReadHall recombination term, which is included in the continuity equations.

The numerical method used in the calculations is the Newton method. The temperature is 300 K by default. The current and voltage relationship for each electrode can be calculated, as well as the carrier density, electric field and electric potential profiles in the device. Quasistatic capacitance can also be calculated by defining a small enough increment of voltage, then subtracting the electrode charge at one bias from that at the adjacent bias, where the charge density is calculated by applying Gauss Law to the electrode. The quasistatic capacitance is then given by the derivative of the charge density with respect to the voltage. Besides the gate-to-source (Cgs) and gate-to-drain (Cgd) capacitances, the transconductance (gm) and channel conductance (gd) in AlGaN/GaN HFETs can be obtained similarly, by calculating the derivative of the current with respect to the voltage.

27

References

[1]

O. Ambacher, J. Smart, J. R. Shealy, N. G. Weimann, K. Chu, M. Murphy, W. J. Schaff, L. F. Eastman, R. Dimitrov, L. Wittmer, M. Stutzmann, W. Rieger, and J. Hilsenbeck, "Two-dimensional electron gases induced by spontaneous and piezoelectric polarization charges in N- and Ga-face AlGaN/GaN heterostructures," Journal of Applied Physics, vol. 85, pp. 3222-3233, 1999.

[2]

E. T. Yu and e. O. Manasreh, "Spontaneous and piezoelectric polarization in nitride heterostructures.," in III-V Nitride Semiconductors: Applications and Devices (Optoelectronic Properties of Semiconductors and Superlattices, 16): Taylor & Francis, 2003.

[3]

F. Bernardini, V. Fiorentini, and D. Vanderbilt, "Spontaneous polarization and piezoelectric constants of III-V nitrides," Physical Review B, vol. 56, pp. 1002410027, 1997.

[4]

H. Morkoc, R. Cingolani, and B. Gil, "Polarization effects in nitride semiconductors and device structures," Materials Research Innovations, vol. 3, pp. 97-106, 1999.

[5]

E. T. Yu, G. J. Sullivan, P. M. Asbeck, C. D. Wang, D. Qiao, and S. S. Lau, "Measurement of piezoelectrically induced charge in GaN/AlGaN heterostructure field-effect transistors," Applied Physics Letters, vol. 71, pp. 2794-2796, 1997.

[6]

S. J. Pearton, J. C. Zolper, R. J. Shul, and F. Ren, "GaN: Processing, defects, and devices," Journal of Applied Physics, vol. 86, pp. 1-78, 1999.

28

[7]

Z. Q. Fang, D. C. Look, W. Kim, Z. Fan, A. Botchkarev, and H. Morkoc, "Deep centers in n-GaN grown by reactive molecular beam epitaxy," Applied Physics Letters, vol. 72, pp. 2277-2279, 1998.

[8]

S. Hasegawa and F. Grey, "Electronic transport at semiconductor surfaces--from point-contact transistor to micro-four-point probes," Surface Science, vol. 500, pp. 84-104, 2002.

[9]

J. P. Ibbetson, P. T. Fini, K. D. Ness, S. P. DenBaars, J. S. Speck, and U. K. Mishra, "Polarization effects, surface states, and the source of electrons in AlGaN/GaN heterostructure field effect transistors," Applied Physics Letters, vol. 77, pp. 250-252, 2000.

[10]

A. Koudymov, G. Simin, M. A. Khan, A. Tarakji, R. Gaska, and M. S. Shur, "Dynamic current-voltage characteristics of III-NHFETs," IEEE Electron Device Letters, vol. 24, pp. 680-682, 2003.

[11]

P. B. Klein, S. C. Binari, K. Ikossi-Anastasiou, A. E. Wickenden, D. D. Koleske, R. L. Henry, and D. S. Katzer, "Investigation of traps producing current collapse in AlGaN/GaN high electron mobility transistors," Electronics Letters, vol. 37, pp. 661662, 2001.

[12]

S. C. Binari, K. Ikossi, J. A. Roussos, W. Kruppa, D. Park, H. B. Dietrich, D. D. Koleske, A. E. Wickenden, and R. L. Henry, "Trapping effects and microwave power performance in AlGaN/GaN HEMTs," IEEE Transactions on Electron Devices, vol. 48, pp. 465-471, 2001.

29

[13]

G. Meneghesso, G. Verzellesi, R. Pierobon, F. Rampazzo, A. Chini, U. K. Mishra, C. Canali, and E. Zanoni, "Surface-related drain current dispersion effects in AlGaNGaNHEMTs," IEEE Transactions on Electron Devices, vol. 51, pp. 1554-1561, 2004.

[14]

H. Kim, V. Tilak, B. M. Green, J. A. Smart, W. J. Schaff, J. R. Shealy, and L. F. Eastman, "Reliability evaluation of high power AlGaN/GaN HEMTs on SiC substrate," Physica Status Solidi a-Applied Research, vol. 188, pp. 203-206, 2001.

[15]

C. Lee, L. Witkowski, M. Muir, H. Q. Tserng, P. Saunier, H. Wang, J. Yang, and M. A. Khan, "Reliability evaluation of AlGaN/GaN HEMTs grown on SiC substrate," presented at High Performance Devices, 2002. Proceedings. IEEE Lester Eastman Conference on, 2002.

[16]

T. M. Barton and P. H. Ladbrooke, "Dependence of Maximum Gate Drain Potential in Gaas-Mesfets Upon Localized Surface-Charge," IEEE Electron Device Letters, vol. 6, pp. 117-119, 1985.

[17]

R. J. Trew and U. K. Mishra, "Gate breakdown in MESFETs and HEMTs," Electron Device Letters, IEEE, vol. 12, pp. 524-526, 1991.

[18]

R. Vetury, N. Q. Zhang, S. Keller, and U. K. Mishra, "The impact of surface states on the DC and RF characteristics of AlGaN/GaN HFETs," Electron Devices, IEEE Transactions on, vol. 48, pp. 560-566, 2001.

[19]

Silvaco Manual, Silvaco Data Systems Inc., Santa Clara, CA.

30

Chapter 3: TCAD simulation results

In this chapter, the TCAD simulation results for the AlGaN/GaN HFETs are presented. The chapter starts off with a discussion of the device structure, the simulation set-up, and the calibration process in the TCAD simulation, followed by a closer look at the internal electron concentration, electric potential and electric field obtained from the simulation for devices biased at different conditions.

3.1 Device structure under investigation Several different devices have been investigated in this work. Among these are devices designed for varying applications such as a communications band 2 GHz device and also industrial 10 GHz and 30 GHz devices. The device under consideration is shown in Fig. 3.1.

Fig. 3.1 AlGaN/GaN HFET structure under investigation

31

Starting from a SiC substrate and a AlN buffer layer, 0.5 m-thick GaN bulk layer was grown, followed by a 1 nm AlN interfacial layer, and a 22 nm AlGaN barrier layer. The device has a gate length of Lg = 0.2 m and gate width of W=500 m. The gate to source spacing is Lgs = 0.7 m, while the gate to drain spacing is Lgd = 1.1 m.

3.2 Primitive simple approach to account for 2DEG in AlGaN/GaN HFET As described in Chapter II, a high density 2DEG can be achieved in an AlGaN/GaN heterostructure interface as a result of spontaneous and piezoelectric polarization effects even without intentional doping in the AlGaN barrier layer. In order to account for the 2DEG in the TCAD model, a simple approach can be used where a layer of fixed positive sheet charge is defined in the AlGaN/GaN interface [1]. Since fixed negative polarization charge and surface charge are not included on the AlGaN layer, this approach is not accurate in representing the electrical properties above the AlGaN/GaN interface. However, this simple approach can still be used to induce an accurate amount of channel electrons and correctly predict the drain current characteristics of the device.

Good agreement between the measured data and the simulated data can be achieved using the simple approach. The parameters used in the two-dimensional drift-diffusion simulation were shown as follows: The density of fixed positive sheet charge is 1.3 1013 cm-2, the gate workfunction was chosen to be 4.3 eV, and the source and drain contact resistance is 0.6 ohm-mm. A parallel electric field dependent mobility model [2] was used in the simulation to account for the velocity saturation effect:

32

v=

(3.1)

1 + ( E / E sat )

where v is the carrier velocity, is the low field mobility, E is the electric field in the direction of current flow, Esat is the electric field at which velocity saturation occurs, and is a user-definable parameter in the model.

In the simulation, the low-field electron mobility is 1200 cm2/Vs, and the electron saturation velocity is 1.8 107 cm/s. The velocity-field relationship is shown in Fig. 3.2.

Fig. 3.2 Electron velocity vs lateral electric field in an AlGaN/GaN HFET

3.3 Space charge components in AlGaN/GaN HFET and I-V fitting In order to accurately simulate the device performance, some modifications to the simple approach stated in 3.2 can be made. To simulate the polarization-induced electric fields in the

33

device, the same amount of positive and negative fixed sheets of charge were included at the AlGaN/GaN interface and the AlGaN surface, respectively [3, 4]. The influence of the surface charge (i.e., dangling bonds and/or deep traps due to process damage) was also considered by introducing positive defect charge on top of the AlGaN layer [5, 6].

The graphical scheme of space charge components considered in the TCAD model is highlighted in red in Fig. 3.3.

Fig. 3.3 Graphical scheme of space charge components in an AlGaN/GaN HFET considered in TCAD model

The electron transport parameters were adjusted until the simulation accurately reproduced the measured data, as shown in Fig. 3.4. There are three different gate biases shown in the IV curve including Vg = 1V for open channel, Vg = -6V for pinch-off, and Vg = -2.5V, which is a mid-point between the first two. The parameters used in the fitting are shown in Table 3.1

34

Table 3.1 Parameters used in the TCAD simulation

Fig. 3.4. Measured and simulated Ids vs Vds curves of an AlGaN/GaN HFET

35

3.4 Internal electron concentration profile in AlGaN/GaN HFETs The 2-D contours of the electron concentration profile of an AlGaN/GaN HFET biased at Vg = 1 V and Vds = 50 V are shown in Fig. 3.5. The electrons in GaN are distributed extremely close to the AlGaN/GaN heterojunction. There is a depletion layer under the Schottky gate where the channel electrons right below the gate edge on the drain side are mostly depleted, therefore, the density of electrons in the bulk GaN exhibits a V shape.

Fig. 3.5 2-D contours of electron concentration in an AlGaN/GaN HFET (Vg = 1V, Vds = 50V)

Because a very thin layer of electrons, on a nm scale, is formed in the hetero-interface, the electrons in this channel must be treated quantum-mechanically as a two-dimensional electron gas. Schrdingers Equation should be included to calculate the electron distribution and to accurately simulate device performance. Fig. 3.6 shows the electron density along the

36

vertical direction under the source region of the device, simulation results for the condition where the quantum model is not included are also shown for comparison. According to quantum-mechanical theory, the channel electrons occupy discrete energy bands, which cause the electron density to peak at 2 nm below the AlGaN/GaN hetero-interface, the thickness for the 2DEG channel is 4-6 nm.

Fig. 3.6 Linear and log scale of electron density vs depth in an AlGaN/GaN HFET

37

The electron density is not uniformly distributed in the channel because of the depletion layer resulting from the Schottky gate contact. In order to compare the electron density under the source, gate and drain, electron density along the vertical direction in the three different regions has been plotted and shown in Fig. 3.7.

Fig. 3.7 Linear and log scale of electron density under source, gate and drain in an AlGaN/GaN HFET

38

For the mid-point of the gate-source region and gate-drain region, the electrons are confined in the 2DEG channel but the peak value for electron density under the gate-drain region is less than that under the gate-source region. Also, the electron density under the gate-drain region decreases rapidly to a level of 1014 cm-3 within 10 nm of the heterojunction, which is different from the gate-source region. Under the gate edge on the drain side, the electrons are not confined in the channel; the electron density even increases when going from the AlGaN/GaN interface deeper into the GaN bulk region.

Fig. 3.8 shows the electron density along the channel for different gate and drain biases measured at 2 nm below the AlGaN/GaN heterojunction where the electron density is highest (mid-channel). It can be seen that the depletion region under the gate increases and extends to the drain region as the gate voltage approaches pinch-off, and also as drain voltage increases. Furthermore, for very high drain bias, the channel electrons become partially depleted even for high current, open channel conditions.

39

(a)

(b)

Fig. 3.8 Electron density along the 2DEG channel in an AlGaN/GaN HFET (a) Vds = 15V, (b) Vds = 50V

40

3.5 Internal potential profile in AlGaN/GaN HFETs The 2-D contours of the potential profile of an AlGaN/GaN HFET biased at Vg = 1V and Vds = 50V are shown in Fig. 3.9. The potential along the channel for different gate and drain biases measured at mid-channel is shown in Fig. 3.10. For the open channel case when Vg = 1V, where current is very large, a 1-2 Volts voltage drops across the source and drain access region respectively. For other bias conditions, there is almost no voltage drop in the gatesource region and gate-drain region; most of the voltage drops in a relatively narrow region beside the gate edge on the drain side. The voltage drop region increases and extends to the drain side as gate bias becomes more negative and drain bias becomes larger.

Fig. 3.9 2-D contours of potential in an AlGaN/GaN HFET (Vg = 1V, Vds = 50V)

41

(a)

(b)

Fig. 3.10 Potential along the 2DEG channel in an AlGaN/GaN HFET (a) Vds = 15V, (b) Vds = 50V

42

3.6 Internal electric field profile in AlGaN/GaN HFETs The 2-D contours of the electric field profile of an AlGaN/GaN HFET biased at Vg = 1V and Vds = 50V are shown in Fig. 3.11. The lateral electric field along the channel for different gate and drain biases measured at mid-channel is shown in Fig. 3.12. As can be expected, the field distribution is peaked at the gate edge of the drain side. The peak electric field increases as the gate voltage approaches pinch-off, and also as drain voltage increases. Therefore, highfield conditions are attained at the lower right end of the load line when the instantaneous bias point sweeps the load line during RF operation.

The magnified lateral electric field in the source region is also shown. The electric field under the gate-source region is larger for less negative gate bias; the larger field gives the larger electron velocity and larger drain current because the product of electron velocity and electron concentration gives the current. For the pinch-off case, the lateral electric field is almost zero, and there is almost no current in the channel.

The total electric field in the channel peaks at almost the same position with the same value as the lateral electric field, because the vertical electric field is very small under the gate edge compared with the lateral electric field.

43

Fig. 3.11 2-D contours of lateral electric field in an AlGaN/GaN HFET (Vg = 1V, Vds = 50V)

44

Fig. 3.12 Lateral electric field along the 2DEG channel in an AlGaN/GaN HFET (a) Vds = 15V, (b) Vds = 50V

45

The electric field on the surface is also important. Fig. 3.13 shows the electric field for different gate and drain biases along the interface between the AlGaN barrier layer and SiN passivation layer. Due to the geometry of the FET, the electric field at the gate edge will be very high, which is sufficient to produce a tunneling current from the gate metal to the semiconductor. Compared with the electric field in the channel, the electric field on the AlGaN surface is higher and more sharply peaked. The peak electric field on the AlGaN surface is also larger for more negative gate bias and larger drain bias.

The peak electric field in both the channel and the surface are of great importance to breakdown and reliability issues. Specifically, for AlGaN/GaN HFETs, the high electric field in the channel can cause impact ionization in the channel, while the high electric field on the surface is related to performance degradation and reliability of the device. These topics will be addressed in the following chapters.

46

Fig. 3.13 Lateral electric field along the AlGaN surface in an AlGaN/GaN HFET (a) Vds = 15V, (b) Vds = 50V

47

References

[1]

S. Karmalkar and U. K. Mishra, "Enhancement of breakdown voltage in AlGaN/GaN high electron mobility transistors using a field plate," Electron Devices, IEEE Transactions on, vol. 48, pp. 1515-1521, 2001.

[2] [3]

Silvaco Manual, Silvaco Data Systems Inc., Santa Clara, CA. O. Ambacher, J. Smart, J. R. Shealy, N. G. Weimann, K. Chu, M. Murphy, W. J. Schaff, L. F. Eastman, R. Dimitrov, L. Wittmer, M. Stutzmann, W. Rieger, and J. Hilsenbeck, "Two-dimensional electron gases induced by spontaneous and piezoelectric polarization charges in N- and Ga-face AlGaN/GaN heterostructures," Journal of Applied Physics, vol. 85, pp. 3222-3233, 1999.

[4]

E. T. Yu and O. Manasreh, "Spontaneous and piezoelectric polarization in nitride heterostructures.," in III-V Nitride Semiconductors: Applications and Devices (Optoelectronic Properties of Semiconductors and Superlattices, 16): Taylor & Francis, 2003.

[5]

W. Saito, M. Kuraguchi, Y. Takada, K. Tsuda, I. Omura, and T. Ogura, "Influence of surface defect charge at AlGaN-GaN-HEMT upon Schottky gate leakage current and breakdown voltage," Electron Devices, IEEE Transactions on, vol. 52, pp. 159-164, 2005.

[6]

R. Vetury, N. Q. Zhang, S. Keller, and U. K. Mishra, "The impact of surface states on the DC and RF characteristics of AlGaN/GaN HFETs," Electron Devices, IEEE Transactions on, vol. 48, pp. 560-566, 2001.

48

Chapter 4: Non-linear source resistance and corresponding performance degradation in AlGaN/GaN HFETs

GaN is a wide band gap material where the critical electric field for breakdown is as high as 2 MV/cm, which is 5-10 times larger than the values for conventional Si and GaAs materials. This high breakdown field makes it possible for GaN based devices to sustain a much larger DC bias and RF terminal voltage, which is necessary for high power applications in microwave/RF systems. The drain voltage that could be sustained in AlGaN/GaN HFETs can be as high as Vds = 50-60 V, which is much larger than the typical value of Vds = 8-12 V for GaAs FETs. With the help of a field plate, this Vds value could be much larger. For example, it has been reported [1] that field plated AlGaN/GaN HFETs can sustain 120 V drain bias and produce greater than 30 W/mm RF output power density at S-band.

When a high drain voltage is applied in an AlGaN/GaN HFET, the RF terminal voltage that could be applied to the input of the device will increase correspondingly, which makes the device operate in large-signal mode. The input impedance becomes a function of the RF input power, and the source resistance of the device demonstrates a nonlinear function of the channel current, which results in a degradation of RF performance and linearity [2]. In particular, the transconductance can also decrease with input RF drive. Furthermore, the input impedance of the device demonstrates anomalous behavior where the input capacitance of AlGaN/GaN HFETs often decreases with increasing RF power. This behavior is in

49

contrast to classical FET behavior where the input capacitance increases with RF drive, which results from the decrease in depletion width as input power increases. In this chapter, the origin of the nonlinear source resistance is investigated with the help of TCAD modeling and simulation. The physical operation of the device, including effects that limit RF performance and frequency response, will also be explained and discussed.

4.1 Space charge limited current conduction Under equilibrium conditions, the internal electric field in AlGaN/GaN HFETs can be expressed according to Poissons Equation:

dE q + = ( N d n0 ) dx where E is the one-dimensional electric field in the direction of current flow, Nd+ is the effective donor density that represents the positive charge in HFETs resulting from spontaneous and piezoelectric polarization in the AlGaN/GaN interface, and n0 is the free electron density under thermal equilibrium. The thermal equilibrium density of electrons is essentially equal to the donor density (i.e., Nd+ = n0), therefore the internal electric field is a constant along the source access region.

When AlGaN/GaN HFETs are operated in a large signal mode where high magnitude RF input power is applied, the injected charge in the source access region can be comparable to the thermal equilibrium density of electrons and cannot be neglected in Poissons Equation. The new internal electric field can be related to the injected charge:

50

dE q + q = ( N d n0 n) n dx where n is the density of injected charge and the other terms have their usual meaning. The electric field in the source access region is reduced in magnitude as a function of increasing charge injection, and correspondingly, the source resistance becomes a function of current injection [2].

4.2 Nonlinear source resistance

4.2.1 One-dimensional simulation A one-dimensional slab of GaN in analogy to the source access region in AlGaN/GaN HFETs has been numerically simulated to investigate the steady-state electron transport in the device. The basic equations solved in the TCAD simulation include Poissons Equation and the Drift-Diffusion Equations. The uniform doping in the slab is Nd = 2.1E19 cm-3, in analogy to the two-dimensional electron gas density in the source access region in AlGaN/GaN HFETs. This doping corresponds to a 2DEG sheet charge density of nss = Nd * h = 1.05 1013 cm-2, where h is the thickness of 2DEG channel whose value is assumed to be 5 nm according to the simulation results shown in Chapter III. The low-field electron mobility was defined at n = 1500 cm2/Vs, while the electron saturation velocity was defined at vsat,n = 1.2 107 cm/s. In order to simulate the condition where excess electrons are injected into the channel, the current boundary condition in the TCAD simulation has been used to inject a dc current into the source end of the slab. For different injected currents J and different slab lengths D, the electric field E and the voltage drop across the slab V can be simulated.

51

The electrical resistivity of the slab for different injected currents and different slab lengths can be calculated by = E J . The plot of vs J is shown in Fig. 4.1. From the curve, it can be seen that the resistivity is essentially constant (increases very slowly) when the current density is below some critical value Jsat. If the current density further increases exceeding Jsat, the resistivity increases abruptly. For longer slab lengths, corresponding to longer source access region, the resistivity increases more rapidly.

Fig. 4.1 Resistivity vs current density for one-dimensional GaN slab

The critical current density value Jsat can be calculated by

J sat = qN d v sat 40MA / cm 2 While the resistivity at low current density can be calculated by

(4.1)

= 1 qN d = 300 cm
These two values are consistent with the simulated values according to Fig. 4.1.

(4.2)

52

The voltage drop across the slab demonstrates similar behavior to the resistivity where V increases abruptly when the J exceeds the critical current density value Jsat, which is shown in Fig. 4.2. For longer slab lengths, the voltage drop also increases more rapidly with current density. Note that hundreds of volts drain voltage cannot be sustained in real devices because the critical electric field for breakdown in GaN materials is on the order of Ec ~ 2 MV/cm. The simulated voltage drop provides an indication of how the voltage drop changes with current density and slab length qualitatively.

Fig. 4.2 Voltage drop vs current density for one-dimensional GaN slab

The relationship between the critical current density for the onset of the space charge effects and the background doping is shown in Fig. 4.3. Jsc linearly increases from 3 kA/cm2 to about 30 MA/cm2 as background doping increases from 1 1015 cm-3 to 1 1019 cm-3. For AlGaN/GaN HFETs, the critical current density for the onset of the space charge effects is on

53

the same order of or even smaller than the saturation current in the device, so this condition can be achieved in practical devices and this phenomenon is found to affect device performance.

Fig. 4.3 Critical current density for space charge limited conduction vs background doping

4.2.2 Source resistance in AlGaN/GaN HFETs The extrinsic region in the device introduces parasitic source and drain resistance, these resistances are usually assumed as a constant in most of the commercially available large signal RF models. In this work, the nonlinear behavior of the source and drain resistance are found to exist in practical devices under high current levels. In AlGaAs/InGaAs HFETs, the nonlinear source and drain resistance phenomenon has been attributed to electron velocity saturation effects in the gate-source region and gate-drain region [3]. While for AlGaN/GaN HFETs, electron velocity saturation does not occur in the gate-source region and gate-drain region according to the detailed TCAD simulation. The nonlinear behavior of the source

54

resistance in GaN based devices is due to the onset of the space charge limited current conduction in the source access region as explained in 4.1.

The dynamic source resistance [4] can be obtained under the condition where the source contact is grounded, while the gate electrode is forward-biased with respect to the channel. In this work, the nonlinear source resistance was numerically simulated by Silvaco TCAD. A finite gate current is injected into the channel of AlGaN/GaN HFETs, and different drain current levels are obtained by varying the drain voltage. The dynamic source resistance rs is measured as the derivative of the gate voltage with respect to the drain current. As shown in Fig. 4.4, rs exhibits a nonlinear function of drain current and it increases rapidly at high current levels.

Fig. 4.4 Dynamic resistance vs drain current in AlGaN/GaN HFET

55

4.3 Transconductance degradation and impedance anomalies in AlGaN/GaN HFETs

The increase of the source access resistance at high drain current levels results in a decrease of the extrinsic transconductance (gm) and the gate to source capacitance (Cgs).

The gm and Cgs of the AlGaN/GaN HFET can be simulated using Silvaco TCAD and are shown as a function of gate-source voltage for different drain biases in Fig. 4.5 and 4.6. Both the gm and Cgs values for this device achieve a maximum when the gate bias is ~ -3V. Further increase of the gate bias degrades both the gm and Cgs values. The reduction of transconductance can be as large as 50%. As the drain bias increases, the peak gm value decreases, while the peak Cgs value increases.

Fig. 4.5 gm vs Vgs for different Vds in an AlGaN/GaN HFET

56

Fig. 4.6 Cgs vs Vgs for different Vds in an AlGaN/GaN HFET

The mechanism of transconductance degradation at high current levels in AlGaN/GaN HFETs has been extensively investigated [4, 5]. Juang et al. [6] proposed that loss of mobility with increasing carrier concentration is due to the effect of the interface roughness, which is similar to the explanation of gm degradation at high current levels in Si MOSFETs [7]. While the degradation of cutoff frequency, fT, in GaAs-based HFETs is attributed to the reduction in the modulation efficiency due to donor neutralization [8], hot phonon scattering [9] is proposed as the reason for gm variation in GaN based HFETs. However, Monte Carlo simulations [10, 11] suggest that the degradation in gm is due to neither interface roughness scattering nor hot phonon scattering. In the next section, it is explained in detail that the gm

57

degradation and impedance anomalies in AlGaN/GaN HFETs are due to the nonlinear behavior of the source resistance.

4.4 Simplified equivalent circuit model to explain the origin of transconductance degradation and impedance anomalies

The difference between the extrinsic and the intrinsic gm and Cgs can be explained by the simplified model for the equivalent circuit of an AlGaN/GaN HFET, which is shown in Fig. 4.7, where Cgd and gd are neglected.

Fig. 4.7 Simplified model for equivalent circuit of an AlGaN/GaN HFET

From the simplified equivalent circuit model, the extrinsic gm and Cgs can be described in terms of the intrinsic gm and Cgs according to the expressions,
g mext = g min 1 + Rs g min

(4.3)

58

C gsext =

C gsin 1 + Rs g min

(4.4)

It can be seen that an increase in Rs will produce a reduction in gm and Cgs. The reduced transconductance produces a degradation in the RF output power, gain, and PAE. The linearity and dynamic range of the device are also negatively affected. This is one reason why high-performance devices are designed with very low source resistance.

4.5 Discussion of impedance anomalies in AlGaN/GaN HFETs

The Cgs behavior as a function of input power drive in some AlGaN/GaN HFETs is opposite to the normal behavior of FETs. Fig. 4.8 shows the experimentally measured Cgs vs input power drive for an AlGaN/GaN HFET. In normal FETs, Cgs increases with RF drive as the device is driven into saturation because the depletion width decreases. While in AlGaN/GaN HFETs, the reduction in Cgs is caused by increasing of source access resistance, which was explained in 4.4. The fall of Cgs at high current levels can be also due to increasing holes generated by impact ionization in the channel: Electron-hole pairs are generated when electric field in the channel is large enough and impact ionization occurs. The electrons travel toward the drain, while the holes travel in the opposite direction toward the source, the holes recombine with channel electrons in the gate-source region, lowering the electron sheet charge density, resulting in a decrease in the threshold current density for the onset of spacecharge limited current conduction, and consequently causing the reduction in extrinsic Cgs and anomalies in impedance.

59

Fig. 4.8 Experimentally measured Cgs vs input power for an AlGaN/GaN HFET

4.6 Cgs, Cgd and gm, gd as a function of drain current

Cgs and gm were also simulated for increasing drain bias when the gate bias is fixed at 0V, which is shown in Fig. 4.9. For the linear region of device operation where drain current is less than 1.1A/mm, both the magnitude of Cgs (600 fF/mm) and the magnitude of Cgd (400 fF/mm) are essentially constant with increasing Ids. For the saturation region where drain current exceeds 1.1A/mm, Cgd is much less than Cgs. At first the magnitude of Cgs increases with drain current. After some critical point, the magnitude of Cgs begins to decrease with drain current. This can be explained as follows: Extrinsic Cgs at first increases as Ids increases, following the normal FET behavior until the current density exceeds the threshold value for the on-set of space charge effects. Cgs then decreases as Ids increases because the source resistance increases rapidly once the space-charge effects occur.

60

Fig. 4.9 Cgs & Cgd vs Ids of an AlGaN/GaN HFET

Fig. 4.10 shows the change of transconductance and channel conductance vs drain current. Similarly, for the linear region where drain current is less than 1.1 A/mm, as drain current increases, gm increases rapidly while gd decreases rapidly. gm begins to decrease with the onset of current saturation (1.1 A/mm). This indicates that the nonlinear source resistance begins to set in at a current level of around 1.1 A/mm according to the external gm expression. The difference between the inflection points of gm in Fig. 4.10 and Cgs in Fig. 4.9 is possibly because although the source resistance begins to increase from Ids = 1.1A/mm, the increase of the intrinsic Cgs dominates the extrinsic Cgs until Rs achieves a very large value and begins to dominate as the drain current exceeds 1.2A/mm.

61

Fig. 4.10 gm & gd vs Ids of an AlGaN/GaN HFET

In order to verify that the onset of the space charge effect is related to the background charge, several devices with different 2DEG concentration were simulated and their Cgs behavior is compared in Fig. 4.11. The comparison indicates that for less 2DEG concentration where background charge density is lower, the magnitude of Cgs begins to decrease at lower drain current, representing that the critical current density for the onset of the space-charge effects decreases.

62

Fig. 4.11 Cgs vs Ids for AlGaN/GaN HFETs with different 2DEG concentration

4.7 Cutoff frequency degradation due to nonlinear source resistance

If a linear parasitic source resistance is considered, the simplified cutoff frequency fT can be expressed as
fT = gm 2 (C gs + C gd )

(4.5)

For a typical device where Cgd << Cgs, fT can be further simplified to the form
fT = gm 2C gs

(4.6)

63

From the fT expression, even though the extrinsic gm degraded by a factor of 1/(1+gm*Rs), the extrinsic Cgs is also affected by the same factor and the fT values seem not to be affected by the nonlinear source resistance.

The nonlinear source resistance effect can make Rs increase dramatically at high current levels, and we have to include the nonlinear Rs in order to get an accurate representation for the extrinsic fT. Cgd should be taken into account in this case because the resulting Miller effect increases the effective Cgd by a factor of (1+gm*Rs), as shown in Fig. 4.12. The extrinsic fT can be expressed as:

fT =

gm 2 (C gs + C gd (1 + g m Rs ))

(4.7)

Fig. 4.12 Inclusion of Cgd in the simplified equivalent circuit of an AlGaN/GaN HFET

The resulting effects of nonlinear source resistance upon fT are shown in Fig. 4.13, where the intrinsic fT was calculated using the simplified expression shown in Eq. (4.5) and (4.6), and

64

the extrinsic fT which considers the nonlinear source resistance was calculated according to Eq. (4.7). It can be seen that the fT is lower for high current levels. Also, gm is further lowered when Rs is taken into account in the fT expression. Therefore the frequency performance of the device is also limited by the nonlinear behavior of the source resistance.

Fig. 4.13 Intrinsic and Extrinsic fTs for an AlGaN/GaN HFET

Measured fT for different gate and drain biases is shown in the 3-D map in Fig. 4.14. Peak fT is achieved when the gate is biased at Vgs = 4 V, while the drain is biased at Vds = 6 V. According to the Ids vs Vds curves, the peak fT is obtained at 1/3 of the maximum drain current because a further increase of Ids results in degradation in transconductance and frequency response. TCAD simulation gives similar results where the peak fT is also achieved at 1/3 of the maximum drain current; further increase of both Vgs and Vds results in a decrease in fT.

65

Fig. 4.14 3-D map for fT vs Vgs & Vds of an AlGaN/GaN HFET

66

References

[1]

Y. F. Wu, A. Saxler, M. Moore, R. P. Smith, S. Sheppard, P. M. Chavarkar, T. Wisleder, U. K. Mishra, and P. Parikh, "30-W/mm GaN HEMTs by field plate optimization," Electron Device Letters, IEEE, vol. 25, pp. 117-119, 2004.

[2]

R. J. Trew, L. Yueying, L. Bilbro, Weiwei Kuang, R. Vetury, and J. B. Shealy, "Nonlinear source resistance in high-voltage microwave AlGaN/GaN HFETs," Microwave Theory and Techniques, IEEE Transactions on, vol. 54, pp. 2061-2067, 2006.

[3]

D. R. Greenberg and J. A. del Alamo, "Velocity saturation in the extrinsic device: a fundamental limit in HFET's," Electron Devices, IEEE Transactions on, vol. 41, pp. 1334-1339, 1994.

[4]

T. Palacios, S. Rajan, A. Chakraborty, S. Heikman, S. Keller, S. P. DenBaars, and U. K. Mishra, "Influence of the dynamic access resistance in the g m and f T linearity of AlGaN/GaN HEMTs," IEEE Trans. Electron Devices, vol. 52, pp. 21172123, 2005.

[5]

Y. R. Wu, M. Singh, and J. Singh, "Sources of transconductance collapse in III-V nitrides - Consequences of velocity-field relations and source/gate design," IEEE Transactions on Electron Devices, vol. 52, pp. 1048-1054, 2005.

[6]

J. R. Juang, T. Y. Huang, T. M. Chen, M. G. Lin, G. H. Kim, Y. Lee, C. T. Liang, D. R. Hang, Y. F. Chen, and J. I. Chyi, "Transport in a gated Al0.18Ga0.82N/GaN electron system," Journal of Applied Physics, vol. 94, pp. 3181-3184, 2003.

67

[7]

H. S. Wong, M. H. White, T. J. Krutsick, and R. V. Booth, "Modeling of Transconductance Degradation and Extraction of Threshold Voltage in Thin Oxide Mosfet," Solid-State Electronics, vol. 30, pp. 953-968, 1987.

[8]

M. C. Foisy, P. J. Tasker, B. Hughes, and L. F. Eastman, "The role of inefficient charge modulations in limiting the current-gain cutoff frequency of the MODFET," Electron Devices, IEEE Transactions on, vol. 35, pp. 871-878, 1988.

[9]

A. Matulionis, J. Liberis, L. Ardaravicius, L. F. Eastman, J. R. Shealy, and A. Vertiatchikh, "Hot-phonon lifetime in AlGaN/GaN at a high lattice temperature," Semiconductor Science and Technology, vol. 19, pp. S421-S423, 2004.

[10]

T. Li, R. P. Joshi, and C. Fazi, "Monte Carlo evaluations of degeneracy and interface roughness effects on electron transport in AlGaNGaN heterostructures," Journal of Applied Physics, vol. 88, pp. 829, 2000.

[11]

J. M. Barker, D. K. Ferry, S. M. Goodnick, D. D. Koleske, A. Allerman, and R. J. Shul, "High field transport in GaN/AlGaN heterostructures," Journal of Vacuum Science & Technology B, vol. 22, pp. 2045-2050, 2004.

68

Chapter 5: Gate tunnel leakage and reliability in AlGaN/GaN HFETs

AlGaN/GaN HFETs are considered a promising device for high power applications in microwave systems and have demonstrated excellent RF performance [1-3]. However, under high bias and large-signal RF drive conditions the devices still suffer from gate leakage and reliability problems where the drain current and the RF output power degrade as a function of time. These phenomena are attributed to the high electric field at the gate edge, which has been shown to achieve a magnitude in the range of 6-8 MV/cm. This magnitude of electric field is sufficient for electrons to tunnel from the gate onto the AlGaN surface [4]. The electrons tunneling from the gate travel in a sluggish manner toward the drain [5] because the velocity of these electrons is limited due to the existence of surface states and possibly high carrier scattering rates.

Many groups have been investigating the gate leakage [6, 7] and reliability issues [8, 9], and several different methods including surface passivation and treatment [10, 11], field-plates [12], deep gate recesses [13], and other techniques to reduce the gate leakage current and to alleviate the reliability problem have been investigated. However, the physical basis of the gate leakage and the reliability problem hasnt been fully understood.

In this chapter, the mechanism of the quantum-mechanical tunneling is introduced, and the tunneling model is implemented in the TCAD simulation to calculate the gate current under 69

different gate and drain biases. In order to calibrate the TCAD model with the measured data, variable surface electron velocities are assumed under different lateral electric field, and an analytical surface electron hopping model is successfully employed to explain the simulated and the measured results. Furthermore, the TCAD model and the analytical model are verified in another set of measured data of device reliability characteristics. To our best knowledge, it is the first model which could be used to reproduce both the measured drain current v.s. stress time data and the measured gate current vs stress time data simultaneously. Other factors, like effective electron tunnel mass, which may have an impact on the gate leakage, is also discussed.

5.1 Quantum-mechanical tunneling The gate for AlGaN/GaN HFETs forms a Schottky barrier, and it is important to precisely control the Schottky contact to reduce the leakage current. In order to understand the mechanism of the gate leakage current, current transport mechanisms through the Schottky barrier are discussed in this section.

The electrons can overcome the Schottky energy barrier if they are thermally excited to gain a large enough energy that is above the top of the barrier. The electrons can also penetrate the barrier under certain conditions by quantum-mechanical tunneling even if their energy is below the top of the barrier. The tunneling process can occur if solutions of Schrdingers Equation exist, which correspond to energy levels in the forbidden gap.

70

The tunneling mechanism considered in the TCAD model is based on Padavani and Strattons theory [14] on thermionic-field emission (TFE). In the TFE model that is shown in Fig. 5.1, the electron tunneling current from the gate metal into the semiconductor can be given by: J tn = A*T k

q b

FmT (U )(1 Fs )dU =

4m * qkT h3

q b

FmT (U )(1 Fs )dU

(5.1)

Fig. 5.1 Thermionic-field emission (TFE) model in an AlGaN/GaN HFET

where A* is the Richardson constant, T is the absolute temperature, k is Boltzmanns constant, qb is the Schottky barrier height, Fm is the Fermi-Dirac distribution function in the metal, Fs is the Fermi-Dirac distribution function in the semiconductor, U is the energy levels which are below the top of the Schottky barrier, m* is the electron effective mass for the semiconductor, q is the electron charge, and h is Plancks constant. T(U) is the quantum

71

transmission coefficient of electrons through the triangular barrier according to the WKB approximation, which can be given by:
8 (2qm * )1 / 2 (q b U ) 3 / 2 T (U ) = exp 3qhE

(5.2)

where E is the electric field in the barrier.

According to the depletion approximation, E can be given by:

E = (2qN d Vd )1 / 2

(5.3)

where Nd is the donor concentration, Vd is the diffusion potential, which is the difference between the top of the Schottky barrier and the conduction band of the undepleted semiconductor, and is the dielectric constant of the semiconductor. Using the expression for E, T(U) can be expressed by:
4 (q b U ) 3 / 2 T (U ) = exp 1/ 2 E 00Vd (5.4)

where E00 is an important parameter in the TFE theory and can be expressed by: E 00 h = 4 Nd * m
1/ 2

= 1.85 10

14

Nd m r r

1/ 2

(5.5)

where mr is the relative effective mass of electrons in the semiconductor, and r is the relative dielectric constant of the semiconductor. The quantum transmission coefficient increases exponentially with the electron energy because higher energy electrons see a thinner and lower barrier.

72

The reverse tunneling current can be expressed as:

VR qV R J tn = J s exp E coth(qE / kT ) 1 exp kT 00 00

(5.6)

with the pre-exponential term Js expressed as:

Js = J m q (E 00 ( b V R Vn )) kT cosh (qE 00 / kT )
1/ 2

( b Vn ) exp E coth(qE / kT ) 00 00

(5.7)

qV where J m = A*T 2 exp n kT

5.2 Ids and Ig vs Vds and Vg of an AlGaN/GaN HFET

5.2.1 DC Ids vs Vds and Vg As shown in Fig. 5.2, Ids vs Vds curves of an AlGaN/GaN HFET were used to calibrate the TCAD model where the electron transport parameters were adjusted until the simulation data accurately matched the measured Ids data, as described in 3.3.

73

Fig. 5.2 Measured and TCAD simulated Ids vs Vds of an AlGaN/GaN HFET

5.2.2 Ig vs Vds and Vg After the TCAD model was calibrated, the gate current for different gate and drain biases can be calculated using the electron quantum mechanical tunnel model with the tunnel effective mass value of m* = 0.2 [15]. The surface electron velocity value was extracted when the simulated gate current reproduces the measured data under Vg = -3V and Vds = 2V, this velocity value was then used to calculate gate current values for other bias points. It was found this model did not accurately simulate the measured gate current data and the simulated gate current values were underestimated for larger drain bias and more negative gate bias, which is shown in Fig. 5.3.

74

Fig. 5.3 Measured and TCAD simulated Ig vs Vds of an AlGaN/GaN HFET using constant surface electron velocities for different gate and drain biases

5.2.3 Surface electron velocity as adjustable parameter to reproduce measured Ig There are several possible reasons why the gate current values calculated by quantummechanical tunneling are underestimated for larger drain bias and more negative gate bias. It is speculated that the electric fields are different for different drain and gate biases, and accordingly the electrons that tunnel from the gate travel with a variable velocity along the AlGaN surface. Regarding this velocity value as an adjustable parameter for different combination of Vg and Vds, the model results were much improved and the simulated gate current was found to accurately reproduce the measured gate leakage current, as shown in Fig. 5.4.

75

Fig. 5.4 Measured and TCAD simulated Ids vs Vds of an AlGaN/GaN HFET using variable surface electron velocities for different gate and drain biases

The surface electron velocity values used in the fitting are shown below in Table 5.1:

Table 5.1 Surface electron velocities used in simulation to reproduce measured gate current vsurf & Elat Vds = 2V Vds = 4V Vds = 6V Vds = 8V Vds = 10V Vg = -3V vsurf = 2.98103 cm/s Elat = 1.21106 V/cm vsurf = 3.10103 cm/s Elat = 1.54106 V/cm vsurf = 3.45103 cm/s Elat = 1.77106 V/cm vsurf = 3.85103 cm/s Elat = 2.00106 V/cm vsurf = 3.95E3 cm/s Elat = 2.10106 V/cm Vg = -5V vsurf = 4.45103 cm/s Elat = 1.82106 V/cm vsurf = 4.98103 cm/s Elat = 2.09106 V/cm vsurf = 5.49103 cm/s Elat = 2.31106 V/cm vsurf = 6.09103 cm/s Elat = 2.50106 V/cm vsurf = 6.70E3 cm/s Elat = 2.66106 V/cm Vg = -7V vsurf = 5.59103 cm/s Elat = 2.21106 V/cm vsurf = 6.67103 cm/s Elat = 2.45106 V/cm vsurf = 7.69103 cm/s Elat = 2.63106 V/cm vsurf = 8.68103 cm/s Elat = 2.78106 V/cm vsurf = 9.51103 cm/s Elat = 2.91106 V/cm

76

The lateral electric field values at the gate edge on the drain side for different gate and drain biases are also included in the table. In order to investigate the relationship between the surface electron velocity and the lateral electric field at the gate edge, the surface electron velocity has been plotted as a function of the lateral electric field, as shown in Fig. 5.5. The surface electron velocity increases almost linearly with the magnitude of the lateral electric field.

Fig. 5.5 Surface electron velocity used in the Ig vs Vds fitting vs lateral electric field

5.3 Reliability of AlGaN/GaN HFETs

Fig. 5.6 shows the measured drain and gate current vs stress time, where the gate bias is kept at -2.6V, and the drain bias is kept at 15V.

77

Fig. 5.6 Measured and TCAD simulated Ids and Ig vs stress time

As time proceeds, more and more electrons tunnel from the gate, and the accumulation of negative charge on the surface results in a reverse biased virtual gate. The spatial extent of this second gate depends on the rate of two processes: (1) The injection rate of electrons

78

tunneling from the gate; and (2) The rate of electrons traveling from the gate edge toward the drain under high electric field. The schematic illustration of the virtual gate in an AlGaN/GaN HFET is shown in Fig. 5.7

Fig. 5.7 Schematic illustration of virtual gate

More and more electrons in the channel are depleted as the stress time proceeds due to increasing electron accumulation on the surface of the AlGaN beside the gate. As a result, the drain current of the device keeps decreasing as a function of stress time. On the other hand, the electrons accumulated beside the gate also have an electrostatic feedback effect on the peak electric field under the gate, and the reduced peak electric field at the gate edge causes the electron tunneling current to decrease as a function of time because the reduced electric field increases the tunnel barrier. Therefore, the gate current for the device becomes less negative, and the magnitude of drain current reduction over time also decreases. For 79

sufficiently long stress time the rate of electron tunneling from the gate is equal to the rate of electrons moving toward the drain, and both the drain and the gate current stabilize. Under these conditions the virtual gate length ceases to increase as a function of stress time.

From the above analysis, the device condition for a given stress time can be represented by a static condition in the TCAD model with specific defined values for the density of tunnel electrons and surface electron velocity. As time proceeds, the number of negative charges beside the gate increases, resulting in an increase in the virtual gate length. Therefore, the virtual gate length and the surface electron velocity can be treated as the only two fitting parameters (as shown in Fig. 5.8) necessary to accurately simulate both the measured drain and the gate current vs stress time, as shown in Fig. 5.6.

Fig. 5.8 Virtual gate length and surface electron velocity used in the TCAD to reproduce the measured reliability data of an AlGaN/GaN HFET

80

The relationship between the surface electron velocity used in the simulation and the magnitude of the lateral electric field is plotted in Fig. 5.9. The results indicate a near linear relationship.

Fig. 5.9 Surface electron velocity used in the Ig vs Vds fitting vs lateral electric field

5.4 Analytical model for surface electron hopping

The electrons that tunnel from the gate can be localized in the surface defects (most likely nitrogen vacancies) and/or dangling bonds, and can travel over the multiple barriers with spacing s and barrier height G as shown in Fig. 5.10. In this formulation [16] G represents the activation energy associated with the deep levels associated with the surface trap-to-trap current conduction.

81

Fig. 5.10 Trap-to-trap surface electron hopping model for AlGaN/GaN HFETs

Eyring's reaction rate model [17] can be employed to describe the electron thermionic emission frequency over the barrier:

kT G exp( ) h kT

(5.8)

where is the electron emission frequency, k is the Boltzmann constant, h is the Planck constant, and T is the ambient temperature.

Including the effects of a lateral electric field E, the net thermionic emission frequency of electrons can be given by

kT G qEs / 2 qEs / 2 2kT G qEs exp( ) exp( ) exp( ) = exp( ) sinh( ) h kT kT kT h kT 2kT

(5.9)

where q is the electronic charge and s is the spacing between the surface deep level locations.

The electron velocity on the surface can be written as a function of electric field:
82

v = s =

G 2skT qEs exp( ) sinh( ) h kT 2kT

(5.10)

The relationship between the surface electron velocity and the lateral electric field obtained from the TCAD simulation of Igs vs Vds (5.2) can be used to extract G and s values in the surface electron hopping model, which is shown in Fig. 5.11.

Fig. 5.11 G and s extraction for Ig vs Vds for an AlGaN/GaN HFET

The simulated data for surface electron velocity obtained in the TCAD model is in good agreement with the calculated results using the above analytical formula when G = 0.25~0.35eV and s = 0.1~0.5nm. Deviation of G and s causes deviation of gate current.

83

For the reliability data of Ids and Ig vs stress time, the analytical surface electron hopping model can also be used to extract the G and s values, as shown in Fig. 5.12. In this case,
G = 0.25~0.3eV and s = 0.1~0.3nm, which agrees very well with the extracted value using

Ids and Ig vs Vds and Vgs curves.

Fig. 5.12 G and s extraction for Ig vs stress time for an AlGaN/GaN HFET

The s value extracted from this surface electron hopping model is on the same scale as the lattice constant for AlGaN, while the extracted G value agrees well with the surface donor level measured by Ringel et al. [18] and Look et al. [19], as well as the activation energy for the surface trap extracted by Zhang et al.[6] and Tan et al. [20].

84

5.5 Effective tunnel mass

The effective mass of tunnel electrons was assumed to be constant in the previous analysis. The effective mass itself could also be a function of electric field. Using constant effective electron tunnel mass for different drain and gate biases could also be the reason for the underestimation of tunneling current for larger drain bias and more negative gate bias. Regarding the effective electron tunnel mass value as an adjustable parameter for different gate and drain biases, while keeping surface electron velocity a constant, the simulated gate current can also reproduce the measured gate leakage current. For fixed gate bias, the effective electron tunnel mass used in the simulation decreases linearly as lateral electric field increases. Similarly, the reliability data could also be reproduced by varying the virtual gate length and the effective electron tunnel mass for different stress time. The plot of the virtual gate length and the effective tunnel mass used in the simulation vs the lateral electric field is shown in Fig. 5.13. Similar linear dependence of the effective electron tunnel mass on the magnitude of the lateral electric field is found, as shown in Fig. 5.14.

85

Fig. 5.13 Virtual gate length and effective tunnel mass used in the TCAD to reproduce the measured reliability data of an AlGaN/GaN HFET

Fig. 5.14 Effective mass used in the Ig vs stress time fitting vs electric field

86

It was reported [9] that the large electric field under the edge of the gate induces an additional strain in the AlGaN barrier layer, and this strain may result in the change in the effective electron tunnel mass. Furthermore, this strain might also be large enough to produce significant lattice stress. As a result, defect formation in the AlGaN barrier may occur, and the subsequent electron trapping in the defects can also make the device suffer from reduced maximum drain current, which is observed as a permanent damage in the device. This phenomenon is beyond the scope of the current research and not addressed in this dissertation.

Increased surface electron velocity or degraded effective tunnel mass have been proposed as two possible reasons for larger gate leakage current at larger drain bias and more negative gate bias. It is also possible that the combination of these two effects results in larger gate tunneling current under larger electric field conditions.

87

References

[1]

K. Krishnamurthy, M. J. Poulton, J. Martin, R. Vetury, J. D. Brown, and B. Shealy, "A 250W S-Band GaN HEMT Amplifier," presented at Compound Semiconductor Integrated Circuit Symposium, 2007. CSIC 2007. IEEE, 2007.

[2]

C. Poblenz, A. L. Corrion, F. Recht, C. S. Suh, R. M. Chu, L. K. Shen, J. S. Speck, and U. K. Mishra, "Power performance of AlGaN/GaN HEMTs grown on SiC by Ammonia-MBE at 4 and 10 GHz," Ieee Electron Device Letters, vol. 28, pp. 945-947, 2007.

[3]

T. Palacios, A. Chakraborty, S. Heikman, S. Keller, S. P. DenBaars, and U. K. Mishra, "AlGaN/GaN high electron mobility transistors with InGaN back-barriers," Electron Device Letters, IEEE, vol. 27, pp. 13-15, 2006.

[4]

R. J. Trew, Y. Liu, W. W. Kuang, and G. L. Bilbro, "The Physics of Reliability for High Voltage AlGaN/GaN HFET's," presented at Compound Semiconductor Integrated Circuit Symposium, 2006. CSIC 2006. IEEE, 2006.

[5]

R. J. Trew, G. L. Bilbro, W. Kuang, Y. Liu, and H. Yin, "Microwave AlGaN/GaN HFETs," Microwave Magazine, IEEE, vol. 6, pp. 56-66, 2005.

[6]

H. Zhang, E. J. Miller, and E. T. Yu, "Analysis of leakage current mechanisms in Schottky contacts to GaN and Al0.25Ga0.75N/GaN grown by molecular-beam epitaxy," Journal of Applied Physics, vol. 99, pp. -, 2006.

88

[7]

A. J. Sierakowski and L. F. Eastman, "Analysis of Schottky gate electron tunneling in polarization induced AlGaN/GaN high electron mobility transistors," Journal of Applied Physics, vol. 86, pp. 3398-3401, 1999.

[8]

R. Vetury, J. B. Shealy, D. S. Green, J. McKenna, J. D. Brown, S. R. Gibb, K. Leverich, P. M. Garber, and M. J. Poulton, "Performance and RF Reliability of GaNon-SiC HEMT's using Dual-Gate Architectures," presented at Microwave Symposium Digest, 2006. IEEE MTT-S International, 2006.

[9]

J. Joh and J. A. del Alamo, "Mechanisms for Electrical Degradation of GaN HighElectron Mobility Transistors," presented at Electron Devices Meeting, 2006. IEDM '06. International, 2006.

[10]

R. Chu, L. Shen, N. Fichtenbaum, S. Keller, A. Corrion, C. Poblenz, J. Speck, and U. Mishra, "Surface Treatment for Leakage Reduction in AlGaN/GaN HEMTs," presented at Device Research Conference, 2007 65th Annual, 2007.

[11]

H. Kim, R. M. Thompson, V. Tilak, T. R. Prunty, J. R. Shealy, and L. F. Eastman, "Effects of SiN passivation and high-electric field on AlGaN-GaN HFET degradation," Ieee Electron Device Letters, vol. 24, pp. 421-423, 2003.

[12]

Y. F. Wu, A. Saxler, M. Moore, R. P. Smith, S. Sheppard, P. M. Chavarkar, T. Wisleder, U. K. Mishra, and P. Parikh, "30-W/mm GaN HEMTs by field plate optimization," Electron Device Letters, IEEE, vol. 25, pp. 117-119, 2004.

[13]

J. S. Moon, S. Wu, D. Wong, I. Milosavljevic, A. Conway, P. Hashimoto, M. Hu, M. Antcliffe, and M. Micovic, "Gate-recessed AlGaN-GaNHEMTs for high-performance

89

millimeter-wave applications," Ieee Electron Device Letters, vol. 26, pp. 348-350, 2005. [14] F. A. Padovani and R. Stratton, "Field and Thermionic-Field Emission in Schottky Barriers," Solid-State Electronics, vol. 9, pp. 695-&, 1966. [15] A. M. Witowski, K. Pakula, J. M. Baranowski, M. L. Sadowski, and P. Wyder, "Electron effective mass in hexagonal GaN," Applied Physics Letters, vol. 75, pp. 4154-4155, 1999. [16] Khairurrijal, F. A. Noor, and Sukirno, "Modeling of stress-induced leakage current in thin gate oxides," presented at Semiconductor Electronics, 2002. Proceedings. ICSE 2002. IEEE International Conference on, 2002. [17] L. Glasstone, and Eyring, The Theory of Rate Processes. New York: McGraw-Hill, 1941. [18] A. C. A. R. Arehart, C. Poblenz, J. S. Speck, U. K. Mishra, S. P. DenBaars, and S. A. Ringel,, "Comparison of deep level incorporation in ammonia and rf plasma assisted molecular beam epitaxy n-GaN films," physica status solidi, to be published. [19] Z. Q. Fang, D. C. Look, W. Kim, Z. Fan, A. Botchkarev, and H. Morkoc, "Deep centers in n-GaN grown by reactive molecular beam epitaxy," Applied Physics Letters, vol. 72, pp. 2277-2279, 1998. [20] W. S. Tan, M. J. Uren, P. A. Houston, R. T. Green, R. S. Balmer, and T. Martin, "Surface leakage currents in SiN/sub x/ passivated AlGaN/GaN HFETs," Electron Device Letters, IEEE, vol. 27, pp. 1-3, 2006.

90

Chapter 6: AlGaN/GaN HFET device design and optimization

Various device structure optimization methods, polarization charge control methods and improved processing methods in AlGaN/GaN HFET technology can be used to reduce the space charge effects and nonlinear source resistance, which were discussed in Chapter III. These techniques can also be employed to mitigate the large gate leakage current and reliability problems discussed in Chapter IV. In order to reduce nonlinear source resistance, reduced gate-to-source spacing can be used. In order to reduce the gate tunneling current and improve the reliability characteristics of AlGaN/GaN HFETs, some modifications to the device structure may be made. It has been shown that the thermionic emission current from the Schottky gate to the AlGaN surface depends on the electric field in the AlGaN barrier layer. In order to reduce the peak electric field at the gate edge on the drain side of the device, the effects of several device parameters, including gate-to-drain spacing and AlGaN barrier thickness and doping, on the peak electric field at the gate edge have been investigated using TCAD simulation. The effects of the application of field plates and surface passivation/processing are also investigated.

6.1 Device structure design optimization 6.1.1 Gate-to-source spacing As discussed in Chapter IV, AlGaN/GaN HFETs suffer from a large nonlinear source resistance at high current levels which degrades the RF performance and linearity of the device. A possible way to reduce the source access resistance is to reduce the gate-source

91

spacing. The gm and Cgs determined using TCAD for devices with various gate-source spacing are shown in Fig. 6.1 and Fig. 6.2. The device used for calibration has a gate length of 0.7m. For all gate-to-source spacing, both the gm and Cgs values achieve a maximum when the gate bias Vg = -3V. Further increase of the Vg degrades both the gm and Cgs values.

The degrading effects of nonlinear source resistance Rs can be seen with a reduction in the Rs observed as the Lsg spacing is reduced. When the gate-source spacing decreases to Lsg = 0.1 m, the degradation in gm at high current levels is effectively reduced, while Cgs no longer decreases as gate bias becomes less negative. This suggests that both the extrinsic gm and Cgs magnitudes approach their intrinsic values when the source resistance is effectively reduced by using reduced gate-to-source spacing. It should be noted that the gate-to-source spacing reduction is limited by the high electric field effects in the gate-to-source region. Gate electron tunneling or impact ionization may occur for a device with an extremely small source access region.

92

Fig. 6.1 gm vs Vgs for for AlGaN/GaN HFETs with various Lsg

Fig. 6.2 Cgs vs Vgs for AlGaN/GaN HFETs with various Lsg

93

6.1.2 Gate-to-drain spacing The dependence of the peak electric field on the gate-to-drain spacing was examined and shown in Fig. 6.3. The peak electric field shown was measured under Vgs = -2.5V and Vds = 50V. Its magnitude was expected to be reduced with an increase in the gate-to-drain spacing if the electric field is uniformly distributed between the gate and the drain. However, it can be seen in Fig. 6.3 that the peak electric field remains constant with an increase in the drain access region. This suggests that, even though the distance between the gate and the drain is increased, most of the drain-gate voltage drops in a relatively narrow region close to the gate edge so that extending the drain access region does not yield an effective field relaxation. For more negative gate bias, the electric field is larger at the gate edge while the potential drops in an even smaller region beside the gate. Therefore, extension of the gate-to-drain spacing can not reduce the gate leakage or improve the reliability of the device.

Fig. 6.3 Peak electric field at the gate edge as a function of the gate-to-drain spacing

94

6.1.3 AlGaN barrier layer doping and thickness AlGaN barrier layer doping and thickness are altered to investigate if the electric field has a strong dependence on these parameters. It can be seen from Fig. 6.4 that the peak electric field can not be reduced if we intentionally dope the AlGaN layer since intentional doping increases the 2DEG density. In the simulation results shown in the Fig. 6.5, the geometrical effect of larger AlGaN thickness is investigated by assuming that the 2DEG concentration remains constant and there is no strain relaxation with increasing AlGaN thickness. Under these conditions, the electric field is reduced for a device with a thicker AlGaN layer. However, larger AlGaN barrier thickness results in a higher 2DEG density [1]. If this effect is taken into account, the simulation results of the peak electric field are under-estimated for larger AlGaN thickness, because the electric field for the device with higher 2DEG density is higher. So increasing the AlGaN thickness can not effectively reduce the peak electric field.

Fig. 6.4 Peak electric field at the gate edge as a function of the AlGaN doping concentration

95

Fig. 6.5 Peak electric field at the gate edge as a function of the AlGaN layer thickness (assuming the 2DEG density is constant for different AlGaN thickness)

6.2 Polarization charge control The density of the 2DEG is modified to investigate the impact of 2DEG charge density on the peak electric field. Fig. 6.6 shows the peak electric field in the channel and at the surface for devices with different 2DEG density. Different 2DEG density results in a change not only in the peak electric field, but also in the pinch-off voltage, so that the bias conditions for devices with different 2DEG densities were normalized in order to make the peak electric fields comparable. For the original case where polarization charge is 1.3 1013 cm-2, the peak electric field was measured under the drain bias of 50V and the gate bias of -2.5V which is a mid point of the 1V open channel case and the -6V pinch-off case. For other 2DEG densities, the pinch-off voltage changes to -5V for polarization charge of 1.1 1013 cm-2, -3.8V for 0.9 1013 cm-2and -0.8V for 0.75 1013 cm-2. Accordingly, the peak electric field for these

96

different 2DEG density cases were measured under Vg = -2V, -1.4V, and -0.9V, respectively.

Fig. 6.6 Peak electric field at the gate edge as a function of the 2DEG density

Rapid decrease of the peak electric field as the 2DEG density is reduced was observed, indicating that the reliability of the device may be improved by reducing the 2DEG density. This can be achieved by controlling the surface polarization charge density. The polarization charge density can be controlled in several ways, including decreasing the AlN mole fraction in the AlGaN barrier layer, and growing GaN layers in different orientations other than (0001) to achieve a polarization-free heterostructure. However, it is also known that high polarization charge density permits high channel current to be obtained. So there is a trade-off in controlling the polarization effect; the reliability can be much improved by decreasing the polarization charge density, while the output power is somewhat reduced.

97

6.2.1 AlN mole fraction in AlGaN layer The normal AlN mole fraction in the AlGaN layer is 20%-30%. The incorporation of Al in the barrier layer results in a larger bandgap and more strain in the AlGaN barrier layer. A larger AlN mole fraction in the AlGaN layer results in larger polarization charges at the AlGaN/GaN interface and the AlGaN surface [1]. Normally, AlN mole fraction is controlled to achieve high 2DEG density, but defects may form in the AlGaN layer to degrade the device performance if the Al concentration is too high. Furthermore, the affinity of the AlGaN barrier decreases if the AlN mole fraction increases, resulting in a larger Schottky energy barrier if the fermi level pinning effect due to surface states is ignored.

6.2.2 M-plane GaN As described in Chapter II, the GaN is usually grown on a (0001) plane. For conventional AlGaN/GaN HFETs, the polarization effects in the device comprise of both the piezoelectric polarization due to strain and the difference in spontaneous polarization between AlGaN and GaN, whose value depends on the AlN mole fraction in the AlGaN layer.

If GaN (1 1 00) is grown on M-plane [2, 3], equal Ga and N atoms are in that plane, and there is no polarization along the direction of growth, because the spontaneous polarization vanishes due to the non-polar properties the M-plane GaN, while piezoelectric polarization vanishes in the strained layer due to the vanishing strain tensor components.

98

The peak electric field profile along the surface of the AlGaN barrier layer for different polarization charges has been plotted in Fig. 6.7, while Fig. 6.8 shows the electric field along the mid-channel. The surface charges for devices with different polarization charges are kept unchanged. The comparison of Ids vs Vds curves for different polarization charges is plotted in Fig. 6.9. Even though the peak electric field is greatly reduced, suggesting that the resulting gate tunnel leakage and reliability problems can be alleviated when the polarization charge decreases, the drain current is also greatly degraded, and the devices lose their advantages for high power applications. Therefore, unless there are other methods which could be used to induce a high density 2DEG in the channel other than the polarization effects, the polarization charge can not be reduced too much in order to keep a high electron density of 2DEG and resulting high current density in the channel.

99

Fig. 6.7 Electric field along the AlGaN surface for devices with different polarization charges

Fig. 6.8 Electric field along the 2DEG channel for devices with different polarization charges

100

(a)

(b)

(c)

Fig. 6.9 Simulated current-voltage characteristics for open-channel, pinch-off and a gate bias in between. (a) Polarization charge density is 1.31013 cm-2, the simulated data is shown together with the measured data; (b) Polarization charge density is 7.51013 cm-2; (c) Polarization charge density is 21013 cm-2.

101

6.2.3 GaN cap layer above AlGaN A thin GaN cap layer can be put above the AlGaN barrier layer [4, 5] to reduce the gate leakage current, alleviate the current collapse problem and improve the reliability of the device. The mechanism of the gate current reduction in a GaN capped device is investigated by TCAD simulation. As described in Chapter III, for a conventional AlGaN/GaN HFET with an AlGaN barrier thickness of 27nm, the same amount of positive and negative fixed sheets of charge were included at the AlGaN/GaN interface and the AlGaN surface, respectively. Donor charges are defined on the AlGaN surface to represent the donor-like surface states. For the device with a 5 nm GaN cap layer and a 22nm AlGaN layer, positive and negative fixed charges were defined at the lower and upper AlGaN/GaN interface. The surface charges were located on the surface of the GaN cap layer, as shown in Fig. 6.10. The values for the polarization charges and the surface charges were kept the same as for the conventional device.

Fig. 6.10 Graphical scheme of space charge components in GaN/AlGaN/GaN

102

The gate current for the conventional AlGaN/GaN HFET and the GaN capped GaN/AlGaN/GaN HFET can be calculated based on the thermionic-field emission over the Schottky barrier. As shown in Fig. 6.11, the gate current for the GaN capped device is reduced by two orders of magnitude. This large amount of reduction in the gate current is mainly attributed to the greatly reduced electric field at the gate edge on the drain side.

Fig. 6.11 Absolute gate current for AlGaN/GaN HFET and GaN/AlGaN/GaN HFET

In the above analysis, it is assumed that the polarization charge density is unchanged when incorporating an additional GaN cap layer on an AlGaN/GaN HFET. This is not a realistic assumption because the additional GaN cap layer will compensate some of the negative polarization charges on the upper GaN/AlGaN interface. Fig. 6.12 shows the impact of the

103

GaN cap layer on the piezoelectric effect: the top GaN layer causes an additional piezoelectric polarization field on the AlGaN barrier layer which is in the opposite direction as normally occurs due to alignment with the bottom GaN bulk layer.

Fig. 6.12 Spontaneous and piezoelectric polarization in GaN/AlGaN/GaN HFET

As a result, the negative polarization charge density at the upper AlGaN/GaN interface is reduced [6, 7]. The extent of the reduction is dependent on the GaN cap layer and the AlGaN

104

barrier layer thickness, as well as the AlN mole fraction in the AlGaN layer.

Fig. 6.13 shows the gate current calculated for different negative polarization charge densities. The positive polarization charge density and surface charge density are kept constant for all cases. Lower density of the negative polarization charge results in larger electric field at the gate edge, therefore, the gate current is larger.

Fig. 6.13 Gate current for devices with different negative polarization charge density

The total electric field along the surface for different devices under Vg = -5V and Vds = 10V is shown in Fig. 6.14. If the negative polarization charge is kept unchanged when including a GaN cap layer, the peak electric field at the gate edge significantly decreases from 12 MV/cm for the AlGaN/GaN HFET to 2.7 MV/cm for the GaN capped device. When the negative polarization charge compensation induced by the GaN cap layer is considered, the

105

peak electric field at the gate edge increases to 4.4 MV/cm if we assume the negative polarization charge density decreases from 1.15 1013 cm-2 to 9 1012 cm-2.

Fig. 6.14 Total electric field along the surface for devices with different negative polarization charge density

6.3 Field plate Field plate technology is well known to improve the power performance of the AlGaN HFET because the electric field in the channel under the gate edge of the device can be suppressed and the breakdown voltage can be improved [8, 9]. Devices with different length of field plates were also simulated to investigate the impact of field plate length on the surface electric field. The 2-D electric field profile for devices with different field plate lengths under Vg = -2.5V and Vds = 50V is shown in Fig. 6.15. As the field-plate length increases, the peak electric field at the edge of the gate is reduced as shown in Fig. 6.16. Application of the

106

field-plate can improve the reliability of the AlGaN/GaN HFET by decreasing the gate leakage. However, the application of the field plate will degrade the frequency response of the devices by introducing larger capacitance as a result of an enlarged depletion region, as shown in Fig. 6.17.

Fig. 6.15 2-D Electric field profile for devices with different field plate length

107

Fig. 6.16 Peak electric field at the gate edge as a function of the field plate length

Fig. 6.17 Electron density along the 2DEG channel for devices with different field plate length

108

6.4 Surface passivation / processing The surface states in semiconductor materials cause many problems in the device. Si technology benefits from the fact that Si material has its own native oxide layer, while for GaN based materials, deposited passivation must be used. There are high densities of surface states existing in the compound semiconductor devices which can degrade performance. For AlGaN/GaN HFETs, the density of surface states can be as high as 1013 cm-2. As discussed in Chapter II, it has been reported that the surface states of AlGaN/GaN HFETs are donor-like [10, 11]; they are positively charged when the electrons are transferred from these surface states to the channel. These positively charged surface states can accept the electrons tunneling from the gate and become neutral, and the trapping/de-trapping of these surface states induces a serious problem of current collapse because there is a limited time constant associated with the trapping/de-trapping of the surface states. It should be noted that the long time constant of hundreds of seconds demonstrated in the reliability characteristics shown in Chapter V is not the same as the time constant associated with the current collapse, because the time associated with Ids and Ig vs stress time is a cumulative effect of surface states trapping and is not an instantaneous surface trapping/de-trapping behavior.

There are several important parameters associated with the surface states; the most important are the density and the activation energy of these surface states. If the donor-like surface charge density is reduced, the peak electric field at the gate edge decreases because the tunneling barrier becomes thicker. As a result, the gate tunneling current decreases. If the activation energy of the surface states is reduced, according to the surface electron hopping

109

model proposed in Chapter V, the surface electron velocity increases, which results in a reduced virtual gate length and smaller 2DEG depletion, consequently making the device more reliable.

Both the density and the activation energy are very sensitive to the surface passivation / treatment methods. Therefore, in order to decrease the gate leakage and improve the reliability characteristics of AlGaN/GaN HFETs, a surface passivation method which can most effectively reduce the surface states density or decrease the activation energy is indicated. Surface passivation of devices by dielectric material such as SixNy, MgO, Sc2O3 has been reported extensively [12-16], and very successful in reducing or immobilizing the surface states. The most widely used passivation material is silicon nitride.

6.5 Other methods to improve the device performance of AlGaN/GaN HFETs An AlN interfacial layer can be inserted between the AlGaN and GaN layers to improve device performance [17, 18]. If the AlN layers are grown thinner than the critical thickness, and the lattice mismatch is accommodated by internal strain rather than by the formation of misfit point defects and dislocations as a result of strain relaxation. An AlGaN/AlN/GaN HEMT exhibits advantages over its AlGaN/GaN counterpart such as higher electron mobility due to less alloy disorder scattering and higher 2DEG concentration due to the larger conduction band offset and larger strain related polarization effects, as shown in Figure 6.18.

110

Fig. 6.18 (a) schematic conduction band diagram of conventional AlGaN/GaN HEMT, (b) schematic conduction band diagram of AlGaN/AlN/GaN HEMT. Polarization induced dipole in AlN increases the effective conduction band offset [17].

Instead of growing the GaN bulk layer directly above the SiC or sapphire substrate, the AlN or GaN buffer layer directly above the substrate is used. This layer is used as the nucleation layer to reduce lattice mismatch and to reduce the defects and traps in the device. Other methods used to improve the device performance and mitigate the current collapse and reliability problems include using quantum well device structures (DHFET) [19, 20] and / or gate edge electric field engineering such as RESURF structures [21] or recessed gate [22].

111

References

[1]

E.T. Yu and O. Manasreh, "Spontaneous and piezoelectric polarization in nitride heterostructures.," in III-V Nitride Semiconductors: Applications and Devices (Optoelectronic Properties of Semiconductors and Superlattices, 16): Taylor & Francis, 2003.

[2]

P. Waltereit, O. Brandt, A. Trampert, H. T. Grahn, J. Menniger, M. Ramsteiner, M. Reiche, and K. H. Ploog, "Nitride semiconductors free of electrostatic fields for efficient white light-emitting diodes," Nature, vol. 406, pp. 865-868, 2000.

[3]

C. Q. Chen, M. E. Gaevski, W. H. Sun, E. Kuokstis, J. P. Zhang, R. S. Q. Fareed, H. M. Wang, J. W. Yang, G. Simin, M. A. Khan, M. Herbert-Paul, W. H. David, M. C. C. Mitch, and C. Bruce, "GaN homoepitaxy on freestanding (11-bar 00) oriented GaN substrates," Applied Physics Letters, vol. 81, pp. 3194-3196, 2002.

[4]

S. Arulkumaran, T. Hibino, T. Egawa, and H. Ishikawa, "Current collapse-free i-GaN/AlGaN/GaN high-electron-mobility transistors with and without surface passivation," Applied Physics Letters, vol. 85, pp. 5745-5747, 2004.

[5]

M. Gaudenzio, R. Fabiana, K. Peter, Giovanni Verzellesi, and E. Zanoni, "Current Collapse and High-Electric-Field Reliability of Unpassivated GaN/AlGaN/GaN HEMTs," Electron Devices, IEEE Transactions on, vol. 53, pp. 2932-2941, 2006.

[6]

T. Kikkawa, M. Nagahara, N. Okamoto, Y. Tateno, Y. Yamaguchi, N. Hara, K. Joshin, and P. M. Asbeck, "Surface-charge controlled AlGaN/GaN-power HFET without current collapse and gm dispersion," presented at Electron Devices Meeting,

112

2001. IEDM Technical Digest. International, 2001. [7] M. Oleg, M. Michael, and W. Nils, "Impact of Si doping on radio frequency dispersion in unpassivated GaN/AlGaN/GaN high-electron-mobility transistors grown by plasma-assisted molecular-beam epitaxy," Applied Physics Letters, vol. 82, pp. 4361-4363, 2003. [8] Y. F. Wu, A. Saxler, M. Moore, R. P. Smith, S. Sheppard, P. M. Chavarkar, T. Wisleder, U. K. Mishra, and P. Parikh, "30-W/mm GaN HEMTs by field plate optimization," Electron Device Letters, IEEE, vol. 25, pp. 117-119, 2004. [9] S. Karmalkar and U. K. Mishra, "Enhancement of breakdown voltage in AlGaN/GaN high electron mobility transistors using a field plate," Electron Devices, IEEE Transactions on, vol. 48, pp. 1515-1521, 2001. [10] R. Vetury, N. Q. Zhang, S. Keller, and U. K. Mishra, "The impact of surface states on the DC and RF characteristics of AlGaN/GaN HFETs," Electron Devices, IEEE Transactions on, vol. 48, pp. 560-566, 2001. [11] W. Saito, M. Kuraguchi, Y. Takada, K. Tsuda, I. Omura, and T. Ogura, "Influence of surface defect charge at AlGaN-GaN-HEMT upon Schottky gate leakage current and breakdown voltage," Electron Devices, IEEE Transactions on, vol. 52, pp. 159-164, 2005. [12] A. Vertiatchikh, L. F. Eastman, W. J. Schaff, and I. A. P. I. Prunty, "Effect of surface passivation of AlGaN/GaN heterostructure field-effect transistor," Electronics Letters, vol. 38, pp. 388-389, 2002. [13] B. M. Green, K. K. Chu, E. M. Chumbes, J. A. Smart, J. R. Shealy, and L. F. Eastman,

113

"The effect of surface passivation on the microwave characteristics of undoped AlGaN/GaN HEMTs," Electron Device Letters, IEEE, vol. 21, pp. 268-270, 2000. [14] B. Luo, J. W. Johnson, J. Kim, R. M. Mehandru, F. Ren, B. P. Gila, A. H. Onstine, C. R. Abernathy, S. J. Pearton, A. G. Baca, R. D. Briggs, R. J. Shul, C. Monier, and J. Han, "Influence of MgO and Sc2O3 passivation on AlGaN/GaN

high-electron-mobility transistors," Applied Physics Letters, vol. 80, pp. 1661-1663, 2002. [15] A. Y. Polyakov, N. B. Smirnov, A. V. Govorkov, V. N. Danilin, T. A. Zhukova, B. Luo, F. Ren, B. P. Gila, A. H. Onstine, C. R. Abernathy, and S. J. Pearton, "Deep traps in unpassivated and Sc[sub 2]O[sub 3]-passivated AlGaN/GaN high electron mobility transistors," Applied Physics Letters, vol. 83, pp. 2608-2610, 2003. [16] B. P. Gila, M. Hlad, A. H. Onstine, R. Frazier, G. T. Thaler, A. Herrero, E. Lambers, C. R. Abernathy, S. J. Pearton, T. Anderson, S. Jang, F. Ren, N. Moser, R. C. Fitch, and M. Freund, "Improved oxide passivation of AlGaN/GaN high electron mobility transistors," Applied Physics Letters, vol. 87, pp. 163503, 2005. [17] L. Shen, R. Coffie, D. Buttari, S. Heikman, A. Chakraborty, A. Chini, S. Keller, S. P. DenBaars, and U. K. Mishra, "High-power polarization-engineered GaN/AlGaN/GaN HEMTs without surface passivation," Electron Device Letters, IEEE, vol. 25, pp. 7-9, 2004. [18] J. S. Lee, J. W. Kim, J. H. Lee, C. S. Kim, J. E. Oh, and M. W. Shin, "Reduction of current collapse in AlGaN/GaN HFETs using AlN interfacial layer," Electronics Letters, vol. 39, pp. 750-752, 2003.

114

[19]

A. Koudymov, G. Simin, M. Khan, A. Tarakji, R. Gaska, and M. S. Shur, "Dynamic current-voltage characteristics of III-N HFETs," Electron Device Letters, IEEE, vol. 24, pp. 680-682, 2003.

[20]

C. Rongming, Z. Yugang, L. Jie, Deliang Wang, K. J. Chen, and K. M. Lau, "AlGaN-GaN double-channel HEMTs," Electron Devices, IEEE Transactions on, vol. 52, pp. 438-446, 2005.

[21]

S. Karmalkar, D. Jianyu, and M. S. Shur, "RESURF AlGaN/GaN HEMT for high voltage power switching," Electron Device Letters, IEEE, vol. 22, pp. 373-375, 2001.

[22]

Y. Okamoto, Y. Ando, K. Hataya, T. Nakayama, H. Miyamoto, T. Inoue, M. Senda, K. Hirata, M. Kosaki, N. Shibata, and M. Kuzuhara, "Improved power performance for a recessed-gate AlGaN-GaN heterojunction FET with a field-modulating plate," Microwave Theory and Techniques, IEEE Transactions on, vol. 52, pp. 2536-2540, 2004.

115

Chapter 7: Conclusion and future work

7.1 Conclusion This work focused on the TCAD simulation and modeling of AlGaN/GaN HFETs.

AlGaN/GaN HFETs are of particular interest because of their advantages for high power density, high frequency and high temperature applications. These benefits are a result of the high sheet charge density in these hetero-structures, the high carrier mobility and saturation velocity in the channel, and the high breakdown voltage inherent in the GaN material.

The TCAD tool was employed in this work to predict the device performance, to understand device physics and operation mechanisms, and to gain insight into device design. The parameters in the TCAD model were calibrated in order to accurately reproduce the measured data. The internal electron concentration, electric potential and electric field obtained from the simulation for the device biased at different conditions were discussed.

AlGaN/GaN HFETs have demonstrated excellent RF performance. However, these devices experience physical phenomena that degrade the RF performance and limit their use in high frequency applications. In particular, these devices often demonstrate Cgs variations with input power drive that are opposite to the classical FET behavior. The transconductance is also degraded at high current levels. The behavior affects the frequency performance and linearity of the device. It has been numerically confirmed in this work that the nonlinear

116

source resistance, due to the on-set of space charge limited current condition existing in AlGaN/GaN HFETs, is the origin of the extrinsic gm and Cgs degradation at high drain current levels.

After introducing the thermionic field emission theory which was used to calculate the tunneling current in the TCAD model, TCAD simulations were performed to reproduce the measured bias-dependent and stress time-dependent drain current and gate current characteristics of AlGaN/GaN HFETs with excellent accuracy. A surface electron hopping model was proposed to explain the gate leakage and the reliability problem associated with the high voltage operation of AlGaN/GaN HFETs. According to the model, electrons that tunnel from the gate can accumulate at the gate edge on the drain side and/or travel along the AlGaN surface toward the drain through a trap-to-trap hopping mechanism. The extracted value for the activation energy of the surface traps is in the range G = 0.25~0.35eV, which is consistent with the measured energy level associated with nitrogen vacancies and/or dangling bonds in the device.

A discussion of AlGaN/GaN HFET device design and optimization was also presented in this work. Various device structure optimization methods, polarization charge control methods and passivation methods were discussed along with how they can be used to improve the performance of AlGaN/GaN HFETs. From the TCAD simulation results, it is suggested that reduced gate-to-source spacing can be used to reduce the nonlinear source resistance and to improve RF performance and linearity of the device. Different techniques including

117

processing methods, field engineering methods and polarization control methods can be employed to mitigate the large gate leakage current and reliability problems: (1) Passivation can be employed to reduce or immobilize the surface states. (2) Field plates can be applied to decrease the electric field at the gate edge and to reduce the reverse tunneling current, but the application of field plates also degrades the frequency performance of the device. (3) The polarization charge can be controlled by using a GaN cap layer above the AlGaN layer, growing the device in M-plane, or using a lower AlN mole fraction in AlGaN. As a result, the electric field at the gate edge can be reduced and gate leakage/reliability problems can be alleviated.

7.2 Future work In this work, the measured gate leakage and the reliability characteristics were accurately reproduced in the TCAD simulation by assuming constant effective tunnel mass and variable surface electron velocity in the gate-drain region for different bias conditions. It was proposed that effective tunnel mass may be a function of electric field. In order to fully understand the mechanism of the large gate leakage and the reliability in AlGaN/GaN HFETs, effective tunnel mass should be further investigated since it is directly related the gate tunneling current. Furthermore, the gate current and the reliability characteristics under different temperatures might be helpful to confirm the leakage mechanism.

In order to further investigate the surface states and the methods to improve the reliability characteristics of AlGaN/GaN HFETs, transient simulations could be used to extract various

118

information associated with the surface states/deep traps by comparing the simulated results to the current collapse, gate lag and drain lag measurements.

It was discussed in Chapter V that a large electric field under the gate edge of an AlGaN/GaN HFET induces an additional strain in the AlGaN layer and defects might form due to the presence of the high magnitude electric field. Subsequently the electrons may be trapped in the defects and the device performance will be permanently degraded. This process is irreversible. Further research on this behavior is important to the reliability investigation of these devices.

119