Bachelor Rapport

Bachelor project
Physics and Nanotechnology

Fabrication of biopolymer cantilevers
by Nanoimprint lithography
Nikolaj Feidenhansl (s072168)
Nis Fisker-Bdker (s072142)
Supervisors:
Ass. Prof. Stephan Keller
Professor Anja Boisen
Technical University of Denmark
Department of Micro and Nanotechnology
18
th
June 2010
ii
Abstract
This report presents a fabrication method of biopolymer micro-cantilevers for mea-
surements of their material properties. It further introduces a novel solution to a
general problem with NanoImprint Lithography (NIL): a strong adhesion between
the stamp and substrate after imprint.
In this work, micro-cantilevers of Poly(L-lactide) (PLLA) with a width of 100m,
a length of 500m and a thickness of 8m is realized with an end-point deection of
16.5 m. The yield of these micro-cantilevers is close to 100 %. They are fabricated
with NIL using stamps of around 11 m high silicon stamps. Various fabrication
methods to minimize the surface roughness of the stamps were tested, including
dierent etch masks and oxidization to smoothen the surface.
Spin coating of a PLLA layer is studied with optimization of the solution concen-
tration and spinning speed to yield dierent layer thicknesses. By using a 6.9 wg%
PLLA solution in 3:1 dichlormethan:toluene, homogeneous layers of 8 to 14 m are
obtained with rotation speeds of 700 to 2000 rpm.
It was discovered that the biggest inuencer on the imprint performance are not
the stamp surface but rather the anti-stiction coating between the PLLA and the
stamp. The optimal anti-stiction coating was determined to be PLLA sandwiched
between a 20 nm and a 100 nm uorocarbon coating while the stamp was coated
with a FDTS monolayer.
A proof-of-concept measurement of the resonance frequency of the cantilevers
was performed and Youngs modulus estimated to 3.7 0.5 GPa.
iii
iv
Contents
1 Introduction 1
1.1 Biopolymers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Nanoimprint lithography . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Cantilever sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.4 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.5 Objective . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.6 Fabrication process overview . . . . . . . . . . . . . . . . . . . . . . 3
1.7 Structure of the report . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Design considerations 7
2.1 Chip design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Stamp design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Stamp fabrication 11
3.1 Fabrication techniques . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1.1 Reactive Ion Etch . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1.2 Oxidation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.2 Fabrication steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.3 Thin photoresist mask . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3.1 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3.2 Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3.3 Smoothing of stamp structures . . . . . . . . . . . . . . . . . 18
3.4 Thick photoresist mask . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4.1 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.5 Aluminium mask . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.5.1 Fabrication problems . . . . . . . . . . . . . . . . . . . . . . . 20
3.5.2 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.5.3 Smoothing of stamp structures . . . . . . . . . . . . . . . . . 22
3.6 Comparison of fabrication processes . . . . . . . . . . . . . . . . . . 24
4 Deposition of PLLA layer 27
4.1 Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.2 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
v
Contents
5 Imprinting 31
5.1 Nano-imprint lithography . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2 Imprint setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.3 Determine the best layer thickness . . . . . . . . . . . . . . . . . . . 34
5.3.1 Optimization on silicon . . . . . . . . . . . . . . . . . . . . . 35
5.3.2 Optimization on teon . . . . . . . . . . . . . . . . . . . . . . 36
5.4 Visualization of imprint structures . . . . . . . . . . . . . . . . . . . 37
5.5 Imprinting without teon . . . . . . . . . . . . . . . . . . . . . . . . 37
5.6 Imprinting with one teon coating . . . . . . . . . . . . . . . . . . . 39
5.7 Imprinting with two teon coatings . . . . . . . . . . . . . . . . . . . 40
5.8 Conclusions on imprints . . . . . . . . . . . . . . . . . . . . . . . . . 41
6 Chip release 43
6.1 Etch of residual layer . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
6.2 Pattering of SU-8 body . . . . . . . . . . . . . . . . . . . . . . . . . 44
6.3 Release of chips . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
6.3.1 Body chip damage . . . . . . . . . . . . . . . . . . . . . . . . 45
6.3.2 Cantilever surface . . . . . . . . . . . . . . . . . . . . . . . . 47
6.3.3 Cantilevers condition . . . . . . . . . . . . . . . . . . . . . . . 48
6.4 Conclusion on cantilever release . . . . . . . . . . . . . . . . . . . . . 50
7 Measurement of Youngs modulus 51
7.1 Measurement results . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
7.2 Concluding remarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
8 Conclusion 55
8.1 Outlook . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Appendix 63
A Processes ows 63
A.1 Aluminium mask recipe . . . . . . . . . . . . . . . . . . . . . . . . . 64
A.2 Thick photo resist recipe . . . . . . . . . . . . . . . . . . . . . . . . . 66
A.3 Thin photo resist recipe . . . . . . . . . . . . . . . . . . . . . . . . . 67
B PLLA solutions 68
B.1 7.3 wg% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
B.2 5.3 wg% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
B.3 6.32 wg% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
C Imprint pictures 70
C.1 Imprint in one teon layer . . . . . . . . . . . . . . . . . . . . . . . . 70
D SU-8 deposit ow for imprint teon 72
vi
Chapter 1
Introduction
1.1 Biopolymers
1.2 Nanoimprint lithography
1.3 Cantilever sensors
1.4 Motivation
1.5 Objective
1.6 Fabrication process overview
1.7 Structure of the report
In this introduction fundamental terms and technologies are explained, the moti-
vation behind the report and the objective denes the demarcation of the project. To
give the reader an overview of the complete fabrication process a simplied process
ow is presented.
1
1. Introduction
1.1 Biopolymers
Biopolymers are a general term for polymers produced of material from living or-
ganisms. In many ways biopolymers can be dissolved, dried and formed as synthetic
polymers. The advantage of biopolymers is their easy degradation e.g. in the body
or by composting and the fact that they are produced from renewable resources.
The biopolymer used in this project work is poly-L-lactide (PLLA) which is the
polymerization of L-lactide. PLLA is already widely used in the medical eld for
temporary implants, because of its biodegradability the implants are slowly decom-
pose by the body neglecting the need for a second operation [1, 2].
1.2 Nanoimprint lithography
Nano-imprint lithography (NIL) is basically to press a hard nano structured stamp
into a soft material, and thereby replicating the negative structure of the stamp into
the substrate. The main advantage of NIL, compared to other silicon processing
techniques, is the cost since the stamp can be reused many times dependent on
the imprinted substrate. Sometimes the stamp and substrate is heated in order to
liquefy the substrate, this technique is named thermal NIL and it is the technique
used in this project.
1.3 Cantilever sensors
A cantilever is a beam supported only on one end, and by vibrating of the cantilever
it can be used as a sensor or to determine parameters of the substrate material. A
material parameter which is often characterized is Youngs Modulus. This parameter
can be determined from the resonance frequencies of the material by the equation
[3]:
f
n
=
C
2
n
4
h
L
2
(1.1)
in which the thickness of a cantilever is t, the length L, the density of the polymer ,
and Youngs modulus Y . C
n
is numerically determined to C
1
= 1.875, C
2
= 4.694
and C
3
= 7.855 for the rst three resonance modes [3]. One important thing to
consider when applying the equation is the ratio between the cantilever length and
width. A rule of thumb is that the ratio between the length and width should be at
least 5 to ensure the approximations applied in the derivation are still valid.
1.4 Motivation
In this bachelor project work has been done with fabrication of biopolymer micro-
cantilevers to allow for easier and faster testing of the degradation in water or other
solutions, compared to the present very time consuming procedures. Today the pro-
cedure when testing the degradation of polymers, is to bury many bulk samples of
2
1.5 Objective
the polymer in e.g. a compost heap, dig them up one by one after dierent num-
bers of days and weigh them to tell how much have been decomposed. These kind
of experiments can last for several months [4]. When measuring the degradation
with a microcantilever the masses which degrade are so small, that the time scale
is only hours or a few days depending on the solution [5]. Hopefully the decreased
time consumption during testing will speed up the development of new biopolymers,
which may help introduce new technologies.
The reasons biopolymers are important are because they are degradable through
hydrolysis, enzymes or by microbes. In this way the material can be reused as soil
if composted instead of just incinerated, or what is more interesting, new medical
implants see the daylight. As an example one could imagine small containers made
of biopolymer to be inject into humans and decomposed in a specic location inside
the body e.g. in the very acid environment in the stomach. In this way medicine
can be targeted to specic areas of the body, thereby lowering the side eects since
a much smaller dose of the medicament is needed and it does not aect the entire
body.
Another feature that makes biopolymers interesting is the raw materials used
for production. While normal plastic is made from fossil fuel, biopolymers are made
from renewable resources like cornstarch or wood cellulose. The fabrication of the
micro cantilevers is done with NIL, since the biopolymer used is too fragile to process
with standard silicon techniques like photolithography or wet etching.
1.5 Objective
This project aims to fabricate 10 m thick micro sized biopolymer cantilevers of
Poly(L-lactide), using the processing technique NanoImprint Lithography.
The catch in the project is the higher stamp structure compared to previous
works [6], which requires the sidewalls of the structures to be smooth and straight
to ensure that the stamp does not get stuck in the polymer after imprinting.
1.6 Fabrication process overview
The idea is to fabricate a micro structured stamp and imprint in a biopolymer layer.
The dierent steps in the fabrication process will all be explained in more detailed
in the respective chapters, but a brief overview is presented here:
A silicon wafer is coated with photoresist and is exposed
to UV-light to dene the areas which should act as etch
mask.
The wafer is now etched to a dept of around 10 m to
dene the stamp structures.
3
1. Introduction
The protecting mask material is removed and the stamp
wafer is coated with an anti-stiction coating, it is now
ready for imprint.
The biopolymer solution is spin coated onto a uorocar-
bon coated silicon wafer.
Stamp wafer and biopolymer wafer are brought together.
The imprint is done using thermal NIL where the wafers
are heated and pressed together.
After cooling the substrate to below its glass transition
temperature, stamp and substrate coated wafers are sep-
arated. The negative structures of the stamp are now left
in the biopolymer.
To release the imprinted chips the residual layer of the
substrate is etched away using an oxygen plasma.
A supportive layer of SU-8 is spun on top of the sub-
strate layer. The SU-8 is then exposed and developed
and thereby only left on top of the biopolymer chips.
The chips are now released with twezeers and the can-
tilevers are ready for measurements.
By vibrating the chip with a piezo crystal the resonance
frequencies of the cantilever can be measured with a
laser, hereby determining Youngs modulus.
4
The structure of the report follows the fabrication process represented before, it will
in general reect the experimental ow and include considerations at critical points.
Chapter 2 will explain the design of the stamps that are imprinted into the biopoly-
mer.
Chapter 3 goes into details with the stamp fabrication, the dierent fabrication
methods of stamp production are described and presented with images for com-
parison.
Chapter 4 regards step four in the process overview as the fabrication of biopoly-
mer spin coated wafers are described and compare with dierent solutions of
biopolymer.
Chapter 5 focus on imprinting. The thickness of the PLLA layer is optimized and
the dierent imprints are compared.
Chapter 6 describes the release of the PLLA chips and pattering of a SU-8 body
chip.
Chapter 7 explains how a vibrating cantilever can be used to determine Youngs
modulus and compares measurements of Youngs modulus for cantilevers at dif-
ferent lengths.
5
1. Introduction
6
Chapter 2
Design considerations
2.1 Chip design
2.2 Stamp design
This chapter should be read to achieve a basic understanding of the design of
the chips and cantilevers. The choice of chip design is reviewed, and it is explained
why the stamp is not of a solid design. As well as the general prole of the stamp
is reviewed, the dimensions of the chip and PLLA cantilevers are also dened.
It is important to choose the correct material for the stamp, as the stamp should
be easy to produce and at the same time be able to withstand several imprints.
Therefore reection of the choice of material for the stamp used for imprint, and the
surface of the stamp are done in the end of the chapter.
7
2. Design considerations
2.1 Chip design
Our chip is composed of a big rectangular structure with eight rectangular cantilevers
protruding one side of the chip. On top of the big PLLA rectangular are positioned
a thick SU-8 body structure to allow for handling the chips with tweezers, the SU8
body also extends as a support for the cantilevers as seen in gure 2.1. The big PLLA
rectangle with the SU-8 support is 2.652.40mm with the outgoing supportive SU-
8 cantilevers measuring 1100 100 m. The PLLA cantilevers extending from the
SU-8 cantilevers are of varying sizes among the chips in order to test which design
yields best results in the frequency measurement. The cantilevers on the chips have
dimensions of 75 200 m, 100 300 m and 100 500 m and are positioned with
a pitch of 150 m. The chip illustrated in gure 2.1 is of the 500 m design. The
PLLA layer underneath the SU-8 is around 10 m thick.
Figure 2.1: Chip design in which the PLLA cantilevers are 100 500 m.
When performing the resonance frequency measurement of the cantilever, a laser
is pointed at the cantilever to detect the vibartion. To assure a sucient amount of
reection, it may be an advantage to deposit a metal layer on top of the cantilevers.
2.2 Stamp design
As the requirements for the chip has been presented, the design of the stamp and
the choice of material can be considered to full the demands.
For the stamp material silicon is chosen, since this enable the use of all the
standard silicon processing techniques thus allowing for more possible modications
in the optimization of the production. Since the electrical properties of the wafer
has no importance a standard wafer (100 mm wide, 100 top crystal plane, 525 m
thick, single side polished) is used.
As will be revealed in section 5.1 the imprint time is heavily dependent on the
amount of polymer that has to be redistributed. For this reason, the stamps are not
solid structures which atten all but the chip. Instead it has 15m wide protrusions
or walls dening the chip structure. The solid and the wall-structured designs
are seen in gure 2.2 for comparison. This optimized wall design decreases the
imprint time some orders of magnitude as a lot less polymer is redistributed [7].
8
2.2 Stamp design
The mask used for this report is created by Anders Greve and was passed on to
us by our supervisor Stephan Keller. The surrounding thin lines in gure 2.2a and
the connecting lines between the cantilevers are to assist the unwanted PLLA (e.g.
between the supporting SU-8 cantilevers) to stay on the wafer when the chip is
released. The lines do not have any inuence on the nal chip.
a: Optimized design b: Massive design
Figure 2.2: Illustration of the two possible stamp designs, the optimized being the one
we use as it allows for much short imprint time. The black areas represent the stamp
protrusions. The white area is the PLLA chip and the gray area is the excess PLLA.
What does inuence the PLLA chip is the structure and especially the surface
of the structures on the stamp. First of all, the protrusions should have sharp edges
and stand perpendicular from the surface to create the desired squared shape of
the PLLA cantilevers. More importantly the surface needs to be smooth as the
cantilevers cannot get more even than the stamp, a smooth surface will also prevent
the stamp and PLLA wafers from getting stuck after imprint, since this can wreck
the PLLA layer and the stamps when trying to separate them. To prevent this, the
stamps are coated with an anti-sticking coating, but as not much knowledge of how
well PLLA adheres to this anti-sticking coatings exists, the stamp surface should be
smoothed to minimize the friction as much as possible.
9
2. Design considerations
10
Chapter 3
Stamp fabrication
3.1 Fabrication techniques
3.2 Fabrication steps
3.3 Thin photoresist mask
3.4 Thick photoresist mask
3.5 Aluminium mask
3.6 Comparison of fabrication processes
The fabrication process was briey presented in the Introduction and will be
described in detail in this chapter, including a introduction to two of the main
processing techniques.
Three dierent fabrication processes are tested for comparison of which one yields
the best stamps. The processs are all based on a fabrication process by Clement
Melen [8] but with variations in the etch masks. The three dierent etch mask
tested are a thin photoresist, a thick photoresist and an aluminium mask. We
also examine how well a silicon dioxide layer smoothens the surface structures since
this is a known method for attening of structures [9], and compares two dierent
methods for growing the oxide layer. In the end of the chapter all three processes
are compared regarding their surface structure and ease of production.
11
3. Stamp fabrication
3.1 Fabrication techniques
Before presenting the actual fabrication process a general introduction of two main
silicon processing techniques used in the fabrication is in order.
3.1.1 Reactive Ion Etch
Reactive Ion Etch (RIE) is a method of removing material in micro fabrication. It
uses a chemical reactive plasma which is generated in vacuum with a radio frequent
electromagnetic eld of 13.56 MHz typically. This frequency strip o the electrons of
the present gas and plasma is created, after which a high energy ion bombardment
of the wafer surface begins. The direction of the ions is controlled by coils above
and below the wafer, creating a vertical oscillating electromagnetic eld. Since the
delivery of reactive ions is mostly vertical the etch is very anisotropic compared to
advanced silicon etch or wet etching.
Because of variations in the electric eld and some loading eects in the RIE
system the etch prole across the wafer has a parabolic shape [10]. This is also
seen during our experiments where the stamps in the outer rim of the wafer always
is 1-2 m higher than the center ones. This is seen in gure 3.1 where the height
of chip structures positioned along the diameter of one wafer is measured with the
prolometer Dektak 8 from Veeco.
Figure 3.1: Etch prole of the used RIE measured across a wafer. The etch is mainly
attacking the outer rim of the wafer, while the etch rate in the center is lower.
3.1.2 Oxidation
After the RIE the sidewalls are likely to be a bit rough so a way to smoothen
them afterwards is needed. This was done by growing a silicon dioxide layer and
afterwards etch it o again.
The hypothesis for this surface smoothing, is that the oxide will grow more
rapidly into a bump than a dent since it has a higher exposed surface area as seen
in gure 3.2 [11, 9]. When the silicon oxide afterwards is etched in HF acid all the
12
bumps on the surface will be attened, since the oxide is thicker here than every
where else.
Figure 3.2: Illustration of how the silicon dioxide minimizes bumps on the surface of
the silicon.
To understand why the oxide will grow fastest into a bump, one needs to look
at how the silicon dioxide is fabricated. An oxide layer is grown on the silicon
wafer by making the silicon react with water vapour and form silicon dioxide and
hydrogen. This method is termed wet-oxidation as opposed to dry-oxidization where
pure oxygen is used. To aid the reaction the wafers are heated to around 1100
C in
an oven which is then lled with water vapour. The silicon and water then reacts,
forming an amorphous silicon dioxide layer which extends both into the silicon and
grows outwards, as seen in gure 3.3.
Figure 3.3: Illustration of how the silicon dioxide has grown both into and out o the
silicon surface after the oxidization process.
Growing an oxide of thickness x consumes a layer of 0.44x silicon [12]. This
entails that the oxidation and subsequently removal will change the dimensions of
the structures thus in the end making the cantilevers wider and longer but not
taller, since the silicon is oxidized at the same rate at the top and bottom of the
structures. The thickest oxide grown in this report is 400 nm, corresponding to an
increased width of the cantilevers of 352 nm or 0.35 % (the cantilevers are 100 m
wide). Hence this is not an issue since other parameters in the production are likely
to inuence the structure dimensions just as much.
To dene the structures of the stamp, an etching process is the obvious choice. In
this way the stamp pattern is dened by the etch mask during the etching process,
where the silicon is not covered by the mask is etched to the desired depth. There
are two main groups of etching techniques: wet-etch and dry-etch. Since our mask
is designed for dry-etching a RIE is used (the RIE was presented in section 3.1.1).
Another dry-etch options would be an Advanced Silicon Etcher which is mainly used
13
for deep anisotropic etching of silicon using the cyclic Bosch process. The problem
with this etch technique is the cyclic Bosch process which alternates between an
nearly isotropic plasma etch and coating of a passivation layer which protects the
sidewalls but is etched in the bottom due to ion bombardment. This cyclic process
gives the sidewalls a wavelike shape as seen in gure 3.4, this we wish to avoid since
our surface must be smooth. The RIE machine is a cluster system from STS.
Figure 3.4: SEM image of the wavelike sidewall of a silicon structure fabricated using
a deep reactive ion etching with the cyclic Bosch process. Picture from [13].
The RIE is probably the most important of the process steps since it is this
step which controls how squared the shape is and the initial surface structure of the
stamp. To optimize this step two photo resist masks and one aluminium mask will be
tested and the resulting stamp surfaces compared and discussed. The parameters in
the etch itself will not be adjusted since the recipe was developed for etching stamps
using a mask very similar to the one used in this report [7].
As mentioned in the Introduction the goal is to measure the resonance frequency
on cantilevers with dierent dimensions. To do this in a cost-ecient way, the mask
is designed to feature 3 dierent chip designs distributed among 304 chips. The
height of the stamp structure is set by adjusting the etch time, and since a 10 m
thick PLLA chip is desired the stamp ought to be 10m high as well. In section 3.1.1
it was described how the RIE is not uniform across the wafer, hence the stamp height
will merely be 10 m on average on a wafer. Because of a drift in the RIE machine
the etch time were adjusted from 35.5 to 30 min between two batches separated by
a one month span.
The photo resist mask is made of az5214e resist and is fabricated using standard
photo lithography processing i.e. spin coating, exposure and development. The
aluminium mask is deposited using thermal evaporation deposition in a QCL800
from Wordentec to a thickness of 50 nm. The masking material when depositing is
photoresist made from the same mask by a negative process. After the deposition
of the aluminium, the excess aluminium is removed by lift-o in acetone followed by
etch in the RIE. After the RIE all remaining aluminium is removed in an aluminium
etch at 50
C for 5 minutes.
Depending on the quality of the RIE the stamp will have more or less surface
roughness primarily on the sidewalls, this roughness can subsequently be smoothed
by growing an oxide layer as explained in section 3.1.2. The oxidation process is a
14
wet thermal oxidation where the wafers are heated to 1100
C in a moist atmosphere
for an amount of time according to the desired oxide thickness. Before entering
the furnace the wafers must undergo a standard RCA cleaning procedure. After
oxidation the oxide layer is etched in HF acid. To test the eect of this smoothing
dierent thicknesses of oxide are grown on dierent wafers.
The nal step in the stamp production is an anti-sticking coating of the stamp
wafer. We use a FDTS coating which yields a contact angle of 110
with water [14].

The coating is a self-assembly conformal monolayer of Cl
3
Si(CH
2
)
2
(CF
2
)
7
CF
3
which
is deposited using a molecular vapor deposition system MVD-100 from Applied
Microstructures Inc. It is a very durable coating that can be used for as many as
30 imprints before wearing o [15, 16].
The rst recipe is the simplest tried in this report, but as mentioned it has previously
been tested unsuccessfully [8]. To hopefully eliminate this problem a smoothing
oxidization step is added.
In the following the fabrication process is briey described but the complete
process ow can be found in appendix A.3. The stamps fabricated using this recipe
are referred to as batch thin in the rest of the report.
The substrate is a standard silicon wafer: 100, 100mm,
525 m, single side polished.
A az5214e photoresist is spun on a silicon wafer to a
thickness of 4.2 m and exposed through the mask with
70 mJ/cm
2
of 365 nm light in a Karl SUSS Mask Aligner
MA6 followed by 60 seconds of developing. For the pho-
toresist to adhere better to the wafer, the natural oxide
layer is etched in HF acid prior to the spin coating.
To fabricate the stamp structure, the silicon is etched in
a RIE (SF
6
= 31 sccm, O
2
= 9 sccm, 80 mTorr, 35 W)
using the photoresist as etch mask. The etch is done for
30 to 35.5 minutes which etches the silicon to a depth of
10 m. As mentioned before we had to adjust the time
because the etch rate varied through out our project.
To remove the photoresist after etching an acetone strip
is done for 4 min.
3.3.1 Results
There are two important features to look for when evaluating a stamp. The rst is
the surface structure which should be as smooth as possible to minimize adhesion
after imprinting. The other is the shape of the stamp protrusions, since this can
also cause the stamp to get stuck in the substrate after imprint.
15
Figure 3.5: SEM image of stamp corner, clearly showing a step-like structure on the
sidewalls. The stamp is fabricated after the previously described process and is about
10 m high.
Examining the surface in the SEM image in gure 3.5 a lot of steps on the upper
half of the sidewall are apparent. These steps are formed because the photoresist
is not durable enough to withstand the plasma bombardment in the RIE and will
slowly erode during the etch. The steps then appear because the photoresist does
not have a perfect square shape but have a bit rounded edges as shown at the left
illustration in gure 3.6. The rounded edges are formed because of diraction at the
edges of the exposure mask, causing the photoresist near the edges to receive enough
energy to not withstand development. For this reason the outlying photoresist layer
is very thin and therefore also easily etched away exposing the silicon it should
protect.
Figure 3.6: Sketch of photoresist and silicon prole at three dierent moments during
a RIE etch. The prole of the photoresist in the rst step, on the left in the gure, is
after exposure and development, illustration the rounded edges due to diraction of the
UV light. This causes the steps on the sidewalls of the stamp structures.
16
The lower half of the sidewalls are on the other hand very even, indicating that
the rst half of the etch time the photoresist withstands the etch and it is only after
15-20 min that the outlying photoresist is etched away.
To visualize the shape of the protrusion a wafer is cracked in two and examined
standing upright in a SEM. The image is seen in gure 3.7 where the steps caused
by the photoresist are visible once more.
Figure 3.7: SEM image of stamp structures seen from the side. Notice the small steps
in the silicon caused by the photoresist during the RIE.
The protrusion is seen to not have the desired square shape, but is instead a
bit narrow at the top becoming gradually thicker and then decreases a little bit
again at the root of the structure. This shape is probably also caused by the etch
of photoresist, since as the photoresist is etched away more silicon is exposed, thus
gradually lowering the structure width. Especially the narrow part at the root is
not desirable since this way the PLLA has to be pushed to the side when pulling
the stamp out, which increases the possibility of the stamp to get stuck.
3.3.2 Solutions
Because of the stepped sidewalls the risk of the stamp to get stuck to the PLLA
wafer after imprint is increased, since both the contact area is higher than on a
straight sidewall and the overall roughness of the surface is higher. We expect these
eects to be the reason for Clements failed attempt to imprint with stamps made
after this recipe [8].
To get rid of these steps a new etch mask is needed which is not etched o in the
RIE. One way of accomplishing this is to make the layer of photoresist thicker. In
this way the time it takes for the RIE to etch through the resist will increase. The
entire sidewall should thereby be like the very smooth lower half of the sidewalls in
this stamp as seen in gure 3.5. This approach is described in the following section.
Another solution to the problem, is to fabricate the etch mask of a more robust
material which is not etched in the RIE. This method should also yield as smooth
sidewalls as the lower half in this recipe. Aluminium has been used as alternative
mask material in this report and is this approach is described in section 3.5.
17
3.3.3 Smoothing of stamp structures
Even though a few ideas to smoothen the sidewalls during the RIE were presented,
it will also be tested whether it is possible to also smoothen the sidewalls after the
RIE.
To do so a 400 nm oxide layer is grown and removed with HF acid. The result
from this oxidation is seen in gure 3.8b. Compared to gure 3.8a which has not
been oxidized, the step edges look a bit more rounded and the small ticks on the
step edges are gone. All in all the stamps seems to be more smooth and the overall
size of the steps is lowered. It is not very clear whether the oxidization will make a
dierence during imprint, but the visual inspection shows a dierence in the overall
roughness.
a: no oxide b: 400 nm oxide
Figure 3.8: SEM picture of stamp corner, a: before oxide and, b: a similar stamp
(same production line but dierent wafer) after 400nm oxide and HF etch. Both stamps
are around 12 m high.
The stamps which are smoothed by oxide will from now on be referred to as
stamp thin oxid and the untreated ones as stamp thin.
Because of the many steps on the stamp sidewalls using a thin photoresist mask, a
thicker photoresist mask is tested which hopefully withstands the RIE, preventing
the stepped sidewalls. Since the thicker layer of photoresist also have the rounded
edges as described on page 16 it might mean that a thicker photoresist layer is no
better as the peripheral layer is still very thin.
The fabrication process for this process ow is very similar to batch thin, the
only dierence is the thicker resist layer and hence longer exposure and developing.
The complete recipe can be found in appendix A.2. The stamps fabricated after this
recipe are referred to as batch thick in the report.
18
A az4562 photoresist is spincoated to a thickness of 10m
and exposed through the mask with 420 mJ/cm
2
of 365
nm light in a Karl SUSS Mask Aligner MA6 followed
by 6.5 min of developing. For the photoresist to adhere
better to the wafer the natural oxide layer is etch with
BHF in 30 s prior to spin coating.
3.4.1 Results
After the RIE etch and photoresist strip the stamps are examined in a SEM. The
sidewalls were very similar to the ones from batch thin so the thicker layer has
not solved our problem. This is probably due to the rounded resist edges, which
induce that doubling the resist layer does not necessarily means a doubling of the
layer at the boundaries. The weak isotropic etch present in the RIE will also etch
the photoresist sidewalls with unaltered speed, exposing more silicon at the same
rate as with batch thin. A SEM image of a corner of the stamp structure is seen in
gure 3.9. When comparing to gure 3.5 in the previous section the structure of the
sidewalls are very much alike. The steps starts closer to the bottom of the stamp
and each step is longer in vertical direction. This indicates that the thick layered
photoresist had an even more round shape than the thin layered photoresist, which
causes the degradation of the photoresist to start even earlier during the etch.
Figure 3.9: SEM picture of stamp corner in batch thick, showing the step-like
structure on the sidewalls. The stamp is fabricated after the previously described recipe
and is around 11 m high.
Since there were so little dierence between batch thick and batch thin, no
further work was been done to improve batch thick. Oxide could have been grow on
batch thick to smoothen the sidewalls, as with batch thin, but since the batches
are so similar it is not relevant.
19
3.5 Aluminium mask
Because of the two unsatisfying attempts using photoresist as etch mask, a third
and more robust mask made of aluminium is tested, hence the degradation of the
mask is now avoided. The fabrication process is a bit dierent since a negative
photoresist process is used to fabricate the aluminium mask. Stamps fabricated
after this process ow are termed batch Al in the rest of the report, and again the
complete recipe can be found in appendix A.1:
The substrate is a standard silicon wafer: 100, 100mm,
525 m, single side polished.
The wafer is dipped in HF acid for 30 seconds to remove
the natural oxide layer. A az5214e photoresist is spin
coated to a thickness of 2.2 m and exposed through the
mask with 35 mJ/cm
2
at 365 nm light in a Karl SUSS
Mask Aligner MA6. The wafer is baked at 120
C for
10 minutes and afterwards humidied in the open air
for another 10 minutes. The wafer is now exposed to
245mJ/cm
2
of 365 nm light followed by development for
70 seconds.
50 nm aluminium is deposited on the wafer using E-beam
deposition in a QCL800 from Wordentec. After this the
excess aluminium is removed by lift-o where the remain-
ing photoresist is dissolved in an acetone bath with ultra
sound.
To fabricate the stamp structure, the silicon is etched in
a RIE (SF
6
= 31 sccm, O
2
= 9 sccm, 80 mTorr, 35 W)
using the aluminium as etch mask. The etch is done for
35.5 minutes which etches to approximately 10m depth
in the silicon.
To remove the aluminium after the RIE an aluminium
etch is done in a 50
C phosphoric acid solution for 5

minutes.
3.5.1 Fabrication problems
One major problem during the production of batch Al was the lift-o process where
the photoresist is dissolved in acetone to releasing the aluminium covering it. The
aluminium tended to stay on the wafer on areas of several square centimeters, even
after two hours in acetone bath with ultra sound, and could not be removed without
mechanical involvement. Both a photoresist thickness of 1.5m and 2.2m has been
tested, and it seems like a thicker layer reduces the problem. The lift-o probably
fails because the acetone has diculties getting around the aluminium layer at the
sides of the structures, and since a thicker resist layer raises the probability of
20
3.5 Aluminium mask
acetone nding an area which is not covered by aluminium. Another factor is the
ow of fresh acetone to dissolve the photoresist, this ow is reduced with the resist
thickness since the volume between the silicon and aluminium is reduced. In future
productions we therefore suggest a resist thickness of 4.2 m, in order to reduce the
amount of remaining aluminium after lift-o.
3.5.2 Results
Looking at gure 3.10 one sees that the sidewalls are not as smooth as anticipated.
There are no big steps but now the entire surface is rued. Especially the upper
third is very jagged/spiky while the lower two thirds are similar to the steps seen
with the photoresist mask.
Figure 3.10: SEM image of stamp edge after the RIE, the 50 nm aluminium mask is
still visible on top of the stamp. The rued surface is probably caused by backscattered
ions.
The SEM image is taken before removal of the aluminium mask, which is seen on
top of the structure. From the gure it is seen that there has been some undercutting
since the aluminium is reaching further out than the silicon. This undercutting
may very well be the cause of the jagged sidewalls, because when the aluminium
is undercut it can reect the backscattered ions, as illustrated in gure 3.11. All
these backscattered ions will hit the sidewalls at random places thus making a very
irregular pattern like the one seen on this stamp.
Figure 3.11: Illustration of ion bombardment of silicon wafer with metal mask in a
RIE. When undercutting begins the mask will scatter the ions and cause even more
undercutting.
21
At this point it is not possible to say whether this pattern has more friction with
the PLLA layer than the stepped sidewalls in batch thin, but this more ne-grained
pattern is most likely smoothen more by the oxide layer.
When looking at the shape of the protrusion seen in gure 3.12, it is more straight
and perpendicular to the surface than the one from batch thin previously shown
in gure 3.7. This will give the cantilevers a more squared shape, and hopefully
minimize the adhesion between the PLLA and stamp when separating them after
imprint.
Figure 3.12: SEM image of cracked stamp viewed from the side. The imprint struc-
tures are straight and perpendicular to the surface.
3.5.3 Smoothing of stamp structures
As with batch thin these stamps were oxidized to smooth the surface roughness,
though this time a new oxidization method was tested.
Our hypothesis is that many thin layers of oxide will smoothen the surface more
than one thick layer. The reason for this should be that the oxide only grows faster
into bumps in the beginning, but as the layer grows thicker the dierence in grow
rate will start to even out. Thus by growing a few thin layers the tip on a bump
will be reduced much more, compared to one oxide layer of the combined thickness.
This method was tested on three wafers which got one, two and three layers of
100 nm oxide respectively. Between each layer the oxide was removed in HF acid.
SEM images of a corner on each of the stamps can be seen in gure 3.13a,b,c. As
expected there is a signicant improvement in the smoothness with thicker combined
oxide layers. But when comparing gure 3.13c with three layers of 100 nm oxide to
3.13d which only got one thick oxide layer of 400 nm, one thick layer seems to be
the best solution since the bumps are a bit more attened. Thus our hypothesis
turns out to be incorrect though it must be emphasized that the thick layer is
100 nm thicker than the three thin layers combined. But since there is only a small
dierence between the surface in gure 3.13b and 3.13c we believe that one extra
thin layer would not make a big dierence.
When also comparing the dierences in the fabrication process, one thick layer
is by far the simplest to fabricate since each thin oxide growth is separated by an
BHF etch, and all layers must be made in one day due to the high cleanliness of the
ovens.
22
3.5 Aluminium mask
a: 100 nm b: 2 100 nm
c: 3 100 nm d: 400 nm
Figure 3.13: SEM images of stamp edge on four wafers after oxide growth and removal
with BHF acid, a) with a 1100nm oxide layer, b) 2100nm oxide layers, c) 3100nm
oxide layers and d) 1 400 nm oxide layer.
The smoothing eect of the oxide is perhaps better visualized by examining the
protrusion from the side. Two SEM images from the side of a broken wafer is seen
in gure 3.14. From these images it is easily veried that the surface roughness is
lowered after oxidization and removal in HF acid.
a b
Figure 3.14: SEM image of stamp shape before and after oxidization of one thick
layer. The stamp protrusion is seen in the upper part of the images.
To distinguish the dierent stamps they will be referred to as stamp Al for the
untreated one, stamp Al oxid for the one with 400nm oxide and stamp Al 3oxid
for the one with three 100 nm layers.
23
When comparing the dierent batches it is essential to evaluate the surface smooth-
ness but also the complexity of the fabrication process. Because if one stamp is only
a bit less smooth than another but a lot easier to fabricate, this stamp might be the
best option.
Starting by comparing the fabrication process for the two batches, batch Al
is a lot more troublesome than batch thin. This is mainly due to the deposition
and removal of the aluminium layer, recall the problem with the lift-o process,
but the negative photolithography process is also more time demanding than the
positive one used with batch thin. To deposited aluminium on six wafers 1.5
hours are needed because of pump down time in the machine, and the negative
lithography process takes approximately one hour more than the positive because
of two exposures separated by a baking step.
The oxidization step used to smoothen the surface is also a troublesome process,
mainly because the wafers needs to be cleaned by an RCA clean before entering the
oven and the growth of 400 nm oxide takes around 5 hours. The oxidization does
not require human involvement but for the RCA clean 1.5 hours of active work is
needed. Hence the real treat is not just to nd the smoothest of the oxidized stamps,
but the untreated stamps must also be considered since these require less work.
The four stamps to compare are: batch thin and batch Al both untreated and
after smoothing with 400 nm oxide. SEM images of the two untreated are seen in
gure 3.15 and the two smoothened in gure 3.16.
a: batch thin b: batch Al
Figure 3.15: SEM image of stamp corner from batch thin and batch Al untreated
after the RIE (except from aluminium etch).
Comparing the two untreated stamps in gure 3.15 the stamp from batch thin
is considered the smoothes one, since the lower half is completely smooth and the
upper half are similar to the lower half of batch Al. The upper half of batch Al
on the other hand is very rough and chaotic.
Comparing the two stamps once more in gure 3.16, now after smoothening with
oxide, the score is dierent. The very rough structure on the upper half of batch Al
24
a: batch thin b: batch Al
Figure 3.16: SEM image of stamp corner from batch thin and batch Al after growth
and etch of 400 nm oxide.
has been very eectively smoothened by the oxide, probably because the structures
were so thin and pointy. The surface is still more rough than the very smooth lower
half of batch thin but since it is more evenly distributed, compared to the big steps
in batch thin, batch Al with 400 nm oxide seems to have the smoothest surface.
From these comparisons we can conclude that the best stamps for imprinting are
batch Al smoothened with one thick oxide layer, in our case 400 nm but a thicker
layer could perhaps yield a even smoother surface. When also taking the fabrication
process into consideration the optimal stamps are the untreated from batch thin,
since these are a lot simpler to fabricate. But as these stamps are quite rough, it
will require a very eective anti-stiction coating between the stamp and PLLA for
the wafers to not get stuck after imprinting.
25
26
Chapter 4
Deposition of PLLA layer
4.1 Method
4.2 Results
To ensure a good imprint the PLLA layer must be well dened and equally thick
on the entire wafer. A logical way to achieve this is by spin coating a PLLA solution
on a silicon wafer. This way the thickness can be adjusted by modifying the PLLA
concentration and ne-tuned with the rotation speed of the spin coater.
The stability of the PLLA solution is a key factor when spin coating because it
greatly determines the smoothness of the layer surface. If the solution contains a
too quickly evaporating solvent the viscosity and concentration will change during
spinning giving the layer an uneven surface. Further more the PLLA of course must
be completely soluble in the solvent to ensure a homogenous solution without PLLA
particles.
The goal is to spin a PLLA layer of 1013m because the thickness of the imprint
substrate in general needs to be thicker than the highest structure on the stamp.
27
4. Deposition of PLLA layer
4.1 Method
Not much material exist about spin coating of PLLA making it necessary to deter-
mine the best solution simply by trying dierent solutions. We decide to dissolve
the PLLA granulates in the organic solvent di-chlor-methan (CH
2
Cl
2
) since this sol-
vent have shown good results [5]. A problem with dichlormethan is that its vapour
pressure is very high (47 kPa at 20
C [17]) which means it evaporates quite quickly,

resulting in an uneven surface of the layer. For this reason toluene (C
6
H
5
CH
3
) was
added after dissolving the PLLA to lower the evaporation time, since toluene has a
vapour pressure of only 2.9 kPa at 20
C [18]. To compare with a more well-known

solvent, ethanol has a vapour pressure of 5.8 kPa at 20
C [18].
Four dierent PLLA solutions are tested, only diering in the PLLA concen-
tration to keep it less complex when comparing the dierent solutions. The four
solutions tested are: 5.3 wg%, 6.3 wg%, 6.9 wg% and 7.3 wg%, from now on termed
solution 1 to 4 respectively. They are all prepared in a 3:1 dichlormethan:toluene
solution after the following recipe (the exact recipe for each can be seen in appendix
B):
To get a 6.9 wg% solution 6.5g PLLA is put in a glass and dichlormethan is added
to a total volume of 60 ml, it is then left to dissolve overnight on a 70
C hotplate.
18 ml toluene is added and left to dissolve for another 2 hours on the hotplate.
Before spin coating the solution is placed in ultrasound for 30 min.
For the actual spin coating a P-6000 Spin coater from Specialty Coating Systems
Inc. is used. It is a manual spinner meaning that the wafer is positioned, the speed
adjusted and the PLLA deposited by hand. The positioning was quite easy to do
by hand, but the rotation speed is impossible to do accurately, thus all speeds are
20 rpm. The amount and position of the solution is also not entirely equal on
all wafers, the approximate amount of solution deposited per layer is 3 ml. The
spinning is done for 30 seconds and the wafers are baked for 10 minutes on a 200
C
hotplate after each layer to evaporate the solvents. The thickness of the PLLA layer
is measured by making a scratch three places on the wafer: near the big at, at the
center and near the small at and then measured with the prolometer Dektak 8
from Veeco.
4.2 Results
It was quickly discovered that it was necessary to spin two layers on top of each
other, as the thickness otherwise never could reach 13 m with a uniform layer. In
gure 4.1 a plot of the thickness versus spin speed for the 4 solutions are presented.
The dashed lines are the measurements from the big at, the solid lines the center
and the dotted lines from the small at.
28
4.2 Results
Figure 4.1: Plot of the PLLA layer thickness versus the rotation speed of the spin
coating. Solid lines are measurements at the middle of the wafer, dashed lines are near
the big at and dotted lines are near small at.
Solution 1 could never reach 13 m if the rotation level were to be higher than
500 rpm, since it gave a thickness of only 6 m at 1500 rpm. Same conclusion was
drawn for solution 2 where the thickness was only 7.2 m at 2000 rpm, though the
layer seemed more uniform compared to the wafers spun with solution 1.
Solution 4 howecer yields layers in the desired thickness region, but notice how
there is a relatively big dierence in the thickness between the middle of the wafer
and the two ats when compared to the other solutions. This is because the layers
are not as uniform as the other more dilute solutions, hence we set for a PLLA
concentration in-between solution 2 and 4. This became solution 3 with a PLLA
concentration of 6.9 wg%. As seen in gure 4.1 this solution yields layer thicknesses
of 815 m at rotation speeds of 9002000 rpm, that is, within our desired range.
In a passing remark, we saw that a small residual amount of PLLA solution
should not be stored in the big original glass, since the solvent then evaporates and
raises the PLLA concentration. This eect is seen in the top left corner of gure 4.1
where a second spin coating with solution 3 yielded around 1.5 m thicker layers.
29
4. Deposition of PLLA layer
30
Chapter 5
Imprinting
5.1 Nano-imprint lithography
5.2 Imprint setup
5.3 Determine the best layer thickness
5.4 Visualization of imprint structures
5.5 Imprinting without teon
5.6 Imprinting with one teon coating
5.7 Imprinting with two teon coatings
5.8 Conclusions on imprints
In chapter 3 dierent batches of stamps were fabricated and in chapter 4 the
PLLA solution was determined. In this chapter we determine the optimal PLLA
layer thickness for the NIL using solution 3 of 6.9 wg% PLLA. The optimal layer
thickness is found on both a bare and a teon coated silicon wafer.
A problem to expect when separating the wafers after imprint is that the stamp
gets stuck in the PLLA layer, either breaking the wafers when forcing them open or
transferring the PLLA layer to the stamp wafer.
We started by imprinting in PLLA spun on a bare silicon wafer, since if a stamp
is too rough to be released after this imprint, it will denitely not work in PLLA
deposited on teon without transfering the PLLA layer to the stamp.
31
5. Imprinting
5.1 Nano-imprint lithography
Nano-imprint lithography (NIL) is a method of fabricating nano or microsized pat-
terns in a substrate. By pressing a stamp into the substrate the negative structures
of the stamp are transferred to the substrate. A variation of NIL is thermal-NIL
which is done at an elevated temperature to make the substrate softer and easier
to force around, this is the technique used in this report, though it is referred to as
NIL.
Figure 5.1: Illustration of a stamp with the dimensions of interest: width p and height
h
p
of the protrusions, width of the cavities c, the initial PLLA layer thickness h
0
and
the residual layer thickness h
r
.
During imprint the substrate is redistributed by the stamp protrusions which
forces the substrate away and into the stamp cavities. The redistribution of the
substrate can be represented as a squeeze ow, which is described by uid dynamics
theory. If the substrate is assumed to be an ideal viscous, incompressible Newtonian
liquid and has the dimensions shown in gure 5.1, the thickness of the residual layer
can be calculated by [7]:
h
r
= h
0
h
p
c
c + p
(5.1)
and the required imprint time t, to ll the cavities completely and reach this residual
layer is given by [19]:
t =

0
p
2
2P
1
h
2
r
1
h
2
0
(5.2)
where
0
is the viscosity of the substrate during imprint and P is the applied pressure.
When looking at equation 5.2 one sees that the imprint time is heavily dependent
on two variables; the protrusion height p and the residual layer thickness h
r
. Since
the imprint time increases with the protrusion height squared, our 10 m stamps
32
5.2 Imprint setup
should require more than twice the imprint time of the 5m stamps previously tested
[6]. The thickness of the residual layer increases the imprint time by
1
h
2
r
, hence a
residual layer will always be present, since when it approaches zero the imprint time
goes towards innity. Since the residual layer is going to be etched anyway, this
dependency can be used as an advantage where the imprint time can be lowered by
making the residual layer thicker.
To give an idea of how the dierent dimensions inuences the imprint time, a few
calculations are done for a stamp with the same dimensions as ours: h
p
= 10 m,
c = 100 m and p = 15 m which are to leave a residual layer of h
r
= 200 m. Since
the imprint time is just an estimation a viscosity of
0
= 2648 Pas for PMMA at
250
C and 3.6 10
6
Pa is used [7]. The imprint pressure is 15 kN on a 100 mm
wafer, thus P = 1.91 10
6
Pa. Inserting these values into equation 5.1 gives an
initial substrate layer thickness of 8.9 m and the imprint time can be calculated
from equation 5.2 to:
t =
2648 Pas (15 10
6
m)
2
2 1.91 10
6
Pa
1
(200 10
9
m)
2

1
(8.9 10
6
m)
2
= 3.9 s
(5.3)
If the residual layer was lowered to 50 nm the imprint time increases to 62 seconds.
If instead the massive stamp introduced in section 2.2 is used with a residual layer
of 200 nm the imprint would take 6.5 minutes.
It must be emphasized that these time values are merely rough estimations, and
are only calculated to give an idea of how the dimensions aect the imprint time.
During imprint the PLLA will also not act as an ideal Newtonian liquid, since it
is not heated above the melting point. The actual imprint time applied is 2 hours
with a residual layer of approximately 4 m.
5.2 Imprint setup
The imprint is done by hot embossing where the temperature is raised well above
PLLAs glass transition temperature to ease the redistribution of the PLLA. The
stamp wafer is then pressed into the PLLA coated wafer for two hours whereupon the
temperature is lowered below the glass transition temperature to solidify the PLLA
once more. When the two wafers are separated the PLLA will have the negative
structure of the stamp.
To ease the release of the PLLA chips after imprint the silicon wafers are coated
with a 20 nm uorocarbon (teon) coating before spin coating of PLLA. The teon
serve as an anti-stiction coating preventing the PLLA chips from sticking too well
to the silicon when the chips are release with tweezers [20]. However the PLLA
should not stick to weakly to the teon since then the PLLA layer is ripped of the
silicon wafer and transferred to the stamp wafer after imprint, which o course is
not desirable. The hypothesis is that the PLLA will still stick better to the teon
coating than the FDTS coated stamps, since the water-contact angle of the teon
coating is 106
, which is lower than the 110
for the FDTS coating [14, 20].

33
5. Imprinting
The residual layer described in the previous section ought to be made very thin
(some hundred nanometers), either by imprinting for a long time or by etching the
residual layer afterwards. As shown in section 3.1.1 there is a variation of 1.5 m in
the height of stamps on the same wafer due to the etch prole in the RIE. This big
variation renders it impossible to make the residual layer thin enough everywhere
on the imprinted wafer since it will only be the outermost chips that have a thin
residual layer. A post-imprint PLLA etch is therefore considered the best solution.
By making this etch, it is furthermore possible to completely remove the residual
layer.
Based on these reections the fabrication process for the imprint has been de-
veloped:
Before imprinting the stamp is coated with a FDTS anti-
stiction coating to make the succeeding separation of the
wafers possible. This coating is described thoroughly in
section 3.2. The deposition takes place using a molecu-
lar vapor deposition system MVD-100 from Applied Mi-
crostructures Inc. The PLLA is spin coated on a teon
coated silicon wafer.
The imprint is done in a 520 Hot Embosser from EV
Group, Austria where the wafers are pressed together
with a 15kN force at 150
C for 2 hours since these param-

eters have previously shown good results with a PLLA
substrate [6].
After two hours of imprint the wafers are cooled down to
50
C before releasing the pressure to solidied the PLLA

(PLLA has a glass transition temperature of 62
C [1]).
The stamp and PLLA coated wafers are then separated
by manoeuvring a razor blade in between and coax them
open (see gure 5.2), leaving the negative structures of
the stamp imprinted into the PLLA layer.
After separation of the wafers the residual layer below
the protrusions of the stamp is removed. In order to
damage the structures as little as possible, the residual
layer is etched in an anisotropic oxygen plasma in a RIE,
for process parameters see section 6.1.
Since the stamp structured varied with 1.5m on the same wafer dierent layer thick-
nesss are best for dierent areas on the wafer. To compensate for these variations
we will only look at the outlying stamps, which have the highest structures.
34
Figure 5.2: After imprint a razor blade is maneuvered in between the stamp and
PLLA wafer and they are coaxed open.
When imprinting it is important that the cavities in the stamp gets completely
lled with polymer. If this is not the case the cantilevers will not get a smooth and
even top surface. What is further wanted is a thin residual layer, this will make
the succeeding PLLA etch shorter which help preserve the original PLLA structure.
It is impossible to ever reach the very bottom of the PLLA due to the drastically
increasing imprint time (refer to section 5.1).
The optimization of the PLLA layer thickness is done through imprint in PLLA
layers of dierent thicknesss in order to nd the right thickness, where the stamp
cavities are lled but the residual layer remains as thin as possible.
5.3.1 Optimization on silicon
When imprinting in a too thin PLLA layer for one hour one gets the result shown
in gure 5.3. Here an imprint has been done with a 11.0 m stamp into a 8 m
PLLA layer. The colored channels are the cavities imprinted by the stamp. They
show how the stamp has only left a thin residual layer which by a color comparison
is estimated to be around 500nm thick
1
[21]. The areas around the channels are not
at and even, which shows how the polymer has not lled the cavities.
An imprint was also done in a PLLA layer of the same thickness as the stamp
height, again the stamp cavities was not lled with PLLA and the result was very
similar to the one shown in gure 5.3.
Figure 5.4 shows a 12.5 m PLLA layer imprinted with a 11.2 m. Here the
cavities of the stamp has been completely lled as the entire surface is smooth and
1
For thicknesss of less than 1m visible light that has been reected at the silicon surface inter-
feres with the polymer and only scatters specic wavelengths that somewhat mirrors the thickness
of the PLLA layer.
35
5. Imprinting
Figure 5.3: Imprint in 8 m PLLA
with 11.0 m stamp. The colored
lines are channels in which the residual
PLLA layer is around 500 nm. Uneven
structures are seen between the valleys
showing that the PLLA did not ll the
stamp cavities.
Figure 5.4: Imprint in 12.5 m PLLA
layer with 11.1 m stamp. Here the
surface is at and smooth showing that
the PLLA has lled the stamps cavities
completely.
even, indicating that the PLLA layer should be around 1.5 m thicker than the
stamp in order to ll all stamp cavities. This gives a layer thickness of 1213 m.
By using a PLLA layer this thick the residual layer will also be quite thick, which
is also seen in gure 5.4 since only a very dim color is seen in the channels. This is
compensated for by increasing the PLLA etch time, because this is a lot less time
demanding than increasing the imprint time many orders necessary to get a thin
residual layer, refering to section 5.1.
5.3.2 Optimization on teon
Now that the best PLLA layer thickness has been found, we will move on and once
more optimize the deposition of PLLA on teon coated wafers. Since PLLA adheres
less to teon the PLLA layer deposited when spin coating will decrease, the rotation
speed should therefore be lowered to get the same thickness.
The teon coating is deposited using the passive cycle of an Advance Silicon
Etch where an oxygen plasma (O
2
= 45 sccm, coil power = 800 W, plate power =
20 W, pressure = 94 mTorr, time = 5 min) is used to condition the chamber before
the actual 20 nm teon coating (C
4
F
8
= 120 sccm, coil power = 300 W, plate power
= 0 W, pressure = 5 mTorr, time = 1 min). The machine used is a standard rate
ASE from STS-Surface Technology Systems, UK.
The PLLA layer is spin coated as previous described, and the resulting thick-
nesses versus rotation speed is seen in gure 5.5, for the teon coated wafers we only
tested solution 3 with 6.9 wg% PLLA. From this gure one sees that the desired
layer of around 13 m is achived at 700 rpm. The imprints will therefore be done
using teon coated silicon wafers with two PLLA layers spun at 700 rpm.
36
Figure 5.5: Thickness versus spin speed of PLLA solution 3 on a teon coated silicon
wafer. The thickness is lowered compared to deposition directly on silicon because of a
lower adhesion.
To show detailed structures of the imprint structures SEM imaging is necessary,
but since PLLA is a nonconducting polymer this is a bit dicult. A work-around
is to use a low vacuum SEM where water vapour is let into the specimen chamber
to help conduct the electrons away from the specimen. The SEM used is a Nova
NanoSEM 600 from FEI with Oxford Inca EDX system and a Low Vacuum SE
Detector attached.
The low glass transition temperature of PLLA of only 62
C [22] is a problem
when using the SEM since the electron beam heats the PLLA with the eect shown
in gure 5.6. The image is taken by zooming out after scanning the same area for
approximately 1 min on a wafer tilted 20
to visualize the channel sidewalls. What

has happened is that the PLLA polymer chains has become so mobile that they
start to slide down the wafer. This dictates one have to adjust the parameters of
the SEM at one point of the specimen, zoom out and pan the specimen to look at
the desired area, zoom in and then quickly start acquisition of the image.
5.5 Imprinting without teon
To test if the not oxidized stamps were so rough that they got stuck in the PLLA
two imprints were done in 20 m PLLA layers to make completely sure that the
stamp cavities were lled. If a stamp then is stuck after this imprint, it would be
no use to imprint in a PLLA layer on a teon coating, since then the PLLA layer
would most certainly be transferred to the stamp. The 20m PLLA layer was made
by spinning three PLLA layers instead of the usual two.
These imprints will have a residual layer of almost 9 m but since they are just
test imprints the residual layer is not important. The two imprints made is this
thick PLLA layer was our two most rough ones: stamp thin and stamp Al.
37
5. Imprinting
Figure 5.6: SEM image of sliding PLLA due to heating by the electron beam by the
after scanning the same area for 1 min on a 20
tilted surface.
Both imprints were relatively easy to separate and the PLLA was not transferred
to the stamps. Two SEM images of the imprint with stamp Al are seen in gure 5.7;
an overview and a close-up of the channel sidewalls. The cantilevers are very nicely
dened with only one small defect. Taking a closer look at the channel sidewall
reveal small structures matching the structures on the stamp, refer to gure 3.10 on
page 21.
a: Overview b: Close-up
Figure 5.7: Low vacuum SEM image of PLLA imprint with stamp Al. a) shows chan-
nels stamped into PLLA. b) shows a PLLA corner inside the channels. The structures
are very well dened and sidewall structure of the stamp is easily recognized on the
channel sidewalls in the imprint.
When comparing the stamp Al imprint with the stamp thin imprint, both seen
in gure 5.8, there is no noticeable dierence in the overview image. The close-up
38
5.6 Imprinting with one teflon coating
however clearly reveals the horizontal lines from the steps on the stamp, refer to
gure 3.5 on page 16.
Figure 5.8: Low vacuum SEM image of PLLA imprint with stamp thin. The overall
structures are very well dened, and the sidewall structure from the stamp is clearly
seen as horizontal lines on the sides of the channels.
There was no noticeable dierence in how rm the stamps got stuck in the PLLA,
and the structure of both imprints looked very nice. Even the stamps considered
the two roughest ones should be tested in PLLA deposited on teon.
The 20 m thick PLLA imprint was as mentioned only for testing the adhesion
between the stamp and the PLLA layer. To produce cantilevers another imprint
was done in a 13 m PLLA layer using stamp thin. This imprint is referred to as
imprint none.
5.6 Imprinting with one teon coating
In the previous section was not possible to tell a dierence in the quality of stamp
Al and stamp thin, but it might be possible when imprinting in PLLA deposited
on teon, since the risk of transferring the PLLA layer to the stamp is now present.
In this section four stamps are compared: stamp thin, stamp thin oxide,
stamp Al and stamp Al 3oxide, all imprinted in PLLA layers of 13.5 m.
A general problem with three of the imprints (not stamp thin oxide), was that
the PLLA layer was transferred to the stamp wafer. This indicates that either non of
the stamps had smooth enough structures or the teon coating was too good, letting
go of the PLLA layer to easily. To test this, an imprint was done in PLLA deposited
on an inferior teon coating made at 40 mTorr instead of 5 mTorr [20], refer to the
process parameters in section 5.3.2. As the PLLA layer was still transferred, it was
39
5. Imprinting
concluded that it was the anti-stiction coating between the stamp and PLLA that
had to be improved instead.
A picture of the PLLA that sticks to stamp Al can be seen in gure 5.9 and
pictures of all four wafers can be seen in appendix C.1.
Figure 5.9: The PLLA sticks to the stamp which has been created using the aluminium
mask with no oxidation.
Stamp thin oxide was the only stamp that did not rip the PLLA layer o its
wafer, but the PLLA layer was still sticking so rmly to the stamp that it was
detached from its wafer during the separation. Even though it is a good thing that
the PLLA layer stayed on the silicon wafer it is useless when loose, since it makes
it impossible to pattern the SU8 body chips on top of it.
The imprint of stamp Al from gure 5.9 is termed imprint teflon for the rest
of the report, since SU-8 pattering and chip release will be performed on this imprint,
though it will be handled dierently since the PLLA is stuck in the stamp.
Since none of the stamps let the PLLA intact on the teon coated silicon wafer
we concluded that the FDTS coating does not provide a good enough anti-stiction
between the stamp and PLLA layer which is why a second teon coating is intro-
duced.
5.7 Imprinting with two teon coatings
The imprints with only one teon coating revealed that the important factor when
imprinting, is not the structure of the stamp but rather the anti-stiction coating
between stamp and substrate.
According to the water contact angle the FDTS coating should provide better
anti-stiction properties than the teon coating but apparently it is not enough for
our application. To solve this problem a new idea is introduced: also coat the top
surface of the substrate with teon! The hypothesis for this is, that the imprint is
done with a FDTS-teon interface which should terminate all adhesion between the
two wafers. Hopefully the teon does not stick to the FDTS coating at all and the
PLLA layer is left on its own wafer. The PLLA layer is coated with 100nm teon by
40
the same recipe as for the 20nm coating on the silicon wafer, now just for 5 minutes
instead of 1 minute.
After imprinting in this teon coated PLLA layer the stamp and PLLA wafers
are very easily separated compared to the previous imprints and the PLLA layer does
not take visual damaged. In the two SEM images seen in gure 5.10 the top surface
of the PLLA is seen to be very smooth, revealing that the cavities were completely
lled. Taking a closer look at the overview image dark splotches are seen next to
the channels. We do not know for sure these splotches are made of, but it might
be deformations of the teon layer formed when the PLLA is squeezed around. A
prole scan of the surface does not show any notable height dierences, suggesting
it is in fact a groove of teon in the PLLA. In the close-up of the cantilever corner
in gure 5.10b the structures of the stamp is once again visualized on the channel
sidewalls, but what is also noticed are the small fringes on the top surface.
Figure 5.10: Low vacuum SEM image of imprint in PLLA coated with teon. In a)
teon grooves are seen around the channels, and in b) some small fringes on the top
surface are visible.
This imprint is termed imprint 2teflon for the rest of the report.
Most imprints were possible to separate with out damaging the PLLA layer, and
all were nicely dened. The sidewalls of the imprinted channels all had clear shapes
after their respective stamp sidewalls.
In imprint none it will most likely not be possible to release the chips, since
PLLA adheres well to the silicon. Therefore imprints was done in PLLA spun on
a 20 nm teon coating. The FDTS coating of the stamps was expected to provide
a better anti-stiction coating than the teon, but when separating these imprints it
41
5. Imprinting
was seen that this was not the case, since the PLLA layer was transferred to the
stamp wafers. Only in one of four imprints did the PLLA layer stay on the silicon
wafer, but since it was still detached from the silicon wafer it was not satisfying.
The best solution was to use a silicon wafer coated with 20 nm teon to ease
the release of the chips, spin coat the PLLA layer and then coat once more with
a 100 nm teon coating to make separation of the stamp and PLLA layer possible.
When imprinting with the FDTS coated stamps in the teon coated PLLA layer
it was straightforward to separate the wafers without damaging the PLLA layer.
Examining at the imprints in SEM they look just as ne as the other imprints
without the extra teon coating.
The 100 nm teon coating is etched away when the residual layer is etched in
RIE, this also accounts for the teon grooves and the small fringes on the top surface.
The method with 100 nm on top is therefore the best candidate for successful chip
release.
42
Chapter 6
Chip release
6.1 Etch of residual layer
6.2 Pattering of SU-8 body
6.3 Release of chips
6.4 Conclusion on cantilever release
This chapter will focus on chip release from the imprints: imprint none, imprint
teflon and imprint 2teflon. The residual PLLA layer is removed and SU-8 pat-
tering are done which work as a supportive layer for the fragile PLLA cantilevers.
The three dierent imprints methods will be compared by looking at both the
body chip of SU-8 and the condition of the cantilevers. The condition of the can-
tilevers are determined by SEM images to characterize the roughness of the surface
followed by optical inspection to determine the yield of useful cantilevers for fur-
ther resonance frequency measurements. Furthermore the end-point deection of
the cantilevers are found using optical microscopy.
43
6. Chip release
6.1 Etch of residual layer
For all imprints the residual layer must be etched away to ease the release procedure
and prevent the cantilevers from being ripped o. To not damage the cantilever
structure an anisotropic etch is done with an oxygen plasma in a RIE (O
2
= 50sccm,
N
2
= 50 sccm, pressure = 100 mTorr and RF power = 50 W), the etch rate was
determined to 0.5 m/min, by scratch testing on a test wafer entirely coated with
PLLA.
The RIE etches the entire surface so when the residual layer is removed in the
valleys an equivalent layer at the top of the PLLA layer is also removed, hence the
height of the structure is preserved as shown in gure 6.1. Because of the etch prole
of the RIE, which is presumed to parabolic like the one shown in section 3.1.1, the
outlying areas are etched more than the center, rendering it impossible to etch the
residual layer on the entire wafer without making the outer cantilevers too thin.
The etch time was determined by etching in time intervals of a few minutes and
examining the imprint valleys in a microscope to check if the silicon had become
visible at the bottom. The etch was terminated when the residual layer was etched
away in an area of 3 cm from the wafer edge to ve columns of chips. By this
method the etch time for the three imprints was determined to 9min, corresponding
to a 4.5 m depth. Calculating the residual layer thickness by equation 5.1 on page
32 for a PLLA layer thickness of 13.5 m and a stamp of 10 m one gets a good
agreement of 4.8 m. Unfortunately it is impossible to measure the thickness of the
residual layer with a prolometer as the measuring cantilever is insuciently sharp
to t into the 10 m deep and 15 m wide channels.
Figure 6.1: The residual PLLA layer is etched in a RIE using an oxygen plasma. The
etch will also remove an equivalent layer at the top of the PLLA layer.
For imprint teflon the procedure is the same, except the residual layer is
etched from the backside as the PLLA is stuck to the stamp.
6.2 Pattering of SU-8 body
Now that the residual layer is removed the last step before chip release is pattering
of the SU-8 body chip. This is done by spin coating a 230 m thick layer of SU-8
2150 on the imprinted wafer. Because of a very high viscosity of the SU-8 solution
the spinning process is done in two steps: rst at 500 rpm for 30 sec in order to
spread the SU-8 on the entire wafer, then followed by a fast spin at 1500 rpm for 60
sec to thin the layer down to the 230 m. This covers everything in SU-8 as shown
44
in the rst illustration in gure 6.2. The wafer is then baked only at a 50
C hotplate
for 10 hours to evaporate the solvent without damaging the PLLA structures.
Figure 6.2: Imprinted wafer is completely covered with SU-8 after spin coating, but
after exposure the SU-8 is harden on top of the chips and parts of the cantilevers.
After baking, the SU-8 is aligned and exposed with 1750mJ/cm
2
of 365 nm light
in a Karl SUSS Mask Aligner MA6. The exposure is done in seven steps to not heat
up the SU-8. The remaining SU-8 which has not been exposed is then removed by
development for 20 minutes in a 1-methoxy-2-propyl-acetate bath. This procedure
leaves a 230 m thick SU-8 chip on top of the PLLA as a support for the cantilevers
as shown in the last illustration in gure 6.2. The pattering is done in the same way
for imprint teflon, but if any doubt an illustration can be seen in appendix D.
The chips can now be released from the wafer and the cantilevers analyzed and
compared with cantilevers from other imprints. In this part three imprints are
compared with each other: imprint none where the PLLA was deposited directly
on a silicon wafer, imprint teflon where the PLLA was spun on a teon coated
wafer and imprint 2teflon where PLLA was spun on a teon coated wafer and
100 nm teon was deposited on top of the PLLA layer before imprint.
The chips are released from the wafer using tweezers, grabbing around the body
chip and wriggle the chip from side to side to loosen its grip of the wafer. This way of
releasing the chips could potentially damage the cantilevers because of movements,
but the adhesion is too strong to pull the chip vertical up in one quick pull.
The three imprints are compared on the level of diculties when releasing the
chips by comparing the overall damages on the body chip and the shape of the
cantilevers after release. The yield of functional cantilevers is also estimated and so
is the end point deection.
6.3.1 Body chip damage
One way of comparing the release diculty is to see how much damage the body chip
has taken during release. Needless to say this is in many ways a matter of experience
since the release is done manually, but it gives a rough estimation on how well the
chip adheres to the wafer. In gure 6.3 a microscopy image of the bottom side of
a chip from imprint none is seen. Notice the dark area in the middle of the body
which is a hole of missing PLLA that is left on the wafer. In the bottom of the image
one sees a black spot which is a ap of SU-8 that was ripped of by the tweezers.
This damages shows how the PLLA was stuck quite well to the silicon, but despite
45
6. Chip release
this strong adhesion the cantilevers are all straight and not twisted, hence the body
chip is not necessarily inuencing the cantilever performance.
Figure 6.3: Chip from imprint none
are missing PLLA (dark area at the
middle) due to high adhesion. SU-8 are
damaged in the lover part of the image
(black spot).
Figure 6.4: Chip from imprint
2teflon, neither the SU-8 nor PLLA
has been damaged.
The chip from imprint 2teflon seen in gure 6.4 is almost not damaged
compared to the one from imprint none. Here the body chip remained intact and
only a small smudge is seen on the left and right side of the chip where the tweezers
grabbed the chip. All cantilevers are straight and non damaged. The chips from
imprint teflon looked like the one from imprint 2teflon except the cantilevers
were more deected and twisted.
To give a more quantitative measure of the body chip damage, 17 chips are
released from each imprint and examined by microscopy to look for damages like the
one shown in gure 6.3. The yield of body chips is then calculated, where the yield is
dened as body chips with no defects in the SU-8 or in the PLLA layer underneath
the SU-8. The damage to the cantilevers are not taken into consideration. The
results are shown in table 6.1. As seen 100% of imprint none are damaged, 60%
of imprint teflon and only 0% of imprint 2teflon. This indicates that the
uorocarbon coating between the PLLA and silicon is important when releasing the
chips.
Table 6.1: Body chip yield for the three dierent imprints: Imprint none, imprint
teflon and imprint 2teflon.
Released chips Damaged chips Body chip yield
Imprint none 17 17 0 %
Imprint teflon 17 10 40 %
Imprint 2teflon 17 0 100 %
46
6.3.2 Cantilever surface
What is more important than the body chip damage is the shape of the cantilevers.
They should be as straight and as possible without notches or other damages. Fur-
thermore they should be able to reect the laser beam without to much scattering
of the beam.
a: Imprint none b: Imprint teflon c: Imprint 2teflon
Figure 6.5: Low vacuum SEM images of cantilevers from dierent imprints. a)
Imprint none has a rough surface and residual PLLA hanging from the edges. Notice
how the supporting SU-8 extends out onto the PLLA cantilever. b) Imprint teflon
with very smooth surfaces of the cantilevers, but they are unfortunately twisted or
bending. c) Imprint 2teflon were relatively smooth and very straight, the best
cantilevers so far.
Figure 6.5 shows a SEM image of cantilevers from the three imprints. The
cantilevers from imprint none is seen to have small PLLA threads hanging from
the side of the cantilevers. This is because the chip is taken from the center area
of the wafer, thus the residual layer has not been etched completely but was ripped
apart during release of the cantilever. On the surface of the cantilever a lot of bumps
are seen, they are several micrometers high and are suspected to be remaining SU-8
that has not been dissolved during development, since prolometer measurements
of the surface after residual layer etching only shows variations of 600 nm as seen in
gure 6.6. These bumps are not desirable since they will cause the laser beam to be
scattered and also inuence the measuring of the material properties.
Three cantilevers on a chip from imprint teflon is seen in gure 6.5b here the
cantilevers has a very smooth surface and well dened edges, unfortunately they are
all twisted which makes them useless for the resonance measurement. The cantilever
are also likely to be broke near the SU-8 interface as the twist indicates that a lot
of force has been applied when releasing the chip. In general all chips from imprint
teflon have twisted cantilevers. This is suspected to be because the PLLA was
stuck to the stamp wafer so the SU-8 was spun to the back side of the PLLA layer.
Then, when releasing the chips, the PLLA is located between the stamp protrusions
47
6. Chip release
Figure 6.6: Surface roughness before and after SU-8 deposit. The surface is much more
rough after deposit, probably because SU-8 is still left on the surface after development.
and are shoved into these when wriggling the chip o. The stamp protrusions will
also hold on to the PLLA which makes it more dicult to release the chip.
The surface of the cantilevers from imprint 2teflon in gure 6.5c does not
have as even a surface as the cantilevers from imprint teflon, but instead they are
actual straight which is why one might expect a higher yield of useful cantilevers
from this imprint. The edges are also all well dened and without residual PLLA.
6.3.3 Cantilevers condition
Not only do twisted and broken cantilevers matter, but so does the deection of the
cantilevers. A long and non twisted cantilever is only good if it is relatively straight
and it should not bend too much. To measure the amount of deection of cantilevers
from the three imprints, microscopy from the side of the chips were performed.
In gure 6.7 a cantilever from imprint 2teflon is seen. From the supporting
SU-8, the dark square at the left, one sees how the cantilever continues as a straight
horizontal line, this was the normal shape of cantilevers form this imprint. Can-
tilevers from imprint none generally looked the same while the ones from imprint
teflon, as previously described, had some strange shapes as seen in gure 6.8.
When calculating the yield of cantilevers they are dismissed if they are twisted,
broken or crooked when viewed from above. This is easily studied by an overview
microscopy image of the chip as seen in gure 6.9, where cantilevers counted as
damaged in this image are marked with a black arrow.
If a cantilever is not damaged in any way but just bending a lot, like the one
shown in gure 6.8, it is impossible to spot from the overview image. The yield is
only based on the overview observations. In table 6.2 the yield of cantilevers for each
imprint is shown, measured on ve chips from each imprint. As seen, the imprint
with the highest yield is imprint 2teflon with a 100 % yield but imprint none
is close to with 95 %.
The end point deection, which is the dierence in height between the beginning
and end of the cantilever is also shown in table 6.2. It was measured in a microscope
48
Figure 6.7: Cantilever from imprint
2teflon seen from the side is com-
pletely straight. Cantilevers from
imprint none look the same from the
side.
Figure 6.8: Cantilevers from imprint
teflon are bended and cannot be used
for resonance measurements.
Figure 6.9: Yield of cantilevers are found by counting the number of non damaged
cantilevers. Here the damaged cantilevers are marked with a black arrow at the top.
by looking at the cantilevers from the side and using the build in measuring tool with
an uncertainty of around 1 m due to the alignment and focus of the microscope.
Due to the dierences in the yield of cantilevers, between 6 and 15 cantilevers were
measured from each imprint. It was on average found to be 16.5 m for imprint
2teflon and 14.13 m for imprint none. Cantilevers from imprint teflon were
often to twisted and bended to be used, but the ones that were straight looking had
an average deection of 32.18 m
Table 6.2: Yield and deection of non damaged cantilevers out of 40 for the three
dierent imprints: Imprint none, imprint teflon and imprint 2teflon.
Damaged cantilevers Yield of cantilevers End point deection
Imprint none 2 95% 14.13 1 m
Imprint teflon 14 65% 32.18 1 m
Imprint 2teflon 0 100% 16.50 1 m
49
6. Chip release
6.4 Conclusion on cantilever release
The best way to produce cantilevers is to use the method of imprint 2teflon.
This method gave a cantilever yield of 100 % and a deection of 16.5 m.
Compared to the other imprints imprint none performed second best with a
cantilever yield of 95 % and an end-point deection of 14.13 m. The end point
deection is a little lower than for imprint 2teflon but this might as well be due
to the uncertainties. A lot of bumps were seen on the cantilever surface, which is
probably due to SU-8 pattering, where it has not been completely removed during
development.
The worst performer was imprint teflon where the chips were fabricated while
the PLLA was stuck to the stamps. Cantilevers from this imprint were twisted
and damaged during chip release, probably because the PLLA was shoved against
the protrusions. The method of imprint teflon resulted in a yield of 65 % and
an average deection of 32.18 m. The surface of the cantilevers were remarkable
smooth, because the surface was protected by the stamp structures during SU-8
pattering.
50
Chapter 7
Measurement of Youngs
modulus
7.1 Measurement results
7.2 Concluding remarks
In this chapter the resonance frequency of cantilevers with dimensions of 75
200 m, 100 300 m and 100 500 m are measured. The chips containing the
cantilevers are all taken from imprint 2teflon.
The resonance frequency is of interest because this makes it possible to calcu-
late the Youngs modulus of a cantilever. This material dimension is important
since it is used when measuring the degradation of cantilevers exposed to dierent
environments.
The resonance frequency is measured by vibrating the entire chip with a piezo
crystal at a certain frequency and measure the displacement with a laser beam
pointed at the cantilevers. The cantilevers then starts vibrating at its resonance
frequencies with rst order waves, second order waves and so forth. The resonance
frequencies are determined by shooting a laser beam at the cantilever and mea-
suring its vertical velocity. By integrating this signal the vertical displacement is
determined. The PLLA delivered a sucient reection signal without the need of a
metal coating.
51
7. Measurement of Youngs modulus
7.1 Measurement results
During the experiment only the rst order mode was clearly seen for all cantilevers,
thus Youngs modulus will be calculated by the rst order mode. The measurements
was done on a MSA-500 Laser Doppler Vibrometer from Polytec, Germany, at a
pressure of 5 10
5
mbar to minimize damping due to air friction.
In gure 7.1 the oscillating amplitude in the measured frequency spectra is plot-
ted for the three cantilever sizes. The main peak on the left side of each plot is the
rst order mode, as seen it is easily distinguished from the background. We presume
the second order mode to be the next peak on the right but it was not investigated
thoroughly.
a: 75 200 m b: 100 300 m c: 100 500 m
Figure 7.1: Oscillation amplitude versus resonance frequency of PLLA cantilevers
with varying dimension. The rst order mode is seen as the biggest peak while the
second order is the next peak to the right. The cantilever dimension is seen below each
gure.
To calculate Youngs modulus the rst order resonance frequencies for each can-
tilever size were measured on three cantilevers on one chip. The cantilever thickness
for each chip was determined by measuring the thickness of the PLLA layer in the
hole left by the chip, done with the prolometer Dektak 8 from Veeco. Since the
length of the cantilevers may change during production this value was not taken
from the mask design but measured from microscope images. The SU-8 support
was seen to reduce the length with approximately 15 m because it swells up during
exposure and expands out over the cantilevers.
By rewriting equation 1.1 Youngs modulus can be calculated as a function of
the cantilever length, height and rst order resonance frequency:
Y (f
1
) = 3
4
2
2
L
4
f
2
1
C
4
1
h
2
(7.1)
The cantilevers are assumed to consist of pure PLLA which has a density of
= 1.24 g/cm
3
. From the cantilever dimensions it is easily realized that this rule
is only respected by the largest cantilever, the smallest and the medium have ratios
52
of 2.7 and 3 respectively. This should be kept in mind when concluding on the
measurements.
The measured rst order resonance frequencies, the measured lengths and thick-
nesses and Youngs modulus calculated from equation 7.1 are presented in table
7.1.
Table 7.1: Youngs modulus calculated for the three cantilever sizes and the values of
the variables needed in the calculation.
Length [m] Thickness [m] Resonans freq. [kHz] Youngs modulus [GPa]
185 3 6.7 0.3 56.17 0.01 3.9 0.7
285 3 9.0 0.3 32.73 0.01 4.1 0.5
485 3 8.0 0.3 8.595 0.01 3.0 0.3
The uncertainties of the frequency measurement is the uncertainty of the Laser
Doppler, while the two others are our own estimations imposed by how dicult we
found it to determine the values precisely, because of blurriness in the microscopy
images and the bumpy cantilever surface.
As proved by these measurements it is possible to use our fabricated cantilevers for
experiment determining Youngs modulus. We did see a fair amount of scattering
of the laser, but is was still possible to perform this experiment without coating the
cantilevers with a more reective surface like a metal layer. This could be necessary
if the cantilevers are set in a degrading environment, since many ditches and holes
are likely to form during the degradation, which will further increase the scattering.
When looking in table 7.1 Youngs modulus for the biggest cantilever are seen
to dier from the other two values which in turn are quite close. This could be due
to the unfullled requirements for equation 1.1, but it might just as well be some
overlooked uncertainties in the measurement. As this measurement was mainly to
demonstrate the possible of measure a material parameter of the cantilevers, this
deviation was not further investigated.
The average Youngs modulus of the cantilevers were found to 3.7 0.5 GPa
corresponding well to other values reported in the literature of 2 - 16GPa [2, 23, 24].
53
7. Measurement of Youngs modulus
54
Chapter 8
Conclusion
Three dierent fabrication methods were used to fabricate micro sized stamps, all
diering in the etch mask: a 4.2 m photoresist layer, a thick photoresist layer of
10m and a 50nm aluminium mask. Both methods with photoresist resulted in tilted
protrusions and stepped sides of stamp structures which in general is undesirable.
The aluminium mask gave protrusions which were perpendicular to the wafer, but
it also had a much more porous surface.
Initial imprint experiments indicated that the adhesion between the stamp and
PLLA is a major challenge; separation of stamp and substrate were dicult even
though the stamp had been prepared with a FDTS anti-stiction coating before im-
printing. In the try of minimizing this adhesion the surface of the silicon stamps were
smoothed by wet oxidation and the oxide removed using HF acid. This resulted in a
remarkable changed surface with much less roughness visualized with SEM images.
Experiments with multiple thin oxide layers and HF dips were compared to one
thick oxide layer and HF dip, and even though there was no remarkable dierence
the surface seemed a bit more smooth after one thick oxide layer.
The aluminium masked stamp smoothed with a 400 nm oxide layer was deemed
the best stamp with the smoothest surface. During the production some problems
occurred during lift-o of the aluminium, hence for further production we suggest
the thickness of the photoresist should be 4.2 m instead of the 2.2 m as used here.
The optimization of the PLLA spin coating showed that two coatings of 3 ml
6.9 wg% PLLA solution in 3:1 dichlormethan:toluene gives a at and homogeneous
layer with a thickness that spans from 8 to 14 m with rotation speeds of 2000 to
700 rpm. The rst solvent, dichlormethan, easily dissolved the PLLA granulates,
while the toluene lowered the evaporates rate to make the layer more homogeneous
during the spinning process. The optimal PLLA layer thickness was determined
to be around 1.5 m thicker than the stamp structures. Imprinting with 11.5 m
stamps in 13 m PLLA layer was done for two hours.
Even with the dierences of the stamp surface no dierences in the performance
of the stamps when imprinting where discovered. In general all imprints was either
well dened or got stuck, independent of the stamp fabrication but rather due to
the anti-stiction coatings. For PLLA deposited directly on a silicon wafer all im-
prints went well and the PLLA stayed on the silicon wafer after separation. When
55
8. Conclusion
imprinting into PLLA deposited on a uorocarbon coated wafer, the separation was
unsuccessful since it resulted in complete transfer of the PLLA to the stamp. The
best imprint was done in PLLA sandwiched between two uorocarbon coatings.
In this way all stamps performed perfect and the imprints was separated with no
damage to the chips.
For PLLA deposited directly on a silicon wafer (imprint none) all imprints
went well and the PLLA stayed on the silicon wafer after separation. After etch of
the residual PLLA layer, the adhesion between PLLA and the silicon wafer was no
higher than it was still possible to release the chips with tweezers though the body
chips all got damaged. While the yield of body chips were measured to 0 %, the
cantilevers on the damaged body chips performed well with a yield of 95 % and an
average end-point deection of 14.13 m.
For PLLA deposited on a 20 nm uorocarbon coated silicon wafer (imprint
teflon) the separation after imprinting resulted in complete transfer of the PLLA
layer to the stamp. The production of chips continued by pattering the supportive
SU-8 structure on the backside of the PLLA while it was still stuck to the stamp
wafer. This method gave no special problems with the pattering but the release
of chips did not go well, because the cantilevers were easily damaged when shoved
against the stamp protrusions. The yield of body chips were measured to 40 %, while
the yield of cantilevers were only 65 % with a end-point deection of 32.18 m.
Since both imprint none and imprint teflon were problematic when releasing
the chips a novel but simple solution was tested (imprint 2teflon). Here the
PLLA layer from imprint teflon was coated with an extra 100 nm uorocarbon
coating on top of the PLLA while the stamp was still coated with FDTS. This
combination resulted in an excellent transfer of the stamp pattern into the PLLA
layer, easy separation of the wafers after imprint without transfer of the PLLA layer
and a high yield when releasing the chips. Both the body chip and cantilever yield
were measured to 100 % and the end-point deection of the cantilevers to 16.5 m.
As proof of concept the resonance frequencies of cantilevers from imprint 2teflon
was measured with a laser Doppler vibrometer. The untreated PLLA cantilevers did
scattered the laser beam to some extend but the reected signal was strong enough
without the need of a metal coating. The measurement was performed on nine can-
tilevers with dimensions of 75 200 m, 100 300 m and 100 500 m. From
the rst order resonance frequency the average Youngs modulus was calculated to
3.7 0.5 GPa.
8.1 Outlook
A major problem during imprint of the cantilevers, where the adhesion between
PLLA and the stamp. This problem was solved by coating both the stamp and
PLLA layer with anti-stiction coatings, but other solutions could also be tested.
More work could for example be done in testing dierent qualities of the teon
coating below the PLLA, since only two were tested in this project.
To yield more accurate results of the resonance frequencies, the bumpy surface
of the cantilevers should be removed. One potential method of the removal of the
56
8.1 Outlook
SU-8 bumps is to make the residual PLLA layer etch after pattering of the SU-8
chips, since SU-8 is also etched by an oxygen plasma. If doing so a short etch must
still be performed before pattering to remove the teon coating, otherwise the SU-8
will not adhere.
It could also be interesting to fabricate cantilevers of other biopolymers. This
should be straightforward to realize since the stamp is already fabricated, and with
the double teon coatings few polymers should adhere to the stamp.
More measurements of Youngs modulus and other material parameters are def-
initely needed, since a resonance frequency measurement was only performed very
briey to proof that this kind of measurements are possible. Particularly the in-
vitro degradation of PLLA in various solutions should be studied, to allow for faster
development of nano-encapsulated medicine.
57
8. Conclusion
58
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Bibliography
62
Appendix A
Processes ows
63
A. Processes flows
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65
A. Processes flows
A.2 Thick photo resist recipe
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66
A.3 Thin photo resist recipe
A.3 Thin photo resist recipe
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=
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67
Appendix B
PLLA solutions
B.1 7.3 wg%
The recipe for 7,3wg% PLLA i 3:1 Dichlormethan:Tohluen
Add 5.94 gram PLLA granules to a bottle made of glass and add 60 mL Dichlormethan
to the bottle.
Dissolve the PLLA granules by placing the closed bottle on a hotplate at 70
for
15 hours.
Add 18 mL Tohluen to the bottle.
Place the bottle on a hotplate at 70
for 2 hours.
Place the bottle in ultrasound, 30 minutes before spincoating.
B.2 5.3 wg%
to the bottle.
for
15 hours.
for 2 hours.
68
B.3 6.32 wg%
B.3 6.32 wg%
to the bottle.
for
15 hours.
for 2 hours.
69
Appendix C
Imprint pictures
C.1 Imprint in one teon layer
In gure C.1 stamp Al is seen where the PLLA lm sticks to the stamp when it
should be sticking to the teon coated silicon wafer. It looks like as if the chips
are white which shows that they might actually be loose. The areas between the
chips looks dark which might indicate that the PLLA lm sticks well to these areas
as there is no air between the stamp and the lm.
Figure C.1: The PLLA sticks to the
stamp which has been created using the
aluminium mask with no oxidation.
Figure C.2: The PLLA sticks to the
stamp which has been created using the
aluminium mask and 400 nm oxidation.
Stamp Al 3oxide is shown on gure C.2. By comparing the lighter areas near
the edge of the wafer, one see that this imprint is mainly darker than the one made
with stamp Al. This might show how the PLLA lm sticks better to stamp Al
3oxide, but it might also be due to the increased practice of stamp separation as
Atamp Al 3oxide was one of the last separated stamps. It is by that means not
possible to relate the stamp recipe to the results of the imprint.
Stamp thin is shown after imprint on gure C.3 where the demolished PLLA
lm sticks to the stamp. This imprint was by far the worst imprint, but this is most
likely due to the lack of practice in separation of stamp and PLLA coated wafer.
70
C.1 Imprint in one teflon layer
The only stamp that did not stick to the PLLA lm stamp thin oxide. The
lm can be seen on gure C.4 where one see how the lm does not stick to the
silicon wafer any more as it has gone o during the separation of the stamp and
PLLA wafer. Even though it is a good thing that the PLLA lm sticks to the silicon
wafer, it is useless when loose. It will most likely make it dicult to spin SU8 to
the PLLA lm and to develop it without loosing all the chips.
Figure C.3: PLLA lm sticks to the
stamp, which was made using a thin
photoresist mask and no oxide.
Figure C.4: This is the only PLLA
wafer, where the lm did not stick to
the stamp. The recipe for the stamp
was thin photoresist mask and 400 nm
oxide.
71
Appendix D
SU-8 deposit ow for imprint
teon
The SU-8 chip is patterned on the bottom side of the PLLA.
72

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Physics and Nanotechnology

with water [14].

C phosphoric acid solution for 5

C [17]) which means it evaporates quite quickly,

C [18]. To compare with a more well-known

, which is lower than the 110

for the FDTS coating [14, 20].

C for 2 hours since these param-

C before releasing the pressure to solidied the PLLA

to visualize the channel sidewalls. What

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