Lpc2939 Eval Board Schematics

12
11
10
LPC2900 Evaluation Board
LPC29XX-A1
F
[01]
[02]
[03]
[04]
[05]
[06]
[07]
[08]
[09]
[10]
Contents
LPC2929 Microcontroller
I/O Pads, BLDC I/F, JTAG I/F
Display, Potentiometer, Buttons
USB
CAN, UART, LIN
Power Supply, LEDs
SRAM, Flash
Temp. Sensor, SPI to GPIO
Rev. Date
Name
1
13.11.2008 Ar
hitex
Title
Contents
DEVELOPMENT TOOLS
This document may not be passed
on, duplicated or its contents utilized,
unless expressly permitted. Violating
this stipulation will result in the liability
to pay damages. All rights reserved
in case of a patent registration or
registered design.
12
11
10
Board
LPC29XX-A1
Sheet
01
File modified 28.11.2008 11:43:58
of
10
K:\Ent\HW\PROJ\Evaboards\LPC29\Baugruppen\LPC29XX\R1\Souce\scm\LPC29XX-A1.prj
3
2
1
12
11
10
H
U200
P0
P0[0]
P0[1]
P0[2]
P0[3]
P0[4]
P0[5]
P0[6]
P0[7]
P0[8]
P0[9]
P0[10]
P0[11]
P0[12]
P0[13]
P0[14]
P0[15]
P0[16]
P0[17]
P0[18]
P0[19]
P0[20]
P0[21]
P0[22]
P0[23]
P0[24]
P0[25]
P0[26]
P0[27]
P0[28]
P0[29]
P0[30]
P0[31]
93
95
96
97
102
103
105
106
112
113
114
115
121
122
123
124
125
126
132
133
138
139
140
142
3
4
5
6
7
8
14
15
U200
P1
P1[0]
P1[1]
P1[2]
P1[3]
P1[4]
P1[5]
P1[6]
P1[7]
P1[8]
P1[9]
P1[10]
P1[11]
P1[12]
P1[13]
P1[14]
P1[15]
P1[16]
P1[17]
P1[18]
P1[19]
P1[20]
P1[21]
P1[22]
P1[23]
P1[24]
P1[25]
P1[26]
P1[27]
P0_00
P0_01
P0_02
P0_03
P0_04
P0_05
P0_06
P0_07
P0_08
P0_09
P0_10
P0_11
P0_12
P0_13
P0_14
P0_15
P0_16
P0_17
P0_18
P0_19
P0_20
P0_21
P0_22
P0_23
P0_24
P0_25
P0_26
P0_27
P0_28
P0_29
P0_30
P0_31
90
87
86
85
71
70
68
67
66
64
57
56
52
51
50
49
44
42
41
40
39
38
35
34
33
32
30
29
U200
P2
P2[0]
P2[1]
P2[2]
P2[3]
P2[4]
P2[5]
P2[6]
P2[7]
P2[8]
P2[9]
P2[10]
P2[11]
P2[12]
P2[13]
P2[14]
P2[15]
P2[16]
P2[17]
P2[18]
P2[19]
P2[20]
P2[21]
P2[22]
P2[23]
P2[24]
P2[25]
P2[26]
P2[27]
P1_00
P1_01
P1_02
P1_03
P1_04
P1_05
P1_06
P1_07
P1_08
P1_09
P1_10
P1_11
P1_12
P1_13
P1_14
P1_15
P1_16
P1_17
P1_18
P1_19
P1_20
P1_21
P1_22
P1_23
P1_24
P1_25
P1_26
P1_27
45
46
54
55
62
63
69
79
83
84
91
92
100
101
116
117
129
130
136
137
143
2
10
11
16
17
27
28
LPC2929/LQFP144
P2_00
P2_01
P2_02
P2_03
P2_04
P2_05
P2_06
P2_07
P2_08
P2_09
P2_10
P2_11
P2_12
P2_13
P2_14
P2_15
P2_16
P2_17
P2_18
P2_19
P2_20
P2_21
P2_22
P2_23
P2_24
P2_25
P2_26
P2_27
LPC2929/LQFP144
LPC2929/LQFP144
98
99
118
120
134
135
12
13
25
26
47
48
58
61
80
81
U200
22
60
89
127
P3_00
P3_01
P3_02
P3_03
P3_04
P3_05
P3_06
P3_07
P3_08
P3_09
P3_10
P3_11
P3_12
P3_13
P3_14
P3_15
VDD(CORE)
U200
VSS(CORE)
9
21
31
53
VDD(IO)
82
104
131
110
23
59
88
128
USB_D+1
USB_D-1
VREFN
USB_D+
USB_D-
JTAG
18
24
43
VSS(IO) 65
94
119
141
VREFP
19
20
TDO
TDI
TMS
TCK
TRSTN
RSTN
JTAGSEL
1
144
36
37
72
73
108
XOUT
XIN
75
76
111
TDO
TDI
TMS
TCK
TRSTN#
RSTN#
JTAGSEL
JTAG
P3[0]
P3[1]
P3[2]
P3[3]
P3[4]
P3[5]
P3[6]
P3[7]
P3[8]
P3[9]
P3[10]
P3[11]
P3[12]
P3[13]
P3[14]
P3[15]
XOUT_OSC
XIN_OSC
XTAL
U200
P3
+1.8V +3.3V
VDD_OSC
107
109
VSS_OSC
VSS_PLL
VDDA3V3
VDDA5V
74
78
Rev. Date
Name
1 13.11.2008 Ar
hitex
Title
DEVELOPMENT TOOLS
registered design.
10
GND
LPC2929/LQFP144
11
LPC2929/LQFP144
77
LPC2929/LQFP144
12
USB
+5V
Board
LPC29XX-A1
Sheet
02
File modified 28.11.2008 11:43:58
of
10
3
2
1
12
11
10
H
U300
P0_14
P0_15
P0_16
P0_17
P0_18
P0_19
P0_20
P0_21
P0_22
P0_23
P0_24
P0_25
P0_26
P0_27
P0_28
P0_29
P0_30
P0_31
LPC2939/LQFP208
U300
P3
P3[0]
P3[1]
P3[2]
P3[3]
P3[4]
P3[5]
P3[6]
P3[7]
P3[8]
P3[9]
P3[10]
P3[11]
P3[12]
P3[13]
P3[14]
P3[15]
P2_00
P2_01
P2_02
P2_03
P2_04
P2_05
P2_06
P2_07
P2_08
P2_09
P2_10
P2_11
P2_12
P2_13
P2_14
P2_15
P2_16
P2_17
P2_18
P2_19
P2_20
P2_21
P2_22
P2_23
P2_24
P2_25
P2_26
P2_27
P4[0]
P4[1]
P4[2]
P4[3]
P4[4]
P4[5]
P4[6]
P4[7]
P4[8]
P4[9]
P4[10]
P4[11]
P4[12]
P4[13]
P4[14]
P4[15]
P4[16]
P4[17]
P4[18]
P4[19]
P4[20]
P4[21]
P4[22]
P4[23]
28
68
131
170
60
82
146
183
38
76
137
177
64
127
149
187
35
74
135
174
44
80
143
181
P4_00
P4_01
P4_02
P4_03
P4_04
P4_05
P4_06
P4_07
P4_08
P4_09
P4_10
P4_11
P4_12
P4_13
P4_14
P4_15
P4_16
P4_17
P4_18
P4_19
P4_20
P4_21
P4_22
P4_23
LPC2939/LQFP208
E
LPC2939/LQFP208
U300
158
109
155
157
A
VREFN
VDD_OSC
VSS_OSC
VSS_PLL
159
106
110
GND
GND
GND
Rev. Date
Name
1 13.11.2008 Ar
hitex
registered design.
GND
18p
GND
LPC2939/LQFP208
10
Z300
XOUT_OSC
XIN_OSC
LPC2939/LQFP208
16.0MHz
18p
GND
Title
DEVELOPMENT TOOLS
VDDA3V3
VDDA5V
107
108
USB
XOUT
XIN
+1.8V
TDO
TDI
TMS
TCK
TRSTN#
RSTN#
JTAGSEL
JTAG
+5V
C327
+3.3V
GND
1
208
52
53
104
105
156
USB_D+1
USB_D-1
USB_D+2
USB_D-2
XTAL
100n
100n
100n
100n
100n
100n
100n
100n
100n
C311
C312
C313
C314
C315
C316
C317
C318
C319
GND
TDO
TDI
TMS
TCK
TRSTN
RSTN
JTAGSEL
C326
18
27
39
59
77
VSS(IO) 97
126
144
169
184
203
VREFP
19
20
21
22
JTAG
@ pin 109 / LPC2939

@ pin 77 / LPC2929
9
23
34
45
67
85
VDD(IO)
114
132
152
176
193
USB_D+1
USB_D-1
USB_D+2
USB_D-2
+1.8V
VSS(CORE)
+3.3V
C324 100n
C325 10u
VDD(CORE)
U300
25
47
70
91
120
142
168
190
207
@ pin 157 / LPC2939

@ pin 109 / LPC2929
24
48
71
92
121
141
167
189
206
P5_00
P5_01
P5_02
P5_03
P5_04
P5_05
P5_06
P5_07
P5_08
P5_09
P5_10
P5_11
P5_12
P5_13
P5_14
P5_15
11
U300
P4
P3_00
P3_01
P3_02
P3_03
P3_04
P3_05
P3_06
P3_07
P3_08
P3_09
P3_10
P3_11
P3_12
P3_13
P3_14
P3_15
+1.8V +3.3V
LPC2939/LQFP208
12
136
138
166
171
196
197
12
13
31
32
69
73
90
93
112
113
LPC2939/LQFP208
30
72
133
172
62
84
148
185
41
78
139
179
66
129
151
188
63
65
86
87
94
95
101
111
115
116
123
124
140
145
164
165
191
192
198
199
205
2
10
11
16
17
37
40
C322 100n
C323 10u
P5[0]
P5[1]
P5[2]
P5[3]
P5[4]
P5[5]
P5[6]
P5[7]
P5[8]
P5[9]
P5[10]
P5[11]
P5[12]
P5[13]
P5[14]
P5[15]
P2[0]
P2[1]
P2[2]
P2[3]
P2[4]
P2[5]
P2[6]
P2[7]
P2[8]
P2[9]
P2[10]
P2[11]
P2[12]
P2[13]
P2[14]
P2[15]
P2[16]
P2[17]
P2[18]
P2[19]
P2[20]
P2[21]
P2[22]
P2[23]
P2[24]
P2[25]
P2[26]
P2[27]
U300
P5
U300
P2
P1_00
P1_01
P1_02
P1_03
P1_04
P1_05
P1_06
P1_07
P1_08
P1_09
P1_10
P1_11
P1_12
P1_13
P1_14
P1_15
P1_16
P1_17
P1_18
P1_19
P1_20
P1_21
P1_22
P1_23
P1_24
P1_25
P1_26
P1_27
P1_28
P1_29
P1_30
P1_31
LPC2939/LQFP208
+5V
122
119
118
117
103
102
100
99
98
96
89
88
83
81
79
75
61
58
57
56
55
54
51
50
49
46
43
42
36
33
29
26
@ pin 155 / LPC2939

@ pin 107 / LPC2929
P1[0]
P1[1]
P1[2]
P1[3]
P1[4]
P1[5]
P1[6]
P1[7]
P1[8]
P1[9]
P1[10]
P1[11]
P1[12]
P1[13]
P1[14]
P1[15]
P1[16]
P1[17]
P1[18]
P1[19]
P1[20]
P1[21]
P1[22]
P1[23]
P1[24]
P1[25]
P1[26]
P1[27]
P1[28]
P1[29]
P1[30]
P1[31]
U300
P1
P0_00
P0_01
P0_02
P0_03
P0_04
P0_05
P0_06
P0_07
P0_08
P0_09
P0_10
P0_11
P0_12
P0_13
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
125
128
130
134
147
150
153
154
160
161
162
163
173
175
178
180
182
186
194
195
200
201
202
204
3
4
5
6
7
8
14
15
C300
C301
C302
C303
C304
C305
C306
C307
C308
C309
C310
P0[0]
P0[1]
P0[2]
P0[3]
P0[4]
P0[5]
P0[6]
P0[7]
P0[8]
P0[9]
P0[10]
P0[11]
P0[12]
P0[13]
P0[14]
P0[15]
P0[16]
P0[17]
P0[18]
P0[19]
P0[20]
P0[21]
P0[22]
P0[23]
P0[24]
P0[25]
P0[26]
P0[27]
P0[28]
P0[29]
P0[30]
P0[31]
C320 100n
C321 10u
P0
Board
LPC29XX-A1
Sheet
03
File modified 28.11.2008 11:43:58
of
10
3
2
1
12
11
10
H
N.M.
X400
P0[0]
P0[2]
P0[4]
P0[6]
P0[8]
P0[10]
P0[12]
P0[14]
P0[16]
P0[18]
P0[20]
P0[22]
P0[24]
P0[26]
P0[28]
P0[30]
N.M.
X401
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
P0[1]
P0[3]
P0[5]
P0[7]
P0[9]
P0[11]
P0[13]
P0[15]
P0[17]
P0[19]
P0[21]
P0[23]
P0[25]
P0[27]
P0[29]
P0[31]
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
P1[0]
P1[2]
P1[4]
P1[6]
P1[8]
P1[10]
P1[12]
P1[14]
P1[16]
P1[18]
P1[20]
P1[22]
P1[24]
P1[26]
P1[28]
P1[30]
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
W2*16
N.M.
X402
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
P1[1]
P1[3]
P1[5]
P1[7]
P1[9]
P1[11]
P1[13]
P1[15]
P1[17]
P1[19]
P1[21]
P1[23]
P1[25]
P1[27]
P1[29]
P1[31]
P2[0]
P2[2]
P2[4]
P2[6]
P2[8]
P2[10]
P2[12]
P2[14]
P2[16]
P2[18]
P2[20]
P2[22]
P2[24]
P2[26]
1
3
5
7
9
11
13
15
17
19
21
23
25
27
N.M.
X403
2
4
6
8
10
12
14
16
18
20
22
24
26
28
P2[1]
P2[3]
P2[5]
P2[7]
P2[9]
P2[11]
P2[13]
P2[15]
P2[17]
P2[19]
P2[21]
P2[23]
P2[25]
P2[27]
P3[0]
P3[2]
P3[4]
P3[6]
P3[8]
P3[10]
P3[12]
P3[14]
1
3
5
7
9
11
13
15
N.M.
X404
P3[1]
P3[3]
P3[5]
P3[7]
P3[9]
P3[11]
P3[13]
P3[15]
2
4
6
8
10
12
14
16
P4[0]
P4[2]
P4[4]
P4[6]
P4[8]
P4[10]
P4[12]
P4[14]
P4[16]
P4[18]
P4[20]
P4[22]
W2*8
1
3
5
7
9
11
13
15
17
19
21
23
N.M.
X405
2
4
6
8
10
12
14
16
18
20
22
24
P4[1]
P4[3]
P4[5]
P4[7]
P4[9]
P4[11]
P4[13]
P4[15]
P4[17]
P4[19]
P4[21]
P4[23]
P5[0]
P5[2]
P5[4]
P5[6]
P5[8]
P5[10]
P5[12]
P5[14]
1
3
5
7
9
11
13
15
P5[1]
P5[3]
P5[5]
P5[7]
P5[9]
P5[11]
P5[13]
P5[15]
2
4
6
8
10
12
14
16
W2*8
W2*12
W2*14
F
W2*16
P0
P1
P2
P3
P4
P5
E
+5V
+5V
+5V
+5V
+5V
JTAG
+5V
+3.3V
+3.3V
+3.3V
X406
10K
10K
10K
RTCK
R406
TDO
RSTN
S1*1
S400
RSTN
P3[13]
S1*1
S401
S1*1
S402
X407
S2*10
S1*1
S403
2
4
6
8
10
12
14
16
18
20
GND
100n
GND
1
3
5
7
9
11
100R 13
15
17
19
C412
W1*2
GND
R403
R404
R405
TRSTN
TDI
TMS
TCK
10K
GND
JTAGSEL
1
2
10K
10K
J400
GND
GND
Short: ARM debug mode (default),

Open: Boundary scan/ Flash programming
R400
R401
C411 1n
C410 100n
C409 4.7u
C408 1n
C407 100n
C406 4.7u
C405 1n
C404 100n
C403 4.7u
C402 1n
R402
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
C401 100n
P0[0]
P0[1]
P2[8]
P3[6]
P2[9]
P3[7]
P0[4]
P3[8]
P0[5]
P0[6]
P0[7]
P1[0]
P2[26]
P2[27]
P2[12]
P2[23]
P2[24]
P2[25]
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
C400 4.7u
GND
GND
1
S2*20
GND
GND
GND
GND
GND
Rev. Date
Name
1
13.11.2008 Ar
hitex
Title
I/O Pads, BLDC I/F, JTAG I/F
DEVELOPMENT TOOLS
registered design.
12
11
10
Board
LPC29XX-A1
Sheet
04
File modified 28.11.2008 11:43:58
of
10
3
2
1
12
11
10
18
16
14
12
9
7
5
3
100n
C500
10K
R507
B501
P3[10]
P3[12]
TAST_TMPS2
TAST_TMPS2
Input
IRQ
J500
V501
1
2
3
4
5
W1*2
10K
B500
4*330R
RA501
ABT244
1
2
4*330R
RA500
1
8
2
7
3
6
4
5
5
4
6
3
7
2
8
1
100n
2
4
6
8
11
13
15
17
LED 7 rt
C502
P0[31]
P0[30]
P0[29]
P0[28]
P0[27]
P0[26]
P0[25]
P0[24]
+3.3V
10
9
8
7
6
GND
+3.3V
GND
GND
LED 7 rt
R508
GND GND
GND
100K
P0
+3.3V
100n
U500
20
10
VCC GND
1
1OE
19
GND
2OE
10
9
8
7
6
C501
10K
R500
+5V +5V
R506
V500
1
2
3
4
5
B502
RSTN
Q500
TAST_TMPS2
R501
P0[2]
2K2
R502
3K3
BCV47
GND
100n
C503
Reset
P0
GND
GND
GND
C
Q501 3
R503
P0[3]
+5V
3K3
2K2
R504
R505
BCV47
GND
P10K/L
GND
GND
Rev. Date
Name
1
13.11.2008 Ar
hitex
11
10
Title
Display, Potentiometer, Buttons
DEVELOPMENT TOOLS
registered design.
12
P2[13]
Board
LPC2919-A1
Sheet
05
File modified 28.11.2008 11:43:58
of
10
3
2
1
C600
C601
+3.3V
24
VCC_IO
20
VCC
7
VREG3V3
RESET_N
INT_N
SPEED
SUSPEND
5
6
8
10
VM
11
VP
12
RCV
R606
N.M.
GND
4
3
21 C603 100n
C1
22
C2
GND
ENA#
FLAGA
VOUTA
GND
ENB#
FLAGB
VOUTB
GND
GND
GND
8
5
LM3526M-L
18
ID
16
D+
15
D19
VBUS
R616
R617
33R
33R
L601
22p
ISP1301BS
U603
1
I/O1
3
I/O2
2
GND
P1[25]
GNDGNDGNDGND
USB_D-1
USB_D+1
1
2
5
VBUS
6
I/O4
4
I/O3
IP4220CZ6
5
4
3
2
1
6
7
8
9
BLM21
9
OE_N/INT_N
13
SE0_VM
14
DAT_VP
GND
5
6
7
8
G
1
2
J600
L603
GND
W1*2
BLM21
P2[11]
P2[10]
P3[11]
P1[23]
ADR_PSW
SDA
SCL
GND
4
3
2
1
S1...4
USB A-V
10K
2
3
10K
P3[2]
P3[3]
5
VBUS
6
I/O4
4
I/O3
R622
P1
GND
VIN
C606
P2
X600
IP4220CZ6
4.7u
R600
R601
R602
R603
R604
R605
P3
4
3
2
1
U601
100n
100n
1
I/O1
3
I/O2
2
GND
C609
C602
C605 100n
7
17
AGND
23
CGND
25
GND
100u
C608
N.M.
U602
C604
R607
R608
R609
2K0
2K0
10K
10K
10K
10K
BLM21
+5V
100n
100n
U600
L600
15K
+3.3V
33R
33R
R620
P4[22]
P4[21]
10K
10K
10K
+3.3V
R618
R619
USB_D+2
USB_D-2
P4[23]
L602
BLM21
15K
R621
10
22p
11
C607
12
X601
12345
S1 S2
S3 S4
USB-mAB
GND GND
GND
+3.3V
GND
R610
P1[24]
10K
D
BC807
Q600
1
3
R611
1K5
+3.3V
+3.3V
R612
P1[22]
10K
2
BC807
Q601
1
3
R614
P4[18]
USB D/O OK LED

V600
10K
C
BC807
Q602
1
3
R613
470R LED LB T676 blh
GND
USB HOST OK LED

V601
R615
470R LED LB T676 blh
GND
B
Rev. Date
Name
1
13.11.2008 Ar
hitex
Title
USB
DEVELOPMENT TOOLS
registered design.
12
11
10
Board
LPC29XX-A1
Sheet
06
File modified 28.11.2008 11:43:58
of
10
3
2
1
12
11
10
LIN0_VBATT
7
6
C701
47p
C702
47p
VCC
VREF
S
TXD
RXD
GND
R708
10K
1 2
LIN1
GND R707
120R
CANH
CANL
7
6
C704
47p
W1*2
C705
47p
R709
10K
S2
GND
+3.3V
LIN1
P1
P1[8]
P1[9]
BLM21
U702
VCC
GND
C1+
C1-
V+
15
GND
C709 100n
11
DIN1
10
DIN2
12
ROUT1
9
ROUT2
V-
14
DOUT1
7
DOUT2
13
RIN1
8
RIN2
R710
R711
S1
100R
100R
1
2
100R
4
1
VBAT
NSLP#
NWAKE#
INH
GND
TXD
RXD
C713
GND
L702
10
BLM21
L703
BLM21
W1*2
1K0
BAV99
100n
GND
LIN
LIN1
TJA1021T/SO8
i
VBATT
D703
GND
SS12
UART0
LIN1 is connected to
CAN1 DSUB9
LIN1_VBATT
GND
X703
1
6
2
7
3
8
4
9
5
1
2
J705
W1*2
1
2
J704
2
3
8
D702
1
3
DSUB9B
C710 100n
MAX3232ECDB
11
VBATT
S2
C2+
C2-
GND
12
X702
1
6
2
7
3
8
4
9
5
+3.3V
+5V
R721
+3.3V
R719
J707
S1
+3.3V
U704
GND
P2[17]
R715
CAN1
GND
GND
LIN1_VBATT
P0[16]
P2[16]
P0[17]
10K
10K
5
9
4
8
3
7
2
6
1
L701
C708 100n 4
5
LIN0_VBATT
SS12
X701
DSUB9S
GND
LIN0 is connected to
CAN0 DSUB9
R716
3
5
8
1
2
J703
D701
GND
S1
C707 100n 1
3
i
VBATT
1K0
U701
TJA1050T/SO8
GND
LIN
LIN0
R720
J702
W1*2
C706 100n 16
GND
6
1n
GND
1
4
100R
DSUB9S
TXD
RXD
C714
GND
4
1
TJA1021T/SO8
10K
R705
10K
GND
100R
GND
+3.3V
+5V
C703
100n
R706
GND
R714
10K
+3.3V
10K
S1
GND
P3[4]
P3[5]
R704
10K
L700
J701
W1*2
1
2
TJA1050T/SO8
P0[8]
P0[9]
BAV99
100n
5
10K
CANH
CANL
VBAT
NSLP#
NWAKE#
INH
GND
1n
TXD
RXD
P0
CAN0
2
3
8
C712
1
4
100R
GND R702
120R
LIN0
R718
R701
LIN0
D700
1
3
C711
W1*2
GND
P3[14]
P3[15]
1 2
VBATT
U703
5
9
4
8
3
7
2
6
1
BLM21
P2
GND
+5V
R713
P0
VCC
VREF
S
+3.3V
W1*2
3
5
8
R703
10K
+3.3V
R712
R700
10K
P3
U700
X700
1
2
C700
100n
S2
J700
W1*2
J706
+5V
R717
+3.3V
+3.3V
GND
8
UART1
Rev. Date
Name
1
13.11.2008 Ar
S2
DSUB9B
hitex
Title
CAN, UART, LIN
DEVELOPMENT TOOLS
registered design.
GND
Board
LPC29XX-A1
Sheet
07
File modified 28.11.2008 11:43:58
of
10
3
2
1
12
11
10
D801
H
VBATT
LP3878
R802
2K7
GND
10u
3
9
11K
GND
GND
5
7
C806
GND
VOUT
N/C
R801
GND
100K
BYPASS
N/C
VIN
#SHTDWN
ADJ
220p
10n
GND
C804
GND
4u7
GND
C803
GND
C802 1n
GND
C801 100n
ROKA
C800 10u
R800
1
2
4
8
6
C805
W1*2
J800
SS12
PI-FILTER
U800
D800
1 F800 2
4
3
2
1
+5V
SS12
VBATT
1
2
X800
VBATT
GND
GND
F
F
D802
VBATT
D803
+3.3V
VBATT
SS12
VBATT
+1.8V
SS12
U801
LP3878
GND
R808
D
GND
E
10u
3
9
C814
GND
GND
5
7
1K8
VOUT
N/C
R807
GND
BYPASS
N/C
VIN
#SHTDWN
ADJ
2K2
GND
1
2
4
8
6
1n
100K
10n
C812
4u7
C811
2K0
GND
10u
R806
C810
LP3878
4K7
3
9
R804
GND
GND
U802
5
7
R805
GND
VOUT
N/C
470p
10n
C808
GND
100K
BYPASS
N/C
VIN
#SHTDWN
ADJ
C809
4u7
C807
R803
E
1
2
4
8
6
C813
VBATT
GND
GND
D
GND
C
+3.3V +1.8V
+3.3V
LED LS T679-CO rt
R809
Q800
BC807
+5V
V801
R811
680R
GND
1K0
V800
Reset LED
LED LG T679-CO gn
+5V LED
B
V802
R810
10K
R812
330R
RSTN
LED LS T679-CO rt
+1.8V LED
Rev. Date
Name
1
13.11.2008 Ar
V803
R813
680R

registered design.
GND
11
10
Title
Power Supply, LEDs
DEVELOPMENT TOOLS
LED LY T679-CO ge
+3.3V LED
12
hitex
Board
LPC29XX-A1
Sheet
08
File modified 28.11.2008 11:43:58
of
10
3
2
1
12
11
10
P0
P0
P4
+3.3V
C902
P3
+3.3V
+3.3V
P3
U900
WR VCC
OE VCC
CE
UB GND
LB GND
33
11
C900
C901
100n
100n
37
RSTN
12
11
28
26
P1[13]
P1[12]
P3[1]
34
12
28
44
43
42
27
26
25
24
23
22
21
20
19
18
5
4
3
2
1
A18
GND
A17
A16
38
A15 D15
37
A14 D14
36
A13 D13
35
A12 D12
32
A11 D11
31
A10 D10
30
A9
D9
29
A8
D8
16
A7
D7
15
A6
D6
14
A5
D5
13
A4
D4
10
A3
D3
9
A2
D2
8
A1
D1
7
A0
D0
IS61WV51216BLL-10TI
U901
27
VCC VSS
46
VSS
RST#
WE#
OE#
14
CE# WP#
GND
J900
FLASH_WP_n
P4[7]
P4[6]
P2[7]
P2[6]
P2[5]
P2[4]
P2[3]
P2[2]
P2[1]
P2[0]
P1[21]
P1[20]
P1[19]
P1[18]
P1[17]
P1[16]
P1[15]
P1[14]
P4[7]
P4[6]
P0[23]
P0[22]
P0[21]
P0[20]
P0[19]
P0[18]
P0[15]
P0[14]
P0[13]
P0[12]
P0[11]
P0[10]
P1[7]
P1[6]
P1[5]
P1[4]
P1[3]
P1[2]
P1[1]
GND
10
9
16
17
48
1
2
3
4
5
6
7
8
18
19
20
21
22
23
24
25
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
1 - 2; WP# off (default)

2 - 3; WP# GPIO driven
P3
2
3
GND
1K0
1K0
P0[23]
P0[22]
P0[21]
P0[20]
P0[19]
P0[18]
P0[15]
P0[14]
P0[13]
P0[12]
P0[11]
P0[10]
P1[7]
P1[6]
P1[5]
P1[4]
P1[3]
P1[2]
P1[1]
17
41
6
40
39
R900
R901
P1[13]
P1[12]
P3[0]
P2[15]
P2[14]
+3.3V
10K
P2
R902
P1
P2
100n
P1
P3[9]
W1*3
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
45
43
41
39
36
34
32
30
44
42
40
38
35
33
31
29
P2[7]
P2[6]
P2[5]
P2[4]
P2[3]
P2[2]
P2[1]
P2[0]
P1[21]
P1[20]
P1[19]
P1[18]
P1[17]
P1[16]
P1[15]
P1[14]
SST39VF3201-70
Rev. Date
Name
1
13.11.2008 Ar
hitex
Title
SRAM, Flash
DEVELOPMENT TOOLS
registered design.
12
11
10
Board
LPC29XX-A1
Sheet
09
File modified 28.11.2008 11:43:58
of
10
3
2
1
12
11
10
P1[11]
P1[10]
P1[26]
2
1
3
SCL
A0
SDA A1
OS
A2
SE95D
C1001
U1001
2
3
11
22
24
1K0
U1000
VDD VSS
+3.3V +3.3V
7
6
5
P1
R1003
C1000
R1001
P1
R1002
R1000
+3.3V
+3.3V
RSTN
GND
P1[27]
P2
P2[19]
P2[20]
P2[21]
P2[22]
1
12
4
5
6
7
8
VDD
VDD
VDD
VDD
VDD
100n
+3.3V
100n
2K0
100K
2K0
+3.3V
10
17
23
25
9
VSS
VSS
VSS
PAD
VSS
SPI_GPIO[0]
SPI_GPIO[1]
SPI_GPIO[2]
SPI_GPIO[3]
SPI_GPIO[4]
SPI_GPIO[5]
SPI_GPIO[6]
SPI_GPIO[7]
13
14
15
16
18
19
20
21
RESET# GPIO0
IRQ#
GPIO1
I2C/SPI# GPIO2
GPIO3
CS#
GPIO4
SI
GPIO5
SO
GPIO6
SCLK
GPIO7
+3.3V
SPI_GPIO
SPI_GPIO[1]
SPI_GPIO[3]
SPI_GPIO[5]
SPI_GPIO[7]
1
3
5
7
9
X1000
2
4
6
8
10
SPI_GPIO[0]
SPI_GPIO[2]
SPI_GPIO[4]
SPI_GPIO[6]
W2*5
PCA9502BS
GND
GND
GND
Rev. Date
Name
1
13.11.2008 Ar
hitex
Title
Temp. Sensor, SPI to GPIO
DEVELOPMENT TOOLS
registered design.
12
11
10
Board
LPC29XX-A1
Sheet
10
File modified 28.11.2008 11:43:58
of
10
3
2
1

Lpc2939 Eval Board Schematics

Încărcat de

Informații document

Descriere originală:

Titlu original

Drepturi de autor

Formate disponibile

Partajați acest document

Partajați sau inserați document

Opțiuni de partajare

Vi se pare util acest document?

Este necorespunzător acest conținut?

Drepturi de autor:

Formate disponibile

Lpc2939 Eval Board Schematics

Încărcat de

Drepturi de autor:

Formate disponibile

12

LPC2900 Evaluation Board

@ pin 109 / LPC2939

@ pin 157 / LPC2939

@ pin 155 / LPC2939

Short: ARM debug mode (default),

I/O Pads, BLDC I/F, JTAG I/F

Display, Potentiometer, Buttons

USB D/O OK LED

USB HOST OK LED

CAN, UART, LIN

This document may not be passed

Power Supply, LEDs

1 - 2; WP# off (default)

Temp. Sensor, SPI to GPIO

S-ar putea să vă placă și