ST7538 App Notes

AN1714
APPLICATION NOTE
ST7538 FSK POWER-LINE
TRANSCEIVER DEMO-KIT DESCRIPTION
By Giuseppe Cantone
1. INTRODUCTION
1.1 Power Line Communication

The advantages in the realizations of a communication network using the same electrical network that
supply all the elements of the network are evident. Also in presence of new wide band LAN using RF sys-
tem, for example Bluetooth, a narrow band communication system using the mains has valid and relevant
advantages.
)
In fact it's a common opinion that in residence or industrial field in parallel to a wide band network for im-
s
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ages, films, Internet, will be also active a narrow band LAN used to carry simples information as measure,
command to actuators, check systems and so on.
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structure, outside the house or in industrial applications (see figure below).
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So there are a lot of fields that can be covered by a narrow band communication system, in a residential
P r
For example in houses or commercial building possible application are power management, light control,
alarm systems.
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heating o cooling system management, remote control of appliances (by internet or telephone), control of
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Figure 1. Typical Power Line Modem Applications Scenario
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October 2003 1/42

AN1714 APPLICATION NOTE
Considering external applications the main field regard the communication with the meters, in particular
automatic measure and remote control, prepaid supply systems, meter or broadcast information home ter-
minal. Another relevant industrial segment can be the street lighting management.
Even if it is some years that the concepts of power line communication and home automation are present,
as well different devices dedicated for power line modems are developed, the market segment of this kind
of application is developing only in this last period.
There are three main factors that have conditioned up to now the field of the power line communication:
a) The slow development of international normative and standards;
b) Some technical constraints related to the electrical network;
c) Consideration about costs from a general point of view.
The first point regards standards and normative. As general consideration in an open communication sys-
tem is mandatory to have rules and guidelines to guarantee that every node, independently by the manu-
facturer, don't compromise the characteristics of the entire network and the performance of the
communication system.
s)
In the home domain this aspect is more relevant for the presences of several and different appliances and
manufacturers, and also the consideration about a common language (the protocol) are mandatory.
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In the last year the CENELEC (European Committee for Electrotechnical Standardizations) have pub-
lished or up gradated a series of regulations about the communication on low voltage electrical installa-
r o
tions. In particular the are the EN50065-1, concerning general requirements, frequency bands and
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electromagnetic disturbances; the EN50065-4-2 about the low voltage decoupling filter and safety require-
e
ments; the EN50065-7 about the impedance of the devices.
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It is also available a preliminary version (1999) of the EN50065-2-1 about immunity requirements.
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In the last period there is also a sort of lining among the appliances manufacturers on the EHS (European
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Home System) protocols, even if a lot of customized protocols are present, mainly in proprietary mains.
More information on EHS protocol is available on EHS booklet document.
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The second critical consideration regards the technical problems concerning the specific topology of the
electrical network.
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The figure below represents a typical scenario of the signal present on an electrical network. For several
reasons that will be listed in the next paragraph (low impedance, different kind of disturbances, etc.) the
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received FSK signal has a very low level and it is mixed with a great level of noise.
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Figure 2. Mains Signals
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o l MAINS
b s Rx Tx
O ST 7538 ST 7538
Received Signal Transmitted Signal
f f f
fc fc
2/42
The aspects of noise and low impedance are more critical in a residential house were a lot of different
appliances are present.
Every entity of the network has to be able to manage a reliable communication also in these critical con-
ditions. To realize this goal all the aspects of the application design have to be to consider carefully, from
the coupling interface to the power management, from the type of microprocessor to the power line trans-
ceiver, considering their mutual influence, too.
Last but not least the consideration about the economic point of view. It isn't a simple consideration of the
node cost respect to an equivalent wire line or wireless solution, but also other aspects as the installation
and configuration cost of the entire network.
Another economic issue that has to be considered is the power consumption of a single communication
node. The power consumption of each communication unit has to be lower as possible because every
unit must stay always on ready to receive commands from a remote transmitter. This constrains is even
more relevant in application with a huge number of nodes. Consider for example the control of a street
lighting system with thousands of lamps or a metering system with several thousand of electricity meters.
The ST7538 has been designed considering all the issues listed before. With this device is possible to
realize high efficient and reliable application for power line communication, characterized by low power
consumption, low cost, compliant with the main normative and protocol today presents.
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1.2 The Electrical Network
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The communication medium consists of everything connected on power outlets. This includes house wir-
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ing in the walls of the building, appliance wiring, and the appliances themselves, the service panel, the
triplex wire connecting the service panel to the distribution transformer and the distribution transformer it-
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self. Since distribution transformers usually serve more than one residence, the loads and wiring of all res-
e
idences connected to the same transformer must be included.
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1.2.1 Impedance of Power Lines
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A power line has very variable impedance depending of several factors as for example its configuration
(star connection, ring connection) or the number of entities linked.
-
An extensive data on this subject has been published by Malack and Engstrom of IBM (Electromagnetic
)
s
Compatibility Laboratory), who measured the RF impedance of 86 commercial AC power distribution sys-
(
ct
tems in six European countries (see Figure 3).
These measurements show that the impedance of the residential power circuits increases with frequency
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and is in the range from about 1.5 to 8Ω at 100kHz. It appears that this impedance is determined by two
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parameters - the loads connected to the network and the impedance of the distribution transformer. In the
last period a third element influences in a relevant way the impedance of the power line, in particular in
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the a residential network. It is represented by the EMI filters mounted in the last generation of home ap-
e
et
pliances (refrigerators, washing machines, television sets, hi-fi). Wiring seems to have a relatively small
effect. The impedance is usually inductive.
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For typical resistive loads, signal attenuation is expected to be from 2 to 50dB at 150kHz depending on
the distribution transformer used and the size of the loads. Moreover, it may be possible for capacitive
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loads to resonate with the inductance of the distribution transformer and cause the signal attenuation to
vary wildly with frequency.
For the compliance tests the normative EN50065 use two artificial mains networks conforming to sub
clause 11.2 of CISPR 16-1:1993. Measurements on real networks have shown that this artificial network
do not truly represent practical network impedance. To better evaluate the performance of a real signaling
system occurs an adaptive network that has to be used in conjunction with the CISPR 16-1 artificial net-
work. The design of the adaptive circuit is included in the informative annex F of EN50065-1 (revision
2001).
3/42
Figure 3. Aggregate European Power Line Impedance (by Malack and Engstrom).
IMPEDANCE MAGNITUDE (OHM)

1000.0
100.0
10.0
MAXIMUM
1.0 MEAN
MINIMUM
0.1
0.04 0.08 0.10 0.30 0.75 2.10 5.00 15.00 30.00
FREQUENCY (MHz)
1.2.2 Noise
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Appliances connected to the same transformer secondary to which the power line carrier system is connect-
ed cause the principal source of noise. The primary sources of noise will be Triacs used in light dimmers,
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universal motors, switching power supply used in small and portable appliances and fluorescent lamps.
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Triacs generate noise synchronous with the 50Hz power signal and this noise appears as harmonics of
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50Hz. Universal motors found in mixers or drills also create noise, but it is not as strong as light dimmer
noise, and not generally synchronous with 50Hz.
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intermittently.
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Furthermore, light dimmers are often left on for long periods of time whereas universal motors are used
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In the last years others two source of strong noise have been introduced in the electrical network. They
example notebook) or little appliances.

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are the Compact Fluorescent Lamps (CFL) and the switching power supplies of rechargeable battery (for
) -
In many cases they have a working frequency or some harmonics in the range of the power line commu-
nication band (from 10KHz to 150KHz). Of course the presence of continuous tones exactly at communi-
( s
cation channel frequency can affect the reliability of the communication.
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The figure 4 shows some of the noise sources we talk about. The measures setup consists of an insulation
transformer with a VARIAC, a spectrum analyzer HP4395A coupled by a high voltage Capacitor (1uF) and
a 2mH transformer (1:1).
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Figure 4. Voltage spectra of a 100W light dimmer, a notebook PC, a desktop PC, a CFL lamp, a TLE
lamp, all working with a 50Hz/~220V supply (by Cantone).
et e dBuV
o l 110.0
b s 90.0
O 70.0
50.0
Background
CFL 11W
Desktop PC
30.0 Dimmer 100W
TLE 22W
Notebook PC
10.0
1.00E+03 1.00E+04 Hz 1.00E+05 1.00E+06
4/42
1.2.3 Typical Connection Losses

The transmit range of a home automation system depends on the physical topology of the electric power
distribution network inside the building where the system is installed.
Different connection losses can be measured. For communication nodes connected to the same branch
circuit from transmitter to receiver a typical connection loss is about 10-15 dB. If transmitter and receiver
are in different branches of the circuit, separated for example by a service panel, there is an additional
attenuation of 10-20 dB.
In some worst conditions (socket with very low impedance) the attenuation of the transmitted signal can
reaches a value of 50-60db.
1.2.4 Standing Waves

Standing wave effects will begin to occur when the physical dimensions of the communication medium are
similar to about one-eight of a wavelength, which are about 375 and 250 meters at 100 and 150kHz re-
spectively. Primarily the length of the triplex wire connecting the residences to the distribution transformer
will determine the length of the communication path on the secondary side of the power distribution sys-
tem. Usually, several residences use the same distribution transformer. It would be rare that a linear run
s)
of this wiring would exceed 250 meters in length although the total length of branches might occasionally
wiring.
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exceed 250 meters. Thus standing wave effects would be rare at frequencies below 150kHz for residential
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1.3 ST7538 Power Line Modem
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ST7538 is a transceiver designed for power line communication application on low voltage (220V) and me-
e
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dium voltage (2KV) mains. Its function is to realize the interface from the electrical network and a system
(usually a microprocessor with some sensors), which will manage the application and the upper layers of
the communication protocol.
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The advanced technology used, a CMOS-LDMOS-BIPOLAR fabrication process, the package, a TQFP44
with dissipating slug, and new design techniques make this device a more versatile and complete instru-
-
ments than the previous generation of power line modems.
)
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Figure 5. Basic Blocks and Functions of ST7538.
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ST 7538 ct
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Pr SERIAL
INTERFACE µC
e
MODEM
t e
SECTION
&
CONTROL
SUPERVISOR
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Linear Regulator
PLI Control Register
Clock Source
Receiving Section Serial Interface
Watchdog Supervisor
Transmitting section Serial Interface Management
Reset Generator
Power line comunication status signals
UVLO
5/42
The key points of this device are:

– A smart power consumption management, i.e. very low current consumption in receiving mode (5
mA) and a high efficiency during transmission;
– The integration of a consistent part of the power circuits (a 2Watt power line drivers and a 5V/100mA
low drop regulators);
– A very efficient demodulation circuit with a wide dynamic range and an high selectivity;
– An automatic voltage/current regulation loop that adapts the transmitted signal to the low and variable
impedance of the mains;
– An internal register in conjunction with efficient and simple digital interface that controls easily all the
functions of the device;
– A series of auxiliary function and blocks (zero crossing comparator, crystal driving oscillator circuit,
operational amplifier, Band in use, Power Good, etc.);
All the listed above characteristics make this device a powerful tool to develop power line modem appli-
cation with low power consumption, a reasonable cost, suitable to design communication node compliant
with the European normative CENELEC (EN50065), US FCC regulations.
ST7538 is a protocol independent device and it can be used to implement proprietary protocols or stan-
s)
dardize protocols like EHS V1.3a or Konnex.
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A possible application circuit with the ST7538 is illustrated in figure 6. As you can notice the several fea-
tures of the ST7538 simplify the overall application reducing the number of the external components.
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The internal 5V regulator of the devices generates the supply for the microprocessor and other low voltage
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components the application requires, so only one power regulator is sufficient to supply the application.
The reset, the clock can be provided to the microprocessor by the ST7538, so it is possible to avoid the
glue logic and the external circuitry to realize them.
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s o
The integrated power line interface with an integrated voltage regulation/current protection circuit (patent
pending) and few passive external components realizes a very efficient coupling circuit able to transmit a
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valid signal also in the most critical condition of impedance.
All these issues explain how it is possible to make an efficient and cheaper power line communication
node using the ST7538.
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6/42
Figure 6. Application Circuit.
AC
LINE
Single Supply Voltage
DRAIN
No external
L6590
VCC
components for
VFB
Power Line Driver
GND
Vcc WD DVcc AVcc VDC

COMP
RX/TX PAVcc
CLR/T
ATOP2
RxD AC
LINE
5V Supply Voltage TxD
ATO
provided to the uC ST7538
)
REG/DATA ATOP1
User's
Application
uP
CD/PD
TOUT
RxFo
Vsense
t( s
Electronics PG
RSTO
CL
u c
d
TEST
ZCOUT
Reset provided to REGOK RAI
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the uC
P
BU
ZCIN
Vss MCLK DVss AVss XTAL1
XTAL2
te
le
so
Clock provided to Zero Crossing Voltage Regulation &
the uC Transmission Current Protection
synchronization
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1.4 FSK Modulation & ST7538 Architecture
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The function of the devices is to receive and transmit through mains or a power line, connected with an
appropriated coupling circuit, electrical signals coded according a half duplex FSK modulation (Frequency
d
Shift Key). The FSK modulation technique translates a digital signal in a sinusoidal signal that can have
o
low level (fl).
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two different frequency values, one for the logic level high of the digital signal (fh), the second one for the
et e
o l fh
b s
O fl
The average value of the two tones is the carrier frequency (fc). The difference or distance between the
two frequencies is a function of the baud-rate (BAUD) of the digital signal (the number of symbols trans-
mitted in one second) and of the deviation (dev). The relations are:
ƒh + ƒl
ƒh – ƒl = BAU D ⋅ de v ƒ c = ----------------
-
2
7/42
The ST7538 is able to communicate using one of 8 different communications channels (60, 66, 72, 76,
82.05, 86, 110, 132.5 KHz), selecting for the chosen channel four baud-rate (600, 1200, 2400, 4800) and
two different deviations (1 and 0.5). All these parameters and other setups of the devices are configured
writing the internal control register.
Figure 7. ST7538 Block Diagram.

DVdd AVdd DVss AVss TEST1 TEST2 TEST3 BU RxFo
CARRIER
CD/PD TEST BU
DETECTION
AGC
RxD
DIGITAL FSK IF
CLR/T PLL FILTER
FILTER DEMOD FILTER
AMPL
RAI
SERIAL
FILTER
INTERFACE
CONTROL
REG/DATA CURRENT
REGISTER CL
CONTROL
)
RxTx
TxD
FSK
MODULATOR
DAC
TX
FILTER
ALC
VOLTAGE
CONTROL
t( s
Vsense
uc
ATO
REGOK PLI
ATOP1
od
ATOP2
OSC TIME BASE ZC OP-AMP
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+ PAVcc
VREG
- Vdc
PG
XOut XIn WD TOUT RSTO MCLK ZCin ZCout C_OUT CMINUS

te CPLUS D03IN1407
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The ST7538 in transmitting mode (pin RxTx at a low level) receives a digital signal at the baud-rate on the le
opposition).
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TXD signal and translate it in a FSK sinusoidal signal at the pins ATOP1/ATOP2 (the signals are in phase
- O
In the receiving mode (pin RxTx high level), an incoming FSK signal on the RAI pin is demodulated and
the digital output is present at the pin RXD. The device recovers also the clock (baud-rate) of the received
signal on output pin CLR/T using an internal PLL.
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ct
The communication has to use a half-duplex protocol, i.e. only one communication node at a time can
transmit. All the other nodes have to wait their turn and be sure that the communication channel isn't busy
before to communicate.
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product datasheet. r o
For a more detailed and complete description of the ST7538 devices and of its function please refer to the
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Figure 8. FSK spectrum, random sequence.
l et Peak Measure - Bw = 100 Hz
o Ch 132.5 kHz, Baud 2400, dev 0.5
bs
110.0
O
100.0
90.0
dBu 80.0
70.0
60.0
50.0
40.0
122 127 132 137 142
kHz
8/42
2. DEMO BOARD FOR ST7538
2.1 Main Features

ST7538 Demo Board realizes in a two layer PCB a complete power line communication node, including
the power line coupling circuits, a power supply section, a microcontroller and a RS232 serial interface to
connect the board to a personal computer (figure 10). This board with the related firmware load in the ST
microprocessor and the PC software realizes a complete reference about the mains aspects of the power
line communications.
Figure 9. Demo Board Picture.
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Figure 10. Demo Board Layout sections.
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u ct
o d LV HV
P r LV
Power Supply
et ePC Interface
o l
b s
O ST7538P
ST7
Signal Coupling
Interface
LV
LV HV
9/42
The aim of this board is to give a useful tool to develop and to evaluate a power line application with the
device ST7538. So even if aspects of the board concerning size and cost aren't optimized, it's schematic
gives a good design reference and a valid start point to develop power line modem applications. Moreover
the board structure (a lot of jumpers, test points, few SMD components) allows connecting easily test
probes to realize measure and signal verification, as well to customize the application according to specific
requirements.
Figure 11. Demo Board Schematic: Micro controller & PC Interface.
TXD 5V_µP CN7

1 2 ISPDATA
3 4 ISPCLOCK
R16 5 6 RESET
4.7K C27 C28 C29 C30 C31
D13 JP1 100nF 100nF 100nF 10µF 100nF 5V 7 8 ISPSEL
1N4148
9 10 R17
10K
ISP INTERFACE
MICRO_TXD CN5
U3
R2IN
FEMALE
RN1
s)
t(
R2OUT 8 COMMON
9 T2OUT 5 1 5V_led
T2IN 7 T2OUT_A R4
H_S
RS232_OUT
T1IN
10
11
ST232
5
C2-
C26
9
4
5
4
R3
u c
d
R1OUT R2
RS232_IN 12 C2+ 100nF 8 3
o
R1IN 4 R1IN_A R1
r
R1IN_A 13 3 2
T1OUT 3
D11 D10 D12 D9
P
T1OUT_A 14 C1- 7
VCC C25 T1OUT_A RED YELLOW GREEN RED
5V_232 16 C1+ 100nF 2
e
GND 1 TOUT CD/PD RX TX
15
V+
2 6
V-
C32
6
1
T2OUT_A
le t PA4 PA5 PA6 PA7
so
100nF PC INTERFACE
J10
5V_232
C24 100nF C23 100nF J9
U4
Ob 5V
J8
5V_led
5V_µP
-
OSCOUT VDD_1
41 32 5V_µP
(s)
VDD_2 PA3
5V_µP 43 31 CD/PD
RESET PC7/SS
RESET 39 30 SS
ct
PE0/TD0
RS232_OUT 44 ISPCLOCK
OSCIN PC6/SCK/ISPCLK
u
MCLK 42 29 CLRT
ISPSEL J11
d
ISPSEL 38 PC5/MOSI
(HS)PA7 28 RXD
PA7
PA6
(HS)PA6
r
37
36
o 26
PC3/ICAP1_B(HS)
PC4/MSO/ISPDATA
ISPDATA
P
(HS)PA5 27 MICRO_TXD CN6
PA5 35
(HS)PA4 PC2/ICAP2_B(HS) 12
PA4
RS232_IN
et e
PE1/RDI
34
1
25
24
PC1/OCMP1/B 11
l
PB0 PC0/OCMP2/B 10
SS 2 ST2334N2 23
o PB1 EXTCLK_A(HS) 7
CLRT 3 20
b s TOUT
REG_OK
PB2
PB3
4
5
19
18
ICAP1_A/PF6(HS)
OCMP1_A/PF4
6
4
O REG/DATA
H_S
WD
ANI0/PD0
ANI3/PD3
ANI4/PD4
7
10
11
16
9
8
PF1/BEEP
AN2/PD2
AN1/PD1
BU 8
3
5
ANI5/PD5 PB4 9
RXTX 12 6
VDDA VDD_0 2
5V_µP 13 21 5V_µP
PF2 VSS_0 1
ZCOUT 17 22 5V_µP
MCO/PF0 VSS_1
PG 15 33
VSSA VSS_2
14 40
D03IN1450
10/42
O b s
F1 TR5-F 0.5A L5 1mH R1 16.2 2W D1
CN1
o
1 1.5A W04 TR1
l
P C1 L2 220µH RADIOHM 69E16H1B
47nF
N 400V D3 4 D2 P10V
e
2 L1 42V15 C2 C3
ACLINE BZW06- STPS160ASMA L3 10µH CN4
t
2 x 10mA 4.7µF 4.7µF
171 1
85VAC to 256VAC 0.3A RADIOHM 400V 400V 7 ZCIN
D4 J1 CN2 2
e
STTA106 1 ZCOUT
DRAIN 2 C4 C5 3
1 C34 470µF 470µF R2 ATOP1
L6590 VCC 100nF 16V 16V 2.2K 4
3 2 ATOP2
P
GND C6 R3 10 D6 1N4148 1 D5 5
6 RXFO
r
GND 22µF GREEN
8 6
7 50V ATO
GND U1 VFB R5 3.3K RL6 10 D7 1N4148 7
o
8 5 3
4 R7 C10
d
910 1µF
VCOMP C8
1µF
u
5V
LC12 10µH T2 L4 22µH
L8
ct
10µH D15
C7 C14 C15 C11 33nF CN3
C_R9 P6KE6V8A
(
2.2nF/Y1 10µF 100nF 220V X2 1
C16 100nF R8
JP35 100nF JP36 D17 1T 1T 4.7M
s
SM6T6V8A
TEST1 N.C. AVDD VDC ATOP2 R10 2
)
5.1Ω
CMINUS 35 17 28 33 21 D16
37 ATOP1 P6KE6V8A
-
CD/PD 19
J2 CD/PD 1 VAC T60403- J4
R12
RXD C13 220nF 4096-X046 P
RXD 3 31 RXFO 50K J5
TRIM N
CPLUS VSENSE
O
38 29 R11
TEST2 JPTIN R14 750
J3 C_OUT C17
b
C_OUT 40 30 5.6nF/63V 1K
RxTx GND
Rx/Tx 4 6
s
5V TXD L7 C36
TXD 5 AVSS
REG_OK 25 330µH 4.7nF J6
o
REG_OK 36 C38
PG C21 VSENSE
10µF
PG 42 ST7538P PAVCC 100nF
REG_DATA 22 P10V CL
le
REG/DATA 43 U2 PAVSS
20
t
R15 4.7K RSTO C18 47pF
RESET 12 XIN
27
5V
C22
22nF
C20
SW1 GND
DVDD
DVSS
41
10
18
26
32
XOUT
RAI
e 1x
16MHz
P SOLD CRYSTAL CASE
TO GND
C19 18pF
J7
C33
10nF
r
300nF DVSS ZCOUT
Figure 12. Demo Board Schematic: Line Coupling Interface & Power Supply.
2 15 ZCOUT
TIMEOUT WD
o
TIMEOUT 7 14 WD
CLRT CL
CLRT 8 23
d
BU ATO
BU 9 11 39 34 44 13 16 24 ATO C37
R13 100pF
u
MCLK MCLK N.C. N.C. N.C. TEST3 ZCIN 5K

JP13 JP16 TRIM
c
5V
D03IN1451
t( s)
11/42
2.2 Signal Coupling Interface

The line signal interface links the application board to the mains, realizing an high efficient coupling circuit
for the received and transmitted FSK signals and a reliable filtering system for the mains voltage (220V~/
50Hz or 110V~/60Hz), for noise and for bursts or surges.
It is possible to implement different topologies of coupling circuits. A first classification is between an iso-
lated solution with a line transformer or a double capacitor and a non-isolated solution with a single high
voltage decoupling capacitor. The last one is more simple and cheaper, while the first one realizes better
performances using efficiently the differential power output of the devices.
The differential solution has been also preferred for the advantage to reduce the even harmonics of the
transmitted signals.
Figure 13. Demo board ST7538 Power Line Interface.
ST7538 Rx Band Pass Filter

32
C33
R11
s)
t(
RAI
L7
u c
C36
o d
Tx Band Pass Filter
19 P r
L4 C11
ATOP1
t
1:1e
C13 R10 D16
le MAINS
so
D17
R8
21
CR9
D15
Ob
ATOP2
- T1
(s)
LC12
Protections
Tx Band Pass Filter
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d u
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In the design of the coupling interface a lot of technical and standard constrains have to be considered,
P
that are different in a receiving condition respect to a transmitting status.
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et
Here following a list of design specification for signal coupling for the European Market:
l
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– High selectivity in receiving mode (EN50065-2-1);
– Output impedances as greater as possible (EN50065-7);
O b– Low noise in receiving mode;

– Wide voltage and current signal compatibility in every condition (EN50065-1);
– Very low distortion in transmission mode (EN50065-1);
– High coupling efficiency in transmission mode (also with high loads);
– High reliability to burst and surge spikes (EN50065-2-1).
A series of constraints listed in the EN50065-4-2, "Low voltage decoupling filters - Safety requirements",
have to be guarantee by the decoupling elements (transformer or capacitors) to be compliant with a 4KV
or 6KV classes.
12/42
The solution implemented in the demo board is an isolated circuit with a 1:1 transformer and a X2 class
capacitor. In the chosen topology the transmission sections components haven't any relevant influences
on the receiving circuits, so the two structures can be analyzed separately. The components values that
realize the passive filters have been dimensioned for the 132.5KHz channel, but also with the 110KHz
communication frequency the performances of the board have the requirement for a reliable communica-
tion.
2.2.1 Transmitting Section

The function of the transmitting coupling circuits is to inject the transmitted signal coming from the power
amplifiers (ATOP1/ATOP2) to the mains with the maximum efficiencies and filter noise and spurious sig-
nals over the Cenelec mask (EN50065-1, section 7 disturbances limits).
The critical frequencies of the conducted disturbances emitted are the 2 nd and 3rd harmonics of the trans-
mitted signal (265 KHz and 497.5 kHz for the channel at 132.5 kHz) the harmonics of the working frequen-
cy of the power supply regulator and two spurious tones centered at 1.3 MHz (+/- the channel frequency)
produced by the direct synthesis technique used for the transmitted signal generation.
)
The configuration used for the transmitted circuit realizes a 4th order band pass filter (four poles and two
s
t(
zeros). In order two have a good immunity to the components spread (accuracy and temperature) and to
u c
the load variation the filter has a band of about 60 kHz (see figure 16). To obtain this characteristic two
poles can be put at a frequency of about 100 kHz and the other at a frequency of about 160kHz.
o d
Figure 14. Demo Board ST7538 transmission coupling circuit.
P r
te
ST7538
o le
RAI 32
C33 R11
b s Artificial Network
100K Ω
C36
L7
O
-Transmission CISPR 16-1
2.5V
s ) Coupling Section
t(
ATOP1
c
L4 C11 50 µH
19
C13
d uR10 D16
1:1 50Ω 5Ω
r o D17
R8
ATOP2
e P CR9
D15 50Ω 5Ω
t
21
T1
o l e LC12
50 µH
b s
OFor a correct dimension of the filters the mutual influence of the various components has to be considered,
as well the influences due to the other elements: the leakage inductance of the transformer (from 0.1uH
to 10uH), the capacitance of the transil diode (about 2nF), the ESR of the series components C13, LC 12,
T1, L4, C11 (from 100m ohm to 1 ohm).
For a first approximate rate of the components values the simplified circuit of figure 15 are used only the
reactive components and the transformer (1:1 ratio) is considered ideal.
13/42
For the correct dimension of the filter it is better to consider the typical impedances expected for the used
mains network too (usually an inductive load). If an impedance characterization of the network isn't avail-
able it is possible to use a reference load like the artificial network CISPR16-1 (50 ohms parallel 5 ohm
plus 50uH). In the simplified circuit as been considered only the reactive part of the CISPR 16 artificial
network 2 Lc = 100uH.
Figure 15. Simplified schematic of the transmission filter.
CISPR
Load
C13 LC12 L4 C11
Lc = 50 µH
1st Loop CR9 2nd Loop

s)
Lc = 50µH
c t(
d u
r o
e P
The formulas for the two couple of poles are:
le t
1
s
ƒ p1 = ƒ p2 ≅ --------------------------------------------- ≅ 160kHz , o 1
ƒp2 = ƒ p3 ≅ -------------------------------------- ≅ 100 kHz
2 ⋅ π ⋅ L C12 ⋅ C A
Ob 2 ⋅ π ⋅ LB ⋅ CB
) -
1 1
(
1
s 1 1 1
ct
------- = ----------- + --------- ; ------------- = ----------
- + --------- ; LB = L4 + 2 · LC
CA C R9 C 13 CB C R9 C 11
d u
r o
The peak value of the signal current can reaches with heavy load a current peak value greater than 1 Am-
e P
pere so all the components of the coupling interfaces in series to the signal (in particular the inductors
LC12, L4 and the transformer T1) have to be guarantee for this current without saturation or overheat prob-
et
lems. The maximum current of the inductive elements, as well the series resistance, are proportional to
l
value of the inductance.
s o
In any case the ESR of these inductive elements has to be as lower as possible to realize a good coupling
O b
interfaces. In fact with a global impedances series greater than 2 ohm the coupling losses of the transmit-
ted signal with heavy loads could be excessive.
For these reasons are been chosen in this circuit LBC (Large Bobbin Core) inductor with values small as
possible (LC12 = 10µH and L4 = 22µH)
Another constraints regard the value of the capacitor C11. This is a X2 class capacitor that has the primary
function to uncouple the transformer for the mains. Its better to use a value as lower as possible both for
an economic reason, both to obtain a 50Hz mains current in the secondary coil of the transformer lower
as possible in order to reduce saturation effects. The value choused is 33nF.
14/42
Considering that all the mains voltage drop un the C11 capacitor the current value in the transformer coil
is about:
I rm s ≅ 220V rms ⋅ 2 ⋅ π ⋅ 50H z ⋅ C 11 = 2.3mA rm s
Using the previous poles formulas can be rated the values of CR9 (100nF) and C13 (220nF). The require-
ments about this type of capacitor are the accuracy, the temperature compensation and a low ESR values.
Polyester capacitors or Polypropylene capacitor (better temperature coefficient) are suggested. The ac-
curacy should be at least of ±10%.
Figure 16. Simulated characteristics of the transmission coupling filter.
dB VDB (OUTC2)
10
s)
-10
c t(
d u
-20
r o
e P
-30
le t
s o
b
-40
- O
-50
( s )
-60
u ct
o d
r
-70
P
et e -80
o l 1e+U4 1e+U5
Hz
1e+U6 2e+U6
b s
OUsing components with standard values the real values of the poles are:
ƒ p1 = ƒ p2 = 192 kHz , ƒ p2 = ƒp3 = 91 kHz
The values obtained are very close to the spec values and in agreement with the simulated results (see
figure 16). In any case for a better result it is suggested to use a simulator or an equivalent specific pro-
gram to design filters.
The R 10 resistor has been added to fit the output impedance requirement in receiving mode (EN50065-7).
15/42
An alternative solution for the transmission coupling circuit is showed in the picture above. It realizes a
2nd order band pass Butterworth filter centered at the channel frequency.
The advantage of this solution is the symmetrical structure that compensates the non-linearity of the com-
ponents (lower level for the even harmonics).
Also in this case a correct dimension of the filter has to take in account the parasitic elements of the various
components, as well the load influence.
Figure 17. Coupling circuit with a 2nd order band pass Butterworth.
ST7538 Transmission 2nd order

Band Pass Butterworth
33nF X2
19
ATOP1
220nF 10 µ H
4.7 Ω
1:1 MAINS
s)
21
100nF 47 µ H
c t(
ATOP2
220nF 10 µ H
d u
r o
e P
le t
One of the most critical components of the application is the signal transformer. In order to have a good
power transfer and to minimize the insertion losses it is recommended a transformer with a primary induc-
s o
tance greater than 1mH and a series resistance lower then 0.5 ohm. Another constrains regards the sat-
uration current: a DC or low frequency current (50Hz) should be present.
Ob
Another parameter to take in consideration is the leakage inductance. If it has a relevant value (from 10uH
) -
to 50uH) the inductance L4 can be avoided. The drawback is that this parameter has a great variation that
influences the output filter characteristics. For this reason in the demo board is used a transformer with a
very low leakage inductance (lower than 1uH).
( s
ct
The European normative (CENELEC) gives another constraint regarding the voltage insulation resistance
u
o d
and dielectric strength of the application that influences the transformer. Two classes are indicated, a 4kV
and a 6kV class. The classification and measurement criteria are codified in the EN50065-4-2 CENELEC
document.
Pr
t e
In case of heavy load a smart solution is to use a 2:1 transformer. The equivalent impedance of the load
referred to the primary coils of the transformer has a value four times bigger than with a 1:1 ratio trans-
e
l
former. Also the current supplied by the power interfaces has half value. The only critical point is that to
o
b s
have the same output signal level on the mains the ST7538 power interfaces has to generate a double
signal (more problems with odd harmonics).
OSeldom a low amplitude signal at high frequency (greater than 10MHz) can be present on the output sig-
nal. It should be originates by a resonance from the leakage inductances and the parasitic capacitance of
the board and of the ST7538 output stage. Usually the series inductor LC12 stops this kind of oscillations.
2.2.2 Receiving Section

The receiving circuit of the coupling interface has the main function to filter noise tones from network that
can overcome the maximum absolute rates of the RAI pin, or in any case degrade the demodulation per-
formances of the device (EN50065-2-1 Narrow-band conducted interference, 7.2.3).
16/42
The solution adopted in the demo board consists of a resonant parallel circuit that realizes a 2nd order
passive filter (C36, L7 R 11). The C33 capacitor is a decouple component that saves the DC value on the
RAI pin (2.5V). This DC value realizes the maximum voltage input signal (2Vrms) compatible with the ab-
solute of the devices.
Figure 18. Demo board ST7538 receiving circuits.
ST7538
RAI C33 R11
32
100KΩ Receiving
L7
C36 Coupling Section
2.5V
22
PAVCC
60KΩ L4 C11
19
ATOP1
60KΩ C13 D16 1:1
R10
D17
R8
s)
ATOP2
21
CR9
D15
T1
c t(
LC12
d u
In the receive mode the ATOP1 pin has a high impedance and a DC polarization at PAVcc/2 while ATOP2
r o
pin is tied to ground internally into the device with a power MOS (few milliohm resistance). With this con-
e P
figuration the two resonant series L4, C11 and LC12, CR9, R10 can be considered as first approximation
le
neglected (L4/C11 has the resonance at the channel frequency while the LC12/CR9 has the resonance at t
signal, about 6 dB with the used values of CR9 and R10.
s o
an higher frequency). The only effect of these components is to attenuate the amplitude of the received
Ob
According to these consideration the dimension of the input filter frequency depends mainly by the choice
of C36 L7 and R11.
) -
s
These components realize a 2 nd order band pass filter. The center band frequency of the filter is the chan-
(
ct
nel frequency:
du
1
ƒ 0 ≅ ---------------------------------------- = 132.5kHz
2 ⋅ π ⋅ L 7 ⋅ C 36
r o
e P
The other parameter to take in account for the receiving filter design is the Quality factor (Q). It 's value is
a tradeoff between the selectivity requirements (high Q values) and the components and temperatures
l et
spreads. Using a polypropylene capacitor with a 5% tolerance and a BC inductor with a tolerance of 10%
a Q value betweens 2 and 3 is acceptable.
o
bs
C 36
Q ≅ R 11 ⋅ --------- = 2.85
L7
O
In order to don't influence the transmitting section and to reduce the DC current trough the primary coil of
transformer the value of R11 should be higher as possible. The drawback of a great value for this resistor
is that produces a higher white noise. A value of 750 ohm satisfies these opposite requirements for all the
communication channels. Fixed the resistor value and using the previous equations it is possible to rate
the values of C 36 and L7.
Here following a table with some possible commercial values for these components referred to different
communication channel.
17/42
Table 1. Parallel resonance Rx filter components

Rx Filter
C36 L7 F0
Ch 132.5 kHz 6.8nF 220uH 130.1 kHz
Ch 110 kHz 10nF 220uH 107.3 kHz
Ch 86 kHz 10nF 330uH 87.6 kHz
Ch 82.05 kHz 8.2nF 470uH 81.1 kHz
s)
t(
The resonance frequency of the filter is strictly Some receiving circuit interfaces, for example with
linked to the spread of these components and an
excessive spread can produce an excessive at-
a 2:1 signal transformer, can have a gain greater
than 0dB (unit gain). In this case, if the band in use
u c
tenuation on the received signal. The accuracy of function level of the ST7538 is used, it is neces-
o d
L7 and C36 has to be great.
For the same reason the Q factor has a relevant
sary an attenuation of the received signal (for ex-
ample with a resistors divider) to have the same
P r
part in the design of the Rx filter. Some application
te
level of the signal present on the mains to be com-
le
pliant with Cenelec specifications.
can use more than one communication channel at
the same time, in this case the best choice is to
have a resonance frequency at a mean values of
s o
2.2.3 Voltage Regulation-Current protection
used frequencies and a Q factor not too high.
Ob loops
A power line networks requires an appropriate
Figure 19. Measured filtering characteristic of
) - driving circuits able to adapt the output signal
the demo board at the RAI pin in re-
( s characteristic to the different and low values of the
ct
ceive mode. mains impedance.
d
RxFilter
u Figure 20. Power Line Output Characteristics.
0.00E+00
r o
-1.00E+01
e P
-2.00E+01
l et V
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
dB
s o
-3.00E+01
V0
0000000000000000000000000000000000000000
O b -4.00E+01
Signal 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
I zone
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-5.00E+01 Amplitude
1.00E+04 1.00E+05 1.00E+06
Hz V zone
For the receiving filter a passive solution is pre-

0000000000000000000000000000000000000000 z
ferred to an active filter. The experience has evi- Z0 Line load (ohm)
denced that active filter introduces a white noise
comparable with the received signal level.
18/42
Figure 20 shows the characteristic of a coupling circuit. The characteristic has a range with constant volt-
age amplitude of the transmitted signal. When the line impedance has reached a critical Z0 value, corre-
sponding to the maximum power, the amplitude of the output signal is decreased in order to have a
constant current.
The value of Z0 depends mainly by the network impedance, while the maximum value of V0 depends by
the normative (EN50065-1) and by the maximum current capability of the power line interface.
The ST7538 integrates a control voltage / current protection circuit. It is possible to program the values of
Z0 and V0 with external resistors. R13 trimmer sets the current protection limit and R14 and R12 trimmer
the peak voltage level. The dimension of these external components influences the design of the coupling
interfaces and of the power management, too. For example all the components in series to the signal
(transformer, filter inductors, decoupling capacitors, fuses) have to guarantee a maximum current or a sat-
uration current greater than the maximum current programmed with R 13, as well the dimension of the cur-
rent capability of the power supply and the capacitors on the supply line have to be choose according to
the programmed current values.
The control loop circuit inside the devices is realized by a Voltage Controlled Amplifier (VCA) with a logic
)
circuits that implement the following control (figure 22): the current protection has the priority respect to
s
t(
the voltage loop regulation, so if it is detected an output current greater than the programmed value (Iref
the programmed value the gain of the VCA is frozen.

u c
> IH) the digital control acts on the VCA to reduces the output signal voltage. When the current reaches
o d
In case of no current protection condition (Iref < IL), the voltage regulation loop assumes the control and
r
modifies the gain of the VCA until the output signal reaches the programmed values.
P
e
The VCA changes its gain at steps of about 1dB (10%). The logic samples the current and voltages values
t
le
with and internal clock of 5Hz, so the transmitted signal is updated every 200usec at step of 1 dB.
s o
Figure 21. Voltage Regulation and Current Protection Components.
Ob
) - Voltage
ST7538
( s Controlled
ct
VR PK
Vout Signal
ATOP/ATO
d u
r o Iout
e P C 17 R 12
l etVSENSE
VCL HYST
o VCL HYST
bs
R 14
VCL TH
CL
O 1.865 V
R13 C37 Feedback

Signal
19/42
The value of the transmitted signal is programmed using the resistors divider R12/R 14 (the capacitor C17
has a decoupling function for the DC value on the VSENSE pin).
The regulations loop changes the VCA amplifier gain until the sinusoidal signal on the VSENSE pin reaches
the values of VCLTH (see datasheet values) with a tolerance of about ±10% (VCLHYST hysteresis value).
The following simplified formula calculates the resistors divider ratio.
R 14 + R 12
VR PK ≅ -------------------------- ⋅ ( VC LT H ± VCL HIST )
R 14
⇒ VCL TH =190mV
VCL HIST =19mV
For a more precise rate in the formula has to be considered also the input impedance of the VSENSE pin
(~36 Kohm), and the decoupling capacitor C17 (for values of some nano farad this capacitor can be ne-
glected).
Figure 22. Voltage regulation/current protection loop logic.
Current
Control
s)
Iref < IL Iref > IH
c t(
Test
d u
r o
Constant
Gain
e P
Reduce
Gain
le t
Voltage
Control
s o
Ob
Vref < VL
) - Test
Vref > VH
( s
ct
du
Increase Constant Reduce
Gain Gain Gain
r o
e P
et
In the demo board it is possible to link the feedback signal (top of R12 resistor) to ATOP1 or to ATOP2 pin
through the jumper J36. The choice of the feedback connection point depends on the network coupling
l
o
circuit topology.
s
O b
If it is present a big noise coming from the mains that perturbs the voltage control loop a possible solution
is to connect the feedback to ATO pin. In this case the output signal has an half value respect to the ATOP
pins, so the R12 resistor has a half value (or R14 resistor has to be doubled)
In the demo board it is possible to change the output signal voltage level acting on the R12 trimmer. The
following table gives the values of the trimmer to assume some standard output values.
20/42
Table 2. Voltage Regulation Loop (divider and R12 resistors values).

Vout (Vrms) (1) Vout (dBuV) (R14+R12)/R14 R12 (Kohm) (2)
0.150 103.5 1.1 0.1
0.250 108.0 1.9 0.9
0.350 110.9 2.7 1.7
0.500 114.0 3.7 2.6
0.625 115.9 4.7 3.6
0.750 117.5 5.8 4.7
0.875 118.8 6.6 5.4
1.000 120.0 7.6 6.4
1.250 121.9 9.5 8.3
1.500 123.5 10.8 9.5
Note: 1. The regulated Vout voltage is the point linked to the voltage feedback divider (top of R12).
2. The rate of R14 takes in account the input resistance on the VSENSE pin (36 Kohm).
The decoupling capacitor (C17) has been neglected.
The resistor connected to the CL pin (the trimmer R13 in the demo board) has the function to programs
s)
the current protection threshold. The capacitor C37 in parallel to the resistor has a filtering function for
c t(
noise and spikes.
On the CL pin is present a mirrored current (ratio 1:5000) of the p channel power Mos of the power line
d u
r
interface of the device (both ATOP1 and ATOP2). So the voltage on the CL pin will be proportional to theo
output current and to the resistor connected to the pin.
e P
le t
The peak value of this voltage is compared with an internal reference of the device: if the signal overcomes
the threshold the loop acts on the VCA reducing the transmitted signal and therefore the output current.
s o
The resistor value determinates of the output signal that the interface is able to supply. In conjunction with
ances (Z0).
Ob
the programmed output voltage V0 the maximum current level fixes the minimum value of driving imped-
Figure 23. Current Protection Loop Characteristic.

) -
( s
ct
mA (rms) Current Protection
350
325
d u
r
300
o
e P275
250
l et 225
o
200
bs
175
150
O 125
100
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
R13 (Kohm)
The graphics above gives the value of the CL resistor to program the maximum current value.
In the next figure are showed all the main signal of the control loop feedback, i.e. output signal, load cur-
rent, VSENSE voltage and CL voltage.
21/42
Figure 24. Voltage Regulation & Current Protection Feedback signals
s)
c t(
d u
r o
e P
le t
s o
2.3 Board Power Management
Ob
) -
The demo board has a main supply with a flyback converter using the monolithic switching regulator
L6590. The regulator can have both a 220V or an 110V supply voltage of the mains.
( s
ct
It is possible to use an external power supply connected to CN2, too. In this case the jumpers J4 and J5
has to be removed and the connector CN3 has to be used instead of the standards socket CN1.
d u
The correct supply of the board is evidenced by the green led D5. It is possible to turn off this led removing
the J1 jumper.
r o
P
The 5V internal regulator of the ST7538 (VDC pin) supplies the microcontroller ST7, the ST232 interface
e
et
device and the led (D9, D10, D11, D12). Using the jumper connections J8 (ST7), J9 (leds) and J10
(ST232) it is possible to monitor the current of these components or remove the supply to these demo-
l
o
board parts.
s
O b
The 5V supply is available also on the pin #1 of the CN6 connector.
A typical power consumption of the power line application (switched regulator excluded) is about 18mA in
receiving mode 120 mA in transmitting mode without load. Every led ON increases the current consump-
tion of 4 mA.
The current consumption of the RS232 interface is about 12mA, It means that the overall current con-
sumption of the microcontroller plus the ST7538 in receiving mode is about 6 mA.
The current consumption depends also on the clock frequency selected. There is a variation of 5mA from
a 4MHz clock to a 16MHz clock.
22/42
2.3.1 L6590 Regulator

The flyback converter configuration using the L6590 regulator has a specific topology that realizes the
feedback on a willing of the primary side of the flyback transformer. With this configuration it is possible to
save the cost of an optocoupler. The drawback of this solution is the wide load range of the regulated volt-
age. In a condition of low current consumption (20mA) the value of the supply voltage is about 12V, in
transmission the value is about 10.5V.
The maximum power of this configuration is about 3 Watt. The dimension of the maximum power con-
sumption of the regulators is related to the current limit of the power line interface programmed with the
R13 resistor on the CL pin.
If an external power supply is used it has to verify carefully that also in a continuous transmission condition
the supply is able to supplies the requested current.
Another aspect that has to be consider with attention in a continuous transmission condition is the over-
heat condition of the devices with the thermal protection activation (transmission aborted and signal TOUT
high).
In the demo board it is used a socket for the ST7538, therefore the slug of the package can't be sold to a
dissipating surface as recommended. For this reason, in presence of a heavy load during a continuous
s)
t(
transmission, it is easier to reach the thermal protection threshold.
u c
A critical point common to all the switching solutions, especially for this kind of application, is the electro-
magnetic noise and the conducted disturbance generated. In particular the mean noise frequencies are
d
due to the switching frequency and to the resonance of the leakage inductance with the drain capacitance.
o
Figure 25. Power supply EMC disturbances filter circuit.
P r
te
le
R1
D1
L1
b so L5
MAINS
- O C1
( s )
u ct
d
In the demo board these critical values are at 20KHz or 66KHz (switching frequencies respectively with
o
Pr
low and high load condition) and at about 800KHz for the resonance.
It is important that the resonance of the input filter is at a frequency far from the communication bands
t e
used, otherwise its low impedance attenuate the communication signals.
e
l
For the demo board the resonance frequency is from 10KHz to 20KHz.
o
b s
The 15 ohm resistor R1 has the double function to protect the input stage of the supply from surge or burst
and at the same time it is necessary to make the application board compliant with the EN50065-7 stan-
Odard.
Another consideration regards the frequencies noise generated by the supply. Even if the noise generated
is compliant with the normative mask limit, its mandatory to choose a value of switching frequency (and
its first harmonics) far from the communication channel frequency. In fact the modem is able to demodu-
late very low amplitude signals (500uVrms). Noise, also with a low amplitude value, can degrade the com-
munication.
This consideration is valid only in a receiving condition, during the transmission a little noise at the same
frequency of the transmitted signal (2Vrms) can be neglected.
23/42
The working frequencies of the L6590 are 20KHz with a low value current (receiving condition), and 66KHz
with high current, i.e. in a transmission condition (220 AC MAINS).
In the transmission case the 2nd harmonic at 133KHz (communication channel 132.5KHz) has an irrele-
vant influence.
The value of the supply voltage is related to the amplitude of the output signal (see ST7538 datasheet),
so usually a voltage of at lest 10V is mandatory to avoid distortion problems. The same voltage value
doesn't occur in a receiving status. In case of strong constraints regarding the power consumption it is
possible to use two different power supply values. For example possible values are 10.5V during the trans-
mission, and 7,5V in the receiving status. This can be done easily changing the feedback resistor divider
of the regulator using a switch controlled by the RxTx signal (pin #4) of the ST7538.
For more detailed information about the L6590 and other possible configuration please refer to the product
datasheet and related application notes.
2.3.2 ST7538 Power Supply

A fundamental aspect of the board design is the configuration of the ST7538 supply system.
s)
t(
It is recommended to connect all the grounds of the device to a common ground place, connected to the
copper plate of the slug.
u c
During the transmission high current (up to 0.3Arms = 0.85App) at the signal frequencies are present over
o d
the main supply and the ground plate. In case of ground or supply paths with a "high" resistance (also 2m
quency that should be coupled onto the mains: P r

ohm should be critical) the high current could produce a ripple at the second harmonic of the signal fre-
te
le
0.85A pp ⋅ 0.002Ω = 1.7mV pp ≅ 56dBµV
o
b s
As the rate above shows, the noise contribute has a relevant value respect to the Cenelec mask.
O
Figure 26. Noise generation in resistive supply or ground path
-
( s ) Noise
ct
ST7538
du
22
Ω
2 mΩ
r o PAVcc
e P
l et ATOP1
19
o
bs
ZL
O ATOP2
21
PAVss
18
Ω
2 mΩ
Noise
24/42
Concerning the odd harmonics generally they are produced by high current (high load) and are generated
by saturations problems of external components or of the power section of the device.
Another origin of the odd harmonics with high amplitude of the voltage output signal should be a low power
supply value on PAVCC pin.
A critical aspect of the device power supply is the high peak current request at the start-up phase of the
transmission. The peak value requested from the supply from the low impedance present at the ATOP
pins can reaches 2A. For this reason its mandatory to use storage capacitor (C 38) with a value of at least
10uF and a ESR as low as possible. For example a tantalum capacitor or a smoothing ceramic capacitor
(TDK C series) could be used.
The linear low drop voltage regulator of the ST7538 supplies all the low voltage parts of the demo board,
including the digital and analog (pin DVDD and AVDD) parts of the device itself. On the regulator output
VDC (pin #33) a low ESR 10uH capacitor (C14) is recommended.
In some conditions a noise present on the analog supply AVDD (pin # 28) can be transferred to the internal
modulation and demodulation blocks. To avoid this situation should be useful to filter this supply pin adding
an inductor (L8) in series to the capacitor (C16) or using a specific EMC component (for example a TDK
chip beads series MMZ1602C).
s)
2.4 Crystal Oscillator
c t(
d u
The ST7538 includes a driver circuit to realize a 16MHz crystal oscillator. The solution implemented it is
realized with a MOS amplifier working in a sub threshold condition. This choice allows to have very low
r o
current consumption that decrease strongly the overall power consumption of the device and of the com-
munication node.
e P
le t
The circuit is able to drive a maximum load capacitance of 16pF, with a typical quartz ESR of 40 ohm. The
stop resistor technique has evidenced an ESR limit of 400 ohm. The worst case-condition is reached at
low temperature.
s o
Figure 27. Crystal oscillator schematic circuit.
Ob
) -5V 5V
Sub threshold
( s
Amplifier
ct
Regulation
u
Circuit
o d XIn
Pr 27
et e X1
XOut +
Clk
o l -
s
26
O b C 18 C 19 ST7538
Due to the specific topology used it isn't possible to add an additional load (for example a probe with 10pF)
on the XIn and XOut pins. For the same reason its strongly recommended to use the indicated values for
the resonant capacitors, that are fixed value of 18pF for C19 and a value from 36pF to 82pF for C18. A
lower value of C18 produces a higher start up reserve (it is possible to use a quartz with a higher value of
ESR), a higher value gives a better performance respect to the burst and surge noise.
25/42
Regarding other aspects as the layout topology, noise immunity or wet problems all the standard consid-
eration on the crystal oscillator circuits are valid. It is very important to keep the quartz and the load ca-
pacitors as close as possible to the device. A ground plate around the quartz is recommended to realize
a good connection of the load capacitors.
The resonant circuit with the quartz has to be placed far from noise sources, as for example the switching
power supply, the burst and surge protections, the coupling circuits to the mains.
In presence of high radio disturbances (example a GSM Antenna close to the application) it is mandatory
to connect the case of the crystal to ground.
If the application requires stronger or special constrains respect to oscillator and it is possible to provide
an external clock with the requested characteristics at the XOut pin. Probably in this case the global power
consumption of the application will increase in a relevant way.
2.5 Burst & Surge Protections

The environments encompassed by this application include residential, commercial and light-industrial lo-
cation, both indoor and outdoor. For this reason a series of immunity specification standard and test have
to be applied to the power line application to simulate the environmental phenomenon.
s)
t(
The requirements include EN610000-4-2, EN610000-4-3, EN610000-4-4, EN610000-4-5, EN610000-4-
ment (part 7, immunity specifications).

u c
6, EN610000-4-8, EN610000-4-11 and ENV50204. All these tests are listed in the EN50065-2-1 docu-
o d
These standards include surge tests, both common and differential mode (1kV/0.5kV, Tr=1.2u sec) and
P r
fast transient burst tests (2kV, Tr=5n sec, Th=50n sec, repetition frequency 5KHz).
The specific structure of the coupling interfaces circuit of the application is a weak point respect to the high
te
voltage tests. In fact an efficient coupling circuit with low insertion losses realizes consequently a very low
circuits of the ST7538.

o le
impedances path from the mains to the power circuit of the devices that can destroy the internal power
b s
For this reason is recommended to add some specific protection on the path that links the ATOP pins to
the mains.
- O
( s )
Figure 28. Common mode and differential mode spikes example.
ct
ST7538
22 ST7538
u
22
19
o d
r
19
1:1
P
D16 1:1
D16
e
D17
l et D15
D17
o
21
21
b s
O Differential Mode Common Mode
In the demo board has been implemented a solution that uses three transil diodes (P6KE6V8A or
SM6T6V8A) connected in a star configuration. A bi-directional transil was not used because for common
mode surge it is better to realize a discharge path to ground external to the devices.
In receiving mode the ATOP2 pin polarizes the coupling interface to ground. In this condition without the
diode D17 all the external signals greater than 1.4 Volt peak to peak will be clamped by D15 and D16.
26/42
In some condition the transil diodes shouldn't be reliable in presence of fast transient bursts. In this case
it is possible to add some fast response ESD diodes as ESDA6V1L (two components) connected in par-
allel to the transil with the same star configuration.
The solution used for the demo board can give some general guidelines but can't be generalized to all
types of power line communication applications.
Considerations about surge and burst protections depend from several factors as coupling interfaces, the
board layout or the characteristics of the components used. Every application needs his specific analysis.
For some general considerations or a protection components list refer to the annexed application notes
and documentation.
2.6 ST7 Microcontroller & RS232 Interface

To complete an application for the power line communication its necessary to have a microprocessor to
manage the upper layer of the communication protocol and eventually to elaborate other signal relatives
to the application (signal from sensors, current measures, driving actuators, and so on). According specific
application different types of microcontroller can be required.
Some application constrains, as for example real time measure or as communication protocols with heavy
s)
CRC algorithmic, can require a lot of microprocessor resources. Sometimes in this situation it is possible
to simplify the "work" of the microprocessor using glue logic to realize a frame recognizer (see next para-
c t(
graph).
d u
The demo board has a ST72C334J2 or ST72C334J4 microprocessor. This component is connected to the
ST232 driver interface and to the ST7538.
r o
P
The loaded firmware has the function to receiver from the PC program interface (through the standard
e
le t
RS232 serial port) some commands to manage the control register writing and reading procedures, the
transmitting and receiving functions of the modem. The results of the executed command come back to
the PC program interface and are displayed on the monitor.
s o
Figure 29. Microcontroller/RS232 interface
Ob
-
(t s)
5V_led
ST72C334
u c 1k 1k 1k 1k
RN1
o PA7
d
37
r
D9
36
e P PA6
35
D12
t
PA5 D10
o l e PA4
34
D11
CN5
b s PC INTERFACE
O PE0/TD0
44 11
T1IN
ST232
14 2
T1OUT_A
T1OUT
1 12 13 3
PE1/RDI R1OUT R1IN R1IN_A
7 7 1
10
ANI0/PD0 T2IN T2OUT T2OUT_A
27/42
The ST7 microprocessor controls also the led diodes D9, D10, D11, D12. The D9 (red) is turned on during
a transmission condition; the green led D12 is turned on when the receiving mode is activated. The D10
yellow diode is switched on when the Band in Use signal is active. The D11 led (red) is on when a Timeout
event occurs. To save power consumption the led are turned off removing the jumper J9.
It is possible to customize the ST7 firmware. At the connector CN6 are available some of the I/O digital
pins or Analog input pins of the microprocessor, that can be used to monitor some external signal or sen-
sors and to drive relays or other external devices.
The connector CN7 is used for ST7 memory in-situ programming. For a correct programming procedure
the ST7538 has to be supplied, it is suggested to use an external 10V supply from connector CN2. The
jumper J11 has to be opened.
If an emulator is linked to the board it is recommended to program a 4 MHz clock in the ST7538 internal
register.
For more accurate and complete information on the features, characteristics and issues concerning ST
microprocessor please refer to the attached documentation or to the reference documents or go to the site
www.stmcu.com.
s)
2.6.1 Modem / microcontroller interface
c t(
categories: the control signals, the communications signals and the auxiliary signals.
d u
The interface signals between modem ST7538 and the ST2C334 microcontroller can be divided in three
r o
In the first group there are the clock signal (MCLK/OSCIN) the reset signal (RSTO/RESET) and the watch-
dog signal (WD/PD3).
e P
The clock signal of the microcontroller is provided by the ST7538 from the MCLK pin. The default is 4Mhz
le t
but it is possible to increase this value (8Mhz or 16 MHz) programming the ST7538 control register.
The reset of the microcontroller is provided by the modem. To the reset line is also connected to the man-
s o
ual reset (C 22, R15 and SW1) and to the reset pin of the CN7 connector for the In-Situ Programming mode
procedures.
Ob
The watchdog signal has to be managed from the microcontroller (PD3 output port). If the ST7538 doesn't
function trough the modem control register.

) -
detect any activity on the WD pin it generates a reset signal on the RSTO pin. It is possible to disable this
( s
The second group of signals consists of the links necessary for the modem/Micro Controller Unit commu-
u ct
nication. There are the data signals RXD (from the modem to the MCU) and TXD (from MCU to the mo-
dem), the transmitting/receiving status selection signal (RX/TX), the internal ST7538 register control
d
access signal REG/DATA, and the recovery clock signal CLRT.
o
Pr
To the communication wires and to the RESET are also linked the ISP (In Situ Programming mode) sig-
nals coming from the CN7 connector. Remember to open the jumper J11 during the programming phase.
The simplest interfacing mode is the synchronous mode. In this case it is possible to use the SPI interface
t e
of the MCU: The PC5/MOSI (Slave In Data) is connected to the RXD pin, the PC4/MISO pin (Slave Out
e
l
Data) is connected to the TXD pin and the PC6/SCKI (SPI serial clock) pin is connected to the CLRT pin.
o
b s
The SPI Slave select (PC7/SS) is controlled by the MCU itself through the PB0 I/O port.
The CLRT signal is connected to the PB1 I/O pin too.
OIt is also possible to realize an asynchronous interfacing mode, and for this reason the pin RXD is also
connected to the PC3/ICAP1_B pin (timer B input capture).
In this modality of communication the CLRT signal isn't considered and the recovered clock has to be re-
built internally by the MCU. If the ST7538 control register has to be changed from the default configuration,
the first access has to be done at baud rate of 2400.
The idle state of the RXD output is the low state, so with some asynchronous interface could be necessary
to invert externally this signal.
On the TXD connection line was inserted a diode (D13) and a pull down resistor R16. With these compo-
28/42
nents it is possible to transmit a frame coming from an external devices (for example a BER tester). It is
sufficient to configure the modem in a transmitting status and the MCU has to keep low the PC4 pin. The
external signal can be applied at the diode cathode.
Figure 30. ST7538/microcontroller interface.
42 11
OSCIN MCLK
39 R15 12
RESET RSTO
ISP RESET C22
26 SW1
3
PC3/ICAP1_B RXD
27 5
PC4/MISO/ISPDATA TXD
28 D13 R16
PC5/MOSI ISPDATA
29 J11 8
PC6/SCKI/ISPCLK CLRT
ISPCLOCK
10 14
ANI4/PD3 WD
ANI5/PD4
11 43
REG/DATA
s)
ANI6/PD5
12 4
RXTX
c t(
u
31 1
PA3 CD/PD
MCO/PF0
15 42
PG
o d
PF1/BEEP
16
17
9
15
P
BU r
e
ZCOUT
PF2
ST72C334 PB1
3
le t ST7538
so
4 7
PB2 TOUT
5 36
PB3
PB0
2
Ob REG_OK
-
30
PC7/SS
(s)
38
ISPSEL ISPSEL
R17
c t
d
standard input of the microcontroller. u
The third group of signal consists of a series of auxiliary signal coming from the ST7538 linked to some
r o
The CD/PD and BU signals give information about a carrier (or preamble detection) condition and about
e P
the BU condition (according the EN50065-1).
If the zero crossing comparator is used, the ZCOUT signal gives a digital signal synchronized with the
e
mains phase.
l t
s o
The PG, TOUT and REG_OK signals are monitor signals. The PG signal indicates the correct supply level
of the internal 5V regulator of the ST7538 (VDC). If the modem regulator supplies the microcontroller or
O b
its reset is connected to the RSTO pin it is raccomended to monitor this signal. In fact when the PG signal
goes down during a shutdown procedure the microcontroller can try to stop correctly the running activities
(for example a memory writing) before the UVLO threshold is reached and all the application is resetted,
or before the regulator isn't able to supply correctly the micro. When a PG down is detected the transmis-
sion is disabled to avoid uncontrolled access to the mains,. In any case a correct shut down procedure
has to be complete to perform a correct reset of the application.
The TOUT signal is active when a transmission procedure is aborted, both for a time out event both for a
overheat condition.
The REG_OK signal shoes a corruption of the internal modem register. Pay attention that the REG_OK
function doesn't check uncontrolled control register write procedure, due for example to a voltage spikes
on the REGDATA and RX/TX pins.
29/42
2.7 Demo Board Components List
Table 3. Power Supply Sections

Item N Name Descriptions
1 1 CN1 HEADER 2
2 1 CN2 HEADER 2
3 1 C1 47nF/250V~ Y2, EVOX RIFA, PME271Y447M
4 2 C2 4.7uF/400V Rubycon YK, 400-YK-4R7-M-T8-10x16
C3 4.7uF/400V Rubycon YK
5 2 C4 470uF/16V Rubycon ZL, 16-ZL-470-M-T8-10x12.5
C5 470uF/16V Rubycon ZL
6 1 C6 22uF/50V
7 1 C7 2.2nF/250V~ Y1 CERAMITE, 440LD22
8 1 C8 1uF
C9
9 1 C10 1uF
s)
10 1 C34 100nF/100V
c t(
11 1
C35
D1 Rectifier 380V/1.5A, B380C1500M
d u
12 1 D2 STPS160A SMA
r o
13 1 D3 BZW06-171
e P
14
15
1
1
D4
D5
STTA106
Led Green
le t
16 2 D6 1N4148
s o
17 1
D7
F1
1N4148
Ob
TR5-F 250V 500mA, Wickmann, 370.0500.041
18 3 J1
J4
JUMPER CLOSED
JUMPER CLOSED
) -
( s
ct
J5 JUMPER CLOSED
19 1 L1 2x10mH 0.3A, Radiohm 42V15
L1
d u
2x10mH 0.25A, TDK UF1717V-103YR25-02
20 1
rL2
o
220uH series BC, Siemens Matsushita B781.8-S1224-J
21
22
1
1
e P L3
L5
10uH series BC, Siemens Matsushita B781.8-S1103-K
1mH series LBC, Siemens Matsushita B82144-A2105-J
23 1
l et R1 15 ohm, 3W metal film

24
o 1 R2 2.2 Kohm SMD
bs
25 1 R3 22 ohm
R4
O 26
27
1
1
R_L6
R5
10 ohm
3320 ohm
28 1 R7 910 ohm
29 1 TR1 0.7mH, Radiohm 69E16H.1B
TR1 0.7mH, TDK SRW16ES-ExxH004
30 1 U1 L6590
30/42
Table 4. Power Line Modem Section

1 1 CN3 HEADER 2
2 1 CN4 HEADER 7
3 1 C11 33nF 220V/X2 (*), EVOX RIFA, PHE840EB5330MR17
4 1 C13 220nF MKT (*), EPCOS B32529-C1224-K
5 2 C14 10uF TANT SMD, AVX, TPSW106*016#0600
C30 10uF TANT SMD
6 1 C38 10uF TANT SMD, VISHAY, 293D106X_035D2_
7 4 C15 100nF SMD
C16 100nF SMD
C20 100nF SMD
C21 100nF SMD
8 1 C17 6.8nF, ARCOTRONIX, R82EC1680AA5J
9 1 C18 47pF SMD
10 1 C19 18pF SMD
s)
11
12
1
1
C33
C36
10nF CERAMIC
4.7nF MKP 5% (*), EVOX RIFA, PFR5-472J63L4
c t(
13 1 C37 100pF SMD
d u
14 1 C_R9 100nF MKT (*), EPCOS, B32520-C3104-K
r o
D8
D14
e P
15 2 D15
D16
P6KE6V8A
P6KE6V8A
le t
16 1 D17 SM6T6V8A
s o
17 3 J2
J3
JUMPER CLOSED
JUMPER CLOSED
Ob
J7 JUMPER CLOSED
) -
18 1 J6 CON3
( s
ct
19 1 L_C12 10uH LBC Inductor (*), Siemens Matsushita B82144-A2103-K
20
21
1
1
L4
L7
d u
22uH 10% series LBC (*), Siemens Matsushita B82144-A2223-K
330uH 5% series BC (*), Siemens Matsushita B781.8-S1334-J
22 1
r
L8
o
10uH SMD
23 1 R8
e P 4.7 Mohm
24
25
1
1
l et
R10
R11
5 ohm, 1/4 Watt
750 ohm
26
o1 R12 50 Kohm TRIM
bs
27 1 R13 5 Kohm TRIM
28 1 R14 1 Kohm
O 29 1 T1
T1
VACuumschmelze T60403-F4096-X046, 1.7mH, 1:1 transformer
TDK TRTT10U-E015A012, 2mH, 1:1 transformer
T1 SECRE T15253, 1.3mH, 1:1 transformer
T1 ETAL P2824, 1.2 mH, 1:1 transformer
T1 RADIOHM 63V192100, 2mH, 2:1 transformer
30 1 U2 ST7538 (TQFP44 CTI7010 – 044)
31 1 X1 16M, Quartz Crystal, Q 16.0-SS3-30-30/30-FU-T1
(*) Values for 132.5KHz communication channel
31/42
Table 5. ST7/RS232 Section.

1 1 CN5 RS232 FEMALE 9 PIN
2 1 CN6 CON12
3 1 CN7 ISP INTERFACE
4 9 C23 100nF SMD
C24 100nF SMD
C25 100nF SMD
C26 100nF SMD
C27 100nF SMD
C28 100nF SMD
C29 100nF SMD
C31 100nF SMD
C32 100nF SMD
s)
5 1 C22 22nF SMD
c t(
6
7
1
2
D12
D9
Led Green
Led Red
d u
D11 Led Red
r o
8 1 D10 Led Yellow
e P
9 1 D13 1N4148 SMD
le t
10 5 JL1
J8
JUMPER OPEN
JUMPER CLOSED
s o
J9 JUMPER CLOSED
Ob
J10 JUMPER CLOSED
) -
J11 JUMPER CLOSED
( s
ct
11 1 RN1 R_STRIP 1 Kohm 4resis
12 1 R15
u
4.7 Kohm SMD
d
13
14
1
1
R16
r
R17 o
47 Kohm SMD
10 Kohm
15 1
e P
SW1 SW PUSHBUTTON
16
l
1
et U3 ST232B
s
17
o 1 U4 ST72C334J4 TQFP44 SMT
O b
32/42
3. DEMO BOARD CHARACTERIZATION

This chapter includes a series of tests and measurements to characterize the demo board. The charac-
terization concerns the most critical aspects required by European standard, those are:
1) Electro conducted disturbances;
2) Immunity to narrow band conducted noise;
3) Output impedance measure.
The results of these measures have evidenced a good match and a very close value to the measured re-
alized according the EN50065-1, EN50065-2-1 and EN50065-7 setup and procedures.
3.1 Conducted Disturbance

The EN50065-1 standard describes test setup and procedures for this kind of tests.
The measures have been done with 220V~ and 110V~ mains voltages. The test pattern consists of a con-
tinuous transmission of a fix tone (symbol "0") or a repetition of random bytes.
The output signal has a peak value of 118dBuV (output CISPR-16 measure of the not modulated signal)
that means a 1.6Vrms of signal on the mains.
s)
soidal signals the two types of measures give the same result.
c t(
The spectrum analyzer performs a peak measure instead of a quasi-peak measure. For continuous sinu-
d u
Figure 31. Conducted disturbance set-up.
r o
e P
MAINS
le t PC
Isolation
Transformer
P/N Artificial Network
CISPR 16-1
s o
D CN1 ST7538 Board
CN5
+
M
O
G
b Demo Software
) -
( s
ct
Ω
50Ω
d u
r o Spectrum Analyzer
AGILENT 4395A
e P
l et
s o
As showed by the spectrum plots the most critical points closer to the mask is the 2nd harmonic. The bor-
O b
derline condition is realized with the 110V~ mains supply and with the 110kHz channel.
In the 110kHz channel case the output board filter centered at the 132.5kHz channel and a produce the
lower attenuation of the harmonic.
The other critical condition is with the 110V~ supply. In this case the switching regulator gives a lower sup-
ply voltage. The effect is to comprise the top of the output sinusoidal signal producing higher odd harmon-
ics. The difference is few hundred of microvolts but considering the strong constraints of the normative
they are relevant.
33/42
Figure 32. Output signal spectrum, channel 132.5kHz, mains 220V~, fix tone.
Ch 132.5 kHz, baud 2400, dev 0,5

dBuV
Continuos Transmission - Fix Tone "0"
120.0
EN50065-1
110.0
10kHz -> 150kHz (Bw = 100Hz)
100.0
150kHz -> 30MHz (Bw=10kHz)
90.0
80.0 2nd Harmonic

54.3dBµV
70.0
60.0
50.0
40.0
3rd Harmonic
30.0 47.9dBµV
20.0 10000 100000 1000000 10000000 100000000
s)
Figure 33. Output signal spectrum, channel 132.5kHz, mains 220V~, random sequence.
c t(
Ch 132.5 kHz, baud 2400, dev 0,5
d u
dBuV
120.0
Continuos Transmission - Random Sequences
r o
110.0 EN50065-1
e P
t
10kHz -> 150kHz (Bw = 100Hz)
100.0
le
150kHz -> 30MHz (Bw =10kHz)
90.0
80.0
s o
2nd Harmonic
b
54.3dBµV
70.0
60.0
50.0
- O
(t s)
40.0
3rd Harmonic
30.0 47.8dBµV
20.0 10000
u c 100000 1000000 10000000 100000000
o d
r
Figure 34. Output signal spectrum, channel 132.5kHz, mains 110V~, random sequence.
P
e
Ch 132.5 kHz, baud 2400, dev 0,5 - mains 110V~
l et dBuV
120.0
Continuos Transmission - Random Sequences
o 110.0 EN50065-1
bs
10kHz -> 150kHz (Bw = 100Hz)
100.0
150kHz -> 30MHz (Bw =10kHz)
O 90.0
80.0
70.0
2nd Harmonic
54.0dBµV
60.0
50.0
40.0
3rd Harmonic
30.0 47.2dBµV
20.0
10000 100000 1000000 10000000 100000000
34/42
Figure 35. Output signal spectrum, channel 110kHz, mains 220V~, random sequence.
Ch 110 kHz, baud 2400, dev 0,5

dBuV Continuos Transmission - Random Sequences
120.0
110.0 EN50065-1
10kHz -> 150kHz (Bw = 100Hz)
100.0
150kHz -> 30MHz (Bw=10kHz)
90.0
80.0 2nd Harmonic
54.0dBµV
70.0
60.0
50.0
40.0
3rd Harmonic
30.0
47.2dBµV
20.0 10000 100000 1000000 10000000 100000000
3.2 Narrow-band Conducted Interference

s)
The setup of the narrow band conducted interferences test consists of a first transmitting demo board con-
trolled by a BER (Bit Error Rate) tester that generates a random bit stream. The second board demodu-
c t(
lates the received signal that is evaluated by the linked BER tester.
d u
The noise is produced by a waveform generator and injected into the artificial network by a coupling circuit
connected to a low distortion power amplifier (EN50065-2-1, 7.2.3). r o
Two types of signal noises have been used for the test: a pure sinusoidal signal and an amplitude-modu-
e P
lated signal, (modulating signal 1kHz, modulation deep 80%).
le t
The amplitude of the noise signal is decreased until the BER measured is lower than 10-3 (one error every
1000 transmitted bits).
s o
work.
Ob
The noise measure is done disconnecting the signal source and the coupling circuits from the artificial net-
)
Figure 36. Narrow Band conducted interferences set-up. -
( s
MAINS
ct
du
BER Tester
Isolation P/N Artificial Network D CN1 ST7538 Board
W&G
r o
Transformer CISPR 16-1 STIMULUS
PF-30
e P M
Ω
50Ω
G
l et µH
660µ
s o µH
660µ
O b P/N Artificial Network

D CN1
ST7538 Board
BER Tester
W&G
CISPR 16-1 Under Test
PF-30
M G
Ω
50Ω
Power Amplifier Waveform

Selective Voltmeter + Generator
W&G PSM-13 Coupler AGILENT
(EN50065-2-1) 33120A
35/42
Here following different measures are included with a transmitted signal of 79dBuV measured at the
CISPR-16 output (minus 6dB versus mains). It is also present a measure of the 110KHz channel (signal
level 85dBuV) even if receiving filter of the board is tuned on the 132.5KHz channel.
The power amplifier used represents a limit for the measure respect to the maximum noise Voltage level.
In fact for the noise tones far from the channel frequency the BER obtained is zero and the power amplifier
isn't able to produce a higher sinusoidal noise.
Figure 37. Signal/noise ratio for the 132.5kHz channel, signal level 85 dBuV.
Ch 132.5KHz, BAUD 2400, DEV 0.5
S = 85 dBuV, BER < 10e-3 - mains 220V~
S/N
15
10 Fix Tone
5
AM 1kHz - 80%
0
-5
-10
-15
-20
-25
-30
-35
s)
t(
-40
-45
-50
80 90 100 110 120 130 140 150 160 170 180 190 200
u c
FREQ[KHz]
od
P
Figure 38. Signal/noise ratio for the 132.5kHz channel, signal level 85 dBuV, mains 110V~.r
Ch 132.5KHz, BAUD 2400, DEV 0.5
te
le
S/N S = 85 dBuV, BER < 10e-3 - mains 110V~
15
10
5
s o Fix Tone
b
AM 1kHz - 80%
-5
-10
-15
- O
)
-20
s
-25
-30
-35
-40
ct (
d u-45
-50
r o 80 90 100 110 120 130 140 150 160 170 180 190 200
FREQ[KHz]
e P
l et
Figure 39. Signal/noise ratio for the 110kHz channel, signal level 91 dBuV.
Ch 110KHz, BAUD 2400, DEV 0.5
s o S/N
20
S = 91 dBuV, BER < 10e-3 - mains 220V~
b
15
10 Fix Tone
O 5
0
-5
-10
AM 1kHz - 80%
-15
-20
-25
-30
-35
-40
-45
80 90 100 110 120 130 140 150 160 170 180
FREQ[KHz]
36/42
3.3 Output Impedance

The last characterization report regards the output impedances of the application.
In order to not degrade the communication network it is mandatory to guarantee a minimum value of the
output impedance of each component of the system, both in receiving or transmitting condition. In this last
case impedance constrains regard only the frequency ranges of the other communication bands.
Figure 40. Output board impedance measurement set-up.
Power Supply
10V, max 800mA
CN2
PC
Impedance Analyzer CN1 CN5
ST7538 Board +
AGILENT 4395A
Demo Software
s)
The reference standard is the EN50065-7. To simplify the measure the supply of the board is obtained by a
low 10V external power supply and the impedance meter has been connected directly to the mains connector.
c t(
d u
In the following plots is drawing also the normative mask for the home appliance band (95kHz - 148.5kHz).
Figure 41. Output demo board impedances (CN1) in receiving condition.

r o
ohm Receiving Condition
e P
1000
le t
EN50065-7
100
b so Z_RX
- O
10
( s )
u1
ct
o d 10 30 50 70
KHz
90 110 130 150
Pr
Figure 42. Output demo board impedances (CN1) in transmitting condition.
et e Transmitting Condition
o l ohm
1000
bs
EN50065-7
Z_TX
O 100
10
1
10 30 50 70 90 110 130 150
KHz
37/42
4. DESIGN IDEAS FOR AUXILIARY BLOCKS
4.1 Zero Crossing Detector

It is possible to synchronize the beginning of the transmission with the mains voltage (phase 0). To realize
this function the zero crossing comparator has to be used and a reduced reproduction of the mains fre-
quency (with the same phase) ha to be present on the ZCin pin (#16). The maximum voltage of this pin is
±5V.
In case of a not isolated application the circuit consist of a simple resistor divider. For an isolated system
a possible solution could be a main transformer. This solution is more expensive and is suggested only if
is a mains transformed is just used in the application for other purpose too.
It is possible to realize another isolated solution using for example an optocoupler component too.
In both cases a bi-directional transil has to protect the pin from the burst and surge and a capacitor have
to be added to filter high frequency noise.
Figure 43. Zero crossing coupling circuit, not isolated solutions.
s)
c t(
ST7538
d u
r o P
e P
ZCout 15
le t 10 MΩ
so
ZCin MAINS
Tx Sync
16
Ob 100 KΩ
25
) - N
( s
u ct
d
Figure 44. Zero crossing coupling circuit, isolated solutions.
o
Pr
et e ST7538
o l
b s ZCout 15
O ZCin
100 KΩ
50 MAINS
16
Tx Sync 1
100 KΩ
25
38/42
4.2 Frame Recognizer

The electrical network is characterized by a big noise that can produce a lot of false carrier detection and
preamble detection, too. In this condition the microprocessor has to manage many not real receiving data
request. In same cases, for example with complex network protocols or with real time application, isn't
possible to dedicated so many resources of the processor to the receiving activity dues to false messages.
This kind of problem should be solved using a simple external logic made with an 8 bits shift register with
output latches (M74HC595) and an 8 bits comparator (M74HC688) that realizes a hardware frame detector.
Figure 45. Hardware frame recognizer schematic.
ST72C334 ST7538
ISPCLK CLR/T
29 8
11
SCK
)
12
RCK
74HC595
SI RXD
t( s
c
_____ 3
QH QG QF QE QD QC QB QA 14
PC5 SCLR
28
10
d u
P7 P6 P5 P4 P3 P2 P1 P0
r o
P
____
PA3 31 16
P=Q 74HC688 RSTO
Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
te 12
RESET 39
o le
b s
From the microcontroller
O
or hardware selection
-
s )
The received bit stream from the RXD pin enters in the serial input of the shift register. An 8 bit sequences
(or longer if more components are connected in series) is compared with a determinate bit configuration.
(
ct
In case of matching between the received stream and the fixed one a pulse is produced by the comparator.
u
Figure 46. Frame recognizer waveforms.
d
CLR/T (ST7538)
r o
e P
l et
RXD (ST7538) XX HEAD0 HEAD1 HEAD2 HEAD3 HEAD4 HEAD5 HEAD6 HEAD7 DATA0 DATA1 DATA2 DATA3
___
s o
P=Q (74HC688)
O b
A rising edge of a pulse on the PA3 pin generates a interrupt request to start the receiving procedure. The
first data bit of the received frame will be available on the next rising edge of the CLR/T signal.
The reference bit configuration can be part or the full header of a message (if the register has more bit a
part of the address can be included, too), and in this case the interrupt for the microcontroller is generated
only in presence of a real message. In fact the probability that the noise simulate a header sequence is
very low respect to a false carrier detection or preamble recognizing.
The compared sequence of bits can be obtained directly by the microprocessor outputs or by a hardware
solution using some jumpers (or both).
39/42
5. ANNEX A - DOCUMENTATION
5.1 ST7538
ST7538 Datasheet
Demo board user Manual
EHS Booklet
5.2 L6590 Integrated Power Supply

L6590 Datasheet
Application note AN1261
5.3 ST7 Microprocessor

s)
ST72 series Datasheet
c t(
5.4 Surge & Burst Protections
d u
Protection Guide r o
e P
le t
s o
6. REFERENCES
Ob
[1] SGS-THOMSON - Power Line Modem & Applications data book - September 1994;
) -
[2] CENELEC, European Committee for Electrotechnical Standardization - EN 50065-1, Signaling on low-
( s
voltage electrical installations in the frequency range 3kHz to 148,5Khz. Part 1: General requirements,
ct
frequency bands and electromagnetic disturbances - July 2001;
u
o d
[3] CENELEC, European Committee for Electrotechnical Standardization - EN 50065-4-2, Signaling on
low-voltage electrical installations in the frequency range 3kHz to 148,5Khz. Part 4-2: Low voltage de-
r
coupling filters- Safety requirements - August 2001;
P
et e
[4] CENELEC, European Committee for Electrotechnical Standardization - EN 50065-7, Signaling on low-
voltage electrical installations in the frequency range 3kHz to 148,5Khz. Part 7: Equipment impedance
l
- November 2001;
o
b s
[5] CENELEC, European Committee for Electrotechnical Standardization - prEN 50065-2-1, Signaling on
low-voltage electrical installations in the frequency range 3kHz to 148,5Khz. Part 2-1:Immunity require-
O ments for mains Communications Equipment and systems operating in the range of frequencies 95
kHz to 148,5 kHz and intended for use in Residential, Commercial and Light Industrial Environments -
1999;
[6] IEC, International Electrotechnical Commission, International Special Committee On Radio Interfer-
ences - CISPR 16-1, Specification for radio disturbance and immunity measuring apparatus and meth-
ods. Part 1: Radio disturbance and immunity measuring apparatus - first edition, August 1993;
[7] EHSA, European Home System Association - EHS specifications, version 1.3a - May 2001;
40/42
Table of Contents
1. Introduction.........................................................................................................................................1
1.1 Power Line Communication .....................................................................................................1
1.2 The Electrical Network .............................................................................................................3
1.2.1 Impedance of Power Lines .................................................................................................3
1.2.2 Noise ..................................................................................................................................4
1.2.3 Typical Connection Losses ................................................................................................5
1.2.4 Standing Waves .................................................................................................................5
1.3 ST7538 Power Line Modem.....................................................................................................5
1.4 FSK Modulation & ST7538 Architecture ..................................................................................7
2. Demo Board for ST7538 ....................................................................................................................9
2.1 Main Features ..........................................................................................................................9
2.2 Signal Coupling Interface .......................................................................................................12
2.2.1 Transmitting Section.........................................................................................................13
2.2.3 Voltage Regulation-Current protection loops ...................................................................18

s)
2.2.2 Receiving Section.............................................................................................................16
2.3 Board Power Management ....................................................................................................22

c t(
2.3.1 L6590 Regulator ...............................................................................................................23
d u
2.3.2 ST7538 Power Supply......................................................................................................24
o
2.4 Crystal Oscillator ....................................................................................................................25
r
e P
2.5 Burst & Surge Protections......................................................................................................26
2.6 ST7 Microcontroller & RS232 Interface..................................................................................27
le t
2.6.1 Modem / microcontroller interface ....................................................................................28
2.7 Demo Board Components List ...............................................................................................30
3.
s o
Demo Board Characterization ..........................................................................................................33
Ob
3.1 Conducted Disturbance..........................................................................................................33
3.2 Narrow-band Conducted Interference....................................................................................35
) -
3.3 Output Impedance..................................................................................................................37
4.
s
Design Ideas for Auxiliary Blocks .....................................................................................................38
(
u ct
4.1 Zero Crossing Detector ..........................................................................................................38
4.2 Frame Recognizer..................................................................................................................39
5.
d
Annex A - Documentation ................................................................................................................40
o
Pr
5.1 ST7538...................................................................................................................................40
5.2 L6590 Integrated Power Supply.............................................................................................40
t e
5.3 ST7 Microprocessor ...............................................................................................................40
e
6.
o l
5.4 Surge & Burst Protections......................................................................................................40
References .......................................................................................................................................40
b s
O
41/42
s)
c t(
d u
r o
e P
le t
s o
Ob
) -
( s
u ct
o d
Pr
et e
o l
b s
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
Oby implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.

All other names are the property of their respective owners
© 2003 STMicroelectronics - All rights reserved
STMicroelectronics GROUP OF COMPANIES

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AN1714

1.1 Power Line Communication

October 2003 1/42

Received Signal Transmitted Signal

IMPEDANCE MAGNITUDE (OHM)

example notebook) or little appliances.

1.2.3 Typical Connection Losses

1.2.4 Standing Waves

The key points of this device are:

Figure 6. Application Circuit.

Single Supply Voltage

Vcc WD DVcc AVcc VDC

provided to the uC ST7538

Reset provided to REGOK RAI

Figure 7. ST7538 Block Diagram.

XOut XIn WD TOUT RSTO MCLK ZCin ZCout C_OUT CMINUS

l et Peak Measure - Bw = 100 Hz

o Ch 132.5 kHz, Baud 2400, dev 0.5

2. DEMO BOARD FOR ST7538

2.1 Main Features

Figure 9. Demo Board Picture.

Figure 11. Demo Board Schematic: Micro controller & PC Interface.

TXD 5V_µP CN7

le t PA4 PA5 PA6 PA7

MCLK MCLK N.C. N.C. N.C. TEST3 ZCIN 5K

2.2 Signal Coupling Interface

Figure 13. Demo board ST7538 Power Line Interface.

ST7538 Rx Band Pass Filter

O b– Low noise in receiving mode;

2.2.1 Transmitting Section

Figure 15. Simplified schematic of the transmission filter.

1st Loop CR9 2nd Loop

I rm s ≅ 220V rms ⋅ 2 ⋅ π ⋅ 50H z ⋅ C 11 = 2.3mA rm s

Figure 16. Simulated characteristics of the transmission coupling filter.

ƒ p1 = ƒ p2 = 192 kHz , ƒ p2 = ƒp3 = 91 kHz

ST7538 Transmission 2nd order

2.2.2 Receiving Section

Figure 18. Demo board ST7538 receiving circuits.

Table 1. Parallel resonance Rx filter components

Ch 132.5 kHz 6.8nF 220uH 130.1 kHz

Ch 110 kHz 10nF 220uH 107.3 kHz

Ch 86 kHz 10nF 330uH 87.6 kHz

Ch 82.05 kHz 8.2nF 470uH 81.1 kHz

Ch 76 kHz 10nF 470uH 73.4 kHz

Ch 72 kHz 22nF 220uH 72.3 kHz

Ch 66 kHz 18nF 330uH 65.3 kHz

Ch 60 kHz 22nF 330uH 59.1 kHz

For the receiving filter a passive solution is pre-

the programmed value the gain of the VCA is frozen.

R13 C37 Feedback

Figure 22. Voltage regulation/current protection loop logic.

Table 2. Voltage Regulation Loop (divider and R12 resistors values).

Figure 23. Current Protection Loop Characteristic.

Figure 24. Voltage Regulation & Current Protection Feedback signals

2.3.1 L6590 Regulator

2.3.2 ST7538 Power Supply

quency that should be coupled onto the mains: P r

2.5 Burst & Surge Protections

ment (part 7, immunity specifications).

circuits of the ST7538.

2.6 ST7 Microcontroller & RS232 Interface

function trough the modem control register.

Figure 30. ST7538/microcontroller interface.