Assignment Of Electronics Principles

Submitted to:
Shahed anwar
Lecturer Dept of CSE, University Of Dhaka

Submitted by:
Md. Abdul Kader
Roll: 18, Batch: 12

Topics:
1. Features of CMOS and Bipolar Technology device
with comparison.
2. TTL vs. CMOS technology.
3. Enhancement Mode Transistor Action.
4. Depletion Mode Transistor Action.
 Feature of CMOS and BJT with comparison :-

1. CMOS devices are low power consumption device Compare to BJT.

2. CMOS is uni-polar but BJT is bipolar.

3. Manufacturing is easier for CMOS rather than BJT.

4. CMOS is voltage controlled device but BJT is current controlled device.

5. CMOS has very high input impedance But BJT has not high input
impedance.

Fig: The performance of CMOS and Bipolar technology with respect to time.

6. CMOS is sensitive to electrostatic discharge compare to BJT.

7. CMOS is used for high voltage application where BJT is used for high
current application.

8. CMOS input impedance is very higher. So it will have less loading effect
whereas in BJT loading effect will occur.
9. MOSFET is high immunity towards radiation but BJT less immunity for
radiation.

10. CMOS work in low frequency rather than BJT.

11. CMOS have high noise margin rather than BJT.

12. CMOS is better packing density but BJT has low.

13. CMOS is good switch in digital design but BJT is very high speed switching
device.

14. Significant Power is drawn when device are switching between state in
CMOS.

15. CMOS produce low heat rather than BJT.

16. CMOS is useful for Integration but BJT take Space and not suitable to
integrate in single chip.
 Feature of CMOS and TTL with comparison:

1. TTL (Transistor-Transistor Logic) need a narrow range of supply voltage 5v but

CMOS (metal oxide semiconductor field effect transistor) has a wide range like volt
between 3-12v.

2. In TTL logical high is defined as a signal of about 2.4 to 5 and logical low is
defined as a signal above GND to .5 voltage But in CMOS logical high is 3.3
volt or above and logical low is GND or 0 volt .

3. Bipolar TTL logic comes in various type : 74XX,54XX,74HXX,74LXX,74SXX,

74LS/ALS etc but CMOS comes in two flavor “CD40XX” metal gate CMOS
and "74CXX" silicon gate CMOS.

4. In CMOS the floating input is interpreted as an uncertain and In TTL the

floating input is interpreted as a logical low.

5. The upcoming technology will be very much suitable / adjustable with the
CMOS technology.

6. The main factor of using CMOS is the less power consumption.

 Enhanced Mode Action:

In this mode two n-Type Material is separated by a p-Type material. There have
an insulated (silicon di-oxide) gate on the side of this material.

The p-region is Called Substrate.

In the figure below the Enhanced-mode MOSFET is shown:

Operation:

It works in Positive voltage in the gate input. When gate input get positive
voltage current then it attracts the free electrons into the P-region. The free
electrons combine with the holes next to the SiO2. When all holes touching the sio2
are filled then free electrons begin to flow from source to drain. There will create
an n-Type channel near the SiO2 called n-type inversion layer.

The minimum gate-source voltage that create inversion layer is called threshold
voltage.
 Depletion Mode Action:

In this mode one n-Type Material is pushed by a p-Type material for creating a
thin channel. There have an insulated (Silicon Di-oxide) gate on the side of this
material.

In the figure below the Depletion-mode MOSFET is shown:

Operation:

When no voltage have in the gate input then there have a small current
from source to drain through the narrow channel.

When the gate voltage is negative enough then the channel will be very thin then
the current flow from source to drain is Zero. This called cut off.

The operation of Depletion mode is like a JFET when the gate-source voltage is
negative.

If the gate voltage is positive the current flow will increase.