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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO.

8, AUGUST 2010

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Soft-Switching PS-PWM DCDC Converter for Full-Load Range Applications


Jaroslav Dudrik, Member, IEEE, and Nistor-Daniel Trip, Member, IEEE
AbstractAn improved soft-switching full-bridge phase-shifted pulsewidth modulation converter using insulated-gate bipolar transistors with a special auxiliary transformer is presented in this paper. Zero-voltage switching for leading leg and zero-current switching for lagging leg switches in the converter are achieved for full-load range from no load to short circuit by adding an active energy recovery clamp and auxiliary circuits. The new signicant feature of the converter consists in suppression of circulating current also in short-circuit conditions. The proposed converter is very attractive for applications where short circuit and no load are the normal states of the converter operation, e.g., arc welding. The principle of operation is explained and analyzed, and experimental results are presented on a 3-kW 50-kHz laboratory converter model. Index TermsAuxiliary transformer, phase-shifted pulsewidth modulation (PWM) (PS-PWM), soft switching, zero-voltage and zero-current switching (ZVZCS).
Fig. 1. Principle of the ZVZCS converter operation.

I. I NTRODUCTION

HE high-frequency soft-switching pulsewidth modulation (PWM) converters are very suitable for highvoltage high-power applications where insulated-gate bipolar transistors (IGBTs) are mainly used as power switches. The phase-shifted PWM (PS-PWM) zero-voltage switching (ZVS) converters are often used in many applications because their topology permits all switching devices to operate under ZVS by using circuit parasitics such as power transformer leakage inductance and device junction capacitance. However, because of PS-PWM control, the converter has a disadvantage that circulating current ows through the power transformer and switching devices during freewheeling intervals [1][4]. The circulating current is a sum of the reected output current and transformer primary magnetizing current. Due to the circulating current, the rms current stresses of the transformer and switching devices are still high compared with those of the conventional hard-switching PWM full-bridge converter.

Fig. 2. Operation waveforms of ZVZCS PWM converter.

Manuscript received March 20, 2009; revised June 13, 2009; accepted October 26, 2009. Date of publication December 1, 2009; date of current version July 14, 2010. This work was supported in part by the Slovak Research and Development Agency under Project APVV-0095-07, by the Scientic Grant Agency of the Ministry of Education of the Slovak Republic under Contract VEGA 1/0099/09, and by the European Community, European Regional Development Fund. J. Dudrik is with the Department of Electrical, Mechatronic and Industrial Engineering, Faculty of Electrical Engineering and Informatics, Technical University of Koice, 042 00 Koice, Slovak Republic (e-mail: jaroslav. dudrik@tuke.sk). N.-D. Trip is with the Department of Electronics, University of Oradea, 3700 Oradea, Romania (e-mail: dtrip@uoradea.ro). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TIE.2009.2037100

To decrease the circulating current to zero and, thus, to achieve zero-current switching (ZCS), various snubbers, auxiliary circuits, and/or clamps connected mostly at the secondary side of power transformer are applied. The snubbers and/or clamps are necessary to secure disconnection of the secondary side of the power transformer, as it is shown in a very simplied version in Fig. 1. The disconnection is usually achieved by the application of reverse bias for the output rectier when the secondary voltage of the transformer in the freewheeling interval becomes zero. The output rectier (D5 , D6 ) is then reverse biased, and the secondary windings of the transformer are disconnected. Consequently, both primary and secondary currents of the transformer become zero. Only a low magnetizing current circulates during the freewheeling interval, as shown in Fig. 2.

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Fig. 3. Scheme of the proposed soft-switching PS-PWM dcdc converter.

Thus, the rms currents of the transformer and switches are considerably reduced. Hence, the converter achieves nearly ZCS for the lagging leg (transistors T2 and T3 ) due to the minimized circulating current during the interval of lagging leg transition and achieves ZVS for the leading leg (transistors T1 and T4 ) due to the reected output current (IO /n1 = IP , n1 = NP 1 /NS1 ) during the interval of leading leg transition. Several active [4][12] and passive [12][22] more or less complex snubber, clamp, and auxiliary circuits were developed to resolve the problem concerning the resetting of the primary current of the transformer to achieve ZCS of the switches in the right leg of the converter. The mentioned converters are usually very well adapted for normal load and no load, whereas at short circuit, they do not suppress freewheeling current and, thus, conduction and turnoff losses occur. Aside from that, the clamp voltage is almost equal or lower than the output voltage, and thus, the commutation between the output rectier and clamp is rather long, particularly at low-output-voltage and high-current applications and high leakage inductance of the power transformer. To avoid the aforementioned problems, a new topology of the following zero-voltage and zero-current switching (ZVZCS) converter was designed. The basic mechanism of the operation of the proposed converter is nearly the same as that of the converter [6] and its improved version [7]. However, in contrast to this converter, the ZVS of the leading leg at no-load conditions and the limitation of circulating current and, thus, ZCS of the lagging leg also at short circuit are achieved at the proposed converter [8] by adding simple auxiliary circuits. The proposed converter is an improved version of converter described in [9]. The main improvements consist in the new charging of the clamp capacitor by a continuous current to

a value higher than the amplitude of the rectied secondary voltage. Consequently, a better performance of the converter was achieved, particularly at short circuit and the states close to short circuit. This is important for the current source applications of the converter. The auxiliary circuits and clamp contain only no-lossy components. They ensure required limitation of the circulating current and switching losses indeed, but they do not have any other important back inuence on the basic converter operation. II. P OWER C IRCUITS OF THE P ROPOSED C ONVERTER The proposed dcdc converter shown in Fig. 3 consists of capacitive voltage divider, high-frequency inverter, power transformer, output rectier, and output lter. The main part of the converter includes a high-frequency fullbridge inverter consisting of the four ultrafast IGBTs T1 T4 and freewheeling diodes D1 D4 . The secondary winding of the high-frequency step-down power transformer T R1 is connected through a fast recovery rectier (D5 , D6 ) to output lter consisting of smoothing choke LO and capacitor CO . The converter is controlled by PS-PWM (Fig. 4), and consequently, the zero-voltage turn-on of the transistors T1 and T4 in the leading leg is reached. By connecting the capacitors C1 and C4 in parallel with transistors T1 and T4 , the turnoff losses of the transistors T1 and T4 can be substantially reduced. By using an energy recovery clamp consisting of MOSFET TS with its body diode DS and capacitor CS , the circulating current is rapidly decreased during the freewheeling interval, achieving zero-current turnoff of the transistors T2 and T3 . The leakage inductance of the power transformer T R1 works as a turn-on snubber for the transistors T2 and T3 ; hence, their turn-on losses are very low.

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Theoretically, the freewheeling diode DO is not necessary. However, if the freewheeling diode is omitted, the overvoltages across TS would be increased. The other reason is the possibility to use the freewheeling diode with lower rated voltage (Schottky diode) and, thus, with lower ON-state voltage compared with fast reverse-recovery rectifying diodes. Consequently, lower conduction losses occur, and no current ows through secondary windings of the power transformer. This is important in applications where freewheeling interval is long, e.g., at arc welding. An additional function of the secondary clamp is the suppression of oscillations at turn-on of the lagging leg transistors. By using nondissipative snubber to reduce the turnoff losses of the transistor TS , the overall efciency could be increased. Although the auxiliary circuits, clamp, and snubber look quite complex, they are very small and so is the additional cost. III. O PERATION OF THE C ONVERTER AT N O L OAD AND S HORT C IRCUIT The basic operation of the proposed soft-switching converter has nine operating modes within each half cycle. The switching diagram and operation waveforms are shown in Fig. 4. It is assumed that all components and devices are ideal. The basic operation of the converter at rated load is well described in [9]. In this paper, the description of the proposed converter is focused on conditions at no load and short circuit. A. Converter at No Load The snubber capacitors C1 and C4 are connected in parallel with transistors T1 and T4 in the leading leg of the converter. At no load, there is a problem with charging or discharging snubber capacitors, respectively. For example, the capacitor C4 should be completely discharged (C1 completely charged) to prevent overcurrent at the following turn-on of the transistor T4 during dead time of the leading leg (td1 = t1 t2 ). Not fully discharged capacitor C4 at t2 can cause substantially increased turn-on losses as a result of the discharging of the capacitor C4 into the transistor T4 at turn-on. The magnetizing current of the power transformer is usually too small for full charging or discharging of the capacitors C1 and C4 during dead time. Therefore, the minimum current should be set to ensure the charging or discharging of capacitors C1 and C4 at no load during dead time td1 for the leading leg. Its value can be calculated from Ich,min (C1 + C4 ) U td1 (1)

Fig. 4.

Operation waveforms of the converter.

Auxiliary circuits are needed in order to achieve soft switching at no-load and short-circuit conditions. The auxiliary transformer T R2 is the main part of the auxiliary circuits. Its primary winding is connected between the midpoint of the leading leg (transistors T1 and T4 ) of the inverter and the midpoint of the capacitive voltage divider CF 1 and CF 2 . The transformer T R2 should have a considerably large air gap to ensure sufciently high magnetizing current and, at the same time, to prevent core saturation. The sawtooth magnetizing current im2 has to ensure the charging or discharging of the capacitors C1 and C4 , respectively, during the dead time of the transistors T1 and T4 (interval t1 t2 in Fig. 4). The proper design of the capacitors C1 and C4 and the auxiliary transformer T R2 ensure the zerovoltage turn-on of the transistors T1 and T4 not only at light load but also at no-load conditions [1], [4], [9], [23], [24]. In order not to loose the zero-current turnoff of the transistors T2 and T3 at short circuit, it is necessary to charge up the capacitor Cs to the rated value of voltage. The clamp capacitor Cs can be charged from the rectier REC, which is connected to the secondary winding of the auxiliary transformer T R2 . The rate of the primary current fall and the value of no-load output voltage of the converter can be adjusted by the turns ratio n2 = NP 2 /NS2 of the auxiliary transformer T R2 . The active clamp in the secondary side, including transistor TS , is used to reset the primary current. The transistor TS operates with a double-switching frequency. The control pulses for the transistor TS are easily derived from the control pulses of the primary switches. Normally, the current of the transistor TS commutates to freewheeling diode DO . The overvoltages caused by parasitic inductances of the wires occur in the loop TS CS DO at TS turnoff. Therefore, the freewheeling diode DO should be connected as close as possible to the clamp switch TS to minimize overvoltage at TS turnoff.

where C1 = C4 . This condition must be fullled to obtain zero-voltage turnoff of the leading leg transistors at no load. If the ratio U/Ich,min is constant, the discharging or charging time tch,no load < td1 is independent on the input voltage U

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and simultaneously independent on the load current. From that reason, the switch voltage sensing is not necessary. The charging and discharging of the snubber capacitors can be ensured by the magnetizing current Im2 of the auxiliary transformer T R2 . The gapped core of the transformer T R2 must be used to avoid core saturation by increased magnetizing current. The required magnetizing inductance of the auxiliary transformer can be calculated as Lm2 U tC 4 Im2,max (2)
Fig. 5. Construction of the power transformer T R1 .

where tC T /2 is the conduction time (nearly half of the period) of the switches T1 and T4 in the leading leg, and Im2,max Ich,min . B. Converter at Short Circuit In ZVZCS PS-PWM converters, there is a problem with the suppression of the circulating current at short circuit and states close to short circuit. Therefore, in the proposed converter, the clamp capacitor CS is charged up from the secondary side of the auxiliary transformer T R2 . The charging, being in progress during the whole period except during the discharging interval (t2 t5 ), is independent on the converter state. It is assumed that CS is charged to a voltage higher than the output voltage UO . In this design, the inductance La is large enough; thus, the charging current is smoothed and can be considered constant. Its magnitude ICSch,max is given by the value of the output current (Fig. 4) Id2,max = ICSch,max const. 2 T IO (t3 t2 )+IO (t4 t3 )+IO (t5 t4 ) . 2 (3) After editing and substitution, (3) can be expressed as Id2,max = ICSch,max const. 2 T IO tT S
2 IO LL2 + CSN UCS 2UCS

Fig. 6. Switch voltage uCE4 and switch current iC4 of the transistor T4 in the leading leg; iC4 : 10 A/div.

(4)

2) Transformer T R1 parameters: a) turns ratio n1 = 6, (NP 1 = 12; NS1 = 2); b) magnetizing inductance Lm1 = 2.8 mH; c) leakage inductance LL1 = 3.4 H; d) maximum magnetizing current Im1,max 0.25 A; e) construction: coaxial (Fig. 5); total weight: 4.2 kg; universal transformer for the rated output power: about 20 kW at 50 kHz. 3) Transformer T R2 parameters: a) turns ratio n2 = 1.38, (NP 1 = 33; NS1 = 24); b) magnetizing inductance Lm2 = 146 H; c) leakage inductance LL2 = 4.3 H; d) maximum magnetizing current Im2,max 4 A; e) construction: EC70 core; air gap = 1.5 mm; total weight: 0.38 kg. 4) Smoothing output inductance LO = 12 H. 5) Smoothing auxiliary inductance La = 78 H. The converter was examined as a current source for full-load range at an output current from zero up to 100 A. The following oscillograms were made at resistive load. The switch voltage uCE4 and switch current iC1 in the leading leg of the converter are shown in Fig. 6. The switch (transistor T4 including diode D4 ) is turned on under ZVS. Because of the leg symmetry, the transistor T1 works under the same operating conditions. The turnoff loss is reduced by capacitors C1 and C4 acting as the nondissipative turnoff snubbers, as it is evident in detail at the turnoff process in Fig. 7. Fig. 8 shows the switch voltage uCE3 and switch current iC3 during turn-on and turnoff of the transistor T3 in the lagging leg of the converter. The transistor T3 is turned off under zero current, as can be seen in the oscillogram.

where LL2 is the leakage inductance of the auxiliary transformer, and CSN is the capacitance of the secondary turnoff snubber for clamp switch TS , if the snubber is used. IV. E XPERIMENTAL R ESULTS A laboratory model of the proposed PS-PWM dcdc converter has been built and tested to verify its functions. 1) Parameters: a) output power P = 3 kW; b) input voltage U = 300 V; c) switching frequency fS = 50 kHz; d) inverter IGBT switches: G4PC50W; e) inverter freewheeling diodes: HFA25TB60.

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Fig. 7. Collectoremitter voltage vCE4 and collector current iC4 of the transistor T4 in the leading legturnoff detail. iC4 : 5 A/div.

Fig. 10. Switch voltage uCE4 and switch current iC4 of the transistor T4 in the leading leg at no load; iC4 : 5 A/div.

Fig. 8. Switch voltage uCE3 and switch current iC3 of the transistor T3 in the lagging leg; iC3 : 10 A/div.

Fig. 11. Primary current iP 1 of T R1 and discharging current iCSdisch of the clamp capacitor CS ; iP 1 : 10 A/d; iCSdisch : 50 A/d.

Fig. 9. Primary voltage up2 and primary current ip2 of the auxiliary transformer T R2 at no load; ip2 : 5 A/div.

Fig. 12. Rectied secondary voltage ud1 of the power transformer T R1 and diode current iD5 of the output rectier; iD5 : 50 A/div.

The oscillogram also shows a signicant decrease of the turn-on losses caused by the leakage inductance of the power transformer. The leakage inductance in this case operates as a turn-on snubber, decreasing the rate of rise of the transistor collector current in the lagging leg of the converter. The primary voltage up2 and primary current ip2 of the auxiliary transformer T R2 at no load are shown in Fig. 9. The maximum magnetizing current Im2,max is set to approximately 4 A, and thus, the ZVS of transistors in the leading leg is ensured independently on the load. This is conrmed by the oscillogram in Fig. 10, where the switch voltage uCE4 and switch current iC4 of the transistor T4 in the leading leg at no load are shown. In terms of charging or discharging of the snubber capacitors C1 and C4 , respectively, no load is the worst state for the leading leg transistors. However, in this case, zerovoltage turnoff at no load is ensured by the proper design of the magnetizing current Im2 of the auxiliary transformer.

Fig. 11 shows the primary current iP 1 of T R1 and the discharging current iCSdisch of the clamp capacitor CS at the output load current IO = 80 A. The circulating current is reduced, and only a small magnetizing current ows during the freewheeling interval through the primary winding of the power transformer T R1 as a result of discharging current iCSdisch rise. As it is evident from the discharging current waveform, a much shorter time for the discharging current iCSdisch would be sufcient for the achievement of circulating current limitation at these conditions. Fig. 12 shows the rectied secondary voltage of the power transformer T R1 and diode current iD5 of the output rectier. The duty cycle of the rectied voltage ud1 is higher than that of the primary as a result of capacitor CS discharging during the conduction of power switch TS . Clamp voltage uCS and discharging clamp current iT S are shown in Fig. 13. The average value of the clamp voltage is about 80 V, while the rectied secondary voltage is only

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Fig. 13. Clamp voltage uCS and discharging clamp current iT S ; iT S : 50 A/div.

Fig. 16. Switch voltage uCE4 and switch current iC4 of the transistor T4 in the leading leg at short circuit; iC4 : 20 A/div.

Fig. 14. Primary voltage uP 1 and primary current iP 1 at short circuit with external charging of the capacitor CS ; iP 1 : 20 A/div.

Fig. 17. Switch voltage uCE3 and switch current iC3 of the transistor T4 in the lagging leg at short circuit; iC4 : 20 A/div.

Fig. 15. Primary voltage uP 1 and primary current iP 1 at short circuit when the capacitor CS is not charged by T R2 ; iP 1 : 20 A/div.

Fig. 18.

Efciency of the converter.

50 V; see Fig. 12. The clamp voltage ripple depends on the value of the clamp capacitor CS and output current IO . The primary voltage uP 1 and primary current iP 1 at short circuit with external charging of the capacitor CS are shown in Fig. 14. The circulating current is totally suppressed. Only a small magnetizing current ows through the primary winding of the power transformer. For comparison, the same waveforms at short circuit are shown in Fig. 15, when capacitor CS is not charged by the auxiliary transformer T R2 . Therefore, the voltage of the clamp capacitor CS at short circuit in this case is not high enough to fully suppress the circulating current. Consequently, the conduction and turnoff losses of the IGBTs would be increased. The oscillogram in Fig. 16 illustrates the ZVS for the leading leg transistors at short circuit (see also Figs. 6 and 7). The ZCS of the lagging leg switches at short-circuit documents Fig. 17. The reduction of switching losses is evident from Figs. 68 and the conduction losses from Figs. 8, 14, and 17. It results in an increased efciency of the converter. The measured ef-

ciency at full load was little over 93% (Fig. 18). This is rather a high value of efciency for the converter with relatively low output voltage and high output current. V. D ISCUSSION The proposed converter seems to be very attractive for highpower applications, where short circuit and no load are the normal states of the converter operation, e.g., arc welding. At arc welding applications, the rating output voltage is quite low; on the other hand, the output current is relatively high. For reliable arc ignition, sufciently high no-load output voltage (in comparison with arc voltage) is necessary to be ensured. This is important particularly at arc welding of rustresistant steel, which needs higher no-load voltage for proper welding process [4], [25]. This is possible to achieve by adjusting the output voltage of the auxiliary transformer to the required value. For this purpose, the output voltage of the auxiliary transformer T R2

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can be substantially higher than the secondary voltage of the power transformer T R1 , for example, twice or more. Then, it is possible to choose higher turns ratio NP 1 /NS1 of the power transformer and thus decrease both its primary current and size. Consequently, the current rating of the IGBTs in the inverter can be lower. The leakage inductance of the power transformer should be as low as possible so that the rise and fall times (commutation times) of the clamp switch TS were kept short. Moreover, the higher output voltage of the auxiliary transformer, to which value charges the clamp capacitor, can help for this purpose. The energy stored in the leakage inductance of the power transformer is recovered to the load contrary to interesting solution with auxiliary transformer in [10], where leakage inductance energy is returned back to the input source and, thus, circulating reactive energy in the converter is increased. The duty cycle loss of the rectied voltage due to output rectier commutation is compensated by increasing the duty cycle to near unity, determined by the clamp switch TS turnon time in interval tT S (Fig. 4). This duty cycle boost effect of the clamp can also help to improve the overall efciency. The certain disadvantage of this topology is the fact that voltage rating of the secondary switches must be increased simultaneously with an increase of the clamp capacitor voltage UCS . For lower switching frequencies (e.g., 20 kHz), the difference between the size of the power transformer T R1 and the auxiliary transformer T R2 is quite big. However, if the switching frequency rises, the difference is reduced. It is necessary to nd the optimum between the sizes of the power and auxiliary transformers in each application. Of course, both transformers contribute to the output power. The commutation time between rectifying diodes D5 and D6 and clamp switch TS depends on the value of the leakage inductance LL1 of the power transformer TR1 . The shorter is the commutation time, the smaller is the auxiliary transformer TR2 . The better situation is at converters with higher output voltage and, thus, lower output current. The auxiliary circuits and clamp can be much smaller. VI. C ONCLUSION Using the combination of the energy recovery clamp and simple auxiliary circuits, promising results have been obtained for a full range of the load current from no load to short circuit in the proposed high-frequency PS-PWM full-bridge converter with ZVZCS. All power switches operate under ZVS or ZCS, and only nondissipative components and auxiliary circuits are utilized in the converter. Soft switching and reduction of circulating currents in the proposed converter have been achieved for full-load range. The main new features of the proposed converter consist in the following: 1) suppression of the circulating current also in short circuit, which is advantageous in dc current source applications; 2) independent charging of the clamp capacitor to the desired value;

3) simple facility to increase no-load output voltage, e.g., for arc welding applications; 4) possibility to decrease the primary current and size of the power transformer for arc welding (or similar) purposes; 5) independent charging and discharging of the capacitors in the leading leg. Therefore, switch voltage sensing is not necessary. ACKNOWLEDGMENT The authors would like to thank the R&D Operational Program Center of Excellence of Power Electronics Systems and Materials for their components. R EFERENCES
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[18] S. J. Jeon and G. H. Cho, A zero-voltage and zero current switching full bridge dcdc converter with transformer isolation, IEEE Trans. Power Electron., vol. 16, no. 5, pp. 573580, Sep. 2001. [19] X. Wu, X. Xie, C. Zhao, Z. Qian, and R. Zhao, Low voltage and current stress ZVZCS full bridge dcdc converter using center tapped rectier reset, IEEE Trans. Ind. Electron., vol. 55, no. 3, pp. 14701477, Mar. 2008. [20] H. Cha, L. Chen, R. Ding, Q. Tang, and F. Z. Peng, An alternative energy recovery clamp circuit for full-bridge PWM converters with wide ranges of input voltage, IEEE Trans. Power Electron., vol. 23, no. 6, pp. 2828 2837, Nov. 2008. [21] X. Wu, X. Xie, J. Zhang, R. Zhao, and Z. Qian, Soft switched full bridge dcdc converter with reduced circulating loss and lter requirement, IEEE Trans. Power Electron., vol. 22, no. 5, pp. 19491955, Sep. 2007. [22] R. Bojoi, G. Griva, G. Kovacevic, and A. Tenconi, ZVSZCS full-bridge DCDC converter for voltage step-up in fuel cell distributed generation systems, in Proc. Eur. Conf. Power Electron. Appl. Rec., Sep. 25, 2007, pp. 18. [23] S.-S. Lee, S.-W. Rhee, and G.-W. Moon, Coupled inductor incorporated boost half-bridge converter with wide ZVS operation range, IEEE Trans. Ind. Electron., vol. 56, no. 7, pp. 25052512, Jul. 2009. [24] W.-J. Lee, C.-E. Kim, G.-W. Moon, and S.-K. Han, A new phaseshifted full-bridge converter with voltage-doubler-type rectier for highefciency PDP sustaining power module, IEEE Trans. Ind. Electron., vol. 55, no. 6, pp. 24502458, Jun. 2008. [25] S. Petrov, Expectations of resonant converters utilization as welding power sources, Schematics, vol. 7, pp. 3033, Jul. 2006, (in Russian).

Jaroslav Dudrik (M08) received the M.S. and Ph.D. degrees in electrical engineering from the Technical University of Koice, Koice, Slovak Republic, in 1976 and 1987, respectively. He is currently a Full Professor of electrical engineering with the Department of Electrical, Mechatronic and Industrial Engineering, Faculty of Electrical Engineering and Informatics, Technical University of Koice, where he is engaged in teaching and research. His primary interest is power electronics. His elds of research include dc-to-dc converters, high-power soft-switching converters, converters for renewable energy sources, and control theory of converters.

Nistor-Daniel Trip (M05) received the M.S. degree in applied electronics from the Technical University of Cluj-Napoca, Cluj-Napoca, Romania, in 1993 and the Ph.D. degree in electronics and telecommunications engineering from the University Politehnica of Timisoara, Timisoara, Romania, in 2004. Since 1993, he has been with the Department of Electronics, University of Oradea, Oradea, Romania, where he is currently a Professor, teaching and doing research activities. His research interests include industrial and power electronics, dc-to-dc hard- and soft-switching converters, as well as applications with microcontrollers and digital signal processors.