Dual-Mode Control of Cascasde Buck-Boos PFC Converter

http://www.eng.nus.edu.sg/EResnews/0502/rd/rd_4.html

Traditionally, power supplies used in computers and consumer electronic products have a front-end diode-bridge rectifi er followed by a large electrolytic capacitor. Due to this arrangement, the current drawn from the ac-mains has a high harmonic content. The harmonic currents affect the performance of other equipment connected to the same ac-line. Single-phase ac-dc Power Factor Correction (PFC) rectifiers have attracted considerable attention in recent years due to the adoption of increasingly stringent power quality regulations, such as the IEC-1000-3-2. These rectifiers generally employ boost converter-based front-end pre-regulators. Their objective is to draw a sinusoidal current in phase with the ac mains voltage while developing a dc output voltage whose magnitude is higher than the peak ac-mains voltage. The output voltage has considerable amount of ac ripple. Often, a downstream dc-dc power converter is used both for stepping down the voltage and for achieving tight voltage regulation to meet load requirements. As energy is processed in two stages, the efficiency of such a cascadedconverter scheme (CCS) is low, especially at low-line and high-load conditions.

Figure 1: Dual-mode control scheme of CBB-PFC rectifier.

Figure 2: Experimental steady-state waveforms of the CBB-PFC rectifier at Vin =85 V, V o =100.3 V, IO=1.0 A. (a) inductor current (b) input current (scale: 1A/div) (c) input voltage (scale; 100 V/div) (d) output voltage ripple scale: 1V/div); time scale: 5ms/div.

Cascade buck-boost (CBB) (see Figure 1) converter in PFC applications is capable of delivering an output voltage even lower than the peak ac-mains voltage, if required. Thus, the need for having a CCS is avoided. In addition, owing to the presence of two switches, CBB converter offers a control-freedom that can be exploited effectively for simultaneously achieving sinusoidal input current Iin, tightly regulated output voltage Vo, and fast dynamic response. An added advantage of the CBB-PFC converter is that the device voltage stresses are less than those in CCS. In this research project, we have proposed a novel dual-mode control (DMC) method (Fig. 1) for the CBB-PFC rectifier that is simple to implement and meets the desired steady-state and transient-state objectives of a PFC rectifier. Under steady-state, the CBB-converter is operated as a tri-state converter having three intervals namely boost interval (Db T) {both S1 and S2 ON}, freewheel

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Dual-Mode Control of Cascasde Buck-Boos PFC Converter

http://www.eng.nus.edu.sg/EResnews/0502/rd/rd_4.html

interval (Df T) {S2 ON and S1 OFF}, and capacitor-charging interval (Do T) {both S1 and S2 OFF}. Using the DMC scheme, the second harmonic component of input power is prevented from reaching the output terminals, resulting in low output voltage ripple. The scheme controls Vo and Iin separately resulting in fast dynamic response of the converter. Three loops, listed below, are used for achieving the desired PFC goals: A charge-control-based Iin (Irect in Fig. 1) shaping loop that decides boost interval (Db T). A fast Vo -error loop that decides capacitor charging interval (Do T). A slow Df-error loop that decides the peak value of rectifier current.

Figure 3: Experimental response for step load change at V in =85 V, V o =100 V, I o =0.5 A to 1 A; (a) output voltage (scale: 5 V/div) (b) inductor current (scale: 2A/div) (c) input current (scale: 5A/div) time scale: 50ms/div .

We have done in-depth analyses for deciding the trade-offs associated with the DMC scheme and the size of filter components of the converter. The anticipated good steady-state and transient performances have been verified through computer simulations and experiments on a hardware prototype converter. The converter specifications are Vin=85-110V, 60 Hz, Vo =100 V, Io (rated)=1 A, L=13.6 mH, C=470 F. Figures 2 and 3 show sample experimental results. The efficiency of the CBB was about 82% over a wide range of line and load conditions. The project was done in collaboration with Dr Dipti Srinivasan and carried out by Ph.D student Mr. Kanakasabai Viswanathan.

Contact Person : Prof R. Oruganti Tel : 6874 2133 Fax : 6779 1103 Emai : eleramsh@nus.edu.sg

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