Universal Shift Register

If the flip-flop outputs of a shift register are accessible, then information entered serially by shifting
can be taken out in parallel from the outputs of the flip-flops. If a parallel load capability is added to a shift register, then data entered in parallel can be taken out in serial fashion by shifting the data stored iu the register. Some shift registers provide the necessary input and output terruinals for parallel trausfer. They may also have both shift right and shift left capabilities. The most general shift register has the following capabilities: 1. A clear control to clear the register to O. 2. A clock input to synchronize the operations. 3. A shift-right control to enable the shift right operation and the serial input and output lines associated with the shift right. 4. A shift-left control to enable the shift left operation and the serial input and output lines associated with the shift left. 5. A parallel-load control to enable a parallel transfer and the n input liues associated with the parallel transfer. 6. n parallel output lines. 7. A control state that leaves the information in the register unchanged in the presence of the clock.

Other shift registers may have only some of the preceding functions, with at least one shift operation. A register capable of shifting in one direction only is a unidirectional shift register. One that can shift in both directions is a bidirectional shift register. Ifthe register has both shifts and parallel load capabilities, it is referred to as a universal shift register. The diagram of a 4-bit universal shift register that has all the capabilities listed above is shown in Fig. 6-7. It consists of four D flip-flops and four multiplexers. The four multiplexers have two common selection inputs S1 and SQ. Input 0 in each multiplexer is selected when 51S0 = 00, input 1 is selected when S1S0 = 01, and similarly for the other two inputs. The selection inputs control the mode of operation of the register according to the function entries in Table 6-3. When SISO = 00, the present value of the register is applied to the D inputs of the flip-flops. This condition forms a path from the output of each flip-flop into the input of the same flip-flop. The next clock edge transfers into each flip-flop the binary value it held previously, and no change of state occurs. When SlsO ~ 01, terminal I of the multiplexer inputs has a path to the D inputs of the flip-flops. This causes a shift-right operation, with the serial input transferred into flip-flop A4 When SISO = 10, a shift-left operation results, with the other serial input going into flip-flop AI' Finally, when SISO = 11, the binary information on the parallel input lines is transferred into the register simultaneously during the next clock edge. Shift registers are often used to interface digital systems situated remotely from each other. For example, suppose it is necessary to transmit an n-bit quantity between two points. If the distance is far, it will be expensive to nse n lines to transmit the n bits in parallel. It is more economical to use a single line and transmit the information serially, one bit at a time. The transmitter accepts the n-bit data in parallel into a shift register and then transmits the data serially along the common line. The receiver accepts the data serially into a shift register. When all n bits are received, they can be taken from the outputs of the register in parallel. Thus the transmitter performs a parallel-to-serial conversion of data and the receiver does a serial-to-parallel

conversion.