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Chapter 2

Interfacing techniques
Introduction
Central processing unit (CPU) designed around any microprocessor or controller performs the task of
decision making and computing. These operations are performed on the data supplied to the CPU by
peripherals. Thus peripherals are considered as input and output devices. Input can be made available
from keyboard, storage device such as memory, data acquisition system that converts analog signal to
digital or from any other digital system. Similarly data is output to the devices like displays, printers,
storage devices, control systems, which require digital to analog conversion, and any other digital system.

GMCS_51RD2 trainer provides number of such peripherals for interfacing with CPU. This chapter deals
with techniques involved in interfacing devices like ADC, DAC, keyboard and different types of displays
(LCD, seven segment and alphanumeric), RTC and RS232/Rs485 to P89C51RD2 micro controller. Here,
one can study, how input/output resources of microcontroller can be managed for its optimum use in
interfacing, timing considerations involved and flow charts for device driver routines.

Peripherals provided with this trainer are

o Key board
o 16 x 2 Liquid Crystal Display (LCD)
o 4 digit Alphanumeric Display.
o 4 digit Seven Segment Serial Display.
o 8 bit Analog to Digital Convertor (ADC)
o 12 bit Digital to Analog Convertor (DAC)
o Real Time Clock (RTC)
o RS 232 Serial Communication Bus.
o RS 485 Serial Communication Bus.

Learning interfacing techniques involve, understanding the nature of the hardware to be interfaced, signal
standards involved, data transfer types – serial or parallel, timing dependency of signals involved, data
formats required and many more. Before beginning the experiment, students are strongly recommended to
read the data sheets of the devices provided and refer to the chapter 1 for circuit details of individual
interfaces provided.

In the exercises provided, all programs are written in ' C ' language targeted for SPJ systems C cross
compiler (SID51 Version 2.06R32). These programs can run on any other compiler with few modifications,
which may be complier specific.

Sample ‘C’ programs given in all exercises require “function.c or LCD.c” files to be included.
Hence user should copy these two files from CD provided along with GMCS_51RD2 trainer into
the directory SC51\Inc on a drive where the compiler software for SPJ system is loaded. Path for
locating these files on CD is GMCS_51RD2\Include.
Exercise 1
Keyboard module Interface

4 X 4 Rugged membrane key matrix is provided with GMCS_51RD2 module to perform input operations.
Keys are arranged in 4 rows and 4-column matrix. Interfacing scan and return lines from micro controller
are connected to rows and columns respectively. Each depression of individual key will generate unique
8-bit code corresponding to its position in matrix; details are listed in table 2.1.

Please refer to section 1.2.2 Keyboard interface for interfacing details and table1.1 for port map
details from Chapter 1 - hardware overview.

Table for hex key code

Table 2.1
P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0
Key HEX
Mapping CODE RET3 RET2 RET1 RET0 SCAN3 SCAN2 SCAN2 SCAN0

1 EE 1 1 1 0 1 1 1 0
2 DE 1 1 0 1 1 1 1 0
3 BE 1 0 1 1 1 1 1 0
UP 7E 0 1 1 1 1 1 1 0
ARROW
4 ED 1 1 1 0 1 1 0 1
5 DD 1 1 0 1 1 1 0 1
6 BD 1 0 1 1 1 1 0 1
DOWN 7D 0 1 1 1 1 1 0 1
ARROW
7 EB 1 1 1 0 1 0 1 1
8 DB 1 1 0 1 1 0 1 1
9 BB 1 0 1 1 1 0 1 1
LEFT 7B 0 1 1 1 1 0 1 1
ARROW
# E7 1 1 1 0 0 1 1 1
0 D7 1 1 0 1 0 1 1 1
* B7 1 0 1 1 0 1 1 1
RIGHT 77 0 1 1 1 0 1 1 1
ARROW
Keyboard Flowchart, to perform continuous scanning for key press detection.

Start

Set P2.0 low and P2.1 high

Define array to store scan line


sequence
Row[0] = 0xfe; // scan line 1 low
Row[1] = 0xfd; // scan line 2 low
Row[2] = 0xfb; // scan line 3 low
Row[3] = 0xf7; // scan line 4 low

Declare variable as count and key

Set count = 0
A
No
Count < 4
Yes

Output data of
row[count] on P0

Apply Latching pulse on


P2.0 to latch scan data in U1

Set P2.0 to low to read data


on return lines from U2

Read data on port P0 and store in variable key

Set P2.0 to high to disable buffer

B
B

Compare key with hex code


in the table

Display corresponding key


value on LCD.

count = count + 1

Program Writing and testing of Keyboard Interface

Refer to the C program for keyboard module under the heading ‘kbd_scan.C’. The softcopy of program is
available on a CD provided, in a folder GMCS_51RD2 \ CPrograms. To test the functionality of the
program on the GMCS_51RD2 trainer, additional device support is required to observe the result. We
make use of LCD to observe the result. This program will display the key on LCD when key is pressed.

Procedure

1. Connect the power supply cable to GMCS_51RD2 kit (Round black connector) with proper polarity.
2. Connect 10-pin FRC cable between J3 connector on CPU module and J1 connector on keyboard
module. (It may be internally connected)
3. Short pin 2 & 3 of jumper JP1 and JP2 on CPU module, to connect tx and Rx of µc to RS232 buffer.
Refer to “Details of jumper settings ” from II nd point of section 1.2.1 RS232 / RS485 Interface.
4. Connect the programming serial cable provided with the kit between connector J8 on CPU module
and any of COM port of PC.
5. Press the switch SW1 on CPU module, to invoke the ISP programming mode for µc.
6. Switch on the power Supply and press-reset key SW2 on CPU module.
7. Compile the program ‘ kcd_scan.C’ to generate the HEX output.
8. Invoke WinISP download utility to program the CPU. Refer to programming utility section of this
manual.
9. Program kbd_scan.hex file into P89C51RD2 microcontroller.
10. Close the “WinISP” program utility to release the COM port.
11. Release switch SW1 and reset the system to invoke execution mode.
12. Observe output on LCD, when key is pressed.
/* This program is to interface keyboard to micro controller. Here, when key
is pressed it's name / number will be displayed on LCD display.*/

#include <Philips\8xC31-51-80C51Fx-80C51Rx+.h>
#include <standard.h>
#include <hardware.h>
#include <function.c>

void read_key(); // To Read Data Of Key

unsigned char scan[4],cnt,Key;

// Bits Defined in file function.c


/*
BIT KBD_SCAN_ALE P2.0 // SCAN LINE LATCH CONTROL SIGNAL
BIT KBD_RET_ALE P2.1 // RETURN LINE BUFFER CONTROL SIGNAL
*/

void main()
{

initalisation(); // This routine is used to initalise state of all

// pheriphrals at power ON. function from <function.c> file

KBD_SCAN_ALE = 0;
KBD_RET_ALE = 1;
init_dsp(); // Initalise display <function.c> file

// scan arrow to scan induvidual row

scan[0] = 0xfe; // TO SCAN ROW1


scan[1] = 0xfd; // TO SCAN ROW2
scan[2] = 0xfb; // TO SCAN ROW3
scan[3] = 0xf7; // TO SCAN ROW4

Lcd_Write(c_wr,0x0C); // DISPLAY ON,CURSOR OFF,BLINK OFF

while(1)
{
Lcd_Write(c_wr,0x80); // CLEAR DISPLAY

for(cnt = 0; cnt<4; cnt++)


{
read_key(); // To read staus of key

switch(Key)
{

case 0xff: break;


case 0xee: Lcd_Write(d_wr,0x31); // 1
break;
case 0xde: Lcd_Write(d_wr,0x32); // 2
break;
case 0xbe: Lcd_Write(d_wr,0x33); // 3
break;
case 0x7e: Lcd_Write(d_wr,0xC4); // UP ARROW
break;
case 0xed: Lcd_Write(d_wr,0x34); // 4
break;
case 0xdd: Lcd_Write(d_wr,0x35); // 5
break;
case 0xbd: Lcd_Write(d_wr,0x36); // 6
break;
case 0x7d: Lcd_Write(d_wr,0xDA); // DOWN ARROW
break;
case 0xeb: Lcd_Write(d_wr,0x37); // 7
break;
case 0xdb: Lcd_Write(d_wr,0x38); // 8
break;
case 0xbb: Lcd_Write(d_wr,0x39); // 9
break;
case 0x7b: Lcd_Write(d_wr,0x7F); // LEFT ARROW
break;
case 0xe7: Lcd_Write(d_wr,0x23); // #
break;
case 0xd7: Lcd_Write(d_wr,0x30); // 0
break;
case 0xb7: Lcd_Write(d_wr,0x2A); // *
break;
case 0x77: Lcd_Write(d_wr,0x7E); // RIGHT ARROW
break;

}
}

void read_key()
{
P0 = scan[cnt]; // Data out on P0 to scan a row
KBD_SCAN_ALE = 1; // Enable scan latch to latch scan data
KBD_SCAN_ALE =0; // Disable scan Latch
KBD_RET_ALE = 0; // Enable Return Line Buffer
Key = P0; // Read Data on P0
KBD_RET_ALE = 1; // Disable return Line buffer
}
Exercise 2
LCD Interface

Liquid crystal display is an output device used to display alphanumeric characters and special symbols.
The built-in microcontroller and driver provide convenient connectivity between 4- bit or 8 – bit CPUs
and LCD display. All functions required to drive liquid crystal display are internally provided. It also has
internal refresh. LCD has a dot matrix structure, which allows 5 X 7 or 5 X 10 dots of character size.
With it's built in character generator ROM it is only necessary to provide ASCII code to display
corresponding character. Wide range of instructions is available like Clear Display, Cursor home, Display
ON/OFF, Cursor shift, Display Shift to control various display related functions.

LCD provided with GMCS_51RD2 is 16 character and two-row display. Each row has separate internal
memory buffer of 40-byte size for storing display characters. Programmer should write to these buffers to
display characters on individual rows. The mapping of memory location with the position of the display
character on the row along with its functionality is given in the data sheet of the LCD attached.

Please refer to VI th point of section 1.2.1 LCD Module for interfacing details and table1.1 for port
map details from Chapter 1 - hardware overview. For detail description of control signals, functions
and instructions please refer to data sheet of LCD attached.

Timing Flowchart for LCD module


This flowchart explains steps involved in initialization of LCD at power ON.

Start

Initialize LCD to 8 –bit


data, two-line display, and
5 X 7 font

Set Display ON, Cursor


OFF, Blink OFF

Entry Mode: Left Entry,


Address increment and shift
OFF

Clear Display

Set Display Data Ram


address to 1st column of
row1

Stop
Flow chart to explain steps involved to write data in control / data register of LCD.
.

Start

Set P1.3, P1.4, P1.5 low

Out control lines sequence


on P0

Apply Latching pulse on


P1.3 to latch control lines
in U9

To enable LCD set P1.5 high

Output data on port P0

Apply Latching pulse on P1.4


to latch data in U2

To disable LCD set P1.5 low

Generate delay of 3uS to


ensure that LCD is not busy
while performing next write
operation, otherwise data
will not be accepted

STOP
Program Writing and testing of LCD Interface

Refer to the C program for LCD module under the heading ‘LCD.C’. The softcopy of program is
available on a CD provided, in a folder GMCS_51RD2 \ CPrograms. This program will display a string
“PHOTONS Techniques” on LCD.

Procedure

1. Connect the power supply cable to GMCS_51RD2 kit (Round black connector) with proper
polarity.
2. Short pin 2 & 3 of jumper JP1 and JP2 on CPU module, to connect Tx and Rx of µc to RS232
buffer. Refer to “Details of jumper settings ” from II nd point of section 1.2.1 RS232 / RS485
Interface.
3. Connect the programming serial cable provided with the kit between connector J8 on CPU module
and any of COM port of PC.
4. Press the switch SW1 on CPU module, to invoke the ISP programming mode for µc.
5. Switch on the power Supply and press-reset key SW2 on CPU module.
6. Compile the program ‘ LCD.C’ to generate the HEX output.
7. Invoke WinISP download utility to program the CPU. Refer to programming utility section of this
manual.
8. Program LCD.hex file into P89C51RD2 microcontroller.
9. Close the “WinISP” program utility to release the COM port.
10. Release switch SW1 and reset the system to invoke execution mode.
11. Observe output string “PHOTONS Techniques” on LCD.
/* This program is to initalise and display the string on 16 X 2 LCD display */

#include <Philips\8xC31-51-80C51Fx-80C51Rx+.h>

// These are the control words for register select (data / control) and read / write operation of LCD

// R/W RS
// P0.3 P0.2
#define c_wr 0x00 // 0 0
#define d_wr 0x04 // 0 1
#define c_rd 0x08 // 1 0
#define d_rd 0x0c // 1 1

#define row1_add 0x80 //LCD display row one address.


#define row2_add 0xc0 //LCD display row two address.

void init_dsp(); // To initalise the LCD display


void Lcd_Write(char byRegister,char byData); // This function is used to
// write data in control / data
// registers of LCD

BIT LCD_Cntr P1.3 // To enable/disable latch used for register (control / data)
// select and read / write operations
BIT LCD_Data P1.4 // To enable / disable latch used to latch the LCD data
BIT En_LCD P1.5 // To enable / disable LCD

char str[20] = "PHOTONS Techniques"; // string to be displayed

void main ()
{
unsigned char i;
init_dsp(); // to initalise display

for(i=0;i!=17;i++)
Lcd_Write(d_wr,str[i]); // To write data on LCD

while(1)
{
}
}

void init_dsp()
{
Lcd_Write(c_wr,0x38); // Function set. 8 bit data, 2disp lines, 5x7 font.
Lcd_Write(c_wr,0x0e); // Display ON, Curser ON, Blink off.
Lcd_Write(c_wr,0x06); // Entry Mode. Left entry, addr increment and disp. shift off.
Lcd_Write(c_wr,0x01); // Clear Display.
Lcd_Write(c_wr,0x38); // Function set.
Lcd_Write(c_wr,0x80); // Set DD RAM to 0 Add.1st line
}
void Lcd_Write(char byRegister,char byData)
{
delay_ms(3); // Delay, to ensure that LCD is not busy when
// write operation is performed

LCD_Cntr = 0; // to disable control latch


LCD_Data = 0; // to disable data latch
En_LCD = 0; // to disable LCD

P0 = byRegister; // to write on control/data register and Read/Write operation


LCD_Cntr = 1; // To enable control latch
LCD_Cntr = 0; // to disable control latch

En_LCD = 1; // to enable lcd

P0 = byData; // data for LCD is written on P0


LCD_Data = 1; // enable data latch
LCD_Data = 0; // disable data latch

En_LCD = 0; // data at ouput of data latch will be latched on LCD

}
Exercise 3
Four character, 5.0 mm smart Alphanumeric display Interface

This display is similar in functionality as LCD but can be used where brightness is of concern and space
is constraint. Due to it’s features like software controlled dimming levels and blank, it is more
advantageous over 7 segment LED display.

The display has 4 characters, 5 X 7 dot matrix structure and is driven by in built CMOS IC. It has built in
RAM, ASCII decoder, which decodes 7 bit ASCII data and displays it using a 5 X 7 font. It can be
directly interfaced in bus-oriented system.

Please refer to V th point of section 1.2.1 Alpha Numeric Display for interfacing details and table1.1
for port map details from Chapter 1 - hardware overview.

Start

Set P3.6 and P3.7 low

Output address of control


register/attribute ram on port P0

Apply Latching pulse on


P3.6 to latch address in
U6

Output display data on port P0

Apply Latching pulse on P3.7


to latch display data in U4

Logically OR address of control register/attribute ram with


08h to get low to high transition on /WR of alphanumeric
display, to store data to control register/attribute ram.
Output this control word on port P0

A
A

Apply Latching pulse on P3.6 to latch


control word from last step in U6

STOP

Program Writing and testing of alphanumeric display Interface

Refer to the C program for LCD module under the heading ‘alpha_num_dsp.C’. The softcopy of program
is available on a CD provided, in a folder GMCS_51RD2 \ CPrograms. This program will display a string
“RD2” on alphanumeric display.

Procedure

1. Connect the power supply cable to GMCS_51RD2 kit (Round black connector) with proper polarity.
2. Short pin 2 & 3 of jumper JP1 and JP2 on CPU module, to connect Tx and Rx of µc to RS232 buffer.
Refer to “Details of jumper settings ” from II nd point of section 1.2.1 RS232 / RS485 Interface.
3. Connect the programming serial cable provided with the kit between connector J8 on CPU module
and any of COM port of PC.
4. Press the switch SW1 on CPU module, to invoke the ISP programming mode for µc.
5. Switch on the power Supply and press-reset key SW2 on CPU module.
6. Compile the program ‘alpha_num_dsp.C’ to generate the HEX output.
7. Invoke WinISP download utility to program the CPU. Refer to programming utility section of this
manual.
8. Program alpha_num_dsp.hex file into P89C51RD2 microcontroller.
9. Close the “WinISP” program utility to release the COM port.
10. Release switch SW1 and reset the system to invoke execution mode.
11. Observe output string “RD2” alphanumeric display.
/* This program is to initalise and display alphanumeric character
on 4 digit alpha numeric display.
*/

#include <Philips\8xC31-51-80C51Fx-80C51Rx+.h>
#include <standard.h>
#include <hardware.h>
#include <LCD.c>

#define blank_enable 0x14 // This will enable display blank for individual display
#define blank_disable 0x16 // This will disable display blank for individual display

// Control word to write ASCII Data to individual display


#define ASCII_cntr1 0x54 //Display 1
#define ASCII_cntr2 0x55 //Display 2
#define ASCII_cntr3 0x56 // Display 3
#define ASCII_cntr4 0x57 //Display 4

// Control word to write to control register/attribute ram of individual display

#define CA_cntr1 0x44 // Display 1


#define CA_cntr2 0x45 // Display 2
#define CA_cntr3 0x46 // Display 3
#define CA_cntr4 0x47 // Display 4

/* Alpha numeric display's Control Lines defined in <function.C> file


BIT Alpha_Cntr P3.6 // Latch control to write to control register
BIT Alpha_Data P3.7 // Latch control to writr to attribute RAM
*/

void init_dsp_alpha(); // Function to initalise alpha numeric display


void write_alpha(unsigned char AlphaControl,unsigned char AlphaData); // To write on display

void main()
{

initalisation(); // This routine is used to initalise state of all


// pheriphrals at power ON. function from <function.c> file
init_dsp_alpha();

write_alpha(ASCII_cntr4,0x52); // R
write_alpha(ASCII_cntr3,0x44); // D
write_alpha(ASCII_cntr2,0x32); // 2
}

void init_dsp_alpha()
{
write_alpha(CA_cntr1,blank_enable); // To enable blank of Diplay 1
write_alpha(CA_cntr2,blank_disable); // To disable blank of Diplay 2
write_alpha(CA_cntr3,blank_disable); // To disable blank of Diplay 3
write_alpha(CA_cntr4,blank_disable); // To disable blank of Diplay 4
}
void write_alpha(unsigned char AlphaControl,unsigned char AlphaData)
{

Alpha_Cntr = 0; // Disable the control latch


Alpha_Data = 0; // Disable the data latch

P0 = AlphaControl; // Actual control word is written


Alpha_Cntr = 1; // Control latch is enabled
Alpha_Cntr = 0; // Control latch is disabled

P0 = AlphaData; // Actual data is written


Alpha_Data = 1; // Data latch is enabled
Alpha_Data = 0; // Data latch is disabled

AlphaControl = AlphaControl | 0x08; // Low to high transition on /WR


// of alphanumeric dsp to store
// data to control register/attribute ram

P0 = AlphaControl; // Actual control word is written


Alpha_Cntr = 1; // Control latch is enabled
Alpha_Cntr = 0; // Control latch is disabled

}
Exercise 4
Serial Seven Segment Display Interface

The Display is a human oriented output peripheral. It is used to display information such as results,
operand or meaningful data. It displays both numeric and alphanumeric information. Seven segment LED
display module on GMCS_51RD2 trainer kit is mainly used to display numeric information.

7 Segment LED
It consists of 7 segments and one decimal point. Each segment is an individual LED. There are two types
of 7 segment LED displays viz. common anode and common cathode.

In common anode type display, all anodes of the LEDs are shorted together and connected to supply
voltage. The current required to glow each segment is 15mA approximately. So one must consider the
sinking capacity of driver device.

In common cathode type display, all cathodes of the LEDs are shorted together and connected to ground.
The current sourcing capability of driver device should be 15mA per output approximately otherwise
external transistors are required to boost the current.

Interfacing Considerations

Seven segment LED display module supplied with the kit uses common anode type LEDs. Shift register
logic is used to drive LEDs and display the data. This logic allows displaying the data with minimum I/O
resources. One shift register is used per LED digit. Seven outputs of shift register are connected to seven
segments of the display and eighth output is connected to decimal point of the display. To drive the four
digits on the display module, shift registers are connected in daisy chain where serial output of first
register drives the input of second, output of second register drives the input of third and so on. This is
shown in the figure 1 below.

To interface four seven-segment displays to microcontroller, only two port lines are used (Ref fig 1). One
port line is used as clock and other as data. Data line is connected to the input of the first shift register and
clock is common to all shift registers When there is low to high transition on the clock the data present at
input will be shifted into shift register. So total 8 clock periods will require for shifting the actual data for
displaying it on first digit. To display four digit data total 32-clock period will require. Also the data,
which we shift, first will appear on 4th LED and data shifted last will appear on 1st LED. During this shift,
the data is continuously varying, but due to persistence of vision, we can see stable data on the display.

Clock
Shift Shift Shift Shift
Register Register Register Register
Data
1 2 3 4

MSB of MSB of MSB of


1st shift reg 2nd shift reg 3rd shift reg

Figure 1
Please refer to the section 1.2.5 Serial Seven Segment module for interfacing details and port
mapping from Chapter 1 - hardware overview.

The outputs of shift register has connected to seven segments as shown below

Shift Register QA QB QC QD QE QF QG QH
Segments DISP PT G F E D C B A

As we are using common anode type display, the respective segment must be pulled low to display the
appropriate data.
Table 2.0
Display DISP G F E D C B A Hex
PT Value
0 1 1 0 0 0 0 0 0 C0
1 1 1 1 1 1 0 0 1 F9
2 1 0 1 0 0 1 0 0 A4
3 1 0 1 1 0 0 0 0 B0
4 1 0 0 1 1 0 0 1 99
5 1 0 0 1 0 0 1 0 92
6 1 0 0 0 0 0 1 0 82
7 1 1 1 1 1 0 0 0 F8
8 1 0 0 0 0 0 0 0 80
9 1 0 0 1 0 0 0 0 90
A 1 0 0 0 1 0 0 0 88
B 1 0 0 0 0 0 0 0 80
C 1 1 0 0 0 1 1 0 C6
D 1 1 0 0 0 0 0 0 C0
E 1 0 0 0 0 1 1 0 86
F 1 0 0 0 1 1 1 0 8E
Timing Flowchart for seven segment display module

This flowchart is to display single digit. To display four digits repeat the process 4 times.

START

Set Clock = High, Data = low

Declare variable msg, count, temp

Store Hex value of digit to be


displayed in Variable msg.

Set count =0

No
count < 8
C STOP

Yes
Temp = msg & 80h to store MSB

Set Data = Low If temp = 80h


No

Yes
Set Data = High.

To transmit data, apply Low


to high transition on clock

B
B

High to low transition on Clock

Shift msg left by one bit

count = count + 1

Program Writing and testing of Serial Seven Segment display Interface

Refer to the C program for Serial Seven Segment under the heading ‘SEVSEG.C’. The softcopy of
program is available on a CD provided, in a folder GMCS_51RD2 \ CPrograms. This program is written
taking into account design considerations explained in “interfacing considerations”. Program implements
2- wire serial protocol to transmit data serially on seven-segment display.

Procedure

1) Connect the power supply cables to GMCS_51RD2 kit (Round black connector) and Serial Seven
Segment module (2 pin CPU) with proper polarity.
2) Connect 2 pin relimate cable between J5 connector on CPU module and J2 connector on Serial
Seven Segment module.
3) Short pin 2 & 3 of jumper JP1 and JP2 on CPU module, to connect Tx and Rx of µc to RS232
buffer. Refer to “Details of jumper settings ” from II nd point of section 1.2.1 RS232 / RS485
Interface.
4) Connect the programming serial cable provided with the kit between connector J8 on CPU module
and any of COM port of PC.
5) Press the switch SW1 on CPU module, to invoke the ISP programming mode for µc.
6) Switch on the power Supply and press-reset key SW2 on CPU module.
7) Compile the program ‘ SEVSEG.C’ to generate the HEX output.
8) Invoke WinISP download utility to program the CPU. Refer to programming utility section of this
manual.
9) Program SEVSEG.hex file into P89C51RD2 microcontroller.
10) Close the “WinISP” program utility to release the COM port.
11) Release switch SW1 and reset the system to invoke execution mode.
12) Observe output “2004” on Serial Seven Segment display module.

Note:- In case the data doesn’t appear on the seven segment display module, reverse the polarity of
the cable connector while connecting it to J2 connector on Serial Seven Segment display module
and try running the program again .
/* This is the demonstrate's serial seven sement display card */

#include <Philips\8xC31-51-80C51Fx-80C51Rx+.h>

BIT Sev_Data P1.1 // P1.1 used as data.


BIT Sev_Clk P1.2 // P1.2 used as clock.

void Sev_dsp(unsigned char receive_msg);

void main ()
{
unsigned char a_1,a_2,a_3,a_4;

a_1 =0xa4; // 2
a_2 =0xc0; // 0
a_3 =0xc0; // 0
a_4 =0x99; // 4

Sev_dsp(a_4);
Sev_dsp(a_3);
Sev_dsp(a_2);
Sev_dsp(a_1);

while(1)
{
}
}

void Sev_dsp(unsigned char receive_msg)


{

unsigned char k,msg;

for(k=0;k<8;k++)
{

Sev_Clk = 0; // To set Clock pin to 0

msg = receive_msg & 0x80; // To mask the message


if(msg == 0x80) // to check message bit High / Low
Sev_Data = 1; // set data pin (P1.1)
else
Sev_Data = 0; // reset data pin (P1.1)

receive_msg = receive_msg << 1; // shift message left by 1 bit

Sev_Clk = 1; // Low to high transistion on clock pin (P1.2)

}
}
Exercise 5
ADC Interface

The ADC module is used to convert analog data into digital word. Various physical parameters such as
pressure, temperature etc can be converted into proportional voltage or current in analog form using
sensors. These signals are amplified by amplifier and converted into digital format using ADC, which can
be acceptable by micro controller. There are different types of ADCs available in the market like
integrating, successive approximation and sigma delta etc. Here, we are using 8- bit, successive
approximation and 8 multiplexed channel ADC, ADC0808.

Features Of ADC0808
• Easy interface to micro controllers
• No zero or full scale
• 8 channel multiplexer with address logic
• 0V to 5V input range with single +5V supply
• Output meet TTL voltage level specifications
• Available in standard 28 pin DIP package

Key Specifications
• Resolution – 8 bit
• Total Unadjusted Error - +/- 1/2 LSB
• Supply – 5 Vdc
• Low Power – 15 mW
• Conversion Time – 100 uS at 640KHz

Functional Description

We are using ADC0808, which is 8 bit, 8 channel, successive approximation ADC (Ref Fig 1). There are
two main functional blocks in ADC. First, functional block is, 8 input analog channels, which can be
selected depending on data latched in 3bit address control register. ALE is signal used to latch the data on
3bit address control register. Second functional block is successive approximation converter, which
converts input analog signal, fed through one of the analog channel, into 8-bit digital word. The output
from multiplexer goes to one of the input of comparator and second input to comparator is from 256R
register ladder, which is tapped by MOSFET transistor switch tree. The converter control logic controls
the switch tree, funneling a particular tap voltage to comparator. The successive approximation register
(SAR) and control logic decides next tap selected should be higher or lower than present tap on register
ladder. This algorithm is executed 8 times per conversion, once every 8-clock period, yielding total
conversion time of 64 clock periods.

ADC requires 8-clock period per approximation. Even though no conversion in progress ADC still
cycling through these internal clock periods. Start of conversion (SOC) signal is used to start the analog
to digital conversion. A start pulse (SOC) can occur any time during the cycle but the conversion will
actually begin at the next 8 clock period sequence. At rising edge of start pulse SAR will be reset. As long
as start pin is held high no conversion begins, but when the start pin is taken low the conversion will start
within 8 clock periods.

End Of Conversion (EOC) is the signal generated by ADC to indicate that conversion in progress is
finished. This is indicated by low to high transition on EOC. To achieve this, the EOC output is triggered
(high to low transition) on the rising edge of SOC. This is also controlled by 8 clock period, so will go
low within 8 clock periods the rising edge of start pulse. EOC can go low before actual conversion
begins, but this is not important because positive transition (low to high) of EOC indicates end of
conversion.

Fig No 2

Timing Diagram Of ADC0808

When the conversion cycle is complete resulting data is loaded into tri state output latch. To read data
from latch, OE (Output Enable) signal has to be raised high (low to high transition). The data from the
output latch can be read by the host system anytime before end of the next conversion. Due to the tri state
capability of the output latch, it’s easy to interface to bus oriented system.
Interfacing Considerations

ADC0808 is designed to interface to most of micro controller very easily, but some considerations are
required for proper conversion operation.

The data outputs of ADC are capable of driving one TTL standard load, which is adequate for small
systems, but for larger systems data buffer may be necessary.

The converter inputs are standard CMOS compactable inputs. When TTL outputs are connected to any of
the digital inputs a pull up register should be tied from TTL output to VCC ~ 5 KΩ. This ensure that the
TTL will pulled up above 3.5V

The timing of the START and ALE pulses relative to channel selection and signal stability can be critical.
When there is low to high transition on ALE, address is strobed into address register. But the propagation
delay from ALE to comparator input of selected input signal is about 3uS. If start pulse is short then
comparator input samples the analog input, before it is stable. For clock frequency <500KHz the sample
period of comparator input is sufficient to allow this delay to settle out. But for clock frequency >500
KHz, a delay between START and delay pulse is required.

Thus to summaries the above discussion, we find following signals are required to interface the ADC to
micro controller.

o 3- bit multiplexer address lines.


o Address latch enable (ALE) signal for multiplexer.
o Start of conversion (SOC)
o End of conversion (EOC)
o Output Enable (OE)
o 8- bit data bus to read converted digital data
o Clock

Please refer to the section 1.2.4 ADC module for interfacing details and port mapping from
Chapter 1 - hardware overview.
Timing Flowchart

START

Set ALE(P2.2), SOC(P2.3) and OE (P2.5)low

Select Channel for


conversion Using
address Lines A0, A1
and A2 (Fig 2.2)

To latch the address in mux


address register, pulse the ALE
input positive.
Low to high transition on ALE.

Delay of 3uS, so that stable input will be


present at the input of comparator

To begin conversion, apply


SOC pulse.

High to low transition on ALE.

EOC will go low between 0 to 8


clock pulses after LOW to HIGH
transition on SOC. So Poll for
HIGH to LOW transition on EOC or
apply delay equivalent to 8 clock
pulses.

B
B

No Low to High
Transition On
EOC. To check end
of conversion.

Yes

Read Data From output


Latch, by enabling OE. Low
To High transition on OE.

Read converted data on output


line of ADC

Tri State Output Latch by


High to Low transition on OE

` Yes
Initiate
Next A
Conversion

No

STOP
Program Writing and testing of ADC Interface

Refer to the C program for ADC under the heading ‘ADC.C’. The softcopy of program is available on a
CD provided, in a folder GMCS_51RD2 \ CPrograms. This program is written taking into account design
considerations explained in “functional description”. To test the functionality of the program on the
GMCS_51RD2 trainer, additional device support is required to observe the result. We make use of serial
port, to transmit converted data from ADC to PC and observe it on monitor screen.

Program initializes test channel (channel 0) for conversion of data. Converted data is serially transmitted
to PC and observed using Hyper Terminal utility. Hence apart from ADC program additional routines are
incorporated to initialize serial port and transmit the data.

Procedure

1. Connect the power supply cables to GMCS_51RD2 kit (Round black connector) and ADC
module(2 pin CPU) with proper polarity.
2. Connect 14 pin FRC cable between J1 connector on CPU module and J3 connector on ADC
module.
3. Short pin 1 & 2 of jumper JP1 on ADC module, to apply clock generated from µc to ADC clock.
Refer to “Details of clock section jumper JP1” from section 1.2.4 of chapter 1.
4. Short pin 2 & 3 of jumper JP1 and JP2 on CPU module, to connect Tx and Rx of µc to RS232
buffer. Refer to “Details of jumper settings ” from II nd point of section 1.2.1 RS232 / RS485
Interface.
5. Connect the programming serial cable provided with the kit between connector J8 on CPU module
and any of COM port of PC.
6. Press the switch SW1 on CPU module, to invoke the ISP programming mode for µc.
7. Switch on the power Supply and press reset key SW2 on CPU module.
8. Compile the program ‘ ADC.C’ to generate the HEX output.
9. Invoke WinISP download utility to program the CPU. Refer to programming utility section of this
manual.
10. Program ADC.hex file into P89C51RD2 microcontroller.
11. Close the “WinISP” program utility to release the COM port.
12. Release switch SW1 and reset the system to invoke execution mode.
13. On PC side, invoke Hyper terminal utility to observe output of the program on the screen. Do the
following settings to configure the hyper terminal.

Configure hyper terminal to COM1 or COM2 (where the programming cable is already
connected) with following settings
o Bits per second: 19200
o Data bits: 8
o Parity: none
o Stop bit: 1
o Flow Control: None

14. Reset the CPU module by pressing switch SW2 again and observe the output data received on PC.
It will appear as "ADC output data = 2.485” in running mode of display.
15. Now vary the DC analog input of the test channel using the potentiometer P1 on ADC module.
You can measure this voltage at test point TP3. Observe the change in the readings on PC side.
/* This program is to demonstrate, interface of ADC to microcontroller. In this program control signals
are generated to covert and read analog signal into digital format. Digital data is again converted into
analog and transmitted over the serial port to display on the hyper terminal.*/

#include <Philips\8xC31-51-80C51Fx-80C51Rx+.h>
#include <stdio.h>
#include <standard.h>
#include <function.c> // User defined file

void init_timer2(); // programmable clock out is generated at pin P1.0 of


// microcontroller by using Timer 2 and applied as clock to ADC

void init_serial(); // serial initalisation function from file <function.c>

unsigned char ADCReadData;


float resolution, volt;
unsigned char scan;

/* ADC Control Lines defined in <function.C> file

BIT SOC P2.3 // Start of conversion siganl for ADC


BIT ALE P2.2 // Address Latch enable signal to latch the channel adrr of ADC
BIT OE P2.5 // Output enable signal to read the digital data from ADC
BIT EOC P2.4 // End of conversion signal */

void main()
{

resolution = 19.61; // 8 bit ADC, Ref voltage 5V (5V/256 = 19.61mV)

initalisation(); // This routine is used to initalise state of all


// pheriphrals at power ON. function from <function.c> file
init_timer2();
init_serial();

while(1)
{
SOC = 0;
OE =0;
ALE =0;
P0 = 0x00; // select channel zero
ALE = 1;
SOC = 1;
ALE = 0;
SOC = 0;
do
{
}while(EOC); // to scan high to low transistion when start of conversion is applied*/

do // to scan low to high transistion, to detect end of conversion


{
}while(!EOC);

P0 = 0xff; // To Read Data From Port, Bit Latch must contains 1.

OE = 1; // to enable output latch

ADCReadData = P0; // Converted data available on port P0


// is read in ADCReadData variable

volt = (resolution * ADCReadData)/1000; // To convert read data into analog format

OE = 0;// to tri state output latch

printf("\nADC output data =%6f",volt); // Library function to transmit the data over serial port

}
}

void init_timer2()
{
T2CON = 0x00; //to set T2CON in 16 bit timer mode to set clk of adc 640khz
// count is worked out with consideration of 1 machine cycle = 6 clock period
RCAP2H = 0xff;
RCAP2L = 0xf8;

T2MOD = 0X02; // To Enable Output Of Timer2 By Slecting Mode


TR2 = 1; // To Start Timer2

}
Exercise 6
DAC Interface

DAC is used to covert digital data into the analog format. DAC module provided with GMCS_51RD2 kit
uses AD7541 DAC, which is 12-bit monolithic multiplying digital to analog converter. For D/A
conversion, an inverted R - 2R ladder structure is used, that is the binary weighted currents are switched
between the two outputs OUT1 and OUT2 bus lines, thus maintaining a constant current in each ladder
leg independent of switch state. These currents can be converted into voltage using unipolar or bipolar OP
Amp configurations. Module operates on +/- 9V and + 5V supply. Varying reference voltage of the DAC
can change full scale of the DAC output.

Please refer to the section 1.2.3 DAC Module for interfacing details and table1.1 for port map
details from Chapter 1 - hardware overview.

Timing Flowchart for DAC module

Start

Set Latch control signals P2.6


and P2.7 to low.

Output lower 8-bit data on


port P0

Apply Latching pulse at P2.6


to latch lower 8- bit data

Output higher 4-bit data on


port P0

Apply Latching pulse at P2.7


to latch 12- bit data at DAC
input

Stop
Program Writing and testing of DAC Interface

Refer to the C program for DAC module under the heading ‘DAC.C’. The softcopy of program is
available on a CD provided, in a folder GMCS_51RD2 \ CPrograms. This program will generate saw
tooth waveform at output of DAC. A 12-bit counter value is presented at DAC input starting from 000h
to FFFh in incremental mode repetitively.

Procedure

1. Connect the power supply cables to GMCS_51RD2 kit (Round black connector) and DAC module (4
pin CPU) with proper polarity.
2. Connect 10 pin FRC cable between J4 connector on CPU module and J2 connector on DAC module.
3. Set the module in uni polar configuration by connecting the appropriate jumpers. Also, select negative
reference to the DAC. Refer to jumper setting details in section 1.2.3 “DAC module” of chapter 1 –
Hardware overview.
4. User can vary DAC reference between 0 to +9V or 0 to -9V with help of pots P6 and P7 respectively.
Adjust –5V of reference voltage with the help of P7 pot while observing it at pin 3 of JP1. This will
generate positive swing at the DAC output.
5. Short pin 2 & 3 of jumper JP1 and JP2 on CPU module, to connect Tx and Rx of µc to RS232 buffer.
Refer to “Details of jumper settings ” from II nd point of section 1.2.1 RS232 / RS485 Interface.
6. Connect the programming serial cable provided with the kit between connector J8 on CPU module
and any of COM port of PC.
7. Press the switch SW1 on CPU module, to invoke the ISP programming mode for µc.
8. Switch on the power Supply and press-reset key SW2 on CPU module.
9. Compile the program ‘ DAC.C’ to generate the HEX output.
10. Invoke WinISP download utility to program the CPU. Refer to programming utility section of this
manual.
11. Program DAC.hex file into P89C51RD2 microcontroller.
12. Close the “WinISP” program utility to release the COM port.
13. Release switch SW1 and reset the system to invoke execution mode.
14. Observe DAC output on CRO, between posts VOUT and GND on DAC module. You can observe
saw tooth waveform generated.
/* This program is to demonstrate Interface of 12 bit DAC to microcontroller and generate saw tooth
waveform at output of DAC.
*/

#include <Philips\8xC31-51-80C51Fx-80C51Rx+.h>
#include <function.c>

/* defined in function.c file


BIT Lower_8Bit P2.6 // To Latch lower 8 bit data in Latch - 1
BIT Latch_12Bit P2.7 // To Latch 12 bit data in Latch-2 and Latch-3
*/

unsigned char DACWriteData;


void main()
{

unsigned char i;

initalisation(); // This routine is used to initalise state of all


// pheriphrals at power ON. function from <function.c> file

while(1)
{
for(DACWriteData = 0x00;DACWriteData<=0x0f;DACWriteData++)
{
for(i = 0x00;i<0xff;i++)
{
P0 = i; // Lower 8 bit data
Lower_8Bit = 1; // Latch-1 enable
Lower_8Bit = 0; // Latch -1 diable
P0 = DACWriteData; // Higher 4 bit data
Latch_12Bit = 1; // Latch 2 & 3 enable
Latch_12Bit = 0; // Latch 2 & 3 disable

}
}
}

}
Exercise 7
RTC Interface

The DS1307 serial real time clock is a low-power, full binary –coded decimal (BCD) clock / calendar
plus 56 bytes of NV SRAM. The clock / calendar provides seconds, minutes, hours, day, date, month and
year information. The end of month date is automatically adjusted for months with fewer than 31 days,
including corrections for leap year. The clock operates in either the 24-hours or 12-hours format with
AM/PM indicator. The DS1307 has built-in power sense circuit that detects its power failures and
automatically switches to the battery supply.

The DS1307 supports a bi-directional, 2-wire bus (I2C) with data transmission protocol. It operates as a
slave device on serial bus. This device can be accessed by implementing a START condition and
providing a device identification code, followed by register address. Subsequent registers can be accessed
sequentially until a STOP condition is executed.

On GMCS_51RD2 trainer, RTC DS1307 is interfaced using two port lines P1.6 (SCL ) and P1.7(SDA).
P89C51RD2 acts as master. It generates serial clock, controls bus access and generates START/ STOP
conditions. Data transfer can be initiated only when bus is not busy. During data transfer, the data line
must remain stable whenever the clock line is high. Change in data line while clock line high will be
interpreted as control signals. Accordingly bus conditions are explained along with the flowchart below.

Initialize Bus: Set both the lines SDA and SCL high.

Bus not Busy: Both data and clock lines remain high.

Flowchart 1
Start data transfer: A change in state of data line, from high to low, while the clock is HIGH, defines a
START condition.

START

SET bit SDA and SCL high

Generate delay to take account


response time of slave and
propagation delays

Set SDA line low

A
A

Generate delay to take account


response time of slave and
propagation delays

Set SCL low

STOP

Flowchart 2
Stop data transfer: A change in state of data line, from low to high, while the clock is HIGH, defines a
STOP condition.

START

SET SDA low, SCL high

Generate delay to take account


response time of slave and
propagation delays

Set SDA line high

Generate delay to take account


response time of slave and
propagation delays

Clear SCL

STOP

Data transfer:

The state of data line represents valid data when, after a START condition, the data line is stable for
duration of the HIGH period of the clock signal. The data on the line must be changed during the LOW
period of the clock signal. There is one clock pulse per bit of data.

Acknowledge: Each device, when addressed, is obliged to generate an acknowledge after the reception of
each byte. The master device must generate an extra clock pulse, which is associated with this
acknowledge bit.
A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH period of acknowledge related clock pulse. Setup
and hold times must be taken into account. A master must signal an end of data to the slave by not
generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the
slave must leave the data line HIGH to enable the master to generate the STOP condition.

Flowchart 3
Data write to DS1307

START

Generate START
condition as explained

Transmit 7-bit DS1307


address with one write bit .
1101000 + 0

Generate acknowledge related


clock and read acknowledge
from slave

Send internal register


address of DS1307

Generate acknowledge related


clock and read acknowledge
from slave

Send first data byte to DS1307

Generate acknowledge related clock


and read acknowledge from slave

Send second data byte to DS1307


Generate ack clock and so on till
last byte transmission

Generate STOP condition

STOP
Flowchart 4
Data Read from DS1307

START

Generate START condition


as explained above

Transmit 7-bit DS1307


address with one read bit .
1101000 + 1

Generate acknowledge related


clock and read acknowledge
from slave

Read first byte from DS1307

Generate acknowledge related


clock and read acknowledge
from slave

Read second byte from DS1307 and so on

Generate acknowledge related clock


and read acknowledge from slave

Read last byte from DS1307

Generate negative acknowledge from master


to end the read operation.

Generate STOP condition

STOP
Program Writing and testing of RTC Interface

The above flowcharts explain only the bus conditions under various operating modes. During actual
programming of RTC, these bus conditions occur in specific sequence as per programs functionality. Let
us consider the example, where we want to read month register. Month register is one byte long and has
address 05h. To access this month register, we must program register pointer to hold this address. Then a
read is performed to read the contents of month register.

Thus above process involves


1. Write operation to write month register address 05h into register pointer.
2. Read operation to read contents of month register.

The bus conditions for these two operations correspond to flowcharts 3 and 4 respectively.

Refer to the C program for RTC interface under the heading ‘RTC.C’. The softcopy of program is
available on a CD provided, in a folder GMCS_51RD2 \ CPrograms. To test the functionality of the
program on the GMCS_51RD2 trainer, additional device support is required to observe the result. We
make use of LCD to observe the result. This program will program RTC for day; date and time then read
the data from RTC and display it on LCD continuously.

Procedure

1. Connect the power supply cable to GMCS_51RD2 kit (Round black connector) with proper polarity.
2. Short pin 2 & 3 of jumper JP1 and JP2 on CPU module, to connect Tx and Rx of µc to RS232 buffer.
Refer to “Details of jumper settings ” from II nd point of section 1.2.1 RS232 / RS485 Interface.
3. Connect the programming serial cable provided with the kit between connector J8 on CPU module
and any of COM port of PC.
4. Press the switch SW1 on CPU module, to invoke the ISP programming mode for µc.
5. Switch on the power Supply and press-reset key SW2 on CPU module.
6. Compile the program ‘RTC.C’ to generate the HEX output.
7. Invoke WinISP download utility to program the CPU. Refer to programming utility section of this
manual.
8. Program RTC.hex file into P89C51RD2 microcontroller.
9. Close the “WinISP” program utility to release the COM port.
10. Release switch SW1 and reset the system to invoke execution mode.
11. Observe initially the data as “date:31/07/79 day Tue and Time:03:00:00” with varying time on LCD.

Note:- RTC battery voltage must be held between 2V to 3.5V for proper RTC functioning.
// This is prgram to configure RTC & display Time & Date on LCD display

#include <philips\8xC31-51-80C51Fx-80C51Rx+.h>
#include <standard.h>
#include <hardware.h>
#include "i2c.h"

// R/W RS
// P0.3 P0.2
#define c_wr 0x00 // 0 0
#define d_wr 0x04 // 0 1
#define c_rd 0x08 // 1 0
#define d_rd 0x0c // 1 1

#define row1_add 0x80 //LCD display row one address.


#define row2_add 0xc0 //LCD display row two address.

void init_dsp();
void Lcd_Write(unsigned char byRegister,unsigned char byData);

void rtc_dsp();
void rtc_dsp_data();
void rtc_dsp_day();

unsigned char read_val;


unsigned int int_val;
unsigned char day[3];

void main()
{

BIT LCD_Cntr P1.3


BIT LCD_Data P1.4
BIT En_LCD P1.5

BIT SDA P1.7


BIT SCL P1.6
BIT p0 P1.0

init_dsp();

IE = 0x00;

write_rtc_byte(0x00,0x00);
write_rtc_byte(0x01,0x00);
write_rtc_byte(0x02,0x03);
write_rtc_byte(0x03,0x02);
write_rtc_byte(0x04,0x31);
write_rtc_byte(0x05,0x07);
write_rtc_byte(0x06,0x79);
rtc_dsp();

while(1)
{

delay_ms(5000);
read_rtc_byte(0x00);
delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0x8b); // Set DD RAM to 11 Add.1st line
rtc_dsp_data();
read_rtc_byte(0x01);
delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0x88); // Set DD RAM to 9 Add.2nd line
rtc_dsp_data();
read_rtc_byte(0x02);
delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0x85); // Set DD RAM to 6 Add.2nd line
rtc_dsp_data();
read_rtc_byte(0x04);
delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0xc3); // Set DD RAM to 4 Add.2nd line
rtc_dsp_data();
read_rtc_byte(0x05);
delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0xc6); // Set DD RAM to 7 Add.2nd line
rtc_dsp_data();
read_rtc_byte(0x06);
delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0xc9); // Set DD RAM to 10 Add.2nd line
rtc_dsp_data();
read_rtc_byte(0x03);
delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0xcc); // Set DD RAM to 12 Add.2nd line

switch(read_val)
{
case 0x01:
day[0] = 'M';
day[1] = 'o';
day[2] = 'n';
break;
case 0x02:
day[0] = 'T';
day[1] = 'u';
day[2] = 'e';
break;
case 0x03:
day[0] = 'W';
day[1] = 'e';
day[2] = 'n';
break;
case 0x04:
day[0] = 'T';
day[1] = 'h';
day[2] = 'u';
break;
case 0x05:
day[0] = 'F';
day[1] = 'r';
day[2] = 'i';
break;
case 0x06:
day[0] = 'S';
day[1] = 'a';
day[2] = 't';
break;
case 0x07:
day[0] = 'S';
day[1] = 'u';
day[2] = 'n';
break;

rtc_dsp_day();

void init_dsp()
{

delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0x38); // Function set. 8 bit data, 2disp lines, 5x7 font.

delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0x0e); // Display ON, Curser ON, Blink off.

delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0x06); // Entry Mode. Left entry, addr increment and disp. shift off.

delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0x01); // Clear Display.

delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0x38); // Function set.

delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0x80); // Set DD RAM to 0 Add.1st line
}

void Lcd_Write(unsigned char byRegister,unsigned char byData)


{
LCD_Cntr = 0; // to disable control latch
LCD_Data = 0; // to disable data latch
En_LCD = 0; // to disable LCD

P0 = byRegister; // to select control/data register and Read/Write operation


LCD_Cntr = 1; // To enable control latch
asm nop;
asm nop;
LCD_Cntr = 0; // to disable control latch

En_LCD = 1; // to enable lcd

P0 = byData; // data for LCD is written on P0


LCD_Data = 1; // enable data latch
asm nop;
asm nop;
LCD_Data = 0; // disable data latch

En_LCD = 0; // data at ouput of data latch will be latched on LCD

void rtc_dsp()
{
delay_ms(3); // busy_chk();
Lcd_Write(d_wr,0x54); // T
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,0x69); // i
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,0x6d); // m
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,0x65); // e
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,0x20); // space
delay_ms(3); // busy_chk();
Lcd_Write(c_wr,0x87); // Set DD RAM to 7 Add.1st line
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,0x3a); // ::

delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0x8a); // Set DD RAM to 10 Add.1st line
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,0x3a); // ::

delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0xc0); // Set DD RAM to 0 Add.1st line
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,0x44); // D
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,0x74); // t
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,0x20); // space

delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0xc5); // Set DD RAM to 5 Add.2nd line
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,0x3a); // ::

delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0xc8); // Set DD RAM to 8 Add.2nd line
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,0x3a); // ::

delay_ms(3); //busy_chk();
Lcd_Write(c_wr,0xcb); // Set DD RAM to 8 Add.2nd line
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,0x20); // space

void rtc_dsp_data()
{
unsigned char lcd_val_units,lcd_val_tens; // sta_val[2];
lcd_val_units = read_val & 0x0f;
lcd_val_units = lcd_val_units + 0x30;
lcd_val_tens = read_val & 0xf0;
lcd_val_tens = lcd_val_tens >> 4;
lcd_val_tens = lcd_val_tens + 0x30;
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,lcd_val_tens);
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,lcd_val_units);
}

void rtc_dsp_day()
{
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,day[0]);
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,day[1]);
delay_ms(3); //busy_chk();
Lcd_Write(d_wr,day[2]);
}
Exercise 8
RS232 / RS485 Interface
RS 232 / RS 485 are standards defined for serial transmission of data. The basic difference between these
two standards is that RS232 is used to establish communication between only two devices and RS485 is
multi drop communication system where as many as 256 devices can communicate with each other.

Difference between RS232 / RS485

Specification RS232 RS485


Devices Only Two devices As many as 256
devices can be
connected
Transmission Mode Unbalanced Balanced
Distance 50 to 100 feet 4000 feet
Data rate 1 mbps 10mbps

Please refer to II nd point of section 1.2.1 RS232 / RS485 Interface for interfacing details and
table1.1 for port map details from Chapter 1 - hardware overview.

Initialization of Serial port of microcontroller

Start

Set serial port for transmission


of 1 start bit, 8 data bits and 1
stop bit by selecting mode 1 in
SCON. Also, Enable serial
reception bit in SCON

Use timer 1 in auto reload mode by setting TCON and


TMOD to baud rate generation of 19200

Disable serial interrupt in IE

STOP

Flowchart for serial transmission of data.

Start
Set TI (SCON.1) to low
A

Load data to be transmitted in SBUF

Yes TI = 0
(SCON.1)

No
Set TI = 0

YES No
A To transmit more data Stop

Flowchart for serial Reception of data.


Start

Set RI (SCON.0) to low


A

Yes RI = 0
(SCON.0)

No
Read data to from SBUF

Set RI = 0

YES
No
A To Read more data Stop

Program Writing and testing of RS232 Interface

Refer to the C program for RS232 interface under the heading ‘serial.C’. The softcopy of program is
available on a CD provided, in a folder GMCS_51RD2 \ CPrograms. To test the functionality of the
program on the GMCS_51RD2 trainer, additional device support is required to observe the result. We
make use of serial port of PC and data can observe it on monitor screen.

Program initializes serial port for transmission of data and is serially transmitted to PC and observed
using Hyper Terminal utility.

Procedure

1. Connect the power supply cable to GMCS_51RD2 kit (Round black connector) with proper polarity.
2. Short pin 2 & 3 of jumper JP1 and JP2 on CPU module, to connect tx and Rx of µc to RS232 buffer.
Refer to “Details of jumper settings ” from II nd point of section 1.2.1 RS232 / RS485 Interface.
3. Connect the programming serial cable provided with the kit between connector J8 on CPU module
and any of COM port of PC.
4. Press the switch SW1 on CPU module, to invoke the ISP programming mode for µc.
5. Switch on the power Supply and press-reset key SW2 on CPU module.
6. Compile the program ‘ serial.C’ to generate the HEX output.
7. Invoke WinISP download utility to program the CPU. Refer to programming utility section of this
manual.
8. Program serial.hex file into P89C51RD2 microcontroller.
9. Close the “WinISP” program utility to release the COM port.
10. Release switch SW1 and reset the system to invoke execution mode.
11. On PC side, invoke Hyper terminal utility to observe output of the program on the screen. Do the
following settings to configure the hyper terminal.

Configure hyper terminal to COM1 or COM2 (where the programming cable is already
connected) with following settings
o Bits per second: 19200
o Data bits: 8
o Parity: none
o Stop bit: 1
o Flow Control: None

12. Reset the CPU module by pressing switch SW2 again and observe the output data received on PC. It
will display "PHOTONS Techniques” in hyper terminal window.
/* This program is to output a string on serial port, which can be observed at serial port (com port) of PC
by connecting RS232 cable and configuring hyper terminal */

#include <Philips\8xC31-51-80C51Fx-80C51Rx+.h>
#include <stdio.h>
#include <LCD.c> // user defined file
#include <stdlib.h>

char str[20] = "Transmitting:";

void serial_tx();

void main ()
{
char i;

P3 =0x3f; // TO configure port 3 in input mode to receive the data

init_dsp(); // Function in <LCD.C> file


init_serial();

for(i=0;i!=strlen(str);i++)
Lcd_Write(d_wr,str[i]); // Function in <LCD.C> file
serial_tx();
while(1)
{
}

void init_serial()
{
// Initialisation Serial Port
IE = 0x00; // Disable RI & TI interrupt

TMOD = 0x20; // Timer 1 in 8bit,auto reload mode

TH1 = 0xfd; // 0xfd (to set 19200 baud rate using 11.0592Mhz)
TL1 = 0xfd; // 0xfd
SCON = 0x50 ; // Serial Port Mode1 selected and REN = 1.
// SM0 =0 SM1=1 to Tx/Rx 10bits in which (0) is start,
// 8 bit data, 1 stop bit

PCON &= 0x7f; // To set the baud rate


TR1 = 1; // Timer 1 run control bit
}
void serial_tx()
{
char j;
strcpy(str,"PHOTONS Techniques\n");

TI = 1; // set bit ti 1 to tranmit the data


for(j=0;j!=strlen(str);j++)
{
Lcd_Write(c_wr,row2_add);
Lcd_Write(d_wr,str[j]);
while(!TI)
{
}

TI=0;
SBUF = str[j]; // actual data is loaded in serial buffer
delay_ms(2000);
}

}
Program Writing and testing of RS485 Interface

Refer to the C program for RS485 interface under the heading ‘RS485.C’. The softcopy of program is
available on a CD provided, in a folder GMCS_51RD2 \ CPrograms. To test the functionality of the
program on the GMCS_51RD2 trainer, additional device support is required to observe the result. We
make use of LCD to observe the result. This program will display transmitted and received data, when
key is pressed.

To test the functionality of this program loop back mechanism is implemented. When key is pressed, it is
transmitted and received on same serial port of microcontroller. One RS485 buffer is configured as
transmitter that converts the transmitted signal into RS485 transmission format and other RS485 buffer is
configured as receiver, which converts received signal back into original format and is be applied to RX
pin of micro controller to loop back.

Procedure

1. Connect the power supply cable to GMCS_51RD2 kit (Round black connector) with proper
polarity.
2. Short pin 2 & 3 of jumper JP1 and JP2 on CPU module, to tx and Rx of µc to RS232 buffer. Refer
to “Details of jumper settings ” from II nd point of section 1.2.1 RS232 / RS485 Interface.
3. Connect the programming serial cable provided with the kit between connector J8 on CPU module
and any of COM port of PC.
4. Press the switch SW1 on CPU module, to invoke the ISP programming mode for µc.
5. Switch on the power Supply and press-reset key SW2 on CPU module.
6. Compile the program ‘RS485.C’ to generate the HEX output.
7. Invoke WinISP download utility to program the CPU. Refer to programming utility section of this
manual.
8. Program RS485.hex file into P89C51RD2 microcontroller.
9. Close the “WinISP” program utility to release the COM port.
10. Switch off power supply.
11. Short pin 1 & 2 of jumper JP1 and JP2 on CPU module, to connect Tx and Rx of µc to RS485
buffers. Connect 4-pin relimate female connector to J13. Short pin 1 & 3 (A1 and A2) and 2 & 4
(B1 and B2) of connector J13 to loop back the signal. Refer to “Details of jumper settings ” from
II nd point of section 1.2.1 RS232 / RS485 Interface.
12. Switch On power supply and release switch SW1 and reset the system to invoke execution mode.
13. Press the key and observe the transmitted and received data on LCD.
More on RS485

In multidrop communication system, multiple devices are connected over 2 wires where, any device can
communicate with any device. If two devices are transmitting data at same time then there will be data
collision. To avoid corruption of data due to the collision and misinterpretation of the same, ASCII Hex
format and Frame structure can be used for transmission of data over the bus.

Let us consider Master/slave configuration as one type of communication example. One device will act as
master and all other devices will act as slaves. There will be communication only between master and
slaves and not between two slaves. Master as well as slaves are provided with unique address called as
device ID. Master has usually assigned higher address in the address range while slaves are mapped on
lower address in the range. Only master can generate request for transmission of data from slave devices.
Slaves accept data or command from master and upon request from the master transmit the data.

Data format over RS485 bus

ASCII Hex format is used for serial transmission of data over RS485 bus. By using this format each byte
is represented by pair of ASCII codes that represents the bytes 2 hex characters. This format represents
any value between 0 to 255 using only ASCII codes 30H to 39H (for 0 through 9) and 41H to 46H (for A
through F)

We can design frame structure to transmit address, data and commands over RS485 bus.
The frame is designed to do discrimination of serial data as address, commands or actual data.

Start of Device Source Function Data Data Check End of NULL


frame ID ID Code Count Sum frame \0

Whenever data is transmitted on serial cable, it will be transmitted in frame format only. The frame will
contain
• Start of frame
• Device ID ( Address of receiving device)
• Source ID (Address of Transmitting device)
• Function code related to the different user defined operations.
• Data count (Number of actual data bytes transmitted)
• Actual Data
• Check Sum (Check sum of actual data bytes)
• End of frame
• NULL (Termination of frame)

Data transmitted in frame has given a meaning only inside the function. Let us designed a function code
to give proper meaning to data for e. g.
• Function Code 01 is used for identification of slave.
• Function Code 02 is used for RTC programming of slave.
• Function Code 03 is used for Transmission of acquired data from slave to master

For Hard ware connectivity and bus termination considerations as well as for detail understanding of
RS485 standard we recommend to refer book under the name “ Serial Port Complete” by Jan Axelson
from Penram International Publications (India).
/* This program is to demonstarte RS485 feature using loop back mechanism.

When key is pressed, it is transmitted and received on same serial port of microcontroller. One RS485
chip is congfigured as driver, converts the transmitted siganl into RS485 transmission format and
other RS485 chip congfigured as receiver converts received signal back into original format, which can
be applied to RX pin of micro controller to loop back.
*/

#include <Philips\8xC31-51-80C51Fx-80C51Rx+.h>
#include <string.h>
#include <standard.h>
#include <LCD.c> // User defined file

#define tx_rx_buffer_en 0x02 // to enable one RS485 chip as


// transmit buffer and another
// as receive buffer

void message();
void read_key();

void init_serial();
void serial_tx_rx(unsigned char data_out);

unsigned char scan[4],cnt,Key,i;


char str[15];

BIT KBD_SCAN_ALE P2.0 // Key board scan latch control


BIT KBD_RET_ALE P2.1 // Keyboard return buffer control
BIT Cntr_485 P1.3 // RS485 latch control

void main()
{

KBD_SCAN_ALE = 0;
KBD_RET_ALE = 1;

scan[0] = 0xfe;
scan[1] = 0xfd;
scan[2] = 0xfb;
scan[3] = 0xf7;

initalisation(); // This routine is used to initialize state of all peripherals at power ON.

init_dsp(); // To initialize display function from <LCD.c>


message(); // Display message on LCD display
init_serial(); // Serial port initalistaion function
while(1)
{

for(cnt = 0; cnt<4; cnt++)


{
read_key(); // TO scan the keyboard

switch(Key)
{

case 0xff: break; // Key is not pressed


case 0xee: serial_tx_rx(0x31); //1
break;
case 0xde: serial_tx_rx(0x32); //2
break;
case 0xbe: serial_tx_rx(0x33); //3
break;
case 0x7e: serial_tx_rx(0xC4); //UP ARROW
break;
case 0xed: serial_tx_rx(0x34); //4
break;
case 0xdd: serial_tx_rx(0x35); //5
break;
case 0xbd: serial_tx_rx(0x36); //6
break;
case 0x7d: serial_tx_rx(0xDA); //DOWN ARROW
break;
case 0xeb: serial_tx_rx(0x37); //7
break;
case 0xdb: serial_tx_rx(0x38); //8
break;
case 0xbb: serial_tx_rx(0x39); //9
break;
case 0x7b: serial_tx_rx(0x7F); //LEFT ARROW
break;
case 0xe7: serial_tx_rx(0x23); //#
break;
case 0xd7: serial_tx_rx(0x30); //0
break;
case 0xb7: serial_tx_rx(0x2A); //*
break;
case 0x77: serial_tx_rx(0x7E); //RIGHT ARROW
break;

}
}
}

}
void read_key()
{

P0 = scan[cnt]; // Data out on P0 to scan a row


KBD_SCAN_ALE = 1; // Enable scan latch to latch scan data
KBD_SCAN_ALE =0; // Disable scan Latch
KBD_RET_ALE = 0; // Enable Retun Line Buffer
Key = P0; // Read Data on P0
KBD_RET_ALE = 1; // Disable return Line buffer
}

void init_serial()
{

// Initialisation Serial Port

IE = 0x00;
TMOD = 0x20; // Timer 1 in 8bit,auto reload mode

TH1 = 0xfd; // 0xfd (to set 19200 baud rate using 11.0592Mhz)
TL1 = 0xfd; // 0xfd
SCON = 0x50 ; // Serial Port Mode1 selected and REN = 1.
// SM0 =0 SM1=1 to Tx/Rx 10bits in which (0) is start, 8 bit data, 1 stop bit

TCON = 0x40;
}

void serial_tx_rx(unsigned char data_out)


{
unsigned char data_in;

RI = 0;

Lcd_Write(c_wr,row1_add+13); // To set cursor for displaying data on LCD


Lcd_Write(d_wr,data_out); // Display transmitted data on LCD

P0 = tx_rx_buffer_en;
Cntr_485 = 1; // To enable control latch
Cntr_485 = 0; // To disable control latch

SBUF = data_out; // To output the data on SBUF


TI = 0; // TI bit in SCON is set by hardware at start of stop bit,
// in serial transmission mode 1 and must be cleared by
// software.

// RI bit in SCON is set by hardware at reception of stop bit, in serial


// reception mode 1 and must be cleared by software
// Polling loop, check for serial reception of bit (RI = 1)
do
{
}while(!RI);

data_in = SBUF; // Read the data from SBUF


Lcd_Write(c_wr,row2_add+10); // To set cursor for displaying data on LCD
Lcd_Write(d_wr,data_in); // Display received data on LCD

void message()
{
strcpy(str,"Transmitting:"); // Library function

for(i=0;i!=strlen(str);i++) // Library function


Lcd_Write(d_wr,str[i]); // Function in <function.c> file

Lcd_Write(c_wr,row2_add);

strcpy(str,"Receiving:"); // Library function

for(i=0;i!=strlen(str);i++) // Library function


Lcd_Write(d_wr,str[i]);

}
Programming Utility

Using WinISP

WinISP is a utility that combines the power of in-system flash programming with the user friendliness of
a graphical interface. WinISP requires Microsoft Windows (R) 3.0 or later and a free serial port.
Following is a short tutorial to demonstrate the use of the program.

1. Prepare the board, make sure the micro is firmly inserted into the socket. Visually inspect the board
for any damage or missing parts.

2. Connect a serial cable to the board and one of your PC's serial ports. Power up the ISP board. Boot up
your computer, start MS Windows and the WinISP software.

3. In WinISP, select the chip type, clock frequency (89c51RD+ / 11.0592 MHz for GMCS_51RD2
trainer) and the serial port number the board is connected to.

4. Force the micro into ISP mode. To do this, press the switch SW1 on CPU module and reset the
system.

5. The system is now ready. You can use the buttons on the left of the WinISP window to load Intel hex
files, program/erase/verify the part, set/reset the security bits etc.

6. Release switch SW1 and reset the system to invoke execution mode.

The micro can be reset at any time to run the program. Please note the following remarks:

o The Boot Vector byte is used as a pointer to the ISP program. Unless a custom ISP program is
present elsewhere in the Flash memory, this value should always be programmed to FCh.

o Program the Status byte to 00h to execute your program after reset. To go back to ISP, simply
continue from step 5. If the status byte is non-zero, the microcontroller will unconditionally jump to
the address pointed to by the Boot Vector byte after a reset.

o Do not program the lock bits; this will disable chip access by WinISP.
Additional Program Examples

Apart from I/O interface examples, additional examples are provided on GMCS_52RD2 trainer CD.
These examples cover accessing internal features of micro controller such as timer / counter, port lines,
serial port etc. These programs can be directly incorporated in user application.

List of Examples
1) port_output.c
2) port_input.c
3) port_bit.c
4) timer0_16bit.c
5) timer1_8bit.c
6) timer0_intp.c
7) timer0_cntr.c
8) timer0_cntr_intp.c
9) serial.c

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