4.

0 TIMERS (PART 1) INTRODUCTION

Figure 4.1:of IC Timer 555 and IC Timer 555 configuration The 8-pin 555 timer must be one of the most useful ICs ever made and it is used in many projects. With just a few external components it can be used to build many circuits. A popular version is the NE555 and this is suitable in most cases where a '555 timer' is specified. The 555 housed in a 8-pin package. Schematic Diagram of the 555 Timer

Figure 4.2: Internal Circuit Timer 555

Figure 4.2 show the internal circuit of timer 555. The 555 consists of two voltage comparators (C1 and C2), an R-S flip-flop FF, a discharge transistor Q1, a resistive voltage divider (R3, R4, R5), and an output buffer. The (-) input of the voltage comparator C1 is internally connected to the resistive voltage divider. The voltage at the (-) input is equal to VH = 2/3VCC, which is called the threshold level. The (+) input of the comparator C1 is connected to the external THRESHOLD pin (pin 6). The (+) input of the voltage comparator C2 is connected to VL = 1/3VCC, which is called the trigger level, while the (-) input is the external TRIGGER pin (pin 2). The (-) input of the voltage comparator C1 is also available as the CONTROL pin (pin 5), which can be used for external adjustment of the threshold and trigger levels. The comparator C1 and C2 outputs are the reset R and the set S inputs, respectively, for the flip-flop. When the TRIGGER input falls bellow the trigger level VL, the output of the voltage comparator C2 goes high and sets the flip-flop. If the TRIGGER input is above the trigger level, and the THRESHOLD input is above the threshold level, the output of the voltage comparator C1 is high and the flip-flop is reset. The flip-flop output Q drives the discharge transistor Q1, and an inverting output buffer: -when the flip-flop output Q is high, Q1 is on and the voltage at the OUTPUT pin (pin 3) is low (close to zero); -when the flip-flop output Q is low, Q1 is off and the OUTPUT is high (close to VCC). The output driver is capable of sinking or sourcing current up to about 200mA. The collector of the discharge transistor Q1 is available at the DISCHARGE pin (pin 7). The active-low RESET input (pin 4) to the flip-flop can be used to disable the timer operation and ensure that the OUTPUT stays at zero, regardless of the comparator outputs. The dc supply voltage can be between VCC = 5V and VCC = 15V. It should be connected between the VCC (pin 8) and the GROUND (pin 1). With a 5V supply, the output, and the RESET input levels are compatible with standard TTL or CMOS digital logic circuits.

a. Timer 555 Pin configuration

Figure 4.3: Timer 555 Pin Configuration b. Timer 555 Pin assignments Ground: Pin 1- Pin ground where all the measured voltage must be referred to this pin. Trigger input: Pin 2-when < 1/3 Vs ('active low') this makes the output high (+Vs). It monitors the discharging of the timing capacitor in an astable circuit. It has a high input impedance > 2M . Output pin: Pin 3- Output pin, the output can be connected to the two output is on the pin 3 and pin 1 or pin 3 and pin 8 Threshold input: Pin 6-when > 2/3 Vs ('active high') this makes the output low (0V)*. It monitors the charging of the timing capacitor in astable and monostable circuits. It has a high input impedance > 10M . * providing the trigger input is > 1/3 Vs, otherwise the trigger input will override the threshold input and hold the output high (+Vs). Reset input: Pin 4-when less than about 0.7V ('active low') this makes the output low (0V), overriding other inputs. When not required it should be connected to +Vs. It has an input impedance of about 10k . Control input: Pin 5-this can be used to adjust the threshold voltage which is set internally to be 2/3 Vs. Usually this function is not required and the control input is connected to 0V with a 0.01F capacitor to eliminate electrical noise. It can be left unconnected if noise is not a problem. Discharge pin: Pin 7-is not an input, but it is listed here for convenience. It is connected to 0V when the timer output is low and is used to discharge the timing capacitor in astable and monostable circuits. VCC pin: Pin 8- Pin supply + Vcc (+5 v to 18 v)

4.1.2 State the application of timers in electronic equipment. It is a timer IC and can be used for triggering applications. It can also be used as a square wave generator. Others applications as Pulse generation Sequential timing Time delay generation Pulse width modulation Pulse position modulation Linear ramp generator

However, the 555 timer application can be broadly classified into two types; Monostable Multivibrator and Astable Multivibrator. Multivibrator is an electronic circuit used to implement a variety of simple twostate systems such as oscillators, timers and flip-flops. It is characterized by two amplifying devices (transistors, electron tubes or other devices) cross-coupled by resistors or capacitors. The name "multivibrator" was initially applied to the freerunning oscillator version of the circuit because its output waveform was rich in harmonics. Astable and Monostable is the best examples types of multivibrator circuits: Astable, in which the circuit is not stable in either state it continually switches from one state to the other. It does not require an input such as a clock pulse. This circuit is also known as a free running. Monostable, in which one of the states is stable, but the other state is unstable (transient). A trigger causes the circuit to enter the unstable state. After entering the unstable state, the circuit will return to the stable state after a set time. Such a circuit is useful for creating a timing period of fixed duration in response to some external event. This circuit is also known as a one shot.

A. MONOSTABLE MODE Multivibator Monostable is also known as shoot multivibrator. It is a pulse generator circuit in which the period is calculated from the RC network connected to the outside of the timer. Multivibrator Monostable is stable at the output at logic low (logic 0). When the trigger pulse applied to pin no 2 (Usually negative trigger pulse) output of the timer will change to the HIGH (+ Vcc) for a while and changed to the LOW state of the stable. This situation will remain LOW until the trigger pulse is given again.

Monostable operation

Figure 4.4: Monostable Mode Connection Make the assumption of the output is 1.0 W at the start. The circuit is in stable condition at present Q1 transistor On. Capacitor C will bypassed ground. When a negative pulse applied to pin no 2, transistor Q1 will be off (Q1 will open circuit) will start charging the capacitor C to + Vcc through the resistor values of R, at this time the timer output is HIGH. When the voltage on the capacitor C reaches 5

the value 2 / 3 Vcc, the output is set to the Low state by the flip flop. At the same time, the output of the flip-flop will cause Q1 to be on. Capacitor C will discharge through the transistor Q1 until 1/3 Vcc. Monostabil output will remain in the Low until the trigger pulse applied to pin 2. This cycle will be repeated. This situation can be seen in the Monostable waveform.

Figure 4.5: Monostable Mode Output wave The timing period is triggered (started) when the trigger input (555 pin 2) is less than 1/3 Vs, this makes the output high (+Vs) and the capacitor C1 starts to charge through resistor R1. Once the time period has started further trigger pulses are ignored. The threshold input (555 pin 6) monitors the voltage across C1 and when this reaches 2/3 Vs the time period is over and the output becomes low. At the same time discharge (555 pin 7) is connected to 0V, discharging the capacitor ready for the next trigger. The reset input (555 pin 4) overrides all other inputs and the timing may be cancelled at any time by connecting reset to 0V, this instantly makes the output low and discharges the capacitor. If the reset function is not required the reset pin should be connected to +Vs. Figure 4.5 Show the output waveform for the monostable mode. The figure shows the wave triggered and output width for the monostable mode. Once triggered, the circuits output will remain in the high state (depend on the value of width) until the set time, t elapses. The output will not change its state 6

even if an input trigger is applied again during this time interval t. The circuit can be reset during the timing cycle by applying negative pulse to the reset terminal. The output will remain in the low state until a trigger is again applied. A monostable circuit produces a single output pulse when triggered. It is called a monostable because it is stable in just one state: 'output low'. The 'output high' state is temporary. The duration of the pulse is called the time period (T) / pulse width(w) and this is determined by resistor R and capacitor C: The time during which the output remains high is given by

W (pulse width) = 1.1 RC seconds

time period (T) / width(w) R C = time period in seconds (s) = resistance in ohms ( ) = capacitance in farads (F)

The maximum reliable time period is about 10 minutes.

Choose C1 first (there are relatively few values available). Choose R1 to give the time period you need. R1 should be in the range 1k to 1M , so use a fixed resistor of at least 1k in series if R1 is variable. Beware that electrolytic capacitor values are not accurate, errors of at least 20% are common.

Example 4.1 From the monostable mode connection calculate the value of pulse width if the RC network is 68k and 0.1F. Pulse width (w) = 1.1 RC = 1.1 (68k)(0.1F) = 7.48 ms W 7.48ms

B. ASTABLE MODE Astable Multivibrator known as Free Running Multivibrator. This type does not have a stable state. The situation is changing. Astable does not require the trigger pulse from the outside to change the output. Time for the output is at HIGH or LOW state can be calculated based on the values of resistors and capacitors connected to the external timer. Operating Astable Multivibrator

Figure 4.6: Astable Mode Connection 8

Assume that the output is at HIGH state at first. At this time Q1adalah transistor OFF state. Capacitor C will start charging towards the + ve via resistors RA and RB. When voltage capacitor C reaches the value 2 / 3 VCC, COMPARATOR 1 (C1) will triggered Flip-Flop and the output will change from HIGH to LOW state. At this given the level transistor Q1 will be ON. Capacitor C will remove the charge through the resistor RB and the transistor Q1. When the voltage on the capacitor C reaches the value 1 / 3 VCC COMPARATOR 2 (C2) products FlipFlop will trigger the timer output to be HIGH. The count will be repeated. This can be seen on the output figures shown below. From product design to charge the capacitor C is between 2 / 3 VCC and 1 / 3 VCC current is equal to the output of the timer is at the High.

Figure 4.7: Astable Mode Output wave The time taken by the capacitor c discharge from the 2/3 VCC and 1/3 VCC is equal to the time the timer is at LOW state. Time High TH can be calculated from the formula TH = 0.693 (RA + RB) C, where RA and RB is the charging capacitor network. Time Low TL can be calculated from the formula TL = 0.693 (RB) C, where the resistor RB is a series capacitor C to remove the charge. From the output waveform, we can calculate the period, frequency and duty cycles for Astable mode timer.

Where Period (T) =TH + TL Time High, TH = 0.693 (RA + RB) C Time Low, TL = 0.693 (RB) C 1.44 (RA+2RB)C

1 Frequency = or TH + TL

Duty cycle for Astable Multivibrator is ratio time high TH with T (period) and normally calculate in percent. TH %Duty Cycle = T or = RA + RB X 100% RA + 2RB Example 4.2 Timer 555 connect with Astable Mode using the value given below. Calculate; i. ii. iii. iv. Time high, TH Time low, TL Frequency, F Duty Cycle, D% X 100%

Given Ra=6.8K, Rb=3.3K C1=C2=0.1uF Answer i) Time high TH = 0.693 (Ra+Rb)C = 0.693 (6.8K + 3.3K) 0.1 uF = 0.70 m second

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ii) Time Low TL = 0.693 RbC = 0.693 (3.3K) 0.1uF = 0.23 m second = 1.44 / [6.8K + 2(3.3K)](0.1 uf)] = 1075 Hz.

iii) Frequency

iv) Duty Cycle, D=( TH / T) x 100% =( 0.69ms / 0.93ms) x 100% = 74.2 %

TIME DELAY
Time Delay Circuit In the design of analog circuits, there are times when you would need to delay a pulse that came into a circuit before being used for the next process. This time delay circuit uses a 555 timer to delay a pulse that comes in to a maximum time of 75 seconds. The timing of the delay can also be changed by changing the resistor value of VR1 and the capacitor value of E based on the time delay formula of t=0.69RC. In order for the output to go high, the reset pin of 555 timer (pin 4) must be high and the TRIGGER pin (pin 2) voltage level must be below a third of the level of the power supply to the IC. When there is no pulse being applied to the input, transistor Q1 will turn ON and capacitor E is charged.

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Once a pulse is applied to the input, transistor Q1 will turn OFF and pin 4 reset pin is held to high. This caused the capacitor E1 to be discharged through VR1 resistor. The time delay will depend on the discharged of capacitor E to a third of the supply before the output of 555 goes high. Experiment with different values of VR1 and E to get different time delay. If the maximum value of potentiometer is set to 5M ohm, the time delay of the pulse will be 75 seconds.

Smaller Capacitor for a Long Delay Time

Resistors and capacitors are connected in series to form RC time delay circuits. The time delay is determined by the formula T = R x C, where T is time in seconds, R is the resistance in ohms C is the capacitance in farads. The longer the time delay, the larger the resistor and capacitor values required. However, for long time delays -- e.g., tens of seconds, it's not always advisable to use large capacitor values. They can be physically large, expensive and have large tolerances. An alternative is to use a smaller value capacitor and a much larger resistor value to produce the required time delay. Example 4.3 : To produce time delay 10s, used R=100M and C= 0.1F T =RxC

=100M x 0.1F 12

= 10s
Determine whether you need to use a smaller value capacitor.

Example 4.4: Calculate the new resistor value. If the value time delay is 10 second and the capacitor 10 F. T R =RxC = T/C = 10s/10 F = 1 M.

We can manually calculate the values of R and C for the individual components required as we did in the example above. However, the choice of components needed to obtain the desired time delay requires us to calculate with either kilohms, megaohms, microfarads or picafarads and it is very easy to end up with a time delay of frequency that is out by a factor of ten or even a hundred. We can make our life a little easier by using nomographs to show the monostable multivibrators expected frequency output for different combinations or values of both the R and C. For example, Monostable Nomograph

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By selecting suitable values of C and R in the ranges of 0.001uF to 100uF and 1k to 10M's respectively, we can read the expected output frequency directly from the nomograph graph thereby eliminating any error in the calculations. In practice the value of the timing resistor for a monostable 555 timer should not be less than 1k or greater than 20M

All the note cover the sub topic below. 4.1.3 Construct the schematic diagram of 555 timer for the following modes: a. Monostable mode b. Astable mode c. Bistable mode d. Buffer schmitt trigger 4.1.4 Explain the operating principles of each mode. 4.1.5 Explain how 555 timer is used to generate delay time accurately for each mode. 4.1.6 State the formulas for the generated delay time in 4.1.4.

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OKLThe input and output pin functions are described briefly below and there are fuller explanations covering the various circuits:

Astable - producing a square wave Monostable - producing a single pulse when triggered Bistable - a simple memory which can be set and reset Buffer - an inverting buffer (Schmitt trigger)

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