TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS

SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

D Trimmed Offset Voltage: D D

D D D D D D

NC 1IN NC 1IN + NC

4 5 6 7 8

3 2 1 20 19 18 17 16 15 14 9 10 11 12 13

NC 1OUT NC VDD NC NC 2OUT NC 2IN NC

NC No internal connection

D D

TLC277 . . . 500 V Max at 25C, VDD = 5 V Input Offset Voltage Drift . . . Typically 0.1 V/Month, Including the First 30 Days Wide Range of Supply Voltages Over Specified Temperature Range: 0C to 70C . . . 3 V to 16 V 40C to 85C . . . 4 V to 16 V 55C to 125C . . . 4 V to 16 V Single-Supply Operation Common-Mode Input Voltage Range Extends Below the Negative Rail (C-Suffix, I-Suffix types) Low Noise . . . Typically 25 nV/Hz at f = 1 kHz Output Voltage Range Includes Negative Rail High Input impedance . . . 1012 Typ ESD-Protection Circuitry Small-Outline Package Option Also Available in Tape and Reel Designed-In Latch-Up Immunity

D, JG, P, OR PW PACKAGE (TOP VIEW)

1OUT 1IN 1IN + GND

1 2 3 4

8 7 6 5

VDD 2OUT 2IN 2IN +

FK PACKAGE (TOP VIEW)

description
The TLC272 and TLC277 precision dual operational amplifiers combine a wide range of input offset voltage grades with low offset voltage drift, high input impedance, low noise, and speeds approaching those of general-purpose BiFET devices.
Percentage of Units %

DISTRIBUTION OF TLC277 INPUT OFFSET VOLTAGE

30 473 Units Tested From 2 Wafer Lots VDD = 5 V TA = 25C P Package

25

These devices use Texas Instruments silicongate LinCMOS technology, which provides offset voltage stability far exceeding the stability available with conventional metal-gate processes. The extremely high input impedance, low bias currents, and high slew rates make these costeffective devices ideal for applications previously reserved for BiFET and NFET products. Four offset voltage grades are available (C-suffix and I-suffix types), ranging from the low-cost TLC272 (10 mV) to the high-precision TLC277 (500 V). These advantages, in combination with good common-mode rejection and supply voltage rejection, make these devices a good choice for new state-of-the-art designs as well as for upgrading existing designs.
LinCMOS is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

20

15

10

0 800

400 0 400 VIO Input Offset Voltage V

NC GND NC 2IN + NC

800

Copyright 2002, Texas Instruments Incorporated

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

description (continued)
AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25C 500 V 2 mV 5 mV 10mV 500 V 2 mV 5 mV 10 mV SMALL OUTLINE (D) TLC277CD TLC272BCD TLC272ACD TLC272CD TLC277ID TLC272BID TLC272AID TLC272ID CHIP CARRIER (FK) CERAMIC DIP (JG) PLASTIC DIP (P) TLC277CP TLC272BCP TLC272ACP TLC272CP TLC277IP TLC272BIP TLC272AIP TLC272IP TSSOP (PW) TLC272CPW CHIP FORM (Y) TLC272Y

0C to 70c

40C to 85C

The D package is available taped and reeled. Add R suffix to the device type (e.g., TLC277CDR).

In general, many features associated with bipolar technology are available on LinCMOS operational amplifiers without the power penalties of bipolar technology. General applications such as transducer interfacing, analog calculations, amplifier blocks, active filters, and signal buffering are easily designed with the TLC272 and TLC277. The devices also exhibit low voltage single-supply operation, making them ideally suited for remote and inaccessible battery-powered applications. The common-mode input voltage range includes the negative rail. A wide range of packaging options is available, including small-outline and chip carrier versions for high-density system applications. The device inputs and outputs are designed to withstand 100-mA surge currents without sustaining latch-up. The TLC272 and TLC277 incorporate internal ESD-protection circuits that prevent functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2; however, care should be exercised in handling these devices as exposure to ESD may result in the degradation of the device parametric performance. The C-suffix devices are characterized for operation from 0C to 70C. The I-suffix devices are characterized for operation from 40C to 85C. The M-suffix devices are characterized for operation over the full military temperature range of 55C to 125C.

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

equivalent schematic (each amplifier)

VDD P3 P4 R6

R1 IN P1 IN +

R2

N5 P5 P6

P2 R5 C1 OUT N3 N1 R3 N2 D1 R4 D2 N6 R7 N7

N4

GND

TLC272Y chip information

This chip, when properly assembled, displays characteristics similar to the TLC272C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS VDD (8) + + 60 (4) GND CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 4 MINIMUM TJmax = 150C TOLERANCES ARE 10%. ALL DIMENSIONS ARE IN MILS. 73 PIN (4) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. (5) (6) 2IN + 2IN (1) 1OUT

1IN + 1IN 2OUT

(3) (2) (7)

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD Input voltage range, VI (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to VDD Input current, II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA output current, IO (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA Total current into VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 mA Total current out of GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 mA Duration of short-circuit current at (or below) 25C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40C to 85C M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55C to 125C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, P, or PW package . . . . . . . . . . . . 260C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package . . . . . . . . . . . . . . . . . . . . 300C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to network ground. 2. Differential voltages are at IN+ with respect to IN . 3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded (see application section). DISSIPATION RATING TABLE PACKAGE D FK JG P PW TA 25C POWER RATING 725 mW 1375 mW 1050 mW 1000 mW 525 mW DERATING FACTOR ABOVE TA = 25C 5.8 mW/C 11 mW/C 8.4 mW/C 8.0 mW/C 4.2 mW/C TA = 70C POWER RATING 464 mW 880 mW 672 mW 640 mW 336 mW TA = 85C POWER RATING 377 mW 715 mW 546 mW 520 mW N/A TA = 125C POWER RATING N/A 275 mW 210 mW N/A N/A

recommended operating conditions

C SUFFIX MIN Supply voltage, VDD Common-mode Common mode input voltage VIC voltage, Operating free-air temperature, TA VDD = 5 V VDD = 10 V 3 0.2 0.2 0 MAX 16 3.5 8.5 70 I SUFFIX MIN 4 0.2 0.2 40 MAX 16 3.5 8.5 85 M SUFFIX MIN 4 0 0 55 MAX 16 3.5 8.5 125 V C UNIT V

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)

PARAMETER TEST CONDITIONS VO = 1.4 V, RS = 50 , VO = 1.4 V, RS = 50 , VO = 1.4 V, RS = 50 , VO = 1.4 V, RS = 50 , VIC = 0, RL = 10 k VIC = 0, RL = 10 k VIC = 0, RL = 10 k VIC = 0, RL = 10 k TA 25C Full range 25C Full range 25C Full range 25C Full range 25C to 70C 25C IIO IIB Input offset current (see Note 4) VO = 2.5 V, 25V Input bias current (see Note 4) VIC = 2.5 V 25 70C 25C 70C 25C VICR Common mode input Common-mode in ut voltage range (see Note 5) Full range 25C VOH High-level out ut voltage High level output VID = 100 mV, RL = 10 k 0C 70C 25C VOL Low level output Low-level out ut voltage VID = 100 mV, 100 IOL = 0 0C 70C 25C AVD Large signal Large-signal differential voltage am lification amplification VO = 0.25 V to 2 V, RL = 10 k 0C 70C 25C CMRR Common mode Common-mode rejection ratio VIC = VICRmin 0C 70C 25C kSVR Supply-voltage rejection ratio S l lt j ti ti (VDD /VIO) VDD = 5 V to 10 V, VO = 1.4 V 0C 70C 25C IDD Supply current ( (two amplifiers) y ) VO = 2.5 V, 25V No load VIC = 2.5 V, 25V 0C 70C 5 4 4 65 60 60 65 60 60 0.2 to 4 0.2 to 3.5 3.2 3 3 3.8 3.8 3.8 0 0 0 23 27 20 80 84 85 95 94 96 1.4 1.6 1.2 3.2 3.6 2.6 mA dB dB V/mV 50 50 50 mV V 1.8 0.1 7 0.6 40 0.3 to 4.2 60 300 60 600 pA pA 200 230 0.9 TLC272C, TLC272AC, TLC272BC, TLC277C MIN TLC272C TLC272AC VIO Input offset voltage TLC272BC TLC277C TYP 1.1 MAX 10 12 5 6.5 2000 3000 500 1500 V/C V V mV UNIT

VIO

Temperature coefficient of input offset voltage

Full range is 0C to 70C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually.

POST OFFICE BOX 655303

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)

PARAMETER TEST CONDITIONS VO = 1.4 V, RS = 50 , VO = 1.4 V, RS = 50 , VO = 1.4 V, RS = 50 , VO = 1.4 V, RS = 50 , VIC = 0, RL = 10 k VIC = 0, RL = 10 k VIC = 0, RL = 10 k VIC = 0, RL = 10 k TA 25C Full range 25C Full range 25C Full range 25C Full range 25C to 70C 25C IIO IIB Input offset current (see Note 4) VO = 5 V, V Input bias current (see Note 4) VIC = 5 V 70C 25C 70C 25C VICR Common mode input Common-mode in ut voltage range (see Note 5) Full range 25C VOH High-level out ut voltage High level output VID = 100 mV, RL = 10 k 0C 70C 25C VOL Low level output Low-level out ut voltage VID = 100 mV, 100 IOL = 0 0C 70C 25C AVD Large signal Large-signal differential voltage am lification amplification VO = 1 V to 6 V, RL = 10 k 0C 70C 25C CMRR Common mode Common-mode rejection ratio VIC = VICRmin 0C 70C 25C kSVR Supply-voltage rejection ratio S l lt j ti ti (VDD /VIO) VDD = 5 V to 10 V, VO = 1.4 V 0C 70C 25C IDD Supply current ( (two amplifiers) y ) VO = 5 V, V No load VIC = 5 V, V 0C 70C 10 7.5 7.5 65 60 60 65 60 60 0.2 to 9 0.2 to 8.5 8 7.8 7.8 8.5 8.5 8.4 0 0 0 36 42 32 85 88 88 95 94 96 1.9 2.3 1.6 4 4.4 3.4 mA dB dB V/mV 50 50 50 mV V 2 0.1 7 0.7 50 0.3 to 9.2 60 300 60 600 pA pA 250 290 0.9 TLC272C, TLC272AC, TLC272BC, TLC277C MIN TLC272C TLC272AC VIO Input offset voltage TLC272BC TLC277C TYP 1.1 MAX 10 12 5 6.5 2000 3000 800 1900 V/C V V mV UNIT

VIO

Temperature coefficient of input offset voltage

Full range is 0C to 70C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually.

POST OFFICE BOX 655303

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)

PARAMETER TEST CONDITIONS VO = 1.4 V, RS = 50 , VO = 1.4 V, RS = 50 , VO = 1.4 V, RS = 50 , VO = 1.4 V, RS = 50 , VIC = 0, RL = 10 k VIC = 0, RL = 10 k VIC = 0, RL = 10 k VIC = 0, RL = 10 k TA 25C Full range 25C Full range 25C Full range 25C Full range 25C to 85C 25C IIO IIB Input offset current (see Note 4) VO = 2.5 V, 25V Input bias current (see Note 4) VIC = 2.5 V 25 85C 25C 85C 25C VICR Common mode input Common-mode in ut voltage range (see Note 5) Full range 25C VOH High level output High-level out ut voltage VID = 100 mV, RL = 10 k 40C 85C 25C VOL Low level output Low-level out ut voltage VID = 100 mV, 100 IOL = 0 40C 85C 25C AVD Large-signal differential voltage amplification L i l diff ti l lt lifi ti VO = 1 V to 6 V, RL = 10 k 40C 85C 25C CMRR Common mode Common-mode rejection ratio VIC = VICRmin 40C 85C 25C kSVR S l lt j ti ti Supply-voltage rejection ratio (VDD /VIO) VDD = 5 V to 10 V, VO = 1.4 V 40C 85C 25C IDD Supply current ( y (two amplifiers) ) VO = 2.5 V, 25V No load VIC = 2.5 V, 25V 40C 5 3.5 3.5 65 60 60 65 60 60 0.2 to 4 0.2 to 3.5 3.2 3 3 3.8 3.8 3.8 0 0 0 23 32 19 80 81 86 95 92 96 1.4 1.9 3.2 4.4 2.4 mA dB dB V/mV 50 50 50 mV V 1.8 0.1 24 0.6 200 0.3 to 4.2 60 15 60 35 pA pA 200 230 0.9 TLC272I, TLC272AI, TLC272BI, TLC277I MIN TLC272I TLC272AI VIO Input offset voltage TLC272BI TLC277I TYP 1.1 MAX 10 13 5 7 2000 3500 500 2000 V/C V V mV UNIT

VIO

Temperature coefficient of input offset voltage

1.1 85C Full range is 40C to 85C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually.

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)

PARAMETER TEST CONDITIONS VO = 1.4 V, RS = 50 , VO = 1.4 V, RS = 50 , VO = 1.4 V, RS = 50 , VO = 1.4 V, RS = 50 , VIC = 0, RL = 10 k VIC = 0, RL = 10 k VIC = 0, RL = 10 k VIC = 0, RL = 10 k TA 25C Full range 25C Full range 25C Full range 25C Full range 25C to 85C 25C IIO IIB Input offset current (see Note 4) VO = 5 V, V Input bias current (see Note 4) VIC = 5 V 85C 25C 85C 25C VICR Common mode input Common-mode in ut voltage range (see Note 5) Full range 25C VOH High level output High-level out ut voltage VID = 100 mV, RL = 10 k 40C 85C 25C VOL Low level output Low-level out ut voltage VID = 100 mV, 100 IOL = 0 40C 85C 25C AVD Large-signal differential voltage am lification amplification Large signal VO = 1 V to 6 V, RL = 10 k 40C 85C 25C CMRR Common mode Common-mode rejection ratio VIC = VICRmin 40C 85C 25C kSVR S l lt j ti ti Supply-voltage rejection ratio (VDD /VIO) VDD = 5 V to 10 V, VO = 1.4 V 40C 85C 25C IDD Supply current ( y (two amplifiers) ) VO = 5 V, V No load VIC = 5 V, V 40C 10 7 7 65 60 60 65 60 60 0.2 to 9 0.2 to 8.5 8 7.8 7.8 8.5 8.5 8.5 0 0 0 36 46 31 85 87 88 95 92 96 1.4 2.8 4 5 3.2 mA dB dB V/mV 50 50 50 mV V 2 0.1 26 0.7 220 0.3 to 9.2 60 1000 60 2000 pA pA 250 290 0.9 TLC272I, TLC272AI, TLC272BI, TLC277I MIN TLC272I TLC272AI VIO Input offset voltage TLC272BI TLC277I TYP 1.1 MAX 10 13 5 7 2000 3500 800 2900 V/C V V mV UNIT

VIO

Temperature coefficient of input offset voltage

1.5 85C Full range is 40C to 85C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually.

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)

PARAMETER TLC272M VIO Input offset voltage TLC277M VIO IIO IIB Temperature coefficient of input offset voltage Input offset current (see Note 4) VO = 2.5 V 25 Input bias current (see Note 4) VIC = 2.5 V 25 TEST CONDITIONS VO = 1.4 V, RS = 50 , VO = 1.4 V, RS = 50 , VIC = 0, RL = 10 k VIC = 0, RL = 10 k TA 25C Full range 25C Full range 25C to 125C 25C 125C 25C 125C 25C VICR Common mode input Common-mode in ut voltage range (see Note 5) Full range 25C VOH High level output High-level out ut voltage VID = 100 mV, RL = 10 k 55C 125C 25C VOL Low level output Low-level out ut voltage VID = 100 mV, IOL = 0 55C 125C 25C AVD Large signal Large-signal differential voltage am lification amplification VO = 0.25 V to 2 V RL = 10 k 55C 125C 25C CMRR Common mode Common-mode rejection ratio VIC = VICRmin 55C 125C 25C kSVR Supply-voltage rejection ratio S l lt j ti ti (VDD /VIO) VDD = 5 V to 10 V, VO = 1.4 V 55C 125C 25C IDD Supply current ( y (two amplifiers) ) VO = 2.5 V, 25V No load VIC = 2.5 V, 25V 55C 5 3.5 3.5 65 60 60 65 60 60 0 to 4 0 to 3.5 3.2 3 3 3.8 3.8 3.8 0 0 0 23 35 16 80 81 84 95 90 97 1.4 2 3.2 5 2.2 mA dB dB V/mV 50 50 50 mV V 2.1 0.1 1.4 0.6 9 0.3 to 4.2 60 15 60 35 200 TLC272M, TLC277M MIN TYP 1.1 MAX 10 12 500 3750 mV V V V/C pA nA pA nA V UNIT

1 125C Full range is 55C to 125C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually.

POST OFFICE BOX 655303

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)

PARAMETER TLC272M VIO Input offset voltage TLC277M VIO IIO IIB Temperature coefficient of input offset voltage Input offset current (see Note 4) VO = 5 V, V Input bias current (see Note 4) VIC = 5 V TEST CONDITIONS VO = 1.4 V, RS = 50 , VO = 1.4 V, RS = 50 , VIC = 0, RL = 10 k VIC = 0, RL = 10 k TA 25C Full range 25C Full range 25C to 125C 25C 125C 25C 125C 25C VICR Common mode input Common-mode in ut voltage range (see Note 5) Full range 25C VOH High level output High-level out ut voltage VID = 100 mV, RL = 10 k 55C 125C 25C VOL Low level output Low-level out ut voltage VID = 100 mV, IOL = 0 55C 125C 25C AVD Large-signal differential voltage L i l diff ti l lt amplification VO = 1 V to 6 V, RL = 10 k 55C 125C 25C CMRR Common mode Common-mode rejection ratio VIC = VICRmin 55C 125C 25C kSVR S l lt j ti ti Supply-voltage rejection ratio (VDD /VIO) VDD = 5 V to 10 V, VO = 1.4 V 55C 125C 25C IDD Supply current ( y (two amplifiers) ) VO = 5 V, V No load VIC = 5 V, V 55C 125C 10 7 7 65 60 60 65 60 60 0 to 9 0 to 8.5 8 7.8 7.8 8.5 8.5 8.4 0 0 0 36 50 27 85 87 86 95 90 97 1.9 3 1.3 4 6 2.8 mA dB dB V/mV 50 50 50 mV V 2.2 0.1 1.8 0.7 10 0.3 to 9.2 60 15 60 35 250 TLC272M, TLC277M MIN TYP 1.1 MAX 10 12 800 4300 mV V V V/C pA nA pA nA V UNIT

Full range is 55C to 125C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually.

10

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

electrical characteristics, VDD = 5 V, TA = 25C (unless otherwise noted)

PARAMETER VIO Input offset voltage Temperature coefficient of input offset voltage Input offset current (see Note 4) Input bias current (see Note 4) Common-mode input voltage range (see Note 5) High-level output voltage Low-level output voltage Large-signal differential voltage amplification Common-mode rejection ratio Supply-voltage rejection ratio (VDD /VIO) Supply current (two amplifiers) VID = 100 mV, VID = 100 mV, VO = 0.25 V to 2 V VIC = VICRmin VDD = 5 V to 10 V, VO = 2.5 V, No load RL = 10 k IOL = 0 RL = 10 k VO = 1.4 V VIC = 2.5 V, VO = 2.5 V, 25V VIC = 2.5 V 25 0.2 to 4 3.2 5 65 65 TEST CONDITIONS VO = 1.4 V, RS = 50 , VIC = 0, RL = 10 k TLC272Y MIN TYP 1.1 11 1.8 0.1 0.6 0.3 to 4.2 3.8 0 23 80 95 1.4 3.2 50 MAX 10 UNIT mV V/C pA pA V V mV V/mV dB dB mA

VIO
IIO IIB VICR VOH VOL AVD CMRR kSVR IDD

NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually.

electrical characteristics, VDD = 10 V, TA = 25C (unless otherwise noted)

PARAMETER VIO Input offset voltage Temperature coefficient of input offset voltage Input offset current (see Note 4) Input bias current (see Note 4) Common-mode input voltage range (see Note 5) High-level output voltage Low-level output voltage Large-signal differential voltage amplification Common-mode rejection ratio Supply-voltage rejection ratio (VDD /VIO) Supply current (two amplifiers) VID = 100 mV, VID = 100 mV, VO = 1 V to 6 V, VIC = VICRmin VDD = 5 V to 10 V, VO = 5 V, No load RL = 10 k IOL = 0 RL = 10 k VO = 1.4 V VIC = 5 V, VO = 5 V, V VIC = 5 V 0.2 to 9 8 10 65 65 TEST CONDITIONS VO = 1.4 V, RS = 50 , VIC = 0, RL = 10 k TLC272Y MIN TYP 1.1 11 1.8 0.1 0.7 0.3 to 9.2 8.5 0 36 85 95 1.9 4 50 MAX 10 UNIT mV V/C pA pA V V mV V/mV dB dB mA

VIO
IIO IIB VICR VOH VOL AVD CMRR kSVR IDD

NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually.

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11

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

operating characteristics at specified free-air temperature, VDD = 5 V

PARAMETER TEST CONDITIONS TA 25C VIPP = 1 V SR Slew rate at unity gain RL = 10 k, pF, CL = 20 pF See Figure 1 VIPP = 2.5 V f = 1 kHz, See Figure 2 VO = VOH, RL = 10 k, k RS = 20 , 0C 70C 25C 0C 70C Vn Equivalent input noise voltage 25C 25C BOM Maximum out ut swing bandwidth output-swing CL = 20 pF, F See Figure 1 0C 70C 25C B1 Unity gain Unity-gain bandwidth VI = 10 mV, V See Figure 3 CL = 20 pF, F 0C 70C 25C m Phase margin g VI = 10 mV, V CL = 20 pF pF, f = B1, See Figure 3 0C 70C TLC272C, TLC272AC, TLC272BC, TLC277C MIN TYP 3.6 4 3 2.9 3.1 2.5 25 320 340 260 1.7 2 1.3 46 47 43 MHz kHz nV/Hz V/s V/ s MAX UNIT

operating characteristics at specified free-air temperature, VDD = 10 V

PARAMETER TEST CONDITIONS TA 25C VIPP = 1 V SR Slew rate at unity gain RL = 10 k, pF, CL = 20 pF See Figure 1 VIPP = 5.5 V f = 1 kHz, See Figure 2 VO = VOH, RL = 10 k, k RS = 20 , 0C 70C 25C 0C 70C Vn Equivalent input noise voltage 25C 25C BOM Maximum out ut swing bandwidth output-swing CL = 20 pF, F See Figure 1 0C 70C 25C B1 Unity gain Unity-gain bandwidth VI = 10 mV, V See Figure 3 CL = 20 pF, F 0C 70C 25C m Phase margin g VI = 10 mV, V pF, CL = 20 pF f = B1, See Figure 3 0C 70C TLC272C, TLC272AC, TLC272BC, TLC277C MIN TYP 5.3 5.9 4.3 4.6 5.1 3.8 25 200 220 140 2.2 2.5 1.8 49 50 46 MHz kHz nV/Hz V/s V/ s MAX UNIT

12

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

operating characteristics at specified free-air temperature, VDD = 5 V

PARAMETER TEST CONDITIONS TA 25C VIPP = 1 V SR Slew rate at unity gain RL = 10 k, pF, CL = 20 pF See Figure 1 VIPP = 2.5 V f = 1 kHz, See Figure 2 VO = VOH, RL = 10 k, k RS = 20 , 40C 85C 25C 40C 85C Vn Equivalent input noise voltage 25C 25C BOM Maximum out ut swing bandwidth output-swing CL = 20 pF, F See Figure 1 40C 85C 25C B1 Unity gain Unity-gain bandwidth VI = 10 mV, V See Figure 3 CL = 20 pF, F 40C 85C 25C m Phase margin g VI = 10 mV, V CL = 20 pF pF, f = B1, See Figure 3 40C 85C TLC272I, TLC272AI, TLC272BI, TLC277I MIN TYP 3.6 4.5 2.8 2.9 3.5 2.3 25 320 380 250 1.7 2.6 1.2 46 49 43 MHz kHz nV/Hz V/s V/ s MAX UNIT

operating characteristics at specified free-air temperature, VDD = 10 V

PARAMETER TEST CONDITIONS TA 25C VIPP = 1 V SR Slew rate at unity gain RL = 10 k, pF, CL = 20 pF See Figure 1 VIPP = 5.5 V f = 1 kHz, See Figure 2 VO = VOH, RL = 10 k, k RS = 20 , 40C 85C 25C 40C 85C Vn Equivalent input noise voltage 25C 25C BOM Maximum out ut swing bandwidth output-swing CL = 20 pF, F See Figure 1 40C 85C 25C B1 Unity gain Unity-gain bandwidth VI = 10 mV, V See Figure 3 CL = 20 pF, F 40C 85C 25C m Phase margin g VI = 10 mV, V pF, CL = 20 pF f = B1, See Figure 3 40C 85C TLC272I, TLC272AI, TLC272BI, TLC277I MIN TYP 5.3 6.8 4 4.6 5.8 3.5 25 200 260 130 2.2 3.1 1.7 49 52 46 MHz kHz nV/Hz V/s V/ s MAX UNIT

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

operating characteristics at specified free-air temperature, VDD = 5 V

PARAMETER TEST CONDITIONS TA 25C VIPP = 1 V SR Slew rate at unity gain RL = 10 k, pF, CL = 20 pF See Figure 1 VIPP = 2.5 V f = 1 kHz, See Figure 2 VO = VOH, RL = 10 k, k RS = 20 , 55C 125C 25C 55C 125C Vn Equivalent input noise voltage 25C 25C BOM Maximum out ut swing bandwidth output-swing CL = 20 pF, F See Figure 1 55C 125C 25C B1 Unity gain Unity-gain bandwidth VI = 10 mV, V See Figure 3 CL = 20 pF, F 55C 125C 25C m Phase margin g VI = 10 mV, V pF, CL = 20 pF f = B1, See Figure 3 55C 125C TLC272M, TLC277M MIN TYP 3.6 4.7 2.3 2.9 3.7 2 25 320 400 230 1.7 2.9 1.1 46 49 41 MHz kHz nV/Hz V/s V/ s MAX UNIT

operating characteristics at specified free-air temperature, VDD = 10 V

PARAMETER TEST CONDITIONS TA 25C VIPP = 1 V SR Slew rate at unity gain RL = 10 k, pF, CL = 20 pF See Figure 1 VIPP = 5.5 V f = 1 kHz, See Figure 2 VO = VOH, RL = 10 k, k RS = 20 , 55C 125C 25C 55C 125C Vn Equivalent input noise voltage 25C 25C BOM Maximum out ut swing bandwidth output-swing CL = 20 pF, F See Figure 1 55C 125C 25C B1 Unity gain Unity-gain bandwidth VI = 10 mV, V See Figure 3 CL = 20 pF, F 55C 125C 25C m Phase margin g VI = 10 mV, V pF, CL = 20 pF f = B1, See Figure 3 55C 125C TLC272M, TLC277M MIN TYP 5.3 7.1 3.1 4.6 6.1 2.7 25 200 280 110 2.2 3.4 1.6 49 52 44 MHz kHz nV/Hz V/s V/ s MAX UNIT

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

operating characteristics, VDD = 5 V, TA = 25C

PARAMETER SR Vn BOM B1 m Slew rate at unity gain Equivalent input noise voltage Maximum output-swing bandwidth Unity-gain bandwidth Phase margin TEST CONDITIONS RL = 10 k, See Figure 1 f = 1 kHz, VO = VOH, See Figure 1 VI = 10 mV, VI = 10 mV, See Figure 3 CL = 20 pF, F, RS = 20 , CL = 20 pF, CL = 20 pF, f = B1, VIPP = 1 V VIPP = 2.5 V See Figure 2 RL = 10 k, See Figure 3 CL = 20 pF, TLC272Y MIN TYP 3.6 2.9 25 320 1.7 46 V/s V/ s nV/Hz kHz MHz MAX UNIT

operating characteristics, VDD = 10 V, TA = 25C

PARAMETER SR Vn BOM B1 m Slew rate at unity gain Equivalent input noise voltage Maximum output-swing bandwidth Unity-gain bandwidth Phase margin TEST CONDITIONS RL = 10 k, See Figure 1 f = 1 kHz, VO = VOH, See Figure 1 VI = 10 mV, VI = 10 mV, See Figure 3 CL = 20 pF, F, RS = 20 , CL = 20 pF, CL = 20 pF, f = B1, VIPP = 1 V VIPP = 5.5 V See Figure 2 RL = 10 k, See Figure 3 CL = 20 pF, TLC272Y MIN TYP 5.3 4.6 25 200 2.2 49 V/ s V/s nV/Hz kHz MHz MAX UNIT

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

PARAMETER MEASUREMENT INFORMATION single-supply versus split-supply test circuits

Because the TLC272 and TLC277 are optimized for single-supply operation, circuit configurations used for the various tests often present some inconvenience since the input signal, in many cases, must be offset from ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to the negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either circuit gives the same result.
VDD VO CL RL VI + + VI CL RL VO VDD (a) SINGLE SUPPLY (b) SPLIT SUPPLY 2 k VDD VO 20 + + 20 1/2 VDD 20 (a) SINGLE SUPPLY VDD +

Figure 1. Unity-Gain Amplifier

2 k VDD + VO 20 VDD (b) SPLIT SUPPLY

Figure 2. Noise-Test Circuit

10 k 100 VI 1/2 VDD VDD VI VO CL VDD (a) SINGLE SUPPLY (b) SPLIT SUPPLY + + 100 10 k VDD +

VO CL

Figure 3. Gain-of-100 Inverting Amplifier

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

PARAMETER MEASUREMENT INFORMATION input bias current

Because of the high input impedance of the TLC272 and TLC277 operational amplifiers, attempts to measure the input bias current can result in erroneous readings. The bias current at normal room ambient temperature is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions are offered to avoid erroneous measurements: 1. Isolate the device from other potential leakage sources. Use a grounded shield around and between the device inputs (see Figure 4). Leakages that would otherwise flow to the inputs are shunted away. 2. Compensate for the leakage of the test socket by actually performing an input bias current test (using a picoammeter) with no device in the test socket. The actual input bias current can then be calculated by subtracting the open-socket leakage readings from the readings obtained with a device in the test socket. One word of caution: many automatic testers as well as some bench-top operational amplifier testers use the servo-loop technique with a resistor in series with the device input to measure the input bias current (the voltage drop across the series resistor is measured and the bias current is calculated). This method requires that a device be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is not feasible using this method.
8 5

V = VIC

Figure 4. Isolation Metal Around Device Inputs (JG and P packages)

low-level output voltage

To obtain low-supply-voltage operation, some compromise was necessary in the input stage. This compromise results in the device low-level output being dependent on the common-mode input voltage level as well as the differential input voltage level. When attempting to correlate low-level output readings with those quoted in the electrical specifications, these two conditions should be observed. If conditions other than these are to be used, please refer to Figures 14 through 19 in the Typical Characteristics of this data sheet.

input offset voltage temperature coefficient

Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. This parameter is actually a calculation using input offset voltage measurements obtained at two different temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device and the test socket. This moisture results in leakage and contact resistance, which can cause erroneous input offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the moisture also covers the isolation metal itself, thereby rendering it useless. It is suggested that these measurements be performed at temperatures above freezing to minimize error.

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

PARAMETER MEASUREMENT INFORMATION full-power response

Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is generally measured by monitoring the distortion level of the output while increasing the frequency of a sinusoidal input signal until the maximum frequency is found above which the output contains significant distortion. The full-peak response is defined as the maximum output frequency, without regard to distortion, above which full peak-to-peak output swing cannot be maintained. Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified in this data sheet and is measured using the circuit of Figure 1. The initial setup involves the use of a sinusoidal input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same amplitude. The frequency is then increased until the maximum peak-to-peak output can no longer be maintained (Figure 5). A square wave is used to allow a more accurate determination of the point at which the maximum peak-to-peak output is reached.

(a) f = 1 kHz

(b) BOM > f > 1 kHz

(c) f = BOM

(d) f > BOM

Figure 5. Full-Power-Response Output Signal

test time
Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume, short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET devices and require longer test times than their bipolar and BiFET counterparts. The problem becomes more pronounced with reduced supply levels and lower temperatures.

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE VIO VIO VOH Input offset voltage Temperature coefficient of input offset voltage High level output High-level out ut voltage Distribution Distribution vs High-level out ut current output vs Su ly voltage Supply vs Free-air temperature vs Common-mode in ut voltage input vs Differential input voltage in ut vs Free air tem erature Free-air temperature vs Low-level output current vs Su ly voltage Supply vs Free air tem erature Free-air temperature vs Frequency vs Free-air temperature vs Free-air temperature vs Supply voltage vs Su ly voltage Supply vs Free-air temperature vs Su ly voltage Supply vs Free-air temperature vs Free-air temperature vs Frequency vs Free air tem erature Free-air temperature vs Supply voltage vs Su ly voltage Supply vs Free air tem erature Free-air temperature vs Load capacitance vs Frequency vs Frequency 6, 7 8, 9 10, 11 12 13 14, 15 16 17 18, 19 20 21 32, 33 22 22 23 24 25 26 27 28 29 30 31 34 35 36 37 32, 33

VOL

Low-level Low level output voltage

AVD IIB IIO VIC IDD SR

Large-signal differential voltage am lification amplification Large signal Input bias current Input offset current Common-mode input voltage Supply current Slew rate Normalized slew rate

VO(PP) B1 m Vn

Maximum peak-to-peak output voltage Unity-gain Unity gain bandwidth

Phase margin Equivalent input noise voltage Phase shift

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC272 INPUT OFFSET VOLTAGE
60 60 753 Amplifiers Tested From 6 Wafer Lots VDD = 5 V TA = 25C P Package

DISTRIBUTION OF TLC272 INPUT OFFSET VOLTAGE

50 Percentage of Units %

50 Percentage of Units %

40

40

30

30

20

20

10

10

0 5

0 4 3 2 1 0 1 2 3 VIO Input Offset Voltage mV 4 5 5 4 3 2 1 0 1 2 3 VIO Input Offset Voltage mV 4 5

Figure 6
DISTRIBUTION OF TLC272 AND TLC277 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT
60 60 324 Amplifiers Tested From 8 Wafer Lots VDD = 5 V TA = 25C to 125C P Package Outliers: (1) 20.5 V/C

50 Percentage of Units %

50 Percentage of Units %

40

40

30

30

20

20

10

10

0 0 2 4 6 8 10 8 6 4 2 VIO Temperature Coefficient V/C

10

0 2 4 6 8 10 8 6 4 2 0 VIO Temperature Coefficient V/C

Figure 8

Figure 9

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753 Amplifiers Tested From 6 Wafer Lots VDD = 10 V TA = 25C P Package

Figure 7
DISTRIBUTION OF TLC272 AND TLC277 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT
324 Amplifiers Tested From 8 Wafer Lots VDD = 5 V TA = 25C to 125C P Package Outliers: (1) 21.2 V/C

10

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
5 VOH High-Level Output Voltage V VOH VID = 100 mV TA = 25C See Note A 16 VOH High-Level Output Voltage V VOH 14 VDD = 16 V 12 10 8 6 4 2 0 VID = 100 mV TA = 25C

HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT

3 VDD = 4 V 2 VDD = 3 V

VDD = 5 V

VDD = 10 V

0 0 2 4 6 8 IOH High-Level Output Current mA 10

NOTE A: The 3-V curve only applies to the C version.

Figure 10
HIGH-LEVEL OUTPUT VOLTAGE vs SUPPLY VOLTAGE
16 VOH High-Level Output Voltage V VOH VOH High-Level Output Voltage V VOH 14 12 10 8 6 4 2 0 0 2 4 6 8 10 12 VDD Supply Voltage V 14 16 VDD 1.6

Figure 12

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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5 10 15 20 25 30 35 40 IOH High-Level Output Current mA

Figure 11
HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE
IOH = 5 mA VID = 100 mA VDD = 5 V VDD 1.8 VDD 1.9 VDD 2 VDD = 10 V VDD 2.1 VDD 2.2 VDD 2.3 VDD 2.4 75

VDD 1.7

50

25 0 20 50 75 100 TA Free-Air Temperature C

125

Figure 13

21

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE vs COMMON-MODE INPUT VOLTAGE
700 VOL Low-Level Output Voltage mV VOL VOL Low-Level Output Voltage mV VOL 650 600 550 VID = 100 mV 500 450 400 VID = 1 V 350 VDD = 5 V IOL = 5 mA TA = 25C 500 VDD = 10 V IOL = 5 mA 450 TA = 25C

LOW-LEVEL OUTPUT VOLTAGE vs COMMON-MODE INPUT VOLTAGE

400 VID = 100 mV 350 VID = 1 V VID = 2.5 V

300 0 0.5 1 1.5 2 2.5 3 3.5 VIC Common-Mode Input Voltage V 4

Figure 14
LOW-LEVEL OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE
800 700 600 500 VDD = 5 V 400 300 VDD = 10 V 200 100 0 IOL = 5 mA VIC = |VID/2| TA = 25C 900 VOL VOL Low-Level Output Voltage mV 800 700 600 500 400

VOL Low-Level Output Voltage mV VOL

2 3 4 5 6 7 8 9 10 VID Differential Input Voltage V

Figure 16

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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300

250

2 4 6 8 3 5 7 9 VIC Common-Mode Input Voltage V

10

Figure 15
LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE
IOL = 5 mA VID = 1 V VIC = 0.5 V VDD = 5 V

VDD = 10 V 300 200 100 0 75

50

25 0 25 50 75 100 TA Free-Air Temperature C

125

Figure 17

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
1.0 0.9 VOL Low-Level Output Voltage V VOL 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 1 2 3 4 5 6 7 IOL Low-Level Output Current mA 8 3.0

LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT

VOL VOL Low-Level Output Voltage V

2.5

VDD = 5 V VDD = 4 V

2.0

VDD = 3 V

1.5

1.0

0.5

0 0 5 10 15 20 25 IOL Low-Level Output Current mA 30

NOTE A: The 3-V curve only applies to the C version.

Figure 18
LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs SUPPLY VOLTAGE
60 RL = 10 k AVD Large-Signal Differential AVD Voltage Amplification V/mV AVD Large-Signal Differential AVD Voltage Amplification V/mV TA = 55C 50 45

40

30 TA = 25C TA = 85C

20

10

0 0 2

4 6 8 10 12 VDD Supply Voltage V

Figure 20

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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TA = 0C

40 35 30 25 20 15 10 5 0 75 50

TA = 125C

14

16

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TA = 25C

VID = 1 V VIC = 0.5 V TA = 25C See Note A

VID = 1 V VIC = 0.5 V

VDD = 16 V

VDD = 10 V

Figure 19
LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE

RL = 10 k VDD = 10 V

VDD = 5 V

25 0 25 50 75 100 TA Free-Air Temperature C

125

Figure 21

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

TYPICAL CHARACTERISTICS
INPUT BIAS CURRENT AND INPUT OFFSET CURRENT vs FREE-AIR TEMPERATURE
I IB and I IO Input Bias and Offset Currents pA 10000 VIC Common-Mode Input Voltage V VDD = 10 V VIC = 5 V See Note A 1000 16 14 12 10 8 6 4 2 0 0 2 4 6 8 10 12 VDD Supply Voltage V 14 16 TA = 25C

COMMON-MODE INPUT VOLTAGE POSITIVE LIMIT vs SUPPLY VOLTAGE

100

10

0.1

45 55 65 75 85 95 105 115 125 TA Free-Air Temperature C NOTE A: The typical values of input bias current and input offset current below 5 pA were determined mathematically.

25

35

Figure 22
SUPPLY CURRENT vs SUPPLY VOLTAGE
5 4.5 I DD Supply Current mA 4 3.5 TA = 25C VO = VDD/2 No Load TA = 55C I DD Supply Current mA 3 2.5 2 1.5 4 3.5 VO = VDD/2 No Load

2.5 2 1.5 1 0.5 0 0

4 6 8 10 12 VDD Supply Voltage V

Figure 24

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

24

IIO TA = 0C TA = 70C TA = 125C 14 16
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IIB

Figure 23
SUPPLY CURRENT vs FREE-AIR TEMPERATURE

VDD = 10 V

VDD = 5 V 1 0.5 0 75

50

25 0 25 50 75 100 TA Free-Air Temperature C

125

Figure 25

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

TYPICAL CHARACTERISTICS
SLEW RATE vs SUPPLY VOLTAGE
8 7 6 5 4 3 2 1 0 0 2 4 6 8 10 12 VDD Supply Voltage V 14 16 AV = 1 VIPP = 1 V RL = 10 k CL = 20 pF TA = 25C See Figure 1 8 7 6 SR Slew Rate V/ s 5 4 3 2 1 0 75 VDD = 5 V VIPP = 1 V VDD = 5 V VIPP = 2.5 V 50 25 0 25 50 75 100 TA Free-Air Temperature C 125 VDD = 10 V VIPP = 1 V VDD = 10 V VIPP = 5.5 V AV = 1 RL = 10 k CL = 20 pF See Figure 1

SLEW RATE vs FREE-AIR TEMPERATURE

SR Slew Rate V/ s

Figure 26
NORMALIZED SLEW RATE vs FREE-AIR TEMPERATURE
1.5 1.4 1.3 Normalized Slew Rate 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 75 50 25 0 25 50 75 100 125 VDD = 5 V VDD = 10 V AV = 1 VIPP = 1 V RL = 10 k CL = 20 pF VO(PP) Maximum Peak-to-Peak Output Voltage V 10 9 8 7 6 5 4 3 2 1 0 10

Figure 27
MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY
VDD = 10 V

TA = 125C TA = 25C TA = 55C

VDD = 5 V

RL = 10 k See Figure 1

100

1000

10000

TA Free-Air Temperature C

f Frequency kHz

Figure 28

Figure 29

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
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TYPICAL CHARACTERISTICS
UNITY-GAIN BANDWIDTH vs FREE-AIR TEMPERATURE
3.0 VDD = 5 V VI = 10 mV CL = 20 pF See Figure 3 2.5 VI = 10 mV CL = 20 pF TA = 25C See Figure 3 2.0

UNITY-GAIN BANDWIDTH vs SUPPLY VOLTAGE

B1 Unity-Gain Bandwidth MHz

2.5

2.0

B1 Unity-Gain Bandwidth MHz

1.5

1.5

1.0 75

1.0 50 25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16 TA Free-Air Temperature C VDD Supply Voltage V

Figure 30

Figure 31
LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY
107 10 6 VDD = 5 V RL = 10 k TA = 25C 0 30 60 90 Phase Shift 101 1 0.1 10 120 150 180 100 1k 10 k 100 k 1M 10 M f Frequency Hz Phase Shift AVD 10 3 10 2

AVD Large-Signal Differential AVD Voltage Amplification

10 5 10 4

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

26

Figure 32

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TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY
10 7 10 6 AVD Large-Signal Differential AVD Voltage Amplification 10 5 10 4 AVD 10 3 10 2 Phase Shift 101 1 0.1 10 100 1k 10 k 100 k 1M f Frequency Hz 120 150 180 10 M 60 90 VDD = 10 V RL = 10 k TA = 25C 0 30

Figure 33

PHASE MARGIN vs SUPPLY VOLTAGE

53 52 48 51 m Phase Margin m 50 49 48 47 46 45 0 2 4 6 8 10 12 14 16 VDD Supply Voltage V VI = 10 mV CL = 20 pF TA = 25C See Figure 3 m Phase Margin m 50

PHASE MARGIN vs FREE-AIR TEMPERATURE

VDD = 5 V VI = 10 mV CL = 20 pF See Figure 3

46

44

42

40 75

50

25

Phase Shift 0 25

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

50

75

100

125

TA Free-Air Temperature C

Figure 34

Figure 35

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
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TYPICAL CHARACTERISTICS
PHASE MARGIN vs CAPACITIVE LOAD
VDD = 5 V VI = 10 mV TA = 25C See Figure 3 VN Equivalent Input Noise Voltage nV/ Hz Vn 50 400 VDD = 5 V RS = 20 TA = 25C See Figure 2

EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY

45 m Phase Margin m

300

40

200

35

100

30

25 0 10 20 30 40 50 60 70 80 90 100 CL Capacitive Load pF

0 1 10 100 f Frequency Hz 1000

Figure 36

Figure 37

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POST OFFICE BOX 655303

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TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

APPLICATION INFORMATION single-supply operation

While the TLC272 and TLC277 perform well using dual power supplies (also called balanced or split supplies), the design is optimized for single-supply operation. This design includes an input common-mode voltage range that encompasses ground as well as an output voltage range that pulls down to ground. The supply voltage range extends down to 3 V (C-suffix types), thus allowing operation with supply levels commonly available for TTL and HCMOS; however, for maximum dynamic range, 16-V single-supply operation is recommended. Many single-supply applications require that a voltage be applied to one input to establish a reference level that is above ground. A resistive voltage divider is usually sufficient to establish this reference level (see Figure 38). The low input bias current of the TLC272 and TLC277 permits the use of very large resistive values to implement the voltage divider, thus minimizing power consumption. The TLC272 and TLC277 work well in conjunction with digital logic; however, when powering both linear devices and digital logic from the same power supply, the following precautions are recommended: 1. Power the linear devices from separate bypassed supply lines (see Figure 39); otherwise, the linear device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital logic. 2. Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive decoupling is often adequate; however, high-frequency applications may require RC decoupling.
VDD R4 VO V REF + V C 0.01 F Logic (a) COMMON SUPPLY RAILS Logic
POST OFFICE BOX 655303

R1 VI R2

R3 DD R1 ) R3 * V ) R4 ) V REF I R2

VREF R3

Figure 38. Inverting Amplifier With Voltage Reference

OUT

OUT

(b) SEPARATE BYPASSED SUPPLY RAILS (preferred)

Figure 39. Common vs Separate Supply Rails

+ (V

REF

Logic

Logic

Power Supply

Logic

Logic

Power Supply

DALLAS, TEXAS 75265

29

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

APPLICATION INFORMATION input characteristics

The TLC272 and TLC277 are specified with a minimum and a maximum input voltage that, if exceeded at either input, could cause the device to malfunction. Exceeding this specified range is a common problem, especially in single-supply operation. Note that the lower range limit includes the negative rail, while the upper range limit is specified at VDD 1 V at TA = 25C and at VDD 1.5 V at all other temperatures. The use of the polysilicon-gate process and the careful input circuit design gives the TLC272 and TLC277 very good input offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltage drift in CMOS devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus dopant implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate) alleviates the polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude. The offset voltage drift with time has been calculated to be typically 0.1 V/month, including the first month of operation. Because of the extremely high input impedance and resulting low bias current requirements, the TLC272 and TLC277 are well suited for low-level signal processing; however, leakage currents on printed-circuit boards and sockets can easily exceed bias current requirements and cause a degradation in device performance. It is good practice to include guard rings around inputs (similar to those of Figure 4 in the Parameter Measurement Information section). These guards should be driven from a low-impedance source at the same voltage level as the common-mode input (see Figure 40). Unused amplifiers should be connected as grounded unity-gain followers to avoid possible oscillation.

noise performance
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage differential amplifier. The low input bias current requirements of the TLC272 and TLC277 result in a very low noise current, which is insignificant in most applications. This feature makes the devices especially favorable over bipolar devices when using values of circuit impedance greater than 50 k, since bipolar devices exhibit greater noise currents.
OUT VI + + (b) INVERTING AMPLIFIER VI OUT +
POST OFFICE BOX 655303

VI

(a) NONINVERTING AMPLIFIER

(c) UNITY-GAIN AMPLIFIER

Figure 40. Guard-Ring Schemes

output characteristics
The output stage of the TLC272 and TLC277 is designed to sink and source relatively high amounts of current (see typical characteristics). If the output is subjected to a short-circuit condition, this high current capability can cause device damage under certain conditions. Output current capability increases with supply voltage. All operating characteristics of the TLC272 and TLC277 are measured using a 20-pF load. The devices can drive higher capacitive loads; however, as output load capacitance increases, the resulting response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation (see Figure 41). In many cases, adding a small amount of resistance in series with the load capacitance alleviates the problem.

30

DALLAS, TEXAS 75265

OUT

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

APPLICATION INFORMATION output characteristics (continued)

(a) CL = 20 pF, RL = NO LOAD

(b) CL = 130 pF, RL = NO LOAD

2.5 V VO VI + CL 2.5 V (c) CL = 150 pF, RL = NO LOAD (d) TEST CIRCUIT TA = 25C f = 1 kHz VIPP = 1 V

Figure 41. Effect of Capacitive Loads and Test Circuit Although the TLC272 and TLC277 possess excellent high-level output voltage and current capability, methods for boosting this capability are available, if needed. The simplest method involves the use of a pullup resistor (RP) connected from the output to the positive supply rail (see Figure 42). There are two disadvantages to the use of this circuit. First, the NMOS pulldown transistor N4 (see equivalent schematic) must sink a comparatively large amount of current. In this circuit, N4 behaves like a linear resistor with an on resistance between approximately 60 and 180 , depending on how hard the operational amplifier input is driven. With very low values of RP, a voltage offset from 0 V at the output occurs. Second, pullup resistor RP acts as a drain load to N4 and the gain of the operational amplifier is reduced at output voltage levels where N5 is not supplying the output current.

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

31

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

APPLICATION INFORMATION output characteristics (continued)

VDD VI RP VO IF R2 R1 IL RL VO +

IP

Rp =

Figure 42. Resistive Pullup to Increase VOH

feedback
Operational amplifier circuits almost always employ feedback, and since feedback is the first prerequisite for oscillation, some caution is appropriate. Most oscillation problems result from driving capacitive loads (discussed previously) and ignoring stray input capacitance. A small-value capacitor connected in parallel with the feedback resistor is an effective remedy (see Figure 43). The value of this capacitor is optimized empirically.

electrostatic discharge protection

The TLC272 and TLC277 incorporate an internal electrostatic discharge (ESD) protection circuit that prevents functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care should be exercised, however, when handling these devices as exposure to ESD may result in the degradation of the device parametric performance. The protection circuit also causes the input bias currents to be temperature dependent and have the characteristics of a reverse-biased diode.

latch-up
Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC272 and TLC277 inputs and outputs were designed to withstand 100-mA surge currents without sustaining latch-up; however, techniques should be used to reduce the chance of latch-up whenever possible. Internal protection diodes should not, by design, be forward biased. Applied input and output voltage should not exceed the supply voltage by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators. Supply transients should be shunted by the use of decoupling capacitors (0.1 F typical) located across the supply rails as close to the device as possible. The current path established if latch-up occurs is usually between the positive supply rail and ground and can be triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of latch-up occurring increases with increasing temperature and supply voltages.

32

Ip = Pullup current required by the operational amplifier (typically 500 A)

VDD VO IF + IL + IP

Figure 43. Compensation for Input Capacitance

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

APPLICATION INFORMATION
10 k 10 k 0.016 F 0.016 F

10 k VI 1/2 TLC272 + N.O. Reset 1/2 TLC272 + 10 k 5V 10 k 1/2 TLC272 + High Pass 5 k Band Pass R = 5 k(3/d-1) (see Note A) NOTE A: d = damping factor, 1/Q Low Pass + 1/2 TLC272 0.5 F Mylar 100 k VO

Figure 44. State-Variable Filter

12 V VI + 1/2 TLC272 H.P. 5082-2835

Figure 45. Positive-Peak Detector

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

33

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

APPLICATION INFORMATION
VI (see Note A) 1.2 k 4.7 k TL431 20 k 0.1 F 1/2 TLC272 + 1 k 15 TIS193 250 F, 25 V TIP31

100 k

0.47 F

+ 10 k VO (see Note B)

47 k 0.01 F 22 k 110

NOTES: A. VI = 3.5 to 15 V B. VO = 2 V, 0 to 1 A

Figure 46. Logic-Array Power Supply

9V 10 k 9V VO (see Note A) 0.1 F C R2 1/2 TLC272 + VO (see Note B) fO + 47 k R3 1 R1 4C(R2) R3 1/2 TLC272 10 k 100 k R1 100 k

[ ]

NOTES: A. VO(PP) = 8 V B. VO(PP) = 4 V

Figure 47. Single-Supply Function Generator

34

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091E OCTOBER 1987 REVISED FEBRUARY 2002

APPLICATION INFORMATION
5V VI + 1/2 TLC277 10 k 100 k

1/2 TLC277 +

1/2 TLC277 VI + +

10 k

95 k

5 V NOTE B: CMRR adjustment must be noninductive.

Figure 48. Low-Power Instrumentation Amplifier

R 10 M VI 2C 540 pF

R 10 M

1/2 TLC272 +

R/2 5 M

C 270 pF

C 270 pF

Figure 49. Single-Supply Twin-T Notch Filter

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

VO 10 k R1,10 k (see Note A) 5V VO

f NOTCH +

1 2pRC

35

PACKAGE OPTION ADDENDUM

www.ti.com

18-Mar-2005

PACKAGING INFORMATION
Orderable Device 5962-89494022A TLC272ACD TLC272ACDR TLC272ACP TLC272ACPE4 TLC272ACPSR TLC272AID TLC272AIDR TLC272AIP TLC272AIPE4 TLC272BCD TLC272BCDR TLC272BCP TLC272BCPE4 TLC272BCPSR TLC272BID TLC272BIDR TLC272BIP TLC272BIPE4 TLC272CD TLC272CDR TLC272CP TLC272CPE4 TLC272CPSR TLC272CPW TLC272CPWLE TLC272CPWR Status (1) OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE Package Type LCCC SOIC SOIC PDIP PDIP SO SOIC SOIC PDIP PDIP SOIC SOIC PDIP PDIP SO SOIC SOIC PDIP PDIP SOIC SOIC PDIP PDIP SO TSSOP TSSOP TSSOP Package Drawing FK D D P P PS D D P P D D P P PS D D P P D D P P PS PW PW PW Pins Package Eco Plan (2) Qty 20 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 2000 75 2500 50 50 2000 75 2500 50 50 75 2500 50 50 2000 75 2500 50 50 75 2500 50 50 2000 150 TBD Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) TBD Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) TBD TBD TBD TBD Lead/Ball Finish Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU MSL Peak Temp (3) Call TI Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-NC-NC-NC Level-NC-NC-NC Level-1-220C-UNLIM Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-NC-NC-NC Level-NC-NC-NC Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-NC-NC-NC Level-NC-NC-NC Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-NC-NC-NC Level-NC-NC-NC Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-NC-NC-NC Level-NC-NC-NC Level-1-220C-UNLIM Level-1-220C-UNLIM Call TI Level-1-220C-UNLIM

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

18-Mar-2005

Orderable Device TLC272CPWRG4 TLC272ID TLC272IDR TLC272IP TLC272IPE4 TLC272IPW TLC272MFKB TLC272MJG TLC272MJGB TLC272P-M TLC277CD TLC277CDR TLC277CP TLC277CPE4 TLC277CPSR TLC277ID TLC277IDR TLC277IP TLC277IPE4 TLC277MFKB TLC277MJG TLC277MJGB
(1)

Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE OBSOLETE OBSOLETE PREVIEW ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE OBSOLETE OBSOLETE

Package Type TSSOP SOIC SOIC PDIP PDIP TSSOP LCCC CDIP CDIP PDIP SOIC SOIC PDIP PDIP SO SOIC SOIC PDIP PDIP LCCC CDIP CDIP

Package Drawing PW D D P P PW FK JG JG P D D P P PS D D P P FK JG JG

Pins Package Eco Plan (2) Qty 8 8 8 8 8 8 20 8 8 8 8 8 8 8 8 8 8 8 8 20 8 8 75 2500 50 50 2000 75 2500 50 50 2000 Green (RoHS & no Sb/Br) 75 2500 50 50 150 Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) TBD TBD TBD TBD Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) TBD TBD Pb-Free (RoHS) Pb-Free (RoHS) TBD TBD TBD

Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI Call TI Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI Call TI Call TI

MSL Peak Temp (3) Level-1-260C-UNLIM Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-NC-NC-NC Level-NC-NC-NC Level-1-220C-UNLIM Call TI Call TI Call TI Level-NA-NA-NA Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-NC-NC-NC Level-NC-NC-NC Level-2-260C-1YEAR/ Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Level-NC-NC-NC Level-NC-NC-NC Call TI Call TI Call TI

The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

18-Mar-2005

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 3

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