Dr.

Andrews Samraj

Machine Architecture 2011/2012 Instruction Set 8085

Objectives of the:
To Study Addressing modes of Intel 8085 microprocessor - Immediate - Register - Direct - Register indirect - Implicit Classification of Instructions of 8085 microprocessor Functional Classification - Data Transfer - Arithmetic - Logical - Branching - Machine Control Classification according to word length - One-word or 1 byte - Two-word or 2 byte - Three-word or 3 byte Assembly language format - label - opcode - operand - comments

Assembler and Cross-Assembler directives ( ORG, END, EQU, DB,DW,DS) Usage of constants in assembly language program (Hexadecimal, Binary, Octal and Decimal constants usage)
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ADDRESSING MODES OF INTEL 8085 MICROPROCESSOR

An instruction is a command to the microprocessor to perform a given task on a specified data. Each instruction has two parts: one is task to be performed, called the operation code (opcode), and the second is the data to be operated on, called the operand. The operand (or data) can be specified in various ways. It may include 8-bit (or 16-bit ) data, an internal register, a memory location, or 8-bit (or 16-bit) address. In some instructions, the operand is implicit. The different techniques by which the address of the data to be operated upon (operand) may be specified are known as addressing modes. In 8085, there are 5 addressing modes. 1. Immediate addressing. 2. Register addressing. 3. Direct addressing. 4. Register Indirect addressing. 5. Implicit addressing Immediate addressing When the operand is specified within the instruction itself, we say that immediate addressing mode has been used. Here one or two bytes within the instruction are used for specifying the data itself. MVI, LXI and ADI are examples of instructions using the immediate addressing mode. Instructions using immediate addressing mode may be 2 or 3 bytes long. Examples: MVI B,35H - Load the immediate data 35H in B reg. uses immediate addressing mode(35H is the immediate operand 2 bytes instruction) LXI H,4567H Load the register pair HL with the 16bit contents of 4567H. (Here 4567 is the immediate operand 3 bytes instruction) Register addressing When the operands for any operation are in the general purpose registers, only the registers need be specified as the address of the operands. Such instructions are said to use the register addressing mode. These are one byte instructions. The registers are specified within the byte containing the operation code. For example,MOV and ADD instructions permit register addressing. Example: MOV B,C - Copy the contents of register C to Register B Here the source operand (data) is in register C and destination operand is in register B. But register name only is mentioned in the instruction.

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Direct addressing Here the address of the operand is explicitly specified within the instruction itself. LDA, STA, IN, OUT instructions are some of the examples, which use direct addressing mode. Example: LDA 4500H Load the accumulator with the contents of the address location 4500H. Here the operand is in the memory location 4500H and address is mentioned in the instruction 3 bytes instruction OUT 45H Transfer the contents of accumulator to the output device with the port address 45 H. Here the operand in accumulator is copied to the buffer having the address 45 H. 2 bytes instruction Register indirect Addressing Here the operand is in memory location. The address of memory locations is stored in register pair and the name of the register pair is mentioned in the instruction. The contents of the specified registers are assumed to be the address of the operand. Here a register pair is specified to contain the 16-bit address of the operand. MOV,ADD, LDAX ,STAX are some examples of instructions using this addressing mode. These instructions occupy 1 byte each Examples: ADD M Add the accumulator contents with memory location contents whose address is in HL register pair- Here M indicates HL register pair. The second operand is in memory location whose address is stored in HL register pair. STAX B Store the accumulator contents with the data stored in memory location whose address is specified in BC register pair. Implicit Addressing There are certain instructions that operate only on one operand. Such instructions assume that the operand is in the accumulator and therefore require no address specification. RLC, RRC, CMA are some examples of instructions using implicit addressing mode. All are 1-byte instructions. RLC Here the operand is in accumulator. It is implicit. It is not explicitly mentioned in the instruction. Rotate the accumulator contents left by one position. CMA Complement the contents of accumulator (1s complement) Here the accumulator is not mentioned in the instruction. It is assumed.

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FUNCTIONAL CLASSIFICATION OF INSTRUCTIONS OF 8085

An instruction is a binary pattern designed inside a microprocessor to perform a specific function. The entire group of instructions, called the instruction set, determines what functions the microprocessor can perform. These instructions can be classified into the following five functional categories: data transfer (copy) operations, arithmetic operations, logical operations, branching operations, and machine-control operations.

DATA TRANSFER (COPY) OPERATIONS

This group of instructions copy data from a location called a source to another location called a destination, without modifying the contents of the source. In technical manuals, the term data transfer is used for this copying function. However, the term transfer is misleading; it creates the impression that the contents of the source are destroyed when, in fact, the contents are retained without any modification. The various types of data transfer (copy) are listed below together with examples of each type: Types 1. Between Registers. Examples 1. Copy the contents of the register B into register D (MOV D,B)

2. Specific data byte to a register or 2. Load register B with the data byte a memory location. 32H. (MVI B,32H) 3. Between a memory location and 3. From a memory location 2000H to a register. register B. (LXI H,2000H MOV B,M)

4. Between an I/O device and the 4.From an input keyboard (43H) to the accumulator. accumulator. ( IN 43H )

ARITHMETIC OPERATIONS
Addition - Any 8-bit number, or the contents of a register or the contents of a memory location can be added to the contents of the accumulator and the sum is stored in the accumulator. No two other 8-bit registers can be added directly (e.g., the contents of register B cannot be added directly to the contents of the register C). The instruction DAD is an exception; it adds 16-bit data directly in register pairs.
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Examples:

1. ADI 43H ([Accumulator] + 43H [Accumulator]) 2. ADD B ([A]+[B] [A]) 3. ADD M (A + [[HL]] [A] ) 4. DAD B ( [HL] + [ BC] [HL] )

Subtraction - Any 8-bit number, or the contents of a register, or the contents of a memory location can be subtracted from the contents of the accumulator and the results stored in the accumulator. The subtraction is performed in 2's compliment, and the results if negative, are expressed in 2's complement. No two other registers can be subtracted directly. Examples: 1. SUI 67H ( [A] 67H [A] ) 2. SUB C ( [A] [C] [A] ) 3. SUB M ( [A] [[HL]] [A] ) Increment/Decrement - The 8-bit contents of a register or a memory location can be incremented or decrement by 1. Similarly, the 16-bit contents of a register pair (such as BC) can be incremented or decrement by 1. These increment and decrement operations differ from addition and subtraction in an important way; i.e., they can be performed in any one of the registers or in a memory location. Examples: 1. INR D ( [D] + 01 H 2. INR M ( [[HL]] + 01H 3. INX D ( [DE] + 01H [D]) [[HL]] ) [DE] )

LOGICAL OPERATIONS
These instructions perform various logical operations with the contents of the accumulator. AND, OR Exclusive-OR - Any 8-bit number, or the contents of a register, or of a memory location can be logically ANDed, Ored, or Exclusive-ORed with the contents of the accumulator. The results are stored in the accumulator. Examples: 1. ANI 78H ( [A] AND 78H [A] ) 2. ORA E ( [A] OR [E] [A] ) 3. XRA M ( [A] XOR [[HL]] [A] )

Rotate- Each bit in the accumulator can be shifted either left or right to the next position through carry or without carry. Examples: RLC Rotate accumulator left by one position. (8 bit) RAR Rotate accumulator right through carry ( 9 bit )

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Compare- Any 8-bit number, or the contents of a register, or a memory location can be compared for equality, greater than, or less than, with the contents of the accumulator. Examples: CPI 45H ( [A] 45H ) According to the result, the flags will be set or reset. CMP B ( [A] [B] ) CMP M ( [A] [[HL]] ) Complement - The contents of the accumulator can be complemented. All 0s are replaced by 1s and all 1s are replaced by 0s. CMA ( [A] [A] )

BRANCHING OPERATIONS
This group of instructions alters the sequence of program execution either conditionally or unconditionally. Jump - Conditional jumps are an important aspect of the decision-making process in the programming. These instructions test for a certain conditions (e.g., Zero or Carry flag) and alter the program sequence when the condition is met. In addition, the instruction set includes an instruction called unconditional jump. Examples: 1. 3070H JMP 4050H Program control is jumped unconditionally to location 4050H from 3072H 2. 3070H JZ 4050H Next instruction is fetched from location 4050 H if zero flag is set. If it is reset, next instruction is fetched from 3073H (normal sequence)

Call, Return, and Restart - These instructions change the sequence of a program either by calling a subroutine or returning from a subroutine. The conditional Call and Return instructions also can test condition flags. Examples: CALL 6030 H, RET, CC 6030H, RZ

MACHINE CONTROL OPERATIONS

These instructions control machine functions such as Halt, Interrupt, or do nothing. Examples: HLT, INT 5, NOP

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CLASSIFICATION OF INSTRUCTIONS OF 8085 ACCORDING TO WORD LENGTH

The 8085 instruction set is classified into the following three groups according to word size: 1. One-word or 1-byte instructions 2. Two-word or 2-byte instructions 3. Three-word or 3-byte instructions In the 8085, "byte" and "word" are synonymous because it is an 8-bit microprocessor. However, instructions are commonly referred to in terms of bytes rather than words. ONE-BYTE INSTRUCTIONS A 1-byte instruction includes the opcode and operand in the same byte. For example: Task Opcode Operand C,A B Binary Code 0100 1111 1000 0000 0010 1111 Hex Code 4FH 80H 2FH

Copy the contents of the accumulator MOV in the register C. Add the contents of register B to the ADD contents of the accumulator. Invert (compliment) each bit in the CMA accumulator.

These instructions are 1-byte instructions performing three different tasks. In the first instruction, both operand registers are specified. In the second instruction, the operand B is specified and the accumulator is assumed. Similarly, in the third instruction, the accumulator is assumed to be the implicit operand. These instructions are stored in 8-bit binary format in memory; each requires one memory location. To understand how the binary code for the instruction is designed, MOV Rd, Rs Rd <-- Rs copies contents of Rs into Rd. Coded as 01 ddd sss where ddd is a code for one of the 7 general purpose registers, which is the destination of the data, sss is the code of the source register. Example: MOV A, B Coded as 01 111 000 = 78H All internal registers of 8085 are identified as follows:
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Code 000 001 010 011 100 101 111 110

Registers Code B 00 C 01 D 10 E 11 H L A Reserved for memory-related operation

Register Pairs BC DE HL SP

TWO-BYTE INSTRUCTIONS In a two-byte instruction, the first byte specifies the operation code and the second byte specifies the operand. Source operand is a data byte immediately following the opcode. For example: Task Opcode Operand A, Data Binary Code
0011 1110

Load an 8-bit MVI data byte in accumulator.

Hex Code 3E

First Byte

DATA

Data

Second Byte

Assume that the data byte is 32H. The assembly language instruction is written as Mnemonics Hex code MVI A, 32H 3E 32H

The instruction would require two memory locations to store in memory. THREE-BYTE INSTRUCTIONS In a three-byte instruction, the first byte specifies the opcode, and the following two bytes specify the 16-bit address. Note that the second byte is the low-order address and the third byte is the high-order address. For example: Task Opcode

Operand

Binary code

Hex Code

Transfer JMP 2085H the C3 First byte 1100 0011 program 1000 0101 sequence 85 Second to memory 0010 0000 location 20 Third Byte 2085H. This instruction would require three memory locations to store in memory.
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ASSEMBLY LANGUAGE FORMAT (FIELDS OF AN INSTRUCTION)

A typical assembly language programming statement is divided into four parts called fields: label, operation code, operand and comments. These fields are separated by delimiters. The assembler statements have a free-field format, which means that any number of blanks can be left between the fields. Example: Label START: Label: A label could be any character string consists of lower and upper case letters (A-Z or a-z), digits (0-9) and the $. The first character of the label must be a letter or a $. Some assemblers place an upper limit on the number of characters in a label. Optional field. But it greatly facilitates specifying jump locations. Opcode: Operation to be performed on the operands. Operand: Data to be operated upon Comments: Optional but generally included for good documentation. Delimiters: Typical delimiters used in assembler statements are Delimiter 1. Colon 2. Space 3. Comma 4. Semicolon Placement After label (optional) Between an opcode and an operand Between two operands Before the beginning of a comment Opcode LXI Operand SP,8000H Comments ; Initialize stack pointer

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ASSEMBLER AND CROSS-ASSEMBLER DIRECTIVES

The assembler directives are the instructions to the assembler concerning the program being assembled; they are also called pseudo instructions or pseudo opcodes. These instructions are neither translated into machine code nor assigned any memory locations in the object file. Some of the important assembler directives for an assembler or a crossassembler are listed and described below: ORG (Origin) Example: ORG 4000H Description: The next block of instructions should be stored in memory locations starting at 4000H END

Example: END Description: End of Assembly. The HLT instruction suggests the end of a program, but that does not necessarily mean it is the end of the assembly EQU (Equate) Examples: 1. PORT1 EQU 01H Description: The value of the term PORT 1 is equal to 01H. Generally, this means the PORT 1 has the port address 01H. 2. INBUF EQU 2099H Description: The value of the term INBUF is 2099H. This may be the memory location used as Input Buffer. 3. STACK EQU INBUF+1 Description: The equate can be expressed by using the label of another equate. This example defines the stack as next location of INBUF. DB (Define Byte) Example: DATA: DB A2H,9FH Description: Initializes an area byte by byte. Assembled bytes of data are stored in successive memory locations until all values are stored. This is a convenient way of writing a data string. The label is optional. DW (Define Word) Example: DW 4050H Description: Initializes an area two bytes at a time DS (Define Storage) Example: OUTBUF:DS 4 Description: Reserves a specified number of memory locations. In this example, four memory locations are reserved for OUTBUF.
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CONSTANTS IN AN ASSEMBLY LANGUAGE PROGRAM

While writing an assembly language program, we may like to use constants within an instruction or an assembler directive. We assume that constants without any suffix will be treated by the assembler as decimal constants. For example, 234, -19, 45678 and 11101 are all decimal constants. Suffixes B,H, and O are used to indicate that the constant is binary, hexadecimal, and octal respectively. Thus, 45 H and 6AFH are hexadecimal constants. 011B and 1001B are binary constants. 67O and 1101O are octal constants. Note that 1100 may look like a binary constant but, for the assembler, it will be a decimal constant unless it has B as the suffix. We have to be careful in writing hexadecimal constants. A hexadecimal constant must be preceded by a 0 if it starts with any letter A-F. For example, AFH is not a hexadecimal constant. The assembler will treat AFH as a symbol, not as a constant. To force the assembler to treat AFH as a constant, it should be written as 0AFH.

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