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VSA GROUP OF INSTITUTIONS

VSA GROUP OF INSTITUTIONS


VSA SCHOOL OF ENGINEERING SALEM

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

Name: ........

Reg. No. : ................ Semester:

Class: . Subject: .

Sub. Code:

Compiled by Ms.A.Maragathamani, Lect/ECE

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INDEX
EXP. No DATE NAME OF THE EXPERIMENTS PAGE NO. MARKS STAFF SIGN.

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EX.NO: 1 DATE:

SERIES AND SHUNT FEEDBACK AMPLIFIERS

AIM: (i)To design and construct the Voltage Shunt feedback amplifier and to obtain

its frequency response curve for with and without feedback. (ii)To design and construct the Current Series feedback amplifier and to obtain its frequency response curve for with and without feedback.
(i) VOLTAGE SHUNT FEEDBACK AMPLIFIER

APPARATUS REQUIRED:

S.No 1. 2. 3. 4. 5. 6. 7. 8. Transistor Resistor

Components BC107

Range 1

Quantity

600,4K,4.7K,10K 1 (0-30)V 1 1 1 2 1

Function Generator Cathode Ray Oscilloscope Regulated Power Supply Probe Connecting wires Bread Board

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PIN CONFIGURATION:

SYMBOL:

C
B

BC107 E

CIRCUIT DIAGRAM:

(i) Without Feedback


V C C = 1 0 V

R c 4 k

i B C 1 0 7

6 0 0 F G R 2 1 0 k

4 . 7 k C e

C R O

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DESIGN: Given
VCC =10V , I C =1mA , f L = 50 Hz , h fe = 200 , RS = 600 , RL = 4.7 K, RC = 4 K R f = 68 K, R2 =10 K, VBE = 0.7V , I C I E RE = VE V , VE = CC IE 10 VCC .R2 R1 + R2

VCE = VCC / 2, VB = VE +VBE , VB = X CE = RE / 10 , C E = 10 2 f L RE

X C i = hie + (1 + h fe ) RE // RB hie = h fe * re , RB = R1 // R2 Ci = re = 26 mV IE

1 1 , Cf = , X C f = R f / 10 2 f L X C i 2 f L X C f

RC // RL 10 1 Co = 2 f L X C o XCo =

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ii) With Feedback


V C C = 1 0 V

1 R f C f

R c 4 k

6 8 k R s C i B 6 0 0 F G R 2 1 0 k C R e e C 1 0 7 R L 4 . 7 k

C R O

TABULATION:

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With FB S.No. Frequency (Hz) Output Gain = Voltage 20log(Vo/Vi) (Volts) (dB) Frequency (Hz)

With out FB Output Voltage (Volts) Gain = 20log(Vo/Vi) (dB)

(ii)

CURRENT SERIES FEEDBACK AMPLIFIER

APPARATUS REQUIRED:

S.No Components 1. Transistor 2. 3. 4. 5. Resistor Function Generator Cathode Ray Oscilloscope Regulated Power Supply

Range BC107

Quantity 1

600,4.7K,10K 1 (0-30)V 1 1 1

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6. 7. 8.

Probe Connecting wires Bread Board

2 1

PIN CONFIGURATION:

SYMBOL:

C
B

BC107 E

CIRCUIT DIAGRAM:

(i)Without Feedback

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= 1 0 V

R 1 1 0 k

c C o

i B C 1 0 7 R L 4 . 7 k

6 0 0

CRO

G R 2 R e C e

DESIGN: Given

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VCC =10V , I C = 1mA , f L = 50 Hz , h fe = 290 , RS = 600 , RL = 4.7 K R1 =10 K, VBE = 0.7V , I C I E VCE = VCC / 2 re = 26 mV , IE VE = VCC 10 VE IE VB = VE +VBE

hie = h fe * re ,

RE =

VCC = VCE + I C R C +I E RE , VB = VCC .R1 R1 + R2 CE =

X CE = RE / 10 , XCo = RC // RL , 10

1 2 f L X CE 1 2 f L X C o

Co =

X C i = hie + (1 + h fe ) RE // RB RB = R1 // R2 , Ci =

1 2 f L X C i

(ii) With Feedback

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= 1 0 V

R 1 1 0 k

c C o

i B C 1 0 7 R L 4 . 7 k

6 0 0

CRO

G R 2 R e

TABULATION: (ii) CURRENT SERIES FEEDBACK AMPLIFIER With FB Output Gain = Voltage 20log(Vo/Vi) (Volts) (dB) Vi = Volts Without FB Output Gain = Frequenc Voltage 20log(Vo/Vi) y (Hz) (Volts) (dB)

S.No.

Frequenc y (Hz)

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PROCEDURE

1. Connections are given as per the circuit diagram. 2. Apply 10V dc supply to the collector and base of transistors. 3. Set the I/P voltage using Function generator and vary the frequency in desired range. 4. For each frequency note down the corresponding O/P voltage values. 5. Repeat the same procedure for with feedback amplifier circuit. 6. Graphs are plotted as gain versus frequency for the tabulated readings.

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MODEL GRAPH: Y

Gain (dB) Ao 0.707Ao

3dB

With out FB

Ao 0.707Ao
3dB

With FB

X f1 f1 f2 f2 Frequency (Hz)

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RESULT

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VIVA:

1. What is Feedback? What are its types? 2. Which type of FB is used in amplifiers? 3. Give any 4 merits of negative FB? 4. Define desensitivity. 5. What do you meant by Sampling and mixing in the context of FB amplifiers?

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Ex. No: 2 DATE: AIM:

HARTLEY AND COLPITTS OSCILLATORS

(i)To design and construct a Hartley oscillator circuit to generate a sine waveform. (ii) To design and construct a Colpitts oscillator circuit to generate a sine waveform. (i) APPARATUS REQUIRED: S.No Components 1. Transistor 2. 3. 4. 5. 6. 7. 8. 9. Resistor Capacitor Radio Frequency Choke Cathode Ray Oscilloscope Regulated Power Supply Probe Connecting wires Bread Board Range BC548 390,270K 1nF,0.02F,0.1F,47F 30mH (0-30)V Quantity 1 1 1 1 1 1 2 1 HARTLEY OSCILLATOR

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DESIGN:
f = 1 2 LC
f = 30 KHz C = 0.02 F L1 = L2 = L / 2 = ?

L = L1 + L2

PIN CONFIGURATION:

SYMBOL:

C
B

BC548 E

CIRCUIT DIAGRAM:

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= 1

R F C 3 0 m H R 2 C i B 2 4 7 u F C 0 e . 1 u F C o 1 n C 5 4 8 7 b 0 k 2

L C 0 . 0 2 u F 1 2 L

R e 3 9 0

CRO

0 0

PROCEDURE: 1. Connections are given as per the circuit diagram. 2. Switch on the dc power supply and apply 10V as bias voltage. 3. Sine wave output is obtained and the readings are tabulated. 4. Graph is plotted by taking time period along X-axis and voltage along Yaxis.

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(ii) APPARATUS REQUIRED: S.No Components 1. Transistor 2. Resistor 3. 4. 5. 6. 7. 8. Capacitor

COLPITTS OSCILLATOR

Range BC107 2.2K,100K 47K 0.02F, 0.1F,0.2F, 10F (0-30)V -

Cathode Ray Oscilloscope Regulated Power Supply Probe Connecting wires Bread Board

Quantity 1 1 2 1 2 1 1 2 1

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PROCEDURE: 1. Connections are given as per the circuit diagram. 2. Switch on the dc power supply and apply 12V as bias voltage. 3. Sine wave output is obtained and the readings are tabulated. 4. Graph is plotted by taking time period along X-axis and voltage along Yaxis.

PIN CONFIGURATION:

SYMBOL:
C
B

BC107 E

DESIGN:
fr = 1 2

Let C1 = 0.2 F , C 2 = 0.02 F , f r = 10 KHz C1 + C 2 LC 1C 2 ,L =?

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CIRCUIT DIAGRAM:
V C C = 1 2 V

R c 4 7 k

1 0 0 k 1 0 u F C i B 0 . 1 u F C 1 0 7

R 2 4 7 k C 1

R e 2 . 2 k

C e 1 0 u F C 2

CRO

0 . 2 u F

0
L 1 2

0 . 0 2 u F

MODEL GRAPH:

TABULATION:

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S.No Unit 1. 2. Type Hartley oscillator Colpitts oscillator

Amplitude Volts

Time period ms

VIVA: 1.State Barkhausen criterion. 2.What is the use of RFC? 3.How do Hartley differ from Colpitts oscillator? 4.Give the frequency range of Hartley and Colpitts oscillator.

RESULT:

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Ex. No: 3 DATE: AIM:

RC PHASE SHIFT AND WIEN BRIDGE OSCILLATORS

(i)To design and construct a RC phase shift oscillator circuit to generate a

sine waveform. (ii) To design and construct a Wien bridge oscillator circuit to generate a sine waveform. (i) RC PHASE SHIFT OSCILLATOR Department Of ECE
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APPARATUS REQUIRED: S.No 1. 2. 3. 4. 5. 6. 7. 8. Resistor Capacitor Cathode Ray Oscilloscope Regulated Power Supply Probe Connecting wires Bread Board Components Transistor BC107 10K 10F 47F (0-30)V Range Quantity 1 3 2 1 1 1 2 1

PIN CONFIGURATION:

SYMBOL:
C
B

BC107 E

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CIRCUIT DIAGRAM:
V C C = 1 2 V

R R 1

c C o

i B C 1 0 7

1 0 u F

1 0 u F 4 7 u F C e

CRO

R 1 0 k

0
C C C

R 1 0 k

R 1 0 k

DESIGN:

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Given VCC = 12V , = 100 , R = 10 K, I C = 2mA , f o = 4 KHz IB = IC

, I E = I B + IC

VCE = VCC / 2 V B = V E + V BE V E = 10 % of VCC RE = R2 = RC = fo = VE IE VB , 10 I B R1 = VCC R2 10 I B

VCC VCE I E R E IC 1 2RC 6 + 4( RC R )

MODEL GRAPH:

Model Calculation

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(ii)

WIEN BRIDGE OSCILLATOR

APPARATUS REQUIRED: S.No Components 1. Transistor 2. Resistor 3. 4. 5. 6. 7. 8. Capacitor Cathode Ray Oscilloscope Regulated Power Supply Probe Connecting wires Bread Board Range BC107 2.2K,47K,300K 4.6K,41K,100K 1nF, 10F (0-30)V Quantity 2 1 2 2 3 1 1 2 1

PIN CONFIGURATION:

SYMBOL:

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C
B

BC107 E

DESIGN:

f = 15 KHz , C = 1nF C1 = C 2 = C , f = 1 2RC

Let R1 = R2 = R,

CIRCUIT DIAGRAM:
V C C = 1 2 V

R 3 0

R 1 1 0 0

R c 1 4 . 6 k C 1 0 B C 1 0 7 0 1 u F

R 3 1 0 0

R c 2 4 . 6 k C 1 0 B C 1 0 7

o u

2 F

C 1 n

C R O

C 1 n

R 2 4 1 k

R e 1 4 7 k

R 4 4 1 k

R e 2 2 . 2 k

C e 1 0 u F

TABULATION:

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S.No 1. 2.

Type RC phase shift oscillator Wien bridge oscillator

Amplitude(Volts)

Time period(ms)

MODEL GRAPH:

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PROCEDURE:

1. Connections are given as per the circuit diagram. 2. Switch on the dc power supply and apply 12V as bias voltage. 3. Sine wave output is obtained and the readings are tabulated. 4. Graph is plotted by taking time period along X-axis and voltage along Yaxis.

VIVA: 1.Why do we call Wienbridge oscillator as lead-lag circuit oscillator? 2.Why 3 RC networks in cascaded connection are in RC phase shift oscillator? 3.What are the advantages & disadvantages of RC phase shift oscillator?

RESULT:

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EX.NO:4 DATE: AIM:

SIMULATION OF BUTTERWORTH SECOND ORDER LOW PASS FILTER

To design and construct a second order Butterworth low pass filter having upper cutoff frequency 1KHz and to create a PSpice model and simulate to determine its frequency response.
SOFTWARE REQUIRED: PSPICE OrCAD 10.3

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SYMBOL:

Inverting I/P 2 Non-Inverting 3 I/P

4 7 + 7 4

V O O 1 O V

S U

1 6 5

1 T 2

O / P

PIN DIAGRAM:

CIRCUIT DIAGRAM:

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DESIGN:
f h = 1KHz , C = 0.1F , = 1.414 for n = 2, R f = 5.86 K 1 2RC Ao = 3 fh = Ao = 1 + Rf Ri

PROCEDURE:

1. We are using Pspice evaluation package and Vdc as input source.


2. Select Program OrCAD 10.3 Capture click to get the component file. 3. To create the lowpass filter circuit we require Opamp(741),Vdc , ground

terminals,resistors,capacitors and external a.c input signal. 4. Select the parts one by one and place them in the work area. 5. Arrange the parts and make connections using wire. 6. Save the circuit as file. 7. Click Pspice before which place the voltage marker at the i/p and o/p sides. Department Of ECE
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8. Click Pspice New simulation profile open analysis setup time

domain analysis change Run to time give O.K.


9. Open Pspice create Netlist to make sure that there are no wiring errors. 10. If there is no error, then open Pspice click Run click Plot add plot

to window Cut and paste the waveforms. VIVA: 1. What is the expansion of Pspice? 2. Differentiate active filter and passive filter. 3. Give the important features of IC 741. 4. Define cut-off frequency and bandwidth.
RESULT

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Ex.No:5 DATE: AIM:

SIMULATION OF DIFFERENTIAL AMPLIFIER

To design and construct a differential amplifier in both common and differential modes and create a PSpice model to simulate in both modes.

SOFTWARE REQUIRED: PSPICE OrCAD 10.3 SYMBOL:


C
Q2 N 22 2 2

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DESIGN:

Vcc=12v , IE=1mA , VEE= -12V Assume Ad=150 , VBE = 0.7V RE=[VEE - VBE)] / IE re=26mV/IE Ad=Rc/re; Rc=Adre

CIRCUIT DIAGRAM: (i)Common Mode

ii) Differential Mode Department Of ECE


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PROCEDURE:

1. We are using Pspice evaluation package and Vdc as input source.


2. Select Program OrCAD 10.3 Capture click on file new project click to get the component file. 3. To draw the circuit we require transistors ( 2N2222),Vdc , ground

terminals,resistors and external a.c input signal. 4. Select the parts one by one and place them in the work area. 5. Arrange the parts and make connections using wire.
6. The parts attributes are changed by giving double click on the label then

enter the new value. 7. Save the circuit as file.

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8. Click Pspice before which place the differential voltage marker at the o/p side and voltage marker at the input side.
9. Click Pspice New simulation profile open analysis setup time

domain analysis change Run to time give O.K.


10. Open Pspice create Netlist to make sure that there are no wiring errors. 11. If there is no error, then open Pspice click Run click Plot add plot to

window Cut and paste the waveforms. 12.The same procedure is repeated for differential mode of operation. VIVA: 1. Define CMRR. 2. Give some applications of differential amplifier. 3. What are the ideal characteristics of differential amplifier
RESULT:

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EX.NO:6 DATE: AIM:

SIMULATIONS OF ASTABLE AND MONOSTABLE MULTIVIBRATORS

To create a PSpice model and to simulate Astable and Monostable multivibrators. SOFTWARE REQUIRED: PSICE OrCAD 10.3 PIN DIAGRAM:

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CIRCUIT DIAGRAM: (i)Astable Multivibrator

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V 1 5 v X 1 E 8

R 2 7 . 2 k

3 . 6 k

G N D

2 4 5 6 7

T R I G G R E S O E UT C O N T R T H R E S D I S C H

V C C

R 3 T P U T O L H O L D A R G E

O/P

5 5 5 D C 1 0 . 1 uC F 2 1

0 . 0 1 u F

(ii) Monostable Multivibrator

V 2 5 v

T r i g g e r

I / P
R 3 1 0 k 2 4 5 6 7

X 2

VC C

G N D

T R I G G E R3 R E SO E U T T P U T C O N T R O L T H R E S H O L D D I S C H A R G E 5 5 5 D

O/P

C 3 0 . 1 u F

0 C

4 u F

0 . 0 1

PROCEDURE:

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1. We are using Pspice evaluation package and Vdc as input source.


2. Select Program OrCAD 10.3 Capture click on file new project click to get the component file. 3. To draw the circuit we require IC 555, Vdc, ground terminals, resistors,

capacitors. 4. Select the parts one by one and place them in the work area. 5. Arrange the parts and make connections using wire.
6. The parts attributes are changed by giving double click on the label then

enter the new value. 7. Save the circuit as file. 8. Click Pspice before which place the voltage marker at the input side and output side.
9. Click Pspice New simulation profile open analysis setup time

domain analysis change Run to time give O.K.


10. Open Pspice create Netlist to make sure that there are no wiring errors. 11. If there is no error, then open Pspice click Run click Plot add plot to

window Cut and paste the waveforms. 12.The same procedure is repeated for monostable multivibrator.

RESULT:

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EX.NO: 7 DATE: AIM:

TUNED CLASS C AMPLIFIER

To design and construct a tuned Class C amplifier circuit and to obtain its frequency response.
APPARATUS REQUIRED: S.No 1. 2. 3. 4. 5. 6. 7. 8. Components Transistor Capacitor Function Generator Cathode Ray Oscilloscope Regulated Power Supply Probe Connecting wires Bread Board Range BC107 1nF,0.1 F 220 F (0-30)V Quantity 1 1 2 1 1 1 2 1

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PIN CONFIGURATION:

SYMBOL:

C
B

BC107 E

CIRCUIT DIAGRAM:
V C C = 1 0 V

2 L C 1 n F

R C i

0 . 1 u F B C 1 0 7

2 2 0 u F

C R O
F G R 2 R e C e 2 2 0 u F

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DESIGN:

Given
IC = 1mA , VCC = 10V , = 100 , f r = 80 KHz , C i = C e = 220 F , C o = 0.1F , V BE = 0.7V VCC 2 IC = ,

VCE = IB

I E = I B + IC

V E = 10 % of VCC V B = V BE + V E RE = VE IE I 2 = 9I B R1 = VCC V B I1 VB , I2 1 L =?

I 1 = 10 I B , R2 = fr =

2 LC LetC = 1nF ,

MODEL GRAPH:

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TABULATION: Vi = S.No Unit Frequency Hz Output Voltage Volts Volts Gain = 20log(Vo/Vi) dB

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PROCEDURE:

1. Connections are given as per the circuit diagram. 2. Apply 10V dc supply to the collector and base of transistors. 3. Set the I/P voltage using Function generator and vary the frequency in desired range. 4. For each frequency note down the corresponding O/P voltage values. 5. Graphs are plotted as gain versus frequency for the tabulated readings.

VIVA:

1. What is Class C operation? 2. Define tank circuit. 3. Give some applications of tuned Class C amplifier. 4. What is the difference b/w Class C and Class D operation?

RESULT:

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EX.NO: 8 ASTABLE, MONOSTABLE AND BISTABLE MULTIVIBRATORS DATE: AIM:

(i) To design and construct an astable multivibrator and to obtain its waveform. (ii)To design and construct a monostable multivibrator with a pulsewidth of 0.1ms using transistor. (iii) To design and construct a bistable multivibrator with a frequency of 2 KHz and to obtain its performance curve.
(i) ASTABLE MULTIVIBRATOR

APPARATUS REQUIRED: S.No 1. 2. 3. 4. 5. 6. 7. Transistor Capacitor Cathode Ray Oscilloscope Regulated Power Supply Probe Connecting wires Bread Board Components Range BC548 1nF (0-30)V 2 2 1 1 2 1 Quantity

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DESIGN:

Given
VCC =10V , I C = 5mA , f =1.3KHz , C =1nF R C 1 = R C 2 = RC R1 = R 2 = R C1 = C 2 = C RC = VCC IC

T =1.38 RC

PIN CONFIGURATION:

SYMBOL:

C
B

BC548 E

CIRCUIT DIAGRAM:

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R C 1 n 1 F

2 C 1 n 2 F

O / P V c 1
B C 5 4 8

O / P V c 2
B C 5 4 8

MODEL GRAPH:

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O/P across C1

Vc1 (V)
O/P across C2

t (ms)

Vc2 (V)

t (ms)

VB1 (V)

O/P across B1

t (ms)

VB2 (V)
t (ms)

O/P across B2

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PROCEDURE: 1. Connections are given as per the circuit diagram. 2. Apply 10V dc supply to the collector and base of transistors. 3. O/P is taken from collector and base of each transistor. 4. Readings are noted and tabulated. 5. Graph is drawn for timeperiod versus amplitude.

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(ii) APPARATUS REQUIRED:

MONOSTABLE MULTIVIBRATOR

S.No 1. 2. 3. 4. 5. 6. 7. 8. 9.

Components Transistor Diode Capacitor Function Generator Cathode Ray Oscilloscope Regulated Power Supply Probe Connecting wires Bread Board

Range SL100 1N4007 1nF (0-30)V -

Quantity 2 1 1 1 1 1 2 1

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PIN CONFIGURATION:

SYMBOL:

PIN CONFIGURATION: A K

SYMBOL: A 1N4007 K

CIRCUIT DIAGRAM:

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= 1 2 V

1 R B C C R 2 s

L 1 0 0 R 1

L 1 0 0 C c C d

Trigger I/P
0
D 1 I N 4 0 0 7 0 . 0 0 1 u F

R R e

DESIGN: Given

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VCC = 12V , I C = 2mA , VCE = 3V , Vre = 3V , V BE = 0.7V , h fe = 100 Ri = 1.2 K, f = 2 KHz , f max = 2 KHz RC 1 = RC 2 = RC Re = V re / I E I B2 = IC , h fe RC = [VCC (VCE + Vre ) ] / I C R B = [VCC (Vre + V BE ) ] / I B 2

R2 = [VCC (V BE + V re ) ] 10 I B1 R1 = Vre + V BE 9 I B1 Ri 1 , CC = 1000 2fX CC Where = R2 .C S (T = 1 / f ) Take T as 0.1ms

X CC = CS = ?

f max = 1 / 2 Rd C d = T / 10 T = 0.69 R B .C C =?

Let C d = 1nF Rd = ?

MODEL GRAPH: Trigger I/P Vin (V) t(ms) O/P across C Vo (V)

t(ms)

(iii)

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(iv)

BISTABLE MULTIVIBRATOR

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APPARATUS REQUIRED: S.No 1. 2. 3. 4. 5. 6. 7. 8. Components Transistor Diode Function Generator Cathode Ray Oscilloscope Regulated Power Supply Probe Connecting wires Bread Board Range SL100 1N4007 (0-30)V Quantity 2 3 1 1 1 2 1

DESIGN: Given
VCC = 12V , I C = 2mA, h fe = 180 , VCE ( sat ) = Vre = 3V , f max = 2 KHz I B = I C / h fe Re = Vre IC

RC = VCC VCE ( sat ) + Vre / I C R1 = [VCC (Vre + V BE ) ] / 10 I B R2 = (Vre + V BE ) / 9 I B

)]

1 2 f max

= RC Where R = R1 // R2 C = ? R.C d << T Let T = 1 / f ( f = f max / 2) Let R = 1M C d = ?

PIN CONFIGURATION:

SYMBOL:

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A 1N4007

CIRCUIT DIAGRAM:

MODEL GRAPH:

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TABULATION: S.No Unit Across C1 1.Astable MV Across C2 Across B1 Across B2 2.Monostable Trigger I/P MV O/P Trigger I/P 3.Bistable MV Across C1 Across C2 Amplitude Volts Time period ms

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PROCEDURE: 1. Connections are given as per the circuit diagram. 2. Apply 12V dc supply to the collector and base of transistors. 3. Set the trigger I/P voltage using Function generator. 4. O/P is taken from collector of each transistor. 5. Readings are noted and tabulated. 6. Graph is drawn for timeperiod versus amplitude.

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VIVA:

1. What is the difference b/w oscillator and multivibrator? 2. Define pulse width. 3. What do you mean by quasi stable state? 4. What is the use of speed-up capacitor? 5. Give some applications of bistable multivibrator. 6. Which type of feedback is used in multivibrators? 7. What is the difference b/w blocking oscillator and oscillator? 8. Give some applications of astable multivibrator. 9. Give some triggering methods of monostable multivibrator.

RESULT:

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EX.NO: 9 DATE

INTEGRATOR, DIFFERENTIATOR, CLIPPERS AND CLAMPERS

AIM: (i) To design and construct differentiator and integrator circuits and to obtain

their output waveforms. (ii) To construct biased positive and negative clipper circuits and to obtain their output waveforms. (iii) To construct and test the clamper circuit.
(i) INTEGRATOR & DIFFERENTIATOR

APPARATUS REQUIRED:

S.No 1. 2. 3. 4. 5. 6. 7.

Components Capacitor Diode Function Generator Cathode Ray Oscilloscope Probe Connecting wires Bread Board

Range 0.1 F 1N4007 -

Quantity 1 1 1 1 2 1

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DESIGN: Given
f =1KH , T =, = RC z Let C = 0.1 F

PIN CONFIGURATION: A K A

SYMBOL: K 1N4007

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PROCEDURE:

1. Connections are given as per the circuit diagram. 2. Set the i/p signal with the help of function generator. 3. O/P is taken from CRO. 4. Readings are noted and tabulated. 5. Graph is drawn for time period versus amplitude.

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CIRCUIT DIAGRAM: (i) Differentiator Without Diode


C 0.1uF FG 1KHz R C R O

(ii)

Differentiator With Diode


C 0.1uF

FG 1KHz

1N4007

C R O

(iii)

Integrator Without Diode


R

FG 1KHz

C 0.1uF

C R O

(iv)

Integrator With Diode

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FG 1KHz

0.1uF

1N4007

C R O

MODEL GRAPH: (i) Differentiator

I/P wave form

O/P wave form without Diode

O/P wave form with Diode

(ii) Integrator

I/P wave form

O/P wave form without Diode

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O/P wave form with Diode

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(ii)

CLIPPER

APPARATUS REQUIRED:

S.No 1. 2. 3. 4. 5. 6. 7. 8.

Components Diode Resistor Function Generator Cathode Ray Oscilloscope Regulated Power Supply Probe Connecting wires Bread Board

Range 1N4007 2.5K (0-30)V -

Quantity 1 1 1 1 1 2 1

PROCEDURE:

1. Connections are given as per the circuit diagram. 2. Set the i/p signal with the help of function generator. 3. O/P is taken from CRO. 4. Readings are noted and tabulated. Department Of ECE
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5. Graph is drawn for timeperiod versus amplitude.


PIN CONFIGURATION: A K SYMBOL: A 1N4007 K

CIRCUIT DIAGRAM: (i)Biased positive Clipper


R D 1N4007 2.5K FG 1KHz

C R O

2V

(ii) Biased negative Clipper


R 1N4007 2.5K FG 1KHz 2V D

C R O

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MODEL GRAPH: (i)Biased positive Clipper

ii)Biased negative Clipper

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(iii)

CLAMPER

APPARATUS REQUIRED: S.No 1. 2. 3. 4. 5. 6. 7. 8. Components Diode Resistor Capacitor Function Generator Cathode Ray Oscilloscope Regulated Power Supply Probe Connecting wires Range 1N4007 10K 10 F (0-30)V Quantity 1 1 1 1 1 1 2 -

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Bread Board

PROCEDURE:

1. Connections are given as per the circuit diagram. 2. Set the i/p signal with the help of function generator. 3. O/P is taken from CRO. 4. Readings are noted and tabulated. 5. Graph is drawn for time period versus amplitude.

PIN CONFIGURATION: A CIRCUIT DIAGRAM: (i) Positive Clamper K

SYMBOL: A 1N4007 K

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C 10uF FG 1KHz D 1N4007 R 1 0 K C R O

(ii) Negative Clamper


C 10uF FG 1KHz 1N4007 D R 1 0 K C R O

MODEL GRAPH: (i)Positive Clamper

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(ii) Negative Clamper

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TABULATION: S.No Unit Without diode 1.Differentiator With diode Without diode 2.Integrator With diode + ve clipper 3.Clipper 4.Clamper - ve Clamper ve clipper + ve Clamper Amplitude Volts Timeperiod ms

VIVA: 1.If the I/P to the differentiator is cosine wave what is the O/P? 2.What do you mean by biased clipper? 3.What are the other names of clipper & clamper. 4. If the I/P to the integrator is square wave what is the O/P? 5. If the I/P to the integrator is step signal what is the O/P?

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RESULT:

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Ex.No:10
DATE: AIM:

Simulation of CMOS Inverter, NAND and NOR gates

To construct a CMOS inverter, NAND and NOR gates and to create their PSPICE model to simulate them. SOFTWARE REQUIRED: PSPICE OrCAD 10.3

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CIRCUIT DIAGRAM: (i) INVERTER

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1 3 . 3 V

0
M M 1

b r e a k P

V o

M V 1 = 0 V 2 = 3 T D = 0 T R = 1 T F = 1 P W = P E R = . 3 V V 2 M n s n s 1 0 0 u s 2 0 0 u s

b r e a k N

(ii) NAND

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(iii) NOR

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PROCEDURE:

1. We are using Pspice evaluation package and Vdc as input source.


2. Select Program OrCAD 10.3 Capture click to get the component file. 3. To create CMOS inverter circuit we require NMOS, PMOS, Vdc, ground

terminals and external a.c input signal. 4. Select the parts one by one and place them in the work area. 5. Arrange the parts and make connections using wire. 6. Save the circuit as file. 7. Click Pspice before which place the voltage marker at the i/p and o/p sides.
8. Click Pspice New simulation profile open analysis setup time

domain analysis change Run to time give O.K.


9. Open Pspice create Netlist to make sure that there are no wiring errors. 10. If there is no error, then open Pspice click Run click Plot add plot

to window Cut and paste the waveforms. 11. The same procedure is repeated for simulation of NAND and NOR gates.

RESULT:

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93

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Department Of ECE

94

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