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KA1L0365R/KA1M0365R/KA1H0365R
Fairchild Power Switch(FPS)
Features
Precision Fixed Operating Frequency KA1L0365R(50kHz), KA1M0365R(67kHz), KA1H0365R(100kHz) Pulse by Pulse Over Current Limiting Over Load Protection Over Voltage Protection (Min. 23V) Internal Thermal Shutdown Function Under Voltage Lockout Internal High Voltage Sense FET Auto Restart
Description
The Fairchild Power Switch(FPS) product family is specially designed for an off line SMPS with minimal external components. The Fairchild Power Switch(FPS) consist of high voltage power SenseFET and current mode PWM controller IC. PWM controller features integrated fixed oscillator, under voltage lock out, leading edge blanking, optimized gate turn-on/turn-off driver, thermal shut down protection, over voltage protection, temperature compensated precision current sources for loop compensation and fault protection circuit. compared to discrete MOSFET and controller or RCC switching converter solution, a Fairchild Power Switch(FPS) can reduce total component count, design size, weight and at the same time increase & efficiency, productivity, and system reliability. It has a basic platform well suited for cost effective design in either a flyback converter or a forward converter.
TO-220F-4L
Power on reset
Rev.1.0.2
2003 Fairchild Semiconductor Corporation
KA1L0365R/KA1M0365R/KA1H0365R
Symbol VD,MAX VDGR VGS IDM EAS ID ID VCC,MAX VFB PD Darting TA TSTG
Value 650 650 30 12 358 3.0 2.4 30 -0.3 to VSD 75 0.6 -25 to +85 -55 to +150
Drain-Gate Voltage (RGS=1M) Gate-Source (GND) Voltage Drain Current Pulsed (2) Single Pulsed Avalanche Energy (3) Continuous Drain Current (TC=25C) Continuous Drain Current (TC=100C) Maximum Supply Voltage Input Voltage Range Total Power Dissipation Operating Ambient Temperature Storage Temperature
Notes: 1. Tj = 25C to 150C 2. Repetitive rating: Pulse width limited by maximum junction temperature 3. L = 41mH, VDD = 50V, RG = 25, starting Tj = 25C
KA1L0365R/KA1M0365R/KA1H0365R
Zero Gate Voltage Drain Current Static Drain-Source on Resistance (Note) Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn on Delay Time Rise Time Turn Off Delay Time Fall Time Total Gate Charge (Gate-Source+Gate-Drain) Gate-Source Charge Gate-Drain (Miller) Charge
Note: 1. Pulse test: Pulse width 300S, duty cycle 2% 1 2. S = --R
(Note)
IDSS
KA1L0365R/KA1M0365R/KA1H0365R
Unit V V
kHz % %
Ta=25C, 0V Vfb 3V Ta=25C, 5V Vfb VSD Ta=25C -25C Ta +85C Max. inductor current
mA V A V mV/C A
Note: 1. These parameters, although guaranteed, are not 100% tested in production 2. These parameters, although guaranteed, are tested in EDS (wafer test) process
KA1L0365R/KA1M0365R/KA1H0365R
25
50
75
100
125 150
Temperature [C]
Figure 1. Operating Frequency
Temperature [C]
Figure 2. Feedback Source Current
1.1 1.05
IIpeak 1 over
0.95 0.9 0.85 0 25 50 75 100 125 150 0.8 -25 0 25 50 75 100 125 150
Temperature [C]
Figure 3. Operating Supply Current
Temperature [C]
Figure 4. Peak Current Limit
1.5 1.3
IST Istart
Vth(H) 1 Vstart
0.95 0.9 0 25 50 75 100 125 150 0.85 -25 0 25 50 75 100 125 150
Temperature [C]
Figure 5. Start up Current
Temperature [C]
Figure 6. Start Threshold Voltage
KA1L0365R/KA1M0365R/KA1H0365R
Vth(L) Vstop 1
0.95 0.9 0.85 -25 0 25 50 75 100 125 150
Dmax 1
0.95 0.9 0.85 -25 0 25 50 75 100 125 150
Temperature [C]
Figure 7. Stop Threshold Voltage
Temperature [C]
Figure 8. Maximum Duty Cycle
Vsd 1
0.95 0.9 0 25 50 75 100 125 150 0.85 -25 0 25 50 75 100 125 150
Temperature [C]
Figure 9. VCC Zener Voltage
Temperature [C]
Figure 10. Shutdown Feedback Voltage
Vovp 1
0.95 0.9 0 25 50 75 100 125 150 0.85 -25 0 25 50 75 100 125 150
Temperature [C]
Figure 11. Shutdown Delay Current
Temperature [C]
Figure 12. Over Voltage Protection
KA1L0365R/KA1M0365R/KA1H0365R
Temperature [C]
KA1L0365R/KA1M0365R/KA1H0365R
Package Dimensions
TO-220F-4L
KA1L0365R/KA1M0365R/KA1H0365R
TO-220F-4L(Forming)
KA1L0365R/KA1M0365R/KA1H0365R
Ordering Information
Product Number KA1L0365R-TU KA1L0365R-YDTU KA1M0365R-TU KA1M0365R-YDTU KA1H0365R-TU KA1H0365R-YDTU
TU : Non Forming Type YDTU : Forming Type
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
www.fairchildsemi.com 8/25/03 0.0m 001 Stock#DSxxxxxxxx 2003 Fairchild Semiconductor Corporation
2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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