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FP2 Analog Unit Hardware Manual Matsushita Electric Works, Ltd. ARCT1F283END V1.

0 2/2000
is a global brand name of Matsushita Electric Works.

PROGRAMMABLE CONTROLLER

FP2 Analog Unit


Hardware Manual

BEFORE BEGINNING
This manual and everything described in it are copyrighted. You may not copy this manual, in whole or part, without written consent of Matsushita Electric Works, Ltd. Matsushita Electric Works, Ltd. a policy of continuous improvement of the design and performance of its products, therefore, we reserve the right to change the manual/product without notice. In no event will Matsushita Electric Works, Ltd. be liable for direct, special, incidental, or consequential damage resulting from any defect in the product or its documentation, even if advised of the possibility of such damages.

LIMITED WARRANTY
All implied warranties on the product, including merchantability and fitness, are limited to one year from the date of purchase. If physical defects caused by distribution are found, Matsushita Electric Works, Ltd. will replace/repair the product free of charge. Exceptions include: D When physical defects are due to different usage/treatment of the product other than described in the manual. D When physical defects are due to defective equipment other than the distributed product. D When physical defects are due to modifications/repairs by someone other than Matsushita Electric Works, Ltd. D When physical defects are due to natural disasters.

MS-DOS and Windows are registered trademarks of Microsoft Corporation. IBM Personal Computer AT is a registered trademark of the International Business Machines Corporation.

Important Symbols
The following symbols are used in this manual:

Whenever the warning triangle is used, especially important safety instructions are given. If they are not adhered to, the results could be: personal injury and/or significant damage to instruments or their contents, e.g. data

+ Note ,

Contains important additional information or indicates that you should proceed with caution.

Example: Contains an illustrative example of the previous text section.

* next page Indicates that the text will be continued on the next page.

Table of Contents
Chapter 1
1.1 1.2 1.3

Functions and Restrictions

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Type of Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Data Processing Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3.1 Analog Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3.1.1 General Sampling Function . . . . . . . . . . . . . . . . . . . . . 1.3.1.2 Averaging Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3.1.3 Offset Changing Function . . . . . . . . . . . . . . . . . . . . . . . 1.3.2 Analog Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3.2.1 Analog Output Hold Function . . . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 1 5 5 5 5 5 6 6

1.4

Installation Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 7 1.4.1 CPU Unit with Analog I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 7 1.4.2 Analog Input Unit and Analog Output Unit . . . . . . . . . . . . . . . . . . . 1 7 Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 8

1.5

Chapter 2
2.1 2.2 2.3

Parts and Specifications

CPU Unit with Analog I/O (FP2C1A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 Analog Input Unit (FP2AD8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Analog Output Unit (FP2DA4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6

Chapter 3
3.1

Wiring

Suitable Terminals and Wires . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 3.1.1 Suitable Terminals and Suitable Wires . . . . . . . . . . . . . . . . . . . . . . 3 3 3.1.2 Wiring to Terminal Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Wiring for Analog Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1 Voltage Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.2 Current Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.3 Thermocouple Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.4 R.T.D. Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 36 36 36 36

3.2

3.3

Wiring for Analog Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 3.3.1 Voltage Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 3.3.2 Current Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 EMC Conformity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 8
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3.4

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Table of Contents

FP2 Analog Unit

Chapter 4
4.1

Setting the I/O Range and I/O Allocation

Setting the Input and Output Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 4.1.1 Setting the Analog Input Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 4.1.2 Setting the Analog Output Range . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 I/O Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5

4.2

Chapter 5
5.1 Analog 5.1.1 5.1.2 5.1.3 5.1.4

Initial Settings
Input Initial Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . No Execution of Analog Input Conversion Processing . . . . . . . . . Analog Input Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Average Processing Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Input Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 5 5 5 3 3 5 6 8

5.2

Analog Output Initial Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 9 5.2.1 Analog Output Hold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 9 5.2.2 Analog Output Hold (Any Value) Data . . . . . . . . . . . . . . . . . . . . . . . 5 9

Chapter 6
6.1 6.2 6.3

Analog I/O Conversion

Analog Input Conversion Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Analog Output Conversion Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 6 11 Analog Input and Output Conversion Cycle Time . . . . . . . . . . . . . . . . . . . . 6 13 6.3.1 Analog Input Conversion Cycle Time . . . . . . . . . . . . . . . . . . . . . . . 6 13 6.3.2 Analog Output Conversion Cycle Time . . . . . . . . . . . . . . . . . . . . . 6 14

Chapter 7
7.1 7.2 7.3

Procedure for Handling Analog Unit

Outline of Procedure for Handling Analog Unit . . . . . . . . . . . . . . . . . . . . . . . 7 3 Reading the Analog Input Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Writing the Analog Output Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5

Chapter 8
8.1 8.2 8.3 8.4
ii

Analog Input Sample Programs

CPU Unit with Analog I/O Basic Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 Analog Input Unit Basic Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 7 CPU with Analog I/O Scale Conversion Program . . . . . . . . . . . . . . . . . . . . 8 12 Temperature Sensor Input Broken Wire Detection . . . . . . . . . . . . . . . . . . . 8 17
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FP2 Analog Unit

Table of Contents

Chapter 9
9.1

Analog Output Sample Program

Analog Output Unit Basic Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3

Chapter 10 Analog Input Average Processing Setting


10.1 CPU Unit with Analog I/O Sample Program . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 10.2 Analog Input Unit Sample Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 8

Chapter 11

Analog Input Offset Setting

11.1 CPU Unit with Analog I/O Sample Program . . . . . . . . . . . . . . . . . . . . . . . . . 11 3 11.2 Analog Input Unit Sample Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8

Chapter 12 Analog Output Hold Setting


12.1 CPU Unit with Analog I/O Output Hold Program . . . . . . . . . . . . . . . . . . . . . 12 3 12.2 Output Hold (Any Value) Setting Program . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 12.2.1 CPU Unit with Analog I/O Basic Program . . . . . . . . . . . . . . . . . . . 12 6 12.2.2 Analog Output Unit Basic Program . . . . . . . . . . . . . . . . . . . . . . . . 12 9

Chapter 13 Troubleshooting
13.1 Problems Concerning the Analog Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 13.2 Problems Concerning the Analog Output . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4

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Table of Contents

FP2 Analog Unit

Appendix A Specifications
A.1 Tables A.1.1 A.1.2 A.1.3 of Performance Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Input Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Output Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A3 A3 A4 A6

A.2

Tables of Input/Output Contact Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . A 7

Appendix B Shared Memory Areas


B.1 Tables B.1.1 B.1.2 B.1.3 Shared B.2.1 B.2.2 B.2.3 B.2.4 B.2.5 B.2.6 Shared B.3.1 B.3.2 B.3.3 of Shared Memory Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Shared Memory of CPU Unit with Analog I/O . . . . . . . . . . . . . . . . Shared Memory of Analog Input Unit . . . . . . . . . . . . . . . . . . . . . . . . Shared Memory of Analog Output Unit . . . . . . . . . . . . . . . . . . . . . . Memory for Analog Input Processing . . . . . . . . . . . . . . . . . . . . . . . . Analog Input Preparation Completion Flag . . . . . . . . . . . . . . . . . . . No Execution of Analog Input Conversion Processing Setting . . Analog Input Range Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Average Times Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Offset Changing Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Sensor Broken Wire Detection Flag . . . . . . . . . . . . . . . . . . . . Memory of Analog Output Processing . . . . . . . . . . . . . . . . . . . . . . Analog Output Hold Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Output Hold (Any Value) Data Setting . . . . . . . . . . . . . . . No Execution of Analog Output Conversion Processing Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B3 B3 B4 B5 B6 B6 B6 B7 B8 B9 B9 B 10 B 10 B 11 B 11

B.2

B.3

Index

Record of Changes

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Chapter 1 Functions and Restrictions


1.1 1.2 1.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Type of Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Data Processing Functions . . . . . . . . . . . . . . . . . . . . . . 1 5 1.3.1 Analog Input . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 5 1.3.1.1 1.3.1.2 1.3.1.3 1.3.2 General Sampling Function . . . 1 5 Averaging Function . . . . . . . . . . . 1 5 Offset Changing Function . . . . . 1 5

Analog Output . . . . . . . . . . . . . . . . . . . . . . . . . 1 6 1.3.2.1 Analog Output Hold Function . . 1 6

1.4

Installation Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 1 7 1.4.1 1.4.2 CPU Unit with Analog I/O . . . . . . . . . . . . . . . . 1 7 Analog Input Unit and Analog Output Unit . 1 7

1.5

Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 8

Functions and Restrictions

FP2 Analog Unit

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FP2 Analog Unit

Functions and Restrictions 1.1 Features

1.1

Features

Analog input 16bit high resolution Highspeed A/D conversion (500s to 90ms/channel) Multiple input range (12 types such as voltage, current, and temperature sensor) Temperature sensor (resistance thermometer device, thermocouple) direct input possible Analog output 12bit resolution Highspeed D/A conversion (500s/channel) Dual output range (10V and 0 to 20mA) Handling of I/O data During the processing of the program, the analog input and output data is allocated to the normal I/O (X and Y) and refreshed.

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Functions and Restrictions 1.2 Type of Unit

FP2 Analog Unit

1.2
Name

Type of Unit
Function
Analog input: 4channel Analog output: 1channel

Order number
FP2C1A

CPU unit with analog I/O

Analog input unit Analog output unit

Analog input: 8channel Analog output: 4channel

FP2AD8 FP2DA4

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FP2 Analog Unit 1.3

Functions and Restrictions Data Processing Functions

1.3

Data Processing Functions

1.3.1

Analog Input

For analog input, there is the General sampling function, Averaging function, and Offset changing function.

1.3.1.1

General Sampling Function

The analog input values are converted point by point and the digital values are stored in converted value area (input contact area).

1.3.1.2

Averaging Function

From the data sampled according to the number of times set in the shared memory, the average value of the data (excluding the maximum and minimum values) is stored in the conversion value area (input contact area). If the number of times is 2 or less, or outside of the allowable range (65 or more), the general sampling function is used. The time for the average value to be stored in the conversion value area changes drastically depending on the number of inputs used, the used input range, and the average number of times. For detailed information, section 6.3.

1.3.1.3

Offset Changing Function

The conversion data for the all ranges of the input channels is offset by the amount set in the shared memory (range: 2048 to +2047) and stored in the conversion value area (input contact area).

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Functions and Restrictions 1.3 Data Processing Functions

FP2 Analog Unit

1.3.2

Analog Output

For analog output, there is the Analog output hold function.

1.3.2.1

Analog Output Hold Function

Nonhold, hold (final value during RUN mode), and hold (any value) for the analog output during the FP2 CPU unit PROG. mode can be set by the shared memory settings. For hold (final value during RUN mode), the analog output value is held corresponding to the final digital data written during the RUN mode before changing to the FP2 CPU unit PROG. mode. For hold (any value), the analog output value is held corresponding to the hold data (any value) set in the shared memory when changing to the FP2 CPU unit PROG. mode.

+ Note

When set to either hold case mentioned above (final value during RUN mode or any value), each analog output value is held during stops in operation due to FP2 CPU unit hardware malfunctions or operation delays.

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FP2 Analog Unit 1.4

Functions and Restrictions Installation Restrictions

1.4

Installation Restrictions

1.4.1

CPU Unit with Analog I/O

The CPU unit with analog I/O can only be installed to the immediate right of the power supply unit on the CPU backplane (where the CPU unit is normally located). The CPU unit with analog I/O cannot be installed on an expansion backplane.
CPU backplane CPU unit with analog I/O

Cannot be installed here Expansion cable Expansion backplane

Cannot be installed on an expansion backplane

1.4.2

Analog Input Unit and Analog Output Unit

There are no restrictions regarding the installation position when installed on the CPU backplane or expansion backplane.

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Functions and Restrictions 1.5 Current Consumption

FP2 Analog Unit

1.5

Current Consumption

The internal current consumption values for the FP2 analog units are noted below. When the system is configured, the other units being used should be taken into consideration, and a power supply unit with a sufficient capacity should be used.
Name
CPU unit with analog I/O Analog input unit Analog output unit

Order number
FP2C1A FP2AD8 FP2DA4

Current consumption (at 5 V DC)


1,060mA or less 500mA or less 600mA or less

For information on restrictions applying to combinations based on current consumption, refer to the FP2 hardware manual and each units manuals.

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Chapter 2 Parts and Specifications


2.1 2.2 2.3 CPU Unit with Analog I/O (FP2C1A) . . . . . . . . . . . . . . 2 3 Analog Input Unit (FP2AD8) . . . . . . . . . . . . . . . . . . . . . 2 5 Analog Output Unit (FP2DA4) . . . . . . . . . . . . . . . . . . . 2 6

Parts and Specifications

FP2 Analog Unit

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FP2 Analog Unit 2.1

Parts and Specifications CPU Unit with Analog I/O (FP2C1A)

2.1

CPU Unit with Analog I/O (FP2C1A)


Front

Back

Status indicator LEDs


display the operating condition and error statuses.

Mode selector
is used to change the operation mode.

Initialize/test switch
is used to clear the errors, initializes the operation memory and sets the test operation mode.

Analog input terminals


For a CPU unit with analog I/O, there are analog input terminals for channels 0 to 3. The terminal block can be removed to facilitate wiring. For detailed information, section 3.1.2.

Tool port (RS232C)


is used to connect a programming tool.

COM port (RS232C)


is used to connect a computer or generalserial devices to the RS232C port.

next page

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Parts and Specifications 2.1 CPU Unit with Analog I/O (FP2C1A)

FP2 Analog Unit

Analog output terminals


For a CPU unit with analog I/O, there are analog output terminals for channel 1. Terminals with a dot mark are not used; however, they are connected to the analog input circuit internally so do not connect anything to them. The terminal block can be removed to facilitate wiring. For detailed information, section 3.1.2.

Range setting switch


Used to set the analog input and output range. For detailed information, section 4.1.

Operation condition switches


are used to set the baud rate of the programming tool, to select the program memory, and to select the writing operation for the program memory.

10

Memory backup battery


for backup of the internal memory (RAM). Order number: AFC8801 (CR2450 or equivalent)

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FP2 Analog Unit 2.2

Parts and Specifications Analog Input Unit (FP2AD8)

2.2

Analog Input Unit (FP2AD8)

front

back

Analog input terminals


For the analog input unit, there are analog input terminals for channels 0 to 7. The terminal block can be removed to facilitate wiring. For detailed information, section 3.1.2.

Range setting switch


Used to set the analog input range. For detailed information, section 4.1.1.

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Parts and Specifications 2.3 Analog Output Unit (FP2DA4)

FP2 Analog Unit

2.3

Analog Output Unit (FP2DA4)

front

back

Analog output terminals


For the analog output unit, there are analog output terminals for channels 0 to 3. Terminals with a dot mark are not used; however, they are connected to the analog input circuit internally so do not connect anything to them. The terminal block can be removed to facilitate wiring. For detailed information, section 3.1.2.

Range setting switch


Used to set the analog output range. For detailed information, section 4.1.2.

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Chapter 3 Wiring
3.1 Suitable Terminals and Wires . . . . . . . . . . . . . . . . . . . . . 3 3 3.1.1 3.1.2 3.2 Suitable Terminals and Suitable Wires . . . . . 3 3 Wiring to Terminal Block . . . . . . . . . . . . . . . . . . 3 4

Wiring for Analog Input . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 3.2.1 3.2.2 3.2.3 3.2.4 Voltage Input . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Current Input . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Thermocouple Input . . . . . . . . . . . . . . . . . . . . . 3 6 R.T.D. Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6

3.3

Wiring for Analog Output . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 3.3.1 3.3.2 Voltage Output . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Current Output . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7

3.4

EMC Conformity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 8

Wiring

FP2 Analog Unit

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FP2 Analog Unit 3.1

Wiring Suitable Terminals and Wires

3.1

Suitable Terminals and Wires

3.1.1

Suitable Terminals and Suitable Wires

Suitable connection terminals M3 terminal screws are used for the terminals of analog input and output units. The following suitable connection terminals are recommended for the wiring to the terminals.
Fork type terminal Round type terminal

6mm or less 3.2mm or more

6mm or less 3.2mm or more

Suitable wires
Size
AWG22 to AWG14 (0.3mm2 to 2.0mm2)

Torque
0.5 to 0.6NVm

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Wiring 3.1 Suitable Terminals and Wires

FP2 Analog Unit

3.1.2

Wiring to Terminal Block

Remove the terminal block before beginning the wiring operations. To remove the terminal block, push downward on the release lever located at the top of the terminal block.

OP

EN

Terminals

+ Note

Install the terminal block by inserting it all the way to its original position and pressing the lock button on the bottom of the unit. Then confirm that the terminal block is securely attached and cannot be removed.

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FP2 Analog Unit 3.2

Wiring Wiring for Analog Input

3.2

Wiring for Analog Input


Please adhere to the following guidelines when wiring your unit:

w w

For the wiring of sections 3.2.1 and 3.2.2 ranges, always use doublecore twistedpair shielded wires. Ground the shielding of the shielded wires by connecting them to the ground terminal at the analog input terminal block (for CPU unit with analog I/O), or to the frame ground at the control panel. The analog input terminal blocks grounding terminal of the CPU unit with analog I/O is connected to the FP2 power supply units grounding terminal inside the FP2. For the current input of section 3.2.2, connect terminals V and I. For the thermocouple input of section 3.2.3, wire correctly according to the polarity of the thermocouple. Also, to lengthen the signal wire of the thermocouple, use the compensating wire of the thermocouple. For copper wiring used in wiring the R.T.D. (resistance thermometer device) in section 3.2.4, use insulated wiring, and wiring with a nominal crosssection of 1.25mm2 (or equivalent) to prevent a large buildup in electrical resistance. Do not have the analog input wiring close to AC wires, power wires, or load wires from sources other than the PLC. The terminals marked with a dot on the input and output terminal blocks are not to be used. However, they may be connected to circuits internally, so be sure not to connect any wiring to them.

w w

w w

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Wiring 3.2 Wiring for Analog Input

FP2 Analog Unit

3.2.1

Voltage Input

Voltage input for 10V, 1 to 5V and 100mV range:


Input equipment Vn COM Shielded wire In Ch n Input terminals

There is no ground terminal on the analog input units.

3.2.2

Current Input

Current input for 20mA and 4 to 20mA range:


Input equipment
Vn In

Shielded wire

COM

Ch n Input terminals

There is no ground terminal on the analog input units.

3.2.3

Thermocouple Input

Thermocouple input for J, K, R, S and T range:


Thermocouple Thermocouple polarity:+side Thermocouple polarity:side
Vn COM In

Ch n Input terminals There is no ground terminal on the analog input units.

3.2.4

R.T.D. Input

R.T.D. (Resistance Thermometer Device) input Pt100, Pt1000:


Threewire R.T.D. (Resistance thermometer device)
Vn COM In

Ch n Input terminals

There is no ground terminal on the analog input units 36 Matsushita Electric Works (Europe) AG

FP2 Analog Unit 3.3

Wiring Wiring for Analog Output

3.3

Wiring for Analog Output


Please adhere to the following guidelines when wiring your unit:

w w

For the analog output wiring, always use doublecore twistedpair shielded wires. Ground the shielding of the shielded wires at the side of the load devices. However, depending on the conditions of the external noise, it may be necessary to ground externally, or leave the shielding open. Do not have the analog output wiring close to AC wires, power wires, or load wires from sources other than the PLC. The terminals marked with a dot on the input and output terminal blocks are not to be used. However, they may be connected to circuits internally, so be sure not to connect any wiring to them.

w w

3.3.1

Voltage Output

Voltage output 10V range:


Load equipment
Vn COM

Shielded wire

Ch n Output terminals

In

3.3.2

Current Output

Current output 0 to 20mA range:


Load equipment

In COM

Shielded wire

Ch n Output terminals

Vn

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Wiring 3.4 EMC Conformity

FP2 Analog Unit

3.4

EMC Conformity

The FP2 CPU unit with analog I/O (FP2C1A), FP2 Analog input unit (FP2AD8) and FP2 Analog output unit (FP2DA4) conform to the European EMC standards EN500812: 1993, EN500822: 1995 as required by the European EMC Directive 89/336/EEC. As a condition for conformity to the above standards, a ferrite core is attached to the wiring that goes to the terminal blocks (as shown below).

Analog I/O wires

Ferrite core

Side view of analog unit

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Chapter 4 Setting the I/O Range and I/O Allocation


4.1 Setting the Input and Output Range . . . . . . . . . . . . . . . 4 3 4.1.1 4.1.2 4.2 Setting the Analog Input Range . . . . . . . . . . . 4 3 Setting the Analog Output Range . . . . . . . . . . 4 4

I/O Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5

Setting the I/O Range and I/O Allocation

FP2 Analog Unit

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FP2 Analog Unit

Setting the I/O Range and I/O Allocation 4.1 Setting the Input and Output Range

4.1

Setting the Input and Output Range

Set the analog input and output range using the range setting switch on back side of unit.

4.1.1

Setting the Analog Input Range

When setting the same range for the all the channels at once, you can only use the range setting switch. Use 1 to 5 of the range setting switch for both the CPU unit with analog I/O and analog input units. Use the table below as a base and set the range setting switch for the input range you will use. If you will be using different input ranges together, then set the range setting switch to Enable setting by software. Also, for the analog input initial settings, you must set the range for each unit by the sequence program. For detailed information,
"10V "20mA

section 5.1.
1 to 5V 4 to 20mA

"100mV

Thermocouple J

Thermocouple K

Thermocouple R

Thermocouple S

Thermocouple T

R.T.D (Pt100)

R.T.D (Pt1000)

Not used

Enable setting by software

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Setting the I/O Range and I/O Allocation 4.1 Setting the Input and Output Range

FP2 Analog Unit

4.1.2

Setting the Analog Output Range

The analog output range setting can only be performed by the range setting switch. At the CPU unit with analog I/O, use range setting switch 6, and at the analog output units, use the range setting switches 1 to 4 to set the range for each channel.

CPU unit with analog I/O: Range setting switch 6

Range
0 to 20mA

Setting

OFF

"10V

ON

Analog output unit: Range setting switch 1 ch 0 Range setting switch 2 ch 1 Range setting switch 3 ch 2 Range setting switch 4 ch 3

ch0 ch2 ch1 ch3


Range
0 to 20mA

Setting

OFF

"10V

ON

For the analog output unit, be sure to have the range setting switches 5 and 6 set to off.

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FP2 Analog Unit

Setting the I/O Range and I/O Allocation 4.2 I/O Allocation

4.2

I/O Allocation

During sequence program processing with the FP2, the analog input and output data is allocated to the I/O (X, Y) and refreshed. The I/O allocation for the analog input and output data is as shown in the table below.
CPU unit with analog I/O Channel
Analog input Ch 0 Ch 1 Ch 2 Ch 3 Analog output Ch 0

I/O Number
WX0: X0 to XF WX1: X10 to X1F WX2: X20 to X2F WX3: X30 to X3F WY4: Y40 to Y4F

Analog input unit


Analog input

Channel
Ch 0 Ch 1 Ch 2 Ch 3 Ch 4 Ch 5 Ch 6 Ch 7

I/O Number
WX(n): X(n)0 to X(n)F WX(n+1): X(n+1)0 to X(n+1)F WX(n+2): X(n+2)0 to X(n+2)F WX(n+3): X(n+3)0 to X(n+3)F WX(n+4): X(n+4)0 to X(n+4)F WX(n+5): X(n+5)0 to X(n+5)F WX(n+6): X(n+6)0 to X(n+6)F WX(n+7): X(n+7)0 to X(n+7)F

Analog output unit


Analog output

Channel
Ch 0 Ch 1 Ch 2 Ch 3

I/O Number
WY(n): Y(n)0 to Y(n)F WY(n+1): Y(n+1)0 to Y(n+1)F WY(n+2): Y(n+2)0 to Y(n+2)F WY(n+3): Y(n+3)0 to Y(n+3)F

The I/O number shown by an n in the table above is determined according to the installed slot position and the I/O allocation for other units.

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Setting the I/O Range and I/O Allocation 4.2 I/O Allocation

FP2 Analog Unit

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Chapter 5 Initial Settings


5.1 Analog Input Initial Settings . . . . . . . . . . . . . . . . . . . . . . . 5 3 5.1.1 5.1.2 5.1.3 5.1.4 5.2 No Execution of Analog Input Conversion Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Analog Input Range . . . . . . . . . . . . . . . . . . . . . 5 5 Average Processing Times . . . . . . . . . . . . . . . 5 6 Analog Input Offset . . . . . . . . . . . . . . . . . . . . . . 5 8

Analog Output Initial Settings . . . . . . . . . . . . . . . . . . . . . 5 9 5.2.1 5.2.2 Analog Output Hold . . . . . . . . . . . . . . . . . . . . . . 5 9 Analog Output Hold (Any Value) Data . . . . . . 5 9

Initial Settings

FP2 Analog Unit

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FP2 Analog Unit 5.1

Initial Settings Analog Input Initial Settings

5.1

Analog Input Initial Settings

Performs the initial settings for each channel of the analog input. The initial settings are set by the sequence program at the first scan at the start of operation. (The initial settings for the analog unit are enabled only for one time after operation start.) The items for the initial settings are given below.

No execution of analog input conversion processing setting (when you want to eliminate conversion processing time for unused input channels) Analog input range setting (when you want to set the input range individually for each channel) Average processing times setting (when you want to perform average processing for the conversion data) Analog input offset change setting (when you want to adjust the offset for the conversion data)

5.1.1

No Execution of Analog Input Conversion Processing

The program outlines below are written for the programming example that follows. You can use either NPSTGR or NAiS Control for programming. Please note the slight differences between the two tools: You need not specify data registers using NAiS Control. NAiS Control automatically assigns an available data register unless you specify otherwise (in the Global Variable List). IEC commands are used instead of Matsushita instructions in some places. Hexadecimal values are represented by the prefix 16# and not H.

Decimal values do not require a K prefix.

Example Description Specifies the input channels that will not execute conversion processing. (The default setting is for all channels to execute conversion processing.) In this case ch0 and ch1 will execute conversion processing, and ch2 and ch3 will not. * next page

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Initial Settings 5.1 Analog Input Initial Settings

FP2 Analog Unit

Programming example for NPSTGR R9013 F151 WRT , K0 , DT 0 , K1 , K16


Initial setting When the analog input unit is installed at slot 0

DT0 = H0011

Shared memory address 16

Programming example for NAiS Control POU Header All input and output variables that are required for the program are declared in the POU header.

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

+ Note

For more detailed information on the shared memory, * section B.2.2.

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FP2 Analog Unit 5.1

Initial Settings Analog Input Initial Settings

5.1.2

Analog Input Range

Specifies the input range code when setting input ranges for each input channel. Example Description When ch0: 10V, ch1: 1 to 5V, ch2: thermocouple K, and ch3: R.T.D. Pt100 Programming example for NPSTGR (Set the range setting switch to Enable setting by software and conversion will not be executed for that input channel if there is no input range code specification.) R9013 F151 WRT , K0 , DT 0 , K2 , K18

Initial setting When the analog input unit is installed at slot 0

DT0 = H0701 DT1 = H120E

Shared memory address 18 is head address

Programming example for NAiS Control POU Header All input and output variables that are required for the program are declared in the POU header.

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

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Initial Settings 5.1 Analog Input Initial Settings

FP2 Analog Unit

5.1.3

Average Processing Times

Specifies the average times for each input channel. If there is no specification for the average times, then that input channel will perform normal sampling. Also: K0 (0 times) is specified: No average processing, and normal sampling processing. K1 (1 time) is specified: No average processing, and normal sampling processing. K2 (2 times) is specified: No average processing, and normal sampling processing. Other than K0 to K64 (0 to 64 times) is specified: average processing is performed with K64 as the specified setting. Example Description When ch0: No average processing, ch1: 3 times, ch2: 10 times, ch3: 20 times Programming example for NPSTGR R9013 F151 WRT , K0 , DT 0 , K4 , K22
DT0 = K0 DT1 = K3 DT2 = K10 DT3 = K20

Initial setting When the analog input unit is installed at slot 0

Shared memory address 22 is head address

Programming example for NAiS Control POU Header All input and output variables that are required for the program are declared in the POU header.

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FP2 Analog Unit 5.1

Initial Settings Analog Input Initial Settings

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

+ Note

For more detailed information on the shared memory, * section B.2.2.

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Initial Settings 5.1 Analog Input Initial Settings

FP2 Analog Unit

5.1.4

Analog Input Offset

Specifies the digital value for the offset amount for each input channel. Between the range K2048 to K2047 can be set as the digital value for the offset amount; however, the range that can be obtained for the analog input conversion value that the offset is applied to is limited to between K32768 and K32767. Example Description When the applied offsets are ch0: K0 (no offset), ch1: K3, ch2: K10, and ch3: K20 Programming example for NPSTGR R9013 F151 WRT, K0 , DT 0 , K4 , K30
DT0 = K0 DT1 = K3 DT2 = K10 DT3 = K20

Initial setting

When the analog input unit is installed at slot 0

Shared memory address 30 is head address

Programming example for NAiS Control POU Header All input and output variables that are required for the program are declared in the POU header.

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

+ Note
58

For more detailed information on the shared memory, * section B.2.5.


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FP2 Analog Unit 5.2

Initial Settings Analog Output Initial Settings

5.2

Analog Output Initial Settings

Performs the initial settings for each channel of the analog output. The initial settings are set by sequence program at the first scan at the start of operation. (The initial settings for the analog unit are enabled only for one time after operation start.) The items for the initial settings are given below.

Analog output hold setting (when you do not want to clear the analog output in the PROG. mode) Analog output hold (any value) data setting (when you want to hold at a desired value in the PROG. mode)

5.2.1

Analog Output Hold

Specifies either nonhold, hold (final value during RUN mode), or hold (any value) operation for each output channel. (Default is nonhold operation.)

5.2.2

Analog Output Hold (Any Value) Data

Specifies the digital data for the analog output that you want to output at the output channel set at hold (any value) in the analog output hold setting. The data that can be specified is as shown below for each range. "10V range: K2048 to K2047 0 to 20mA: K0 to K4095 Example Description When you want to hold a 10mA output at ch0 in the program mode. Programming example for NPSTGR
R9013
Initial setting

F151 WRT , K 0 , DT 0 , K 2 , K 38

When the analog output unit is installed at slot 0

DT0 = H0002 DT1 = K2047

Shared memory address 38 is head address

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Initial Settings 5.2 Analog Output Initial Settings

FP2 Analog Unit

Programming example for NAiS Control POU Header All input and output variables that are required for the program are declared in the POU header.

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

+ Note

For more detailed information on the shared memory, * section B.3.1.

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Chapter 6 Analog I/O Conversion


6.1 6.2 6.3 Analog Input Conversion Characteristics . . . . . . . . . . . 6 3 Analog Output Conversion Characteristics . . . . . . . . . 6 11 Analog Input and Output Conversion Cycle Time . . . 6 13 6.3.1 6.3.2 Analog Input Conversion Cycle Time . . . . . . 6 13 Analog Output Conversion Cycle Time . . . . 6 14

Analog I/O Conversion

FP2 Analog Unit

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FP2 Analog Unit 6.1

Analog I/O Conversion Analog Input Conversion Characteristics

6.1

Analog Input Conversion Characteristics

The conversion characteristics of the analog input range are shown below. 10V to +10V DC
Value

+32767

+16383

10

5 0 +5 +10 V

16384

32768

Input range 10V to +10V DC


V
10 7.5 5 2.5 0 2.5 5 7.5 10

Value
32768 24576 16384 8192 0 8191 16383 24574 32767

If the input value exceeds the rated analog input range, the converted value becomes:
Input value
10V or less +10V or more

Converted value
32768 + 32767

* next page
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Analog I/O Conversion 6.1 Analog Input Conversion Characteristics

FP2 Analog Unit

100mV to +100mV DC
Value

+32767

+16383

100

50 0 +50 +100 mV

16384

32768

Input range 100mV to +100mV DC


V
100 75 50 25 0 25 50 75 100

Value
32768 24576 16384 8192 0 8191 16383 24574 32767

If the input value exceeds the rated analog input range, the converted value becomes:
Input value
100mV or less +100mV or more

Converted value
32768 +32767

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FP2 Analog Unit 6.1

Analog I/O Conversion Analog Input Conversion Characteristics

1V to 5V DC
Value +13106

+6553

+1

+3

+5

Input range 1V to 5V DC
V
1 2 3 4 5

Value
0 3276 6553 9829 13106

If the input value exceeds the rated analog input range, the converted value becomes:
Input value
1V or less 5V or more

Converted value
0 +13106

* next page

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Analog I/O Conversion 6.1 Analog Input Conversion Characteristics

FP2 Analog Unit

20mA to +20mA DC
Value

+16383

+8191

20

10 0 +10 +20 mA

8192

16384

Input range 20mA to +20mA DC


mA
20 15 10 5 0 5 10 15 20

Value
16384 12288 8192 4096 0 4095 8191 12285 16383

If the input value exceeds the rated analog input range, the converted value becomes:
Input value
-20mA or less +20mA or more

Converted value
Conversion will be performed even when outside of the allowable range, but the precision cannot be guaranteed.

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FP2 Analog Unit 6.1

Analog I/O Conversion Analog Input Conversion Characteristics

4mA to 20mA DC
Value +13106

+6553

+4

+12

+20

mA

Input range 4mA to 20mA DC


mA
4 8 12 16 20

Value
0 3276 6553 9828 13106

If the input value exceeds the rated analog input range, the converted value becomes:
Input value
4mA or less 20mA or more

Converted value
0 +13106

* next page

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Analog I/O Conversion 6.1 Analog Input Conversion Characteristics

FP2 Analog Unit

Thermocouple (S, J, K, T, R)
Value 15000 Thermocouple S,R

10000

Thermocouple K

7500

Thermocouple J

3500 40 50 200

Thermocouple T

Thermocouple S Thermocouple R

0 350 400 500 750 1000 1500

_ C

Thermocouple J, K, T

2000

Thermocouple S
C
40 20 0 250 500 750 1000 1250 1500

Thermocouple J
C
200 100 0 125 250 375 500 625 750

Thermocouple K
C
200 150 100 50 0 250 500 750 1000

Value
400 200 0 2500 5000 7500 10000 12500 15000

Value
2000 1000 0 1250 2500 3750 5000 6250 7500

Value
2000 1500 1000 500 0 2500 5000 7500 10000

Thermocouple T
C
200 100 50 0 70 140 210 280 350

Thermocouple R
C
50 25 0 250 500 750 1000 1250 1500

Value
2000 1000 500 0 700 1400 2100 2800 3500

Value
500 250 0 2500 5000 7500 10000 12500 15000

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FP2 Analog Unit 6.1

Analog I/O Conversion Analog Input Conversion Characteristics

If the input value exceeds the rated analog input range, the converted value becomes:
Range
Thermocouple S

Input value
40_C or less (* note) +1500_C or more 200_C or less +750_C or more 200_C or less +1000_C or more 200_C or less +350_C or more 50_C or less (* note) +1500_C or more

Converted value
400 +15000 2000 +7500 2000 +10000 2000 +3500 500 +15000 +20000

Thermocouple J

Thermocouple K

Thermocouple T

Thermocouple R

Broken wire

+ Note

For the S and R ranges, conversion will be performed even if the input is outside of the ranges 0 to -405C and 0 to -505C (respectively), but the precision cannot be guaranteed.

* next page

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Analog I/O Conversion 6.1 Analog Input Conversion Characteristics

FP2 Analog Unit

R.T.D. (Resistance thermometer device) (Pt100, Pt1000)


Value Pt100

5000

1000 100 0 Pt100 Pt1000 100 1000

Pt1000

500

5 C

R.T.D. Pt100
C
100 50 25 0 100 200 300 400 500

R.T.D. Pt1000
Value
1000 500 250 0 1000 2000 3000 4000 5000

C
100 75 50 25 0 25 50 75 100

Value
1000 750 500 250 0 250 500 750 1000

If the input value exceeeds the rated analog input range, the converted value becomes:
Range
Pt100

Input value
100_ or less C +500_ or more C 100_ or less C +100_ or more C

Converted value
1000 +5000 1000 +1000 +20000

Pt1000

Broken wire

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FP2 Analog Unit 6.2

Analog I/O Conversion Analog Output Conversion Characteristics

6.2

Analog Output Conversion Characteristics

The conversion characteristics of analog output range are shown below.


10V to +10V DC
V

+10

+5

2048

1024 0 +1023 +2047 Value

10

Output range 10V to +10V DC


V
10 7.5 5 2.5 0 2.5 5 7.5 10

Value
2048 1536 1024 512 0 511 1023 1534 2047

If the input value exceeds the rated digital input range, the analog output value becomes:
Digital input value
2049 or less +2048 or more

Analog output value


Invariable (holds the output value that corresponds to the previous effective input value) Invariable (holds the output value that corresponds to the previous effective input value)

* next page
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Analog I/O Conversion 6.2 Analog Output Conversion Characteristics

FP2 Analog Unit

0mA to 20mA DC
mA +20

+10

+2047

+4095 Value

Output range 0mA to 20mA DC


mA
20 17.5 15 12.5 10 7.5 5 2.5 0

Value
4095 3580 3069 2558 2047 1534 1023 511 0

If the input value exceeds the rated digital input range, the analog output value becomes:
Digital input value
1 or less +4096 or more

Analog output value


Invariable (holds the output value that corresponds to the previous effective input value) Invariable (holds the output value that corresponds to the previous effective input value)

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FP2 Analog Unit 6.3

Analog I/O Conversion Analog Input and Output Conversion Cycle Time

6.3
6.3.1

Analog Input and Output Conversion Cycle Time


Analog Input Conversion Cycle Time

When setting the range for each analog input channel, the conversion cycle time of the channel you want can be calculated by the formula below. Conversion cycle time = (0.5 ms n1 + 2 ms n2 + 3 ms n3) n4

n1: Number of input channels used (number of input channels set for execution of conversion processing) n2: Number of gain types among all the used input channels When used with different input ranges, the processing will differ due to the difference in the signal processing gain at each input range. Therefore, clarify the gain types among the input channels used based on the table below. n3: Number of temperature input channels among all the input channels used n4: Conversion processing coefficient The coefficient that corresponds to the input range of the channel for which you want to ascertain the conversion cycle time (* table below).
Input range
10V 1 to 5V 20mA 4 to 20mA 100mV Thermocouple (Pt100) Thermocouple (Pt1000) 100 times 150 times 50 times n4 = 30

Gain
1 time

Conversion processing coefficient


n4 = 1

Example of conversion cycle time calculation 1 Ch0 thermocouple k Ch1 thermocouple J Ch2 10V Ch3 Pt1000 Ch4 thermocouple J Ch5 100mV Ch6 thermocouple J Ch7 Pt100 Ch2 (10V) conversion cycle time = (0.5 8 + 2 4 + 3 6) 1 = 30ms Ch0 (thermocouple K) conversion cycle time = (0.5 8 + 2 4 + 3 6) 30 = 900ms * next page
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Number of input channels used: n1 = 8 Number of gain types: n2 = 4 Number of temperature input channels: n3 = 6

Analog I/O Conversion 6.3 Analog Input and Output Conversion Cycle Time

FP2 Analog Unit

Example of conversion cycle time calculation 2 Ch0 thermocouple K Ch1 thermocouple J Ch2 10V Ch3 thermocouple J Ch4 not used Ch5 not used Ch6 thermocouple J Ch7 not used Ch2 (10V) conversion cycle time = (0.5 5 + 2 2 + 3 4) 1 = 18.5ms Ch0 (thermocouple K) conversion cycle time = (0.5 5 + 2 2 + 3 4) 30 = 555ms The conversion cycle time when setting the range for each analog input channel was explained above; however, the conversion cycle time when the ranges for all channels are set together by the DIP switches can be determined by the formula below. Conversion cycle time = set range conversion speed number of input channels used (number of input channels set for execution of conversion processing) Number of input channels used: n1 = 5 Number of gain types: n2 = 2 Number of temperature input channels: n3 = 4

6.3.2

Analog Output Conversion Cycle Time

The analog output conversion cycle time can be determined by the formula below. Conversion cycle time = conversion speed (0.5ms) number of output channels used (number of output channels set for execution of conversion processing)

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Chapter 7 Procedure for Handling Analog Unit


7.1 7.2 7.3 Outline of Procedure for Handling Analog Unit . . . . . . 7 3 Reading the Analog Input Data . . . . . . . . . . . . . . . . . . . 7 4 Writing the Analog Output Data . . . . . . . . . . . . . . . . . . . 7 5

Procedure for Handling Analog Unit

FP2 Analog Unit

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FP2 Analog Unit 7.1

Procedure for Handling Analog Unit Outline of Procedure for Handling Analog Unit

7.1

Outline of Procedure for Handling Analog Unit

The procedure for handling the FP2 analog unit is as follows. Procedure: 1. Setting the analog input and output range Set the range using the range setting switch on back side of unit. Unit installation Install the unit onto the backplane. Wiring Connect the analog input and output signal. Turn on power Analog input and output initial setting Sets the initial settings by the sequence program. (The initial settings are set by the first scan at operation start.) Analog input data reading Analog output data writing Performs the reading and writing by the sequence program.

2. 3. 4. 5.

6.

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Procedure for Handling Analog Unit 7.2 Reading the Analog Input Data

FP2 Analog Unit

7.2

Reading the Analog Input Data

During sequence program processing with the FP2, the analog input data is allocated to the general input (X) and refreshed. In other words, the analog input conversion data is automatically refreshed and stored from the analog input circuit to the FP2 input relay area. When the analog input conversion data is processed at the sequence program, refer to the allocated input relay area (WX) data. For detailed information, section 4.2. Precautions regarding the analog input data reading The time from the end of startup of the FP2 to the setting of the first analog input data of the conversion processing to the readable area of FP2 CPU unit on the analog input circuit differs depending on the analog input range and is given in the table below.
Input range
Voltage input range Current input range Thermocouple input range R.T.D. (Resistance thermometer device) input range

CPU unit with analog I/O (FP2C1A)


460ms 460ms 910ms 3350ms

Analog input unit (FP2AD8)


430ms 430ms 1330ms 6490ms

Until the first conversion data is set, the analog input data of the area is zero (K0). Perform the processing by taking into consideration the time until the first conversion data is set during the analog input conversion data processing of the sequence program. To ascertain the timing of how the first conversion is set, use the preparation completion flags of the shared memory.

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FP2 Analog Unit 7.3

Procedure for Handling Analog Unit Writing the Analog Output Data

7.3

Writing the Analog Output Data

During sequence program processing with the FP2, the analog output data is allocated to the general output (Y) and refreshed. The analog output data is automatically refreshed and written from the FP2 output relay area to the analog output circuit. When the analog output is processed at the sequence program, write the data that you want for analog output for the allocated output relay area (WY). For more information regarding the allocvation of the analog output data to the general section 4.2. output,

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Procedure for Handling Analog Unit 7.3 Writing the Analog Output Data

FP2 Analog Unit

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Chapter 8 Analog Input Sample Programs


8.1 8.2 8.3 8.4 CPU Unit with Analog I/O Basic Program . . . . . . . . . . 8 3 Analog Input Unit Basic Program . . . . . . . . . . . . . . . . . 8 7 CPU with Analog I/O Scale Conversion Program . . 8 12 Temperature Sensor Input Broken Wire Detection . 8 17

Analog Input Sample Programs

FP2 Analog Unit

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FP2 Analog Unit 8.1

Analog Input Sample Programs CPU Unit with Analog I/O Basic Program

8.1

CPU Unit with Analog I/O Basic Program

The program outlines below are written for the programming example that follows. You can use either NPSTGR or NAiS Control for programming. Please note the slight differences between the two tools: You need not specify data registers using NAiS Control. NAiS Control automatically assigns an available data register unless you specify otherwise (in the Global Variable List). IEC commands are used instead of Matsushita instructions in some places. Hexadecimal values are represented by the prefix 16# and not H.

Decimal values do not require a K prefix.

Program outline Using Ch 0 to Ch 2 (set for no execution of input conversion processing) of the CPU unit with analog I/O, this program reads the analog input data to the data registers DT100 to DT102 (NPSTGR) or to the variables Temperature, Pressure, and Voltage (NAiS Control) using the preparation completion flag.
Converts the analog values 10 to +10V that were read to the digital values 32768 to 32767 (if, for example, the analog input range was set to 10 to +10V DC) V or I

CPU unit with analog I/O

Analog input

t (Value) +32767 +16383 10 5 0 +5 +10 (V) 16384 32768

Input range: 10 to + 10V DC V 10 7.5 5 2.5 0 2.5 5 7.5 10 Value 32768 24576 16384 8192 0 8191 16383 24574 32767

By the move instruction the contents of input relay area (NPSTGR) or the variables Temperature, Pressure, and Voltage (NAiS Control) that is located at address WX0 to WX2 are read to the data registers DT100 to DT102 .

Settings Channels that execute analog input conversion processing H111: Ch 0 to Ch 2 are set for execution and Ch 3 is not set for execution * next page

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Analog Input Sample Programs 8.1 CPU Unit with Analog I/O Basic Program

FP2 Analog Unit

I/O allocation
I/O number
WX0 WX1 WX2

NAiS Control Variables


Ch0_in Ch1_in Ch2_in

Contents
Analog input data for Ch 0 Analog input data for Ch 1 Analog input data for Ch 2

Shared memory
Address 10 Address 16 Preparation completion flag for Ch 0 to Ch 3 analog inputs No execution of conversion processing setting for Ch 0 to Ch 3 analog inputs

Programming example for NPSTGR


R 9013
Initial setting

F0 MV , F151 WRT ,

H 111

DT 0
Ch 0 to Ch 2 execution Execution of conversion processing setting for Ch 0 to Ch 2 analog inputs

K 0 , DT 0 , K 1 , K 16
Ch 0 to Ch 2 execution

Specifies the CPU unit with analog I/O in slot no. 0. The 1word data from data register DT 0 is written to the shared memory address 16.

R0 F0 MV ,
Ch 0 preparation completion

WX 0

DT 100

Ch 0 Input value

R1 F0 MV ,
Ch 1 preparation completion

WX 1

DT 101

Analog input Reading

Ch 1 Input value

R2 F0 MV ,
Ch 2 preparation completion

WX 2

DT 102

Ch 2 Input value

R 9010 F150 READ , K 0 , K 10 , K 1 , WR 0


Always on Specifies the CPU unit with analog I/O in slot no. 0. The 1word data from shared memory address 10 is read to the internal relay WR0. Preparation completion flag area Preparation completion flag for analog input Reading

ED

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FP2 Analog Unit 8.1

Analog Input Sample Programs CPU Unit with Analog I/O Basic Program

Programming example for NAiS Control Global Variable List The following global variables are accessed by the variable class VAR_EXTERNAL in the programs header.

POU Header All input and output variables that are required for the program are declared in the POU header.

next page

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Analog Input Sample Programs 8.1 CPU Unit with Analog I/O Basic Program

FP2 Analog Unit

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

+ Note

For more detailed information on the shared memory, * section B.2.2.

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FP2 Analog Unit 8.2

Analog Input Sample Programs Analog Input Unit Basic Program

8.2

Analog Input Unit Basic Program

The program outlines below are written for the programming example that follows. You can use either NPSTGR or NAiS Control for programming. Please note the slight differences between the two tools: You need not specify data registers using NAiS Control. NAiS Control automatically assigns an available data register unless you specify otherwise (in the Global Variable List). IEC commands are used instead of Matsushita instructions in some places. Hexadecimal values are represented by the prefix 16# and not H.

Decimal values do not require a K prefix.

Program outline Using Ch 0 to Ch 5 (set for no execution of input conversion processing) of the analog input unit, this program reads the analog input data to the data registers DT100 to DT105 (NPSTGR) or to the variables Temperature, Pressure, Voltage, Current, Acceleration, and Temperature_1 (NAiS Control) using the preparation completion flag.
Converts the analog values 4 to 20mA that were read to the digital values 0 to 13106 (if, for example, the analog input range was set to 4 to 20mA DC) V or I

(Value) +13106

Analog input unit

CPU unit

Analog input

+6553

By the move instruction, the contents of input relay areas (NPST GR) or the variables Temperature, Pressure, Voltage, Current, Acceleration, and Temperature_1 (NAiS Control) that is located at address WX0 to WX5 are read to the data registers DT100 to DT105.

Input range: 4 to 20mA DC mA Value 4 0 8 3276 12 6553 16 9828 20 13106

+4

+12

+20 (mA)

* next page

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Analog Input Sample Programs 8.2 Analog Input Unit Basic Program

FP2 Analog Unit

Settings Channels that execute analog input conversion processing H1111: Ch 0 to Ch 3 are set for execution H11: Ch 4 and Ch 5 are set for execution and Ch 6 and Ch 7 are not set for execution I/O allocation
I/O number
WX0 WX1 WX2 WX3 WX4 WX5

NAiS Control Variables


Ch0_in Ch1_in Ch2_in Ch3_in Ch4_in Ch5_in

Contents
Analog input data for Ch 0 Analog input data for Ch 1 Analog input data for Ch 2 Analog input data for Ch 3 Analog input data for Ch 4 Analog input data for Ch 5

Shared memory
Address 10 Address 16 Address 17 Preparation completion flag for Ch 0 to Ch 7 analog inputs No execution of conversion processing setting for Ch 0 to Ch 3 analog inputs No execution of conversion processing setting for Ch 4 to Ch 7 analog inputs

For detailed information on the shared memory area,

section B.1.2.

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FP2 Analog Unit 8.2

Analog Input Sample Programs Analog Input Unit Basic Program

Programming example for NPSTGR


R 9013
Initial setting

F0 MV , F151 WRT ,

H 1111

DT 0
Ch 0 to Ch 3 execution Execution of conversion processing setting for Ch 0 to Ch 3 analog inputs

K 0 , DT 0 , K 1 , K 16
Ch 0 to Ch 3 execution

Specifies the analog input unit in slot no. 0. The 1word data from data register DT 0 is written to the shared memory address 16.

F0 MV , F151 WRT ,

H 11

DT 1
Ch 4 and Ch 5 execution Execution of conversion processing setting for Ch 4 and Ch 5 analog inputs

K 0 , DT 1 , K 1 , K 17
Ch 4 and Ch 5 execution

Specifies the analog input unit in slot no. 0. The 1word data from data register DT 1 is written to the shared memory address 17.

R0
Ch 0 preparation R 1 completion Ch 1 preparation R 2 completion Ch 2 preparation R 3 completion Ch 3 preparation R 4 completion Ch 4 preparation R 5 completion Ch 5 preparation completion

F0 MV ,

WX 0

DT 100

Ch 0 Input value

F0 MV ,

WX 1

DT 101

Ch 1 Input value

F0 MV ,

WX 2

DT 102
Analog input Reading

Ch 2 Input value

F0 MV ,

WX 3

DT 103

Ch 3 Input value

F0 MV ,

WX 4

DT 104

Ch 4 Input value

F0 MV ,

WX 5

Ch 5 Input value

DT 105

R 9010

F150 READ , K 0 , K 10 , K 1 , WR 0
Always on Specifies the analog input unit in slot no. 0. The 1word data from shared memory address 10 is read to the internal relay WR0. Preparation completion flag area

Preparation completion flag for analog input Reading

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Analog Input Sample Programs 8.2 Analog Input Unit Basic Program

FP2 Analog Unit

Programming example for NAiS Control Global Variable List The following global variables are accessed by the variable class VAR_EXTERNAL in the programs header.

POU Header All input and output variables that are required for the program are declared in the POU header.

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FP2 Analog Unit 8.2

Analog Input Sample Programs Analog Input Unit Basic Program

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

+ Note

Please note that the function Adr_Of_Var_I is only available from NAiS Control Version 2.3b onwards.
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Analog Input Sample Programs 8.3 CPU with Analog I/O Scale Conversion Program

FP2 Analog Unit

8.3

CPU with Analog I/O Scale Conversion Program

The program outlines below are written for the programming example that follows. You can use either NPSTGR or NAiS Control for programming. Please note the slight differences between the two tools: You need not specify data registers using NAiS Control. NAiS Control automatically assigns an available data register unless you specify otherwise (in the Global Variable List). IEC commands are used instead of Matsushita instructions in some places. Hexadecimal values are represented by the prefix 16# and not H.

Decimal values do not require a K prefix.

Program outline Using Ch 0 to Ch 2 (set for no execution of input conversion processing) of the CPU unit with analog I/O, this program reads the scaleconverted* analog input data to the data registers DT104 and DT114 (NPSTGR) or to the variables Temperature and Pressure (NAiS Control) using the preparation completion flag. *Scaleconverted : Conversion of the analog input data to numerical values that are easier to manage.
+13106 (Value) +5000 (Value)

+6553

Scale conversion

+3000

+1

+3

+5 (V)

+1000

+1

+3

+5 (V)

For the sample program, the input data is converted to easytouse value using the highlevel instructions F30 (*)/E_MUL 16bit multiplier, F33 (D%)/E_DIV 32bit subtractor and F22/E_ADD (+) 16bit addition. Calculation of the NPSTGR example In the case of Ch 0, the data read to DT100 is multiplied by K4000, and the result is stored in DT101 (as Ch 0conversion1). The data stored in DT101 is divided by K13106, and that result is stored in DT103 (as Ch 0conversion2). Then the data stored in DT104 is added by K1000, and the result is stored in DT104 (as ch0conversion3).

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FP2 Analog Unit 8.3

Analog Input Sample Programs CPU with Analog I/O Scale Conversion Program

Calculation of the NPSTGR example In the case of Ch 0, the input data of Ch0 is multiplied by 4000 and then divided by 13106. Next, 1000 is added and the result is stored to the variable Temperature.

Example:

Input data value 6553 Input data value 13106

K4000 B K13106 +K1000 3000 K4000 B K13106 +K1000 5000

Settings Channels that execute analog input conversion processing H11: Ch 0 and Ch 1 are set for execution and ch2 and Ch 3 are not set for execution I/O allocation
I/O number
WX0 WX1

NAiS Control
Ch0_in Ch1_in

Contents
Analog input data for Ch 0 Analog input data for Ch 1

Data registers and variables


NPSTGR
DT104 DT114

NAiS Control
Temperature Pressure

Comment
Stores scaleconverted input data (Ch 0conversion3) for Ch 0 Stores scaleconverted input data (Ch 1conversion3) for Ch 1

Shared memory
Address 10 Address 16 Preparation completion flag for Ch 0 to Ch 3 analog inputs No execution of conversion processing setting for Ch 0 to Ch 3 analog inputs

For detailed information,

section B.1.1.

* next page

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Analog Input Sample Programs 8.3 CPU with Analog I/O Scale Conversion Program

FP2 Analog Unit

Programming example for NPSTGR


R 9013 F0 MV ,
Initial setting

11 ,

DT 0
Ch 0 and 1 execution Execution of conversion processing setting for Ch 0 and Ch 1 analog inputs

F151 WRT ,

K 0 , DT 0 , K 1 , K 16
Ch 0 and 1 execution

Specifies the CPU unit with analog I/O in slot no. 0. The 1word data from data register DT 0 is written to the shared memory address 16.

R0 F0 MV ,
Ch 0 preparation completion

WX 0 ,

DT 100
Ch 0 reading Ch 0conversion1

Ch 0 Input value

Analog input Reading

F30

, DT 100 , K 4000 , DT 101


Ch 0 reading Ch 0conversion1 Scale conversion Ch 0conversion2 Ch 0conversion3

F33 D% , DT 101 , K 13106, DT 103 F22 + R1


Ch 1 preparation completion

K0 to K13106 K1000~K5000
Analog input Reading

, DT 103 , K 1000 , DT 104


Ch 0conversion2

F0 MV , F30

Ch 1 Input value

WX 1 ,

DT 110
Ch 1 reading Ch 1conversion1

, DT 110 , K 4000 , DT 111


Ch 1 reading Scale conversion Ch 1conversion1 Ch 1conversion2 Ch 1conversion3

F33 D% , DT 111 , K 13106, DT 113 F22 + , DT 113 , K 1000 , DT 114


Ch 1conversion2

K0 to K13106 K1000 to K5000

R 9010
Always on

F150 READ, K 0 , K 10 , K 1 , WR 0
Preparation completion flag area

Preparation completion flag for analog input Reading

Specifies the CPU unit with analog I/O in slot no. 0.

The 1word data from shared memory address 10 is read to the internal relay WR0.

ED

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FP2 Analog Unit 8.3

Analog Input Sample Programs CPU with Analog I/O Scale Conversion Program

Programming example for NAiS Control Global Variable List The following global variables are accessed by the variable class VAR_EXTERNAL in the programs header.

POU Header All input and output variables that are required for the program are declared in the POU header.

* next page

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8 15

Analog Input Sample Programs 8.3 CPU with Analog I/O Scale Conversion Program

FP2 Analog Unit

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

+ Note

Please note that the function Adr_Of_Var_I is only available from NAiS Control Version 2.3b onwards.

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FP2 Analog Unit 8.4

Analog Input Sample Programs Temperature Sensor Input Broken Wire Detection

8.4

Temperature Sensor Input Broken Wire Detection

For the input channels of the thermocouple input range and R.T.D (resistance thermometer device) input range, you can detect broken wires in the input wiring for each channel. For the detection of the broken wires, there are two methods of detection: 1. 2. Detection performed by the brokenwire detection flags in shared memory. Detection by the temperature sensor input conversion data (the conversion data is K20000).

Example Description When the reading conditions for the analog input Ch0 conversion data is to use the brokenwire detection flag (option 1 above) and read to DT0 (NPSTGR) or to the variable Voltage (NAiS Control). Programming example for NPSTGR
R9010 F150 READ, K 0 , K 42 , K 1 , WR 0
Initial setting When the analog input unit is installed at slot 0 From shared memory address 42

R0 F0 MV
Ch0 reading

To WR0

WX 0

DT 0

* next page

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8 17

Analog Input Sample Programs 8.4 Temperature Sensor Input Broken Wire Detection

FP2 Analog Unit

Programming example for NAiS Control POU Header All input and output variables that are required for the program are declared in the POU header.

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

+ Notes

Please note that the function Adr_Of_Var_I is only available from NAiS Control Version 2.3b onwards. For more information on shared memory, * sections B.1.2 and B.2.6.

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FP2 Analog Unit 8.4

Analog Input Sample Programs Temperature Sensor Input Broken Wire Detection

Precautions when using broken wire detection for the resistance thermometer device input wiring For broken wire detection in the FP2 threewire resistance thermometer device input wiring, depending on which wire breaks as shown below, there are situations where the broken wire detection cannot be performed. Wire (1) is broken: Broken wire detection is possible Only (2) wire is broken: Broken wire detection is not possible Only (3) wire is broken: Broken wire detection is not possible Wires (2) and (3) are broken: Broken wire detection is possible
Threewire R.T.D (Resistance thermometer device) (1) (2) (3) Vn COM In Ch n Input terminals

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8 19

Analog Input Sample Programs 8.4 Temperature Sensor Input Broken Wire Detection

FP2 Analog Unit

8 20

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Chapter 9 Analog Output Sample Program


9.1 Analog Output Unit Basic Program . . . . . . . . . . . . . . . 9 3

Analog Output Sample Program

FP2 Analog Unit

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FP2 Analog Unit 9.1

Analog Output Sample Program Analog Output Unit Basic Program

9.1

Analog Output Unit Basic Program

Program outline This program writes the output data stored in data registers DT100 and DT101 (NPSTGR) or to the variables Speed and Force (NAiS Control) to the output relay areas that are located at address WY0 and WY1, which correspond to the output channels Ch 0 and Ch 1 of the analog output unit set for the execution of conversion processing.
By the move instruction, the stored digital values of the desired data registers DT100 and DT101 (NPSTGR) or of the variables Speed and Force (NAiS Control) to the output relay areas that are located at address WY0 and WY1 for analog output unit.

Analog output unit

V or I

CPU unit

Analog output t Output range: 0 to 20mA DC mA 20 17.5 15 12.5 10 7.5 5 2.5 0 Value 4095 3580 3069 2558 2047 1534 1023 511 0 (mA) +20

Converts the digital values 0 to 4095 that were written in WY0 and WY1 to the analog values 0 to 20 mA (if, for example, the analog output range was set to 0 to 20mA DC)

+10

(Value) 0 +2047 +4095

* next page

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93

Analog Output Sample Program 9.1 Analog Output Unit Basic Program

FP2 Analog Unit

Settings Channels that execute analog output conversion processing H11: Ch 0 and Ch 1 are set for execution and Ch 2 and Ch 3 is not set for execution I/O Allocation
I/O number
WY0 WY1

NAiS Control Variables


Ch0_out Ch1_out

Contents
Analog output data for Ch 0 Analog output data for Ch 1

Shared memory
Address 16 No execution of conversion processing setting for Ch 0 to Ch 3 analog outputs

For detailed information on shared memory, Programming example for NPSTGR

section B.1.3.

R 9013
Initial setting

F0 MV , H 11 , DT 0
Ch 0 and Ch 1 execution

F151 WRT , K 0 , DT 0 , K 1 , K 16
Ch 0 and Ch 1 execution Specifies the analog output unit in slot no. 0. The 1word data from data register DT 0 is written to the shared memory address 16.

Execution of conversion processing setting for Ch 0 and Ch 1 analog outputs

R 9010 Always on F0 MV , DT 100 , WY 0


Ch 0 output Analog output data Writing

F0 MV , DT 101 , WY 1
Ch 1 output

ED

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FP2 Analog Unit 9.1

Analog Output Sample Program Analog Output Unit Basic Program

Programming example for NAiS Control Global Variable List The following global variables are accessed by the variable class VAR_EXTERNAL in the programs header.

POU Header All input and output variables that are required for the program are declared in the POU header.

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

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Analog Output Sample Program 9.1 Analog Output Unit Basic Program

FP2 Analog Unit

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Chapter 10 Analog Input Average Processing Setting


10.1 CPU Unit with Analog I/O Sample Program . . . . . . . 10 3 10.2 Analog Input Unit Sample Program . . . . . . . . . . . . . . 10 8

Analog Input Average Processing Setting

FP2 Analog Unit

10 2

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FP2 Analog Unit 10.1

Analog Input Average Processing Setting CPU Unit with Analog I/O Sample Program

10.1 CPU Unit with Analog I/O Sample Program


The program outlines below are written for the programming example that follows. You can use either NPSTGR or NAiS Control for programming. Please note the slight differences between the two tools: You need not specify data registers using NAiS Control. NAiS Control automatically assigns an available data register unless you specify otherwise (in the Global Variable List). IEC commands are used instead of Matsushita instructions in some places. Hexadecimal values are represented by the prefix 16# and not H.

Decimal values do not require a K prefix.

Program outline After averaging the analog input data for Ch 0 to Ch 2 (set for no execution of input conversion processing) of the CPU unit with analog I/O, this program reads the averages to the data registers DT100 to DT102 (NPSTGR) or to the variables Temperature, Pressure, and Voltage (NAiS Control) using the preparation completion flag.
Averages the analog values that were read and stores the averages in the conversion value area (input relay area). (V)

Analog input

CPU unit with analog I/O

Average processing (t) (Value) Sampling processing (Value) Minimum value Maximum value

By the move instruction the contents of input relay area (NPSTGR) or the variables Temperature, Pressure, and Voltage (NAiS Control) that is located at address WX0 to WX2 are read to the data registers DT100 to DT102 .

(t) Stores the average value (excluding the maximum and minimum values) to conversion value area.

(t)

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10 3

Analog Input Average Processing Setting 10.1 CPU Unit with Analog I/O Sample Program

FP2 Analog Unit

Settings Channels that execute analog input conversion processing H111: Ch 0 to Ch 2 are set for execution and Ch 3 is not set for execution I/O allocation
I/O number
WX0 WX1 WX2

NAiS Control Variables


Ch0_in Ch1_in Ch2_in

Contents
Analog input data for Ch 0 Analog input data for Ch 1 Analog input data for Ch 2

Shared memory
Address 10 Address 16 Address 22 to 24 Preparation completion flag for Ch 0 to Ch 3 analog inputs No execution of conversion processing setting for Ch 0 to Ch 3 analog inputs Average processing times setting for Ch 0 to Ch 2

For detailed information on shared memory,

section B.1.1.

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FP2 Analog Unit 10.1

Analog Input Average Processing Setting CPU Unit with Analog I/O Sample Program

Programming example for NPSTGR

R 9013
Initial setting

F0 MV , H 111 , DT 0
Ch 0 and Ch 2 execution

F151 WRT , K 0 , DT 0, K 1 , K 16
Specifies the CPU unit with analog I/O in slot no. 0. The 1word data from data register DT 0 is written to the shared memory address 16.

Execution of conversion processing setting for Ch 0 to Ch 2 analog inputs

R 9013
Initial setting

F0 MV , K F0 MV , K

0 , 3 ,

DT 20 DT 21 DT 22
Analog input average processing setting Ch 0: No average processing Ch 1: 3 times average processing Ch 2: 10 times average processing

Ch 0 average processing Ch 1 average processing

F0 MV , K 10 ,

Ch 2 average processing

F151 WRT , K 0 , DT 20 , K 3 , K 22
Specifies the CPU unit with analog I/O in slot no. 0. Ch 0 to 2 average processing

The 3word contents of data register DT 20 to DT22 is written to the shared memory addressees 22 to 24.

R0 F0 MV , WX 0 , DT 100 R1
Ch 0 preparation completion Ch 1 preparation completion Ch 0 Input value Ch 0 data Analog input Reading

F0 MV , WX 1 , DT 101
Ch 1 Input value Ch 1 data

R2 F0 MV , WX 2 , DT 102
Ch 2 preparation completion Ch 2 Input value Ch 2 data Preparation completion flag for analog input Reading

R 9010
Always on

F150 READ , K 0 , K 10 ,K 1 , WR 0
Preparation completion flag area

Specifies the CPU unit with analog I/O in slot no. 0.

The 1word data from shared memory address 10 is read to the internal relay WR0.

ED

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10 5

Analog Input Average Processing Setting 10.1 CPU Unit with Analog I/O Sample Program

FP2 Analog Unit

Programming example for NAiS Control Global Variable List The following global variables are accessed by the variable class VAR_EXTERNAL in the programs header.

POU Header All input and output variables that are required for the program are declared in the POU header.

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FP2 Analog Unit 10.1

Analog Input Average Processing Setting CPU Unit with Analog I/O Sample Program

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

+ Note

Please note that the functions Size_Of_Var and Adr_Of_Var_I are only available from NAiS Control Version 2.3b onwards.
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Analog Input Average Processing Setting 10.2 Analog Input Unit Sample Program

FP2 Analog Unit

10.2 Analog Input Unit Sample Program


The program outlines below are written for the programming example that follows. You can use either NPSTGR or NAiS Control for programming. Please note the slight differences between the two tools: You need not specify data registers using NAiS Control. NAiS Control automatically assigns an available data register unless you specify otherwise (in the Global Variable List). IEC commands are used instead of Matsushita instructions in some places. Hexadecimal values are represented by the prefix 16# and not H.

Decimal values do not require a K prefix.

Program outline After averaging the analog input data for Ch 0 to Ch 4 (set for no execution of input conversion processing) of the analog input unit, this program reads the averages to the data registers DT100 to DT104 (NPSTGR) or to the variables Temperature, Pressure, Voltage, Current, and Acceleration (NAiS Control) using the preparation completion flag.
Averages the analog values that were read and stores the averages in the conversion value area (input relay area).

(V)
Analog input unit

Analog input

CPU unit

Average processing

(t) (Value)
Sampling processing

(Value)

Minimum value

Maximum value

By the move instruction, the contents of input relay areas (NPST GR) or the variables Temperature, Pressure, Voltage, Current, and Acceleration (NAiS Control) that is located at address WX0 to WX5 are read to the data registers DT100 to DT104.

(t)

(t)
Stored the average value (excluding the maximum and minimum values) to conversion value area.

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FP2 Analog Unit

Analog Input Average Processing Setting 10.2 Analog Input Unit Sample Program

Settings Channels that execute analog input conversion processing H1111: Ch 0 to Ch 3 are set for execution H1: Ch 4 is set for execution and Ch 5 to Ch 7 are not set for execution I/O allocation
I/O number
WX0 WX1 WX2 WX3 WX4

NAiS Control Variables


Ch0_in Ch1_in Ch2_in Ch3_in Ch4_in

Contents
Analog input data for Ch 0 Analog input data for Ch 1 Analog input data for Ch 2 Analog input data for Ch 3 Analog input data for Ch 4

Shared memory
Address 10 Address 16 Address 17 Address 22 to 26 Preparation completion flag for Ch 0 to Ch 7 analog inputs No execution of conversion processing setting for Ch 0 to Ch 3 analog inputs No execution of conversion processing setting for Ch 4 to Ch 7 analog inputs Average processing times setting for Ch 0 to Ch 4

For detailed information on shared memory,

section B.1.2.

* next page

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10 9

Analog Input Average Processing Setting 10.2 Analog Input Unit Sample Program

FP2 Analog Unit

Programming example for NPSTGR


R 9013
Initial setting

F0 MV , H 1111 , DT 0
Ch 0 to 3 execution

F151 WRT , K 0 , DT 0, K 1 , K 16
Ch 0 to 3 execution Specifies the analog input unit in slot no. 0. The 1word data from data register DT 0 is written to the shared memory address 16.

Execution of conversion processing setting for Ch 0 to Ch 3 analog inputs

F0 MV , H 1

, DT 1
Ch 4 execution

F151 WRT , K 0 , DT 1, K 1 , K 17
Ch 4 execution Specifies the analog input unit in slot no. 0. The 1word data from data register DT 1 is written to the shared memory address 17.

Execution of conversion processing setting for Ch 4 analog input

R 9013
Initial setting

F0 MV , K F0 MV , K F0 MV , K F0 MV , K

0 , 0 , 3 , 3 ,

DT 20 DT 21 DT 22 DT 23 DT 24
Analog input average processing setting Ch 0: No average processing Ch 1: 3 times average processing Ch 2: 10 times average processing

Ch 0 average processing Ch 1 average processing Ch 2 average processing Ch 3 average processing

F0 MV , K 10 ,

Ch 4 average processing

F151 WRT , K 0 , DT 20 , K 5 , K 22
Ch 0 to 4 average processing

Specifies the analog input unit in slot no. 0. The 5word contents of data register DT 20 to DT24 is written to the shared memory addressees 22 to 26.

10 10

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FP2 Analog Unit

Analog Input Average Processing Setting 10.2 Analog Input Unit Sample Program

R0
Ch 0 preparation completion Ch 1 preparation completion

F0 MV , WX 0 , DT 100
Ch 0 Input value Ch 0 data

R1

F0 MV , WX 1 , DT 101
Ch 1 Input value Ch 1 data Analog input Reading

R2

R3

Ch 2 preparation completion Ch 3 preparation completion

F0 MV , WX 2 , DT 102
Ch 2 Input value Ch 2 data

F0 MV , WX 3 , DT 103
Ch 3 Input value Ch 3 data

R4
Ch 4 preparation completion

F0 MV , WX 4 , DT 104
Ch 4 Input value Ch 4 data

R 9010
Always on

F150 READ , K 0 , K 10 ,K 1 , WR 0
Preparation completion flag area

Specifies the analog input unit in slot no. 0.

Preparation completion flag for analog input Reading

The 1word data from shared memory address 10 is read to the internal relay WR0.

ED

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10 11

Analog Input Average Processing Setting 10.2 Analog Input Unit Sample Program

FP2 Analog Unit

Programming example for NAiS Control Global Variable List The following global variables are accessed by the variable class VAR_EXTERNAL in the programs header.

POU Header All input and output variables that are required for the program are declared in the POU header.

10 12

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FP2 Analog Unit

Analog Input Average Processing Setting 10.2 Analog Input Unit Sample Program

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

+ Note

Please note that the functions Size_Of_Var and Adr_Of_Var_I are only available from NAiS Control Version 2.3b onwards.
10 13

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Analog Input Average Processing Setting 10.2 Analog Input Unit Sample Program

FP2 Analog Unit

10 14

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Chapter 11 Analog Input Offset Setting


11.1 CPU Unit with Analog I/O Sample Program . . . . . . . . 11 3 11.2 Analog Input Unit Sample Program . . . . . . . . . . . . . . . 11 8

Analog Input Offset Setting

FP2 Analog Unit

11 2

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FP2 Analog Unit 11.1

Analog Input Offset Setting CPU Unit with Analog I/O Sample Program

11.1 CPU Unit with Analog I/O Sample Program


The program outlines below are written for the programming example that follows. You can use either NPSTGR or NAiS Control for programming. Please note the slight differences between the two tools:

You need not specify data registers using NAiS Control. NAiS Control automatically assigns an available data register unless you specify otherwise (in the Global Variable List). IEC commands are used instead of Matsushita instructions in some places. Hexadecimal values are represented by the prefix 16# and not H. Decimal values do not require a K prefix.

Program outline This program offsets the analog input data for Ch 0 to Ch 2 (set for no execution of input conversion processing) of the CPU unit with analog I/O by the set numerical amount only, and then reads it to the data registers DT100 to DT102 (NPSTGR) or to the variables Temperature, Pressure, and Voltage (NAiS Control) using the preparation completion flag.
Offsets the analog values that were read by the numerical value set in shared memory only, and stores it in the conversion value area (input relay area).

Offset change CPU unit with analog I/O

Value +32767 +16383 +653 10 5 0 +2 +5 16384 32768 +32114 +15730 0 10 5 +10 V

Value

By the move instruction the contents of input relay area (NPSTGR) or the variables Temperature, Pressure, and Voltage (NAiS Control) that is located at address WX0 to WX2 are read to the data registers DT100 to DT102 .

+2 +5 17037 33421

+10

* next page

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11 3

Analog Input Offset Setting 11.1 CPU Unit with Analog I/O Sample Program

FP2 Analog Unit

Settings Channels that execute analog input conversion processing H111: Ch 0 to Ch 2 are set for execution and Ch 3 is not set for execution I/O allocation
I/O number
WX0 WX1 WX2

NAiS Control Variables


Ch0_in Ch1_in Ch2_in

Contents
Offset changed analog input value for Ch 0 Offset changed analog input value for Ch 1 Offset changed analog input value for Ch 2

Shared memory
Address 10 Address 16 Addresses 30 to 32 Preparation completion flag for Ch 0 to Ch 3 analog inputs No execution of conversion processing setting for Ch 0 to Ch 3 analog inputs Offset changing setting for Ch 0 to Ch 2

For detailed information,

section B.1.1.

11 4

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FP2 Analog Unit 11.1

Analog Input Offset Setting CPU Unit with Analog I/O Sample Program

Programming example for NPSTGR

R 9013
Initial setting

F0 MV , H 111 , DT 0
Ch 0 to 2 execution

F151 WRT , K 0 , DT 0, K 1 , K 16
Ch 0 to 2 execution Specifies the CPU unit with analog I/O in slot no. 0. The 1word data from data register DT 0 is written to the shared memory address 16.

Execution of conversion processing setting for Ch 0 to Ch 2 analog inputs

R 9013
Initial setting

F0 MV , K

0 ,

DT 10
Ch 0 offset

F0 MV , K 10 , F0 MV , K 20 ,

DT 11
Ch 1 offset

DT 12
Ch 2 offset

F151 WRT , K 0 , DT 10 , K 3 , K 30
Ch 0 to 2 offset Specifies the CPU unit with analog I/O in slot no. 0. The 3word contents of data register DT 10 to DT12 is written to the shared memory addressees 30 to 32.

Analog input offset setting Ch 0: K0 Ch 1: K10 Ch 2: K20

R0
Ch 0 preparation completion Ch 1 preparation completion

F0 MV , WX 0 , DT 100
Ch 0 Input value

R1

F0 MV , WX 1 , DT 101
Ch 1 Input value

Analog input Reading

R2

Ch 2 preparation completion

F0 MV , WX 2 , DT 102
Ch 2 Input value

R 9010
Always on

F150 READ , K 0 , K 10 , K 1 , WR 0
Preparation completion flag area

Specifies the CPU unit with analog I/O in slot no. 0.

Preparation completion flag for analog input Reading

The 1word data from shared memory address 10 is read to the internal relay WR0.

ED

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11 5

Analog Input Offset Setting 11.1 CPU Unit with Analog I/O Sample Program

FP2 Analog Unit

Programming example for NAiS Control Global Variable List The following global variables are accessed by the variable class VAR_EXTERNAL in the programs header.

POU Header All input and output variables that are required for the program are declared in the POU header.

11 6

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FP2 Analog Unit 11.1

Analog Input Offset Setting CPU Unit with Analog I/O Sample Program

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

+ Note

Please note that the functions Size_of_Var and Adr_of_Var_I are only available from NAiS Control Version 2.3b onwards.
11 7

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Analog Input Offset Setting 11.2 Analog Input Unit Sample Program

FP2 Analog Unit

11.2 Analog Input Unit Sample Program


The program outlines below are written for the programming example that follows. You can use either NPSTGR or NAiS Control for programming. Please note the slight differences between the two tools:

You need not specify data registers using NAiS Control. NAiS Control automatically assigns an available data register unless you specify otherwise (in the Global Variable List). IEC commands are used instead of Matsushita instructions in some places. Hexadecimal values are represented by the prefix 16# and not H. Decimal values do not require a K prefix.

Program outline This program offsets the analog input data for Ch 0 to Ch 4 (set for no execution of input conversion processing) of the analog input unit by the set numerical amount only, and then reads it to the data registers DT100 to DT104 (NPSTGR) or to the variables Temperature, Pressure, Voltage, Current, and Acceleration (NAiS Control) using the preparation completion flag.
Offsets the analog values that were read by the numerical value set in shared memory only, and stores it in the conversion value area (input relay area).

Offset change Analog input unit

CPU unit

Value +32767 +16383 10 5+653 0 +2 +5 16384 32768 +10 V +32114 +15730 0 10 5

Value

By the move instruction, the contents of input relay areas (NPSTGR) or the variables Temperature, Pressure, Voltage, Current, Acceleration, and Temperature_1 (NAiS Control) that is located at address WX0 to WX5 are read to the data registers DT100 to DT104.

+2 +5 17037 33421

+10

11 8

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FP2 Analog Unit 11.2

Analog Input Offset Setting Analog Input Unit Sample Program

Settings Channels that execute analog input conversion processing H1111: Ch 0 to Ch 3 are set for execution H1: Ch 4 is set for execution and Ch 5 to Ch 7 are not set for execution I/O allocation
I/O number
WX0 WX1 WX2 WX3 WX4

NAiS Control Variables


Ch0_in Ch1_in Ch2_in Ch3_in Ch4_in

Contents
Offset changed analog input value for Ch 0 Offset changed analog input value for Ch 1 Offset changed analog input value for Ch 2 Offset changed analog input value for Ch 3 Offset changed analog input value for Ch 4

Shared memory
Address 10 Address 16 Address 17 Address 30 to 34 Preparation completion flag for Ch 0 to Ch 3 analog inputs No execution of conversion processing setting for Ch 0 to Ch 3 analog inputs No execution of conversion processing setting for Ch 4 to Ch 7 analog inputs Offset changing setting for Ch 0 to Ch 4

For detailed information,

section B.1.2.

* next page

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11 9

Analog Input Offset Setting 11.2 Analog Input Unit Sample Program

FP2 Analog Unit

Programming example for NPSTGR


R 9013
Initial setting

F0 MV , H 1111 , DT 0
Ch 0 to 3 execution

F151 WRT , K 0 , DT 0, K 1 , K 16
Ch 0 to 3 execution Specifies the analog input unit in slot no. 0. The 1word data from data register DT 0 is written to the shared memory address 16.

Execution of conversion processing setting for Ch 0 to Ch 3 analog inputs

F0 MV , H 1

, DT 1
Ch 4 execution

F151 WRT , K 0 , DT 1, K 1 , K 17
Ch 4 execution Specifies the analog input unit in slot no. 0. The 1word data from data register DT 1 is written to the shared memory address 17.

Execution of conversion processing setting for Ch 4 analog input

R 9013
Initial setting

F0 MV , K

0 ,

DT 10
Ch 0 offset

F0 MV , K10 , F0 MV , K 20 , F0 MV , K 30 , F0 MV , K40 ,

DT 11
Ch 1 offset

DT 12
Ch 2 offset

DT 13
Ch 3 offset

DT 14
Ch 4 offset

Analog input offset setting CH0 : K 0 CH1 : K10 CH2 : K 20 CH3 : K 30 CH4 : K40

F151 WRT , K 0 , DT 10 , K 5 , K 30
Ch 0 to 2 offset Specifies the analog input unit in slot no. 0. The 5word contents of data register DT 10 to DT14 is written to the shared memory addressees 30 to 34.

11 10

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FP2 Analog Unit 11.2

Analog Input Offset Setting Analog Input Unit Sample Program

R0
Ch 0 preparation completion Ch 1 preparation completion

F0 MV , WX 0 , DT 100
Ch 0 Input value

R1

F0 MV , WX 1 , DT 101
Ch 1 Input value

R2

R3

Ch 2 preparation completion

F0 MV , WX 2 , DT 102
Ch 2 Input value

Analog input Reading

R4

Ch 3 preparation completion

F0 MV , WX 3 , DT 103
Ch 3 Input value

Ch 4 preparation completion

F0 MV , WX 4 , DT 104
Ch 4 Input value

R 9010
Always on

F150 READ , K 0 , K 10 , K 1 , WR 0
Preparation completion flag area

Specifies the analog input unit in slot no. 0.

Preparation completion flag for analog input Reading

The 1word data from shared memory address 10 is read to the internal relay WR0.

ED

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11 11

Analog Input Offset Setting 11.2 Analog Input Unit Sample Program

FP2 Analog Unit

Programming example for NAiS Control Global Variable List The following global variables are accessed by the variable class VAR_EXTERNAL in the programs header.

POU Header All input and output variables that are required for the program are declared in the POU header.

11 12

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FP2 Analog Unit 11.2

Analog Input Offset Setting Analog Input Unit Sample Program

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

+ Note

Please note that the functions Size_of_Var and Adr_of_Var_I are only available from NAiS Control Version 2.3b onwards.
11 13

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Analog Input Offset Setting 11.2 Analog Input Unit Sample Program

FP2 Analog Unit

11 14

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Chapter 12 Analog Output Hold Setting


12.1 CPU Unit with Analog I/O Output Hold Program . . . . 12 3 12.2 Output Hold (Any Value) Setting Program . . . . . . . . . 12 6 12.2.1 12.2.2 CPU Unit with Analog I/O Basic Program . . 12 6 Analog Output Unit Basic Program . . . . . . . 12 9

Analog Output Hold Setting

FP2 Analog Unit

12 2

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FP2 Analog Unit 12.1

Analog Output Hold Setting CPU Unit with Analog I/O Output Hold Program

12.1 CPU Unit with Analog I/O Output Hold Program


The program outlines below are written for the programming example that follows. You can use either NPSTGR or NAiS Control for programming. Please note the slight differences between the two tools:

You need not specify data registers using NAiS Control. NAiS Control automatically assigns an available data register unless you specify otherwise (in the Global Variable List). IEC commands are used instead of Matsushita instructions in some places. Hexadecimal values are represented by the prefix 16# and not H. Decimal values do not require a K prefix.

Program outline When switching from the RUN mode to the PROG. mode, this program holds the analog output at the final value of the RUN* mode according to the shared memory (address 38) setting. Then the program writes the data stored in data register DT0 to the output relay area WY4 (NPSTGR) or to the variable Temperature (NAiS Control) of output channel Ch 0 for the CPU unit with analog I/O. Final value of RUN mode: During the RUN mode, the analog output value corresponding to the last digital data written. Settings I/O allocation
I/O number
WY4

NAiS Control Variables


Ch0_in

Contents
Analog output data for Ch 0

Shared memory
Address 38 Analog output hold setting H0: Nonhold H1: Hold (holds analog output at final value of RUN mode) H2: Hold (holds analog output at any desired value)

For detailed information,

section B.1.1.

* next page

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12 3

Analog Output Hold Setting 12.1 CPU Unit with Analog I/O Output Hold Program

FP2 Analog Unit

Programming example for NPSTGR


R 9013
Initial setting

F0 MV , H

1 , DT 30
Output hold setting Analog output hold setting Output hold setting

F151 WRT, K 0 , DT 30 , K 1 , K 38

Specifies the analog output unit in slot no. 0. The 1word data from data register DT30 is written to the shared memory address 38.

R 9010
Always on

F0 MV ,

DT 0 , WY 4
Ch 0 data Ch 0 output data

Analog output data Writing

ED

12 4

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FP2 Analog Unit 12.1

Analog Output Hold Setting CPU Unit with Analog I/O Output Hold Program

Programming example for NAiS Control Global Variable List The following global variables are accessed by the variable class VAR_EXTERNAL in the programs header.

POU Header All input and output variables that are required for the program are declared in the POU header.

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

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12 5

Analog Output Hold Setting 12.2 Output Hold (Any Value) Setting Program

FP2 Analog Unit

12.2 Output Hold (Any Value) Setting Program


The program outlines below are written for the programming example that follows. You can use either NPSTGR or NAiS Control for programming. Please note the slight differences between the two tools:


12.2.1

You need not specify data registers using NAiS Control. NAiS Control automatically assigns an available data register unless you specify otherwise (in the Global Variable List). IEC commands are used instead of Matsushita instructions in some places. Hexadecimal values are represented by the prefix 16# and not H. Decimal values do not require a K prefix.

CPU Unit with Analog I/O Basic Program

Program outline When switching from the RUN mode to the PROG. mode, this program holds the analog output at any desired value according to the shared memory (addresses 38 and 39) settings. Then the program writes the data stored in data register DT0 to the output relay area WY4 (NPSTGR) or to the variable Temperature (NAiS Control) of output channel Ch 0 for the CPU unit with analog I/O. Settings I/O allocation
I/O number
WY4

NAiS Control Variables


Ch0_out

Contents
Analog output data for Ch 0

Shared memory
Address 38 Analog output hold setting H0: Nonhold H1: Hold (holds analog output at final value of RUN mode) H2: Hold (holds analog output at any desired value) Address 39 Analog output hold data (any value) setting Range of any value setting 10 to +10V output range: K2048 to K2047 0 to 20mA output range: K0 to K4095

For detailed information on this memory area,

section B.1.1.

12 6

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FP2 Analog Unit 12.2

Analog Output Hold Setting Output Hold (Any Value) Setting Program

Programming example for NPSTGR


R 9013
Initial setting

F0 MV , H

2, DT 30
Output hold setting Analog output hold data (any value) setting

F0 MV , H 2047 , DT 31
Ch 0 any value

F151 WRT, K 0 , DT 30 , K 2 , K 38
Output hold setting Specifies the analog output unit in slot no. 0. The 2word data from data register DT30 is written to the shared memory addresses 38 and 39.

R 9010
Always on

F0 MV ,

DT 0

, WY 4 ED

Analog output data Writing

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12 7

Analog Output Hold Setting 12.2 Output Hold (Any Value) Setting Program

FP2 Analog Unit

Programming example for NAiS Control Global Variable List The following global variables are accessed by the variable class VAR_EXTERNAL in the programs header.

POU Header All input and output variables that are required for the program are declared in the POU header.

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

+ Note

Please note that the function Size_of_Var is only available from NAiS Control Version 2.3b onwards.

12 8

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FP2 Analog Unit 12.2

Analog Output Hold Setting Output Hold (Any Value) Setting Program

12.2.2

Analog Output Unit Basic Program

Program outline When switching from the RUN mode to the PROG. mode, this program holds the analog output at any desired value according to the shared memory (addresses 17 to 21) settings. Then the program writes the data stored in data register DT100 to DT103 (NPSTGR) or to the variables Temperature, Press, Voltage, and Current (NAiS Control) to the output relay areas that are located at address WY0 to WY3 of output channels Ch 0 to Ch 3 for the analog output unit. Settings I/O allocation
I/O number
WY0 WY1 WY2 WY3

NAiS Control Variables


Ch0_out Ch1_out Ch2_out Ch3_out

Contents
Analog output data for Ch 0 Analog output data for Ch 1 Analog output data for Ch 2 Analog output data for Ch 3

Shared memory
Address 17 Analog output hold setting H0: Nonhold H1: Hold (holds analog output at final value of RUN mode) H2: Hold (holds analog output at any desired value) Address 18 to 21 Analog output hold data (any value) setting Range of any value setting 10 to +10V output range: K2048 to K2047 0 to 20mA output range: K0 to K4095

For detailed information on this shared memory area,

section B.1.3.

* next page

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12 9

Analog Output Hold Setting 12.2 Output Hold (Any Value) Setting Program

FP2 Analog Unit

Programming example for NPSTGR

R 9013
Initial setting

F0 MV , K

2 ,

DT 30 DT 31 DT 32 DT 33 DT 34
Analog output hold data (any value) setting

Output hold setting

F0 MV , K 2047 , F0 MV , K 2047 , F0 MV , K 4095 , F0 MV , K 4095 ,

Ch 0 any value Ch 1 any value Ch 2 any value Ch 3 any value

F151 WRT , K 0 , DT 30 , K 5 , K 17
Output hold setting Specifies the analog output unit in slot no. 0. The 5word data from data register DT30 is written to the shared memory addresses 17 and 21.

R 9010
Always on

F0 MV , DT 100 , WY 0
Ch 0 data Ch 0 output value

F0 MV , DT 101 , WY 1
Ch 1 data Ch 1 output value Analog output data Writing

F0 MV , DT 102 , WY 2 F0 MV , DT 103 , WY 3

Ch 2 data Ch 2 output value Ch 3 data Ch 3 output value

ED

12 10

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FP2 Analog Unit 12.2

Analog Output Hold Setting Output Hold (Any Value) Setting Program

Programming example for NAiS Control Global Variable List The following global variables are accessed by the variable class VAR_EXTERNAL in the programs header.

POU Header All input and output variables that are required for the program are declared in the POU header.

next page

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12 11

Analog Output Hold Setting 12.2 Output Hold (Any Value) Setting Program

FP2 Analog Unit

Ladder Diagram Body This example was created with the programming editor Ladder Diagram. In NAiS Control, you can also write the program in Instruction List, Function Block Diagram, or Sequential Function Chart.

+ Note

Please note that the function Size_of_Var is only available from NAiS Control Version 2.3b onwards.

12 12

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Chapter 13 Troubleshooting
13.1 Problems Concerning the Analog Input . . . . . . . . . . . 13 3 13.2 Problems Concerning the Analog Output . . . . . . . . . . 13 4

Troubleshooting

FP2 Analog Unit

13 2

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FP2 Analog Unit 13.1

Troubleshooting Problems Concerning the Analog Input

13.1 Problems Concerning the Analog Input


Problem
Analog input conversion value cannot be read.

Remedy
Check the I/O allocation for the analog units. Check the range settings. Check the settings for no execution of conversion processing (shared memory setting). Check the analog signal wiring.

Proper current input conversion value cannot be obtained. Conversion value is unsteady.

Check the terminal block wiring. Check the current input devices. Make sure that you are using shielded twistedpair wiring for the input signal wires. Make sure that the shielding of the shielded twistedpair wiring is properly connected. Make sure that no input signal wires are near other power wires.

Proper conversion value cannot be obtained during R.T.D. Pt100 connection. Proper conversion value cannot be obtained during thermocouple connection.

Check the range settings. Check the threewire wiring and restart the equipment. Check the range settings. Check the polarity of the thermocouple.

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13 3

Troubleshooting 13.2 Problems Concerning the Analog Output

FP2 Analog Unit

13.2 Problems Concerning the Analog Output


Problem
Proper analog output cannot be obtained.

Remedy
Make sure that the FP2 CPU unit is in RUN mode. Check the I/O allocation for the analog units. Check the range settings. Check the settings for no execution of conversion processing (shared memory setting). Make sure that the analog output data given to the analog unit is proper for the range. For current output, make sure that the impedance of the output load device is 300W or less. Check the analog signal wiring.

Analog output value is unsteady.

Make sure that you are using shielded twistedpair wiring for the output signal wires. Make sure that the shielding of the shielded twistedpair wiring is properly connected. Make sure that no output signal wires are near other power wires. Check the sequence program that gives the output data to the analog unit.

13 4

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Appendix A Specifications
A.1 Tables of Performance Specifications . . . . . . . . . . . . . A 3 A.1.1 A.1.2 A.1.3 A.2 General Specifications . . . . . . . . . . . . . . . . . . A 3 Analog Input Specifications . . . . . . . . . . . . . . A 4 Analog Output Specifications . . . . . . . . . . . . A 6

Tables of Input/Output Contact Allocation . . . . . . . . . A 7

Specifications

FP2 Analog Unit

A2

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FP2 Analog Unit A.1

Specifications Tables of Performance Specifications

A.1

Tables of Performance Specifications

A.1.1
Item

General Specifications
Specifications
0 to 55C/32 to 131F Use the FP2 Analog output unit (FP2DA4) within the ranges given below. Output range Current output range (0 to 20mA) Ambient operating temperature When using 4 channels: 0 to 45C/32 to 113F When using 3 channels: 0 to 50C/32 to 122F When using 1 or 2 channels: 0 to 55C/32 to 131F Voltage output range (10V) When using 4 channels: 0 to 55C/32 to 131F

Ambient temperature

Storage temperature Ambient humidity Storage humidity Breakdown voltage

20 to +70C/4 to +158F 30 to 85% RH (noncondensing) 30 to 85% RH (noncondensing) 500V AC, 1 minute between analog input terminal and analog output terminal for FP2C1A 500V AC, 1 minute between analog input/output terminal and ground 1500V AC, 1 minute between analog input/output terminal and AC external terminal

Insulation resistance

100M or more (measured with a 500V DC megger testing) between analog input terminal and analog output terminal for FP2C1A between analog input/output terminal and ground between analog input/output terminal and AC external terminal

Vibration resistance Shock resistance Noise immunity Operating conditions Weight

10 to 55Hz, 1cycle/min: double amplitude of 0.75mm/0.030in., 10min. on X, Y and Z directions 98m/s2 or more, 4 times on X, Y and Z directions 1,500Vpp with pulse widths 50ns and 1s (based on inhouse measurements) Free from corrosive gases and excessive dust FP2C1A: 260g/9.171oz FP2AD8: 160g/5.644oz FP2DA4: 160g/5.644oz

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A3

Specifications A.1 Tables of Performance Specifications

FP2 Analog Unit

A.1.2
Item

Analog Input Specifications


Specifications
4 channels: FP2C1A, 8 channels: FP2AD8 10V (1/65536) 1 to 5V (1/13107) 100mV (1/65536) Current Thermocouple 20mA (1/32768) 4 to 20mA (1/13107) S: 0 to +1500_C (0.1_C)/32 to 2732_F (32.18_F) J: 200 to +750_C(0.1_C)/-328 to +1382_F (32.18_F) K: 200 to +1000_C (0.1_C)/-328 to +1832_F (32.18_F) T: 200 to +350_C (0.1_C)/-328 to +662_F (32.18_F) R: 0 to +1500_C (0.1_C)/-32 to +2732_F (32.18_F) R.T.D Pt100: 100 to +500_C (0.1_C)/-148 to +932_F (32.18_F) Pt1000: 100 to +100_C (0.1_C)/-148 to +212_F (32.18_F) 500s channel (100mV range: 650s/channel) (* note 1) 90ms/channel (* note 1) 1.0% F.S. or less (0 to 55_C/32 to 131_F) (* note 2) Voltage input Current input Thermocouple input Min. 1M 250 Min. 1M 15V 150mV 30mA 50 to +1700_C/58 to 3092_F 210 to +1200_C/346 to 2192_F 270 to +1370_C/454 to 2498_F 270 to +400_C/454 to 752_F 50 to +1760_C/58 to 3200_F 150 to +600_C/238 to 1112_F 150 to +250_C/238 to 482_F Between analog input terminal and FP2 internal circuits: Optical coupler insulation Between analog input channels: Non insulation Between analog input terminal and analog output terminal: DC/DC converter insulation (for FP2C1A) Voltage

Number of input points Input range (resolution)

Conversion speed

Voltage input Current input Thermocouple input R.T.D input

Overall accuracy Input impedance

Absolute maximum input

10V range 1 to 5V range 100mV range 20mA range 4 to 20mA range Thermocouple S range Thermocouple J range Thermocouple K range Thermocouple T range Thermocouple R range R.T.D. Pt 100 range R.T.D. Pt 1000 range

Insulation method

A4

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FP2 Analog Unit A.1

Specifications Tables of Performance Specifications

Item
Digital output processing Broken wire sensing Input range change method Conversion execution processing channels setting Permission resistance of input wire Input conversion data setup time (After FP2 system power has been turned on) R.T.D input Averaging Offset setting

Specifications
3 to 64 times/each channels K2047 to K+2047/ each channels Only thermocouple range or R.T.D input range/each channels All channels: By dip switch setting Each channels: By shared memory setting Each channels: By shared memory setting Under 30 (each side)

Input range Voltage input range (all channels together) Current input range (all channels together) Thermocouple input range (all channels together) R.T.D input range (all channels together)

FP2C1A 460ms 460ms 910ms

FP2AD8 430ms 430ms 1330ms

3350ms

6490ms

+ Notes

1) Only when the DIP switch setting is setting the range for all the channels together. For information regarding when the shared memory is used to set the ranges for each channel, * section 6.2. 2) The full scale (F.S.) for each of analog input voltage 1 to 5V, current 4 to 20mA and T range of thermocouple is +10V, +20mA and -200 to 1,000_C/-328 to +1,832_F respectively.

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A5

Specifications A.1 Tables of Performance Specifications

FP2 Analog Unit

A.1.3
Item

Analog Output Specifications


Specifications
1 channel (FP2C1A), 4 channels (FP2DA4) (* note 1) 10V (K2048 to K+2047) 0 to 20mA (K0 to K4095) 1/4096 500s/channel (* note 2) Max. 1.0% F.S. (0 to 55_C/32 to 131_F) Voltage output: Max. 0.5 Voltage output: 10mA (FP2C1A), 5mA (FP2DA4) Current output: Max. 300 Between analog output terminal and FP2 internal circuits: Optical coupler insulation Between analog output channels: Non insulation (for FP2DA4) Between analog output terminal and analog input terminal: DC/DC converter insulation (for FP2C1A) Voltage Current

Number of output points Output range (digital input) Resolution Conversion speed Overall accuracy Output impedance Maximum output current Allowable output load resistance Insulation method

Analog output hold setting

Hold/non hold setting by shared memory setting

+ Notes

1) For the FP2 analog output unit (FP2DA4), there are restrictions regarding the ambient temperature that depend on how many channels are used. Use according to the restrictions listed in Ambient temperature of section A.1.1. 2) For information regarding the conversion cycle time when using multiple channels, * section 6.2.

A6

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FP2 Analog Unit

Specifications A.2 Tables of Input/Output Contact Allocation

A.2
Channel

Tables of Input/Output Contact Allocation


FP2 I/O Number
Ch 0 Ch 1 Ch 2 Ch 3 WX0: X0 to XF WX1: X10 to X1F WX2: X20 to X2F WX3: X30 to X3F WY4: Y40 to Y4F

CPU unit with analog I/O


Analog input

Analog output

Ch 0

Analog input unit


Channel
Analog input Ch 0 Ch 1 Ch 2 Ch 3 Ch 4 Ch 5 Ch 6 Ch 7

FP2 I/O Number


WX(n): X(n)0 to X(n)F WX(n+1): X(n+1)0 to X(n+1)F WX(n+2): X(n+2)0 to X(n+2)F WX(n+3): X(n+3)0 to X(n+3)F WX(n+4): X(n+4)0 to X(n+4)F WX(n+5): X(n+5)0 to X(n+5)F WX(n+6): X(n+6)0 to X(n+6)F WX(n+7): X(n+7)0 to X(n+7)F

Analog output unit


Channel
Analog output Ch 0 Ch 1 Ch 2 Ch 3

FP2 I/O Number


WY(n): Y(n)0 to Y(n)F WY(n+1): Y(n+1)0 to Y(n+1)F WY(n+2): Y(n+2)0 to Y(n+2)F WY(n+3): Y(n+3)0 to Y(n+3)F

The I/O number shown by an n in the table above is determined according to the installed slot position and the I/O allocation for other units.

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A7

Specifications A.2 Tables of Input/Output Contact Allocation

FP2 Analog Unit

A8

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Appendix B Shared Memory Areas


B.1 Tables of Shared Memory Area . . . . . . . . . . . . . . . . . . B 3 B.1.1 B.1.2 B.1.3 B.2 Shared Memory of CPU Unit with Analog I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B 3 Shared Memory of Analog Input Unit . . . . . . B 4 Shared Memory of Analog Output Unit . . . . B 5

Shared Memory for Analog Input Processing . . . . . . B 6 B.2.1 B.2.2 B.2.3 B.2.4 B.2.5 B.2.6 Analog Input Preparation Completion Flag . B 6 No Execution of Analog Input Conversion Processing Setting . . . . . . . . . . . . . . . . . . . . . B 6 Analog Input Range Setting . . . . . . . . . . . . . B 7 Average Times Setting . . . . . . . . . . . . . . . . . . B 8 Offset Changing Setting . . . . . . . . . . . . . . . . . B 9 Input Sensor Broken Wire Detection Flag . . B 9

B.3

Shared Memory of Analog Output Processing . . . . B 10 B.3.1 B.3.2 B.3.3 Analog Output Hold Setting . . . . . . . . . . . . . B 10 Analog Output Hold (Any Value) Data Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B 11 No Execution of Analog Output Conversion Processing Setting . . . . . . . . . . . . . . . . . . . . B 11

Shared Memory Areas

FP2 Analog Unit

B2

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FP2 Analog Unit B.1

Shared Memory Areas Tables of Shared Memory Area

B.1

Tables of Shared Memory Area

In the FP2 CPU unit with analog I/O, analog input unit, and analog output unit, in addition to control of the analog input and output, shared memory that allows reading and writing by the sequence program is stored.

B.1.1

Shared Memory of CPU Unit with Analog I/O


Initial value See section
H0000 (* note 1) H1111 HFFFF HFFFF K1 (* note 1) K1 K1 K1 K0 K0 K0 K0 H0000 K0000 H0000 B.3.1 B.3.2 B.2.6 B.2.5 B.2.4 B.2.1 B.2.2 B.2.3

Address Descriptions
10 16 18 19 22 23 24 25 30 31 32 33 38 39 42 Preparation completion flag for analog input ch 0 to 3 No execution of conversion processing setting for analog input ch 0 to 3 Range setting for analog input ch 0 and 1 Range setting for analog input ch 2 and 3 Average times setting for analog input ch 0 Average times setting for analog input ch 1 Average times setting for analog input ch 2 Average times setting for analog input ch 3 Offset changing setting for analog input ch 0 Offset changing setting for analog input ch 1 Offset changing setting for analog input ch 2 Offset changing setting for analog input ch 3 Analog output hold setting Analog output hold (any value) data setting Broken wire detection flag for temperature sensor input (TC, R.T.D)

+ Notes
1) In NAiS Control: the hexadecimal prefix is 16#, not H; the K prefix is not necessary for identifying decimal constants. 2) Shared memory addresses other than those listed above are not used. Do not perform reading and writing with addresses that are not used. 3) The shared memory addresses are all preset when the power is turned from off to on (they return to the initial values). 4) Addresses 16, 22 to 25, 30 to 33, 38, and 39 can be written to by the program as many times as desired when the mode is changed from the PROG. mode to the RUN mode. 5) Addresses 10, 18, 19, and 42 can only be written to once when the mode is changed from the PROG. mode to the RUN mode.
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Shared Memory Areas B.1 Tables of Shared Memory Area

FP2 Analog Unit

B.1.2

Shared Memory of Analog Input Unit


Initial value See section
H0000 (* note 1) H1111 H1111 HFFFF HFFFF HFFFF HFFFF K1 (* note 1) K1 K1 K1 K1 K1 K1 K1 K0 K0 K0 K0 K0 K0 K0 K0 H0000 B.2.6 B.2.5 B.2.4 B.2.3 B.2.1 B.2.2

Address Descriptions
10 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 42 Preparation completion flag for analog input ch 0 to 7 No execution of conversion processing setting for analog input ch 0 to 3 No execution of conversion processing setting for analog input ch 4 to 7 Range setting for analog input ch 0 and 1 Range setting for analog input ch 2 and 3 Range setting for analog input ch 4 and 5 Range setting for analog input ch 6 and 7 Average times setting for analog input ch 0 Average times setting for analog input ch 1 Average times setting for analog input ch 2 Average times setting for analog input ch 3 Average times setting for analog input ch 4 Average times setting for analog input ch 5 Average times setting for analog input ch 6 Average times setting for analog input ch 7 Offset changing setting for analog input ch 0 Offset changing setting for analog input ch 1 Offset changing setting for analog input ch 2 Offset changing setting for analog input ch 3 Offset changing setting for analog input ch 4 Offset changing setting for analog input ch 5 Offset changing setting for analog input ch 6 Offset changing setting for analog input ch 7 Broken wire detection flag for temperature sensor input (TC, R.T.D)

+ Notes

1) In NAiS Control: the hexadecimal prefix is 16#, not H; the K prefix is not necessary for identifying decimal constants. 2) Shared memory addresses other than those listed above are not used. Do not perform reading and writing with addresses that are not used. 3) The shared memory addresses are all preset when the power is turned from off to on (they return to the initial values). 4) Addresses 16, 17, and 22 to 37 can be written to by the program as many times as desired when the mode is changed from the PROG. mode to the RUN mode. 5) Addresses 10, 18 to 21, and 42 can only be written to once when the mode is changed from the PROG. mode to the RUN mode.

B4

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FP2 Analog Unit B.1

Shared Memory Areas Tables of Shared Memory Area

B.1.3

Shared Memory of Analog Output Unit


Initial value See section
H0000 (* note 1) K0000 (* note 1) K0000 K0000 K0000 B.3.3 B.3.1 B.3.2

Address Descriptions
17 18 19 20 21 22 Output hold setting for analog output ch 0 to 3 Output hold (any value) data setting for analog output ch 0 Output hold (any value) data setting for analog output ch 1 Output hold (any value) data setting for analog output ch 2 Output hold (any value) data setting for analog output ch 3

No execution of conversion processing setting for analog output ch 0 to 3 H1111

+ Notes

1) In NAiS Control: the hexadecimal prefix is 16#, not H; the K prefix is not necessary for identifying decimal constants. 2) Shared memory addresses other than those listed above are not used. Do not perform reading and writing with addresses that are not used. 3) The shared memory addresses are all preset when the power is turned from off to on (they return to the initial values). 4) Addresses 17 to 22 can be written to by the program as many times as desired when the mode is changed from the PROG. mode to the RUN mode.

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B5

Shared Memory Areas B.2 Shared Memory for Analog Input Processing

FP2 Analog Unit

B.2

Shared Memory for Analog Input Processing

In this section, the settings are written for NPSTGR. In NAiS Control:


B.2.1

the hexadecimal prefix is 16#, not H the K prefix is not necessary for decimal constants.

Analog Input Preparation Completion Flag

After the power is turned on and the first conversion is completed, the input channel where the conversion data preparation is completed is copied to the bits in shown below.
Bit position Address 10

15

14

13

12

11

10

7 6 5 4 3 2 1 0 ch 7 ch 6 ch 5 ch 4 ch 3 ch 2 ch 1 ch 0

0: Preparing 1: Preparation completed

(Default: H0000)

B.2.2

No Execution of Analog Input Conversion Processing Setting

Specifies the input channel where conversion processing is not executed.


Bit position Address 16

15

14

13

12 ch 3

11

10

8 ch 2

4 ch 1

0 ch 0

0: Conversion not executed 1: Conversion executed

(Default: H1111)

Bit position Address 17

15

14

13

12
ch 7

11

10

8
ch 6

4
ch 5

0
ch 4

0: Conversion not executed 1: Conversion executed (Default: H1111)

B6

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FP2 Analog Unit

Shared Memory Areas B.2 Shared Memory for Analog Input Processing

B.2.3

Analog Input Range Setting

When setting the input range independently for each input channel, after setting the range setting switch to Enable setting by software, the codes for the range settings shown below are set to addresses 18 to 21.
Bit position Address 18

15

14

13

12

11

10

Ch 1 Bit position Address 19

(Default: HFFFF)

Ch 0

15

14

13

12

11

10

Ch 3 Bit position Address 20

(Default: HFFFF)

Ch 2

15

14

13

12

11

10

Ch 5 Bit position Address 21

(Default: HFFFF)

Ch 4

15

14

13

12

11

10

Ch 7

(Default: HFFFF)

Ch 6

Input range
10V (20mA) 100mV 1 to 5V (4 to 20mA) Thermocouple J Thermocouple K Thermocouple R Thermocouple S Thermocouple T R.T.D Pt100 R.T.D Pt1000

Code
H01 H04 H07 H0D H0E H0F H10 H11 H12 H13

If a code different from those above are set (excluding HFF), the input range is set to 10V (20mA). Also, if HFF is set, conversion will not be executed for that input channel.

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B7

Shared Memory Areas B.2 Shared Memory for Analog Input Processing

FP2 Analog Unit

B.2.4

Average Times Setting

Sets the number of times for average processing for each channel that executes average processing (range: 3 to 64 times).
Bit position Address 22 to Address 29 K3 to K64 (Default: K1)

15

14

13

12

11

10

Address 22: Address 23: Address 24: Address 25: Address 26: Address 27: Address 28: Address 29:

Analog input ch 0 Analog input ch 1 Analog input ch 2 Analog input ch 3 Analog input ch 4 Analog input ch 5 Analog input ch 6 Analog input ch 7

For the channels with values set that are different from those above, the average processing becomes as shown below. K0, K1 or K2 is set: No average processing; general sampling processing. Other than K0 to K64 is set: Average processing is performed with K64 as the set value.

B8

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FP2 Analog Unit

Shared Memory Areas B.2 Shared Memory for Analog Input Processing

B.2.5

Offset Changing Setting

Sets the offset data for each channel that executes offset changing (range: 2048 to +2047).
Bit position Address 30 to Address 37 K2048 to K2047 (Default: K0)

15

14

13

12

11

10

Address 30: Address 31: Address 32: Address 33: Address 34: Address 35: Address 36: Address 37:

Analog input ch 0 Analog input ch 1 Analog input ch 2 Analog input ch 3 Analog input ch 4 Analog input ch 5 Analog input ch 6 Analog input ch 7

B.2.6

Input Sensor Broken Wire Detection Flag

Detects broken wires in the input wiring for each input channel set for the TC (thermocouple) input range or R.T.D. (resistance thermometer device) input range, and copies the data to the bits shown below.
Bit position Address 42

15

14

13

12

11

10

7 6 5 4 3 2 1 0 ch 7 ch 6 ch 5 ch 4 ch 3 ch 2 ch 1 ch 0

0: Normal 1: Broken wire detected

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B9

Shared Memory Areas B.3 Shared Memory of Analog Output Processing

FP2 Analog Unit

B.3

Shared Memory of Analog Output Processing

In this section, the settings are written for NPSTGR. In NAiS Control:


B.3.1

the hexadecimal prefix is 16#, not H the K prefix is not necessary for decimal constants.

Analog Output Hold Setting

Sets either the nonhold, hold (final value during RUN mode), or hold (any value) for the analog output during the FP2 CPU unit PROG. mode. For CPU unit with analog I/O, the address is 38. For the analog output unit, the address is17.
Bit position Address 38 or Address 17 H0000: Nonhold H0001: Hold (final value during RUN mode) H0002: Hold (any value) (Default: H0000)

15

14

13

12

11

10

If a value different from those above is set, then nonhold is set.

B 10

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FP2 Analog Unit

Shared Memory Areas B.3 Shared Memory of Analog Output Processing

B.3.2

Analog Output Hold (Any Value) Data Setting

As explained above, when a desired output is set for the hold setting, the analog output value is held corresponding to the data set at this address. For CPU unit with analog I/O, the address is 39. For the analog output unit, the address is18 to 21.
Bit position Address 39 or Addresses 18 to 21 10V output range: K2048 to K2047 0 to 20mA output range: K0 to K4095 (Default: K0000)

15

14

13

12

11

10

At the CPU unit with analog I/O address 39: analog output ch0 At the analog output unit address 18: analog output ch 0 address 19: analog output ch 1 address 20: analog output ch 2 address 21: analog output ch 3 If a value different from those above is set, then the set value becomes disabled, and the final output value before moving to the PROG. mode is held.

B.3.3

No Execution of Analog Output Conversion Processing Setting

Specifies the output channel where conversion processing is not executed. For the analog output unit, the address is 22.
Bit position Address 22

15

14

13

12 ch 3

11

10

8 ch 2

4 ch 1

0 ch 0

0: Conversion not executed 1: Conversion executed (Default: H1111)

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B 11

Shared Memory Areas B.3 Shared Memory of Analog Output Processing

FP2 Analog Unit

B 12

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Index
A
Analog input Average processing times, 5 6 Average times setting, B 8 Conversion characteristics, 6 3 Conversion cycle time, 6 13 Conversion processing, 5 3 Conversion processing setting, B 6 Offset, 5 8, B 9 Preparation completion flag, B 6 Range, 4 3, 5 5 Range setting, B 7 Reading data, 7 4 Analog input terminals, 2 3, 2 5 Analog input unit, 2 5 Range setting switch, 2 5 Analog output Conversion characteristics, 6 11 Conversion cycle time, 6 14 Conversion processing setting, B 11 Hold, 5 9, B 10 Writing data, 7 5 Analog output range, 4 4 Analog output terminals, 2 4, 2 6 Analog output unit, 2 6 Range setting switch, 2 6

D
Data processing functions, 1 5 Analog input, 1 5 Averaging function, 1 5 General sampling function, 1 5 Offset changing function, 1 5 Analog output, 1 6 Hold function, 1 6 DIP switches, 2 4

E
EMC conformity, 3 8

I
I/O allocation, 4 5, A 7 Initial Settings, Output, 5 9 Initialize/test switch, 2 3 Installation restrictions, 1 7

M
Memory backup battery, 2 4 Mode selector, 2 3

C
COM port, 2 3 CPU with Analog I/O, 2 3 Range setting switch, 2 4 Current consumption, 1 8

O
Operation condition switches, 2 4

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I1

Index

FP2 Analog Unit

S
Scale conversion program, 8 12 Shared memory, B 3 Analog input unit, B 4 Analog output unit, B 5 CPU unit with Analog I/O, B 3 Specifications Analog input, A 4 Analog output, A 6 General, A 3 Status indicator LEDs, 2 3

T
Terminals, 3 3 Tool port, 2 3 Troubleshooting Analog input, 13 3 Analog output, 13 4

W
Wire, Broken wire detection, 8 17 Wires, 3 3 Wiring Analog input, 3 5 Analog output, 3 7

I2

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Record of Changes
Manual No.
ARCT1F283END V1.0

Date
February 2000

Description of Changes
First European edition

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