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Preliminary
Document Title 8K X 8 BIT CMOS SRAM Revision History
Rev. No.
0.0 0.1 0.2 0.3
History
Initial issue Erase 55ns part Add SI/SU part no. and change ICC1, Isb1 Erase 28-pin TSOP reverse type package
Issue Date
July 2, 1999 December 14, 2000 December 11, 2002 December 23, 2002
Remark
Preliminary
PRELIMINARY
A623308 Series
Preliminary
Features
n External Operating Voltage: 4.5V to 5.5V n Access times: 70 ns (max.) n Current: A623308-S series: Operating: 35mA (max.) Standby: 10A (max.) A623308-SI/SU series: Operating: 35mA (max.) Standby: 15A (max.) n Extended operating temperature range: 0C to 70C for -S series, -25C to 85C for -SI series, -40C to 85C for -SU series. n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL compatible n Common I/O using three-state output n Data retention voltage: 2.0V (min.) n Available in 28-pin SOP and TSOP (forward type) packages
General Description
The A623308 is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Minimum standby power is drawn by this device when CE is at a high level, independent of the other input levels. Data retention is guaranteed at a power supply voltage as low as 2.0V.
Pin Configurations
n SOP n TSOP
2 3 4 5
27 26 25 24
6 7 8 9 10 11 12 13 14
23 22 21 20 19 18 17 16 15
PRELIMINARY
~ ~
~ ~
NC
28
VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14
A623308V
28 27 26 25 24 23 22 21 20 19 18 17 16 15
A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 VSS I/O2 I/O1 I/O0 A0 A1 A2
A623308M
A623308 Series
Block Diagram
A5
A9 A11 A12
DECODER
A0
A4 A10
CE OE WE
CONTORL CIRCUIT
Pin Description-TSOP
Pin No. 5,8 1 2-4, 9-17, 28 7 6 18-20, 22-26 21 27 Symbol NC OE A0 - A12 VCC WE I/O0 - I/O7 GND CE Description No Connection Output Enable Address Input Power Supply Write Enable Data Inputs/Outputs Ground Chip Enable
PRELIMINARY
A623308 Series
Recommended DC Operating Conditions
(TA = 0C to +70C, -25C to +85C or -40C to +85C) Symbol VCC GND VIH VIL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Min. 4.5 0 2.2 -0.3 Typ. 5.0 0 3.5 0 Max. 5.5 0 VCC + 0.3 +0.8 Unit V V V V
*Comments
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC Electrical Characteristics (TA = 0C to +70C, -25C to +85C or -40C to +85C, VCC = 5.0V 10%, GND = 0V)
Symbol Parameter A623308-70S Min. ILI Input Leakage Current Output Leakage Current Max. 1 A623308-70SI/SU Min. Max. 1 A VIN = GND to VCC CE = VIH or OE = VIH or WE = VIH VI/O = GND to VCC Unit Conditions
ILO
ICC
mA
CE = VIL, II/O = 0mA Min. Cycle, Duty = 100% CE = VIL, II/O = 0mA CE = VIL, VIH = VCC VIL = 0V, f = 1 MHz II/O = 0 mA
ICC1
35
35
mA
ICC2
mA
PRELIMINARY
A623308 Series
DC Electrical Characteristics (continued)
Symbol Parameter A623308-70S Min. ISB Supply Current Standby Power ISB1 Output Low Voltage Output High Voltage 10 15 A Max. 0.5 A623308-70SI/SU Min. Max. 0.5 mA CE = VIH CE VCC - 0.2V VIN 0V IOL = 2.1mA Unit Conditions
VOL
0.4
0.4
VOH
2.4
2.4
IOH = -1.0mA
Truth Table
Mode Standby Output Disable Read Write Note: X: H or L CE H L L L OE X H L X WE X H H L I/O Operation High Z High Z DOUT DIN Supply Current ISB, ISB1 ICC, ICC1, ICC2 ICC, ICC1, ICC2 ICC, ICC1, ICC2
PRELIMINARY
A623308 Series
AC Characteristics (TA = 0C to +70C, -25C to +85C or -40C to +85C, VCC = 5.0V 10%)
Symbol Parameter A623308-70S/SI/SU Min. Read Cycle tRC tAA tACE tOE tCLZ tOLZ tCHZ tOHZ tOH Write Cycle tWC tCW tAS tAW tWP tWR tWHZ tDW tDH tOW Notes: Write Cycle Time Chip Enable to End of Write Address Set up Time Address Valid to End of Write Write Pulse Width Write Recovery Time Write to Output in High Z Data to Write Time Overlap Data Hold from Write Time Output Active from End of Write 70 60 0 60 50 0 30 0 5 30 ns ns ns ns ns ns ns ns ns ns Read Cycle Time Address Access Time Chip Enable Access Time Output Enable to Output Valid Chip Enable to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z Output Hold from Address Change 70 10 5 5 70 70 35 25 25 ns ns ns ns ns ns ns ns ns Max. Unit
tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not referred to output voltage levels.
PRELIMINARY
A623308 Series
Timing Waveforms
Read Cycle 1
(1)
tRC Address
tAA
OE
tOE tOLZ5 CE
tOH
tOHZ5 tCHZ5
Read Cycle 2
(1, 2, 4)
tRC Address
DOUT
PRELIMINARY
A623308 Series
Timing Waveforms (continued)
Read Cycle 3
(1, 3, 4)
CE
tACE tCLZ 5
tCHZ 5
DOUT
Notes: 1. 2. 3. 4. 5.
WE is high for Read Cycle. Device is continuously enabled, CE = VIL. Address valid prior to or coincident with CE transition low. OE = VIL. Transition is measured 500mV from steady state. This parameter is sampled and not 100% tested.
(6)
tAS1
tWP 2
WE
tDW
tDH
PRELIMINARY
A623308 Series
Timing Waveforms (continued)
Write Cycle 2 (Chip Enable Controlled)
(6)
tWP 2 WE
tDW
tDH
DIN
tWHZ7
DOUT
Notes: 1. 2. 3. 4.
tAS is measured from the address valid to the beginning of Write. A Write occurs during the overlap (tWP) of a low CE and a low WE . tWR is measured from the earliest of CE or WE going high to the end of the Write cycle. If the CE low transition occurs simultaneously with the WE low transition or after the WE transition, outputs remain in a high impedance state. 5. tCW is measured from the later of CE going low to the end of Write. 6. OE level is high or low. 7. Transition is measured 500mV from steady. This parameter is sampled and not 100% tested.
PRELIMINARY
A623308 Series
AC Test Conditions
Input Pulse Levels Input Rise And Fall Time Input and Output Timing Reference Levels Output Load 0V, 3.0V 5 ns 1.5V See Figure 1,2
+5V
+5V
1800
990
CL 30pF*
990
CL 5pF*
Figure 2. Output Load for tCLZ tOLZ , tCHZ, tOHZ, tWHZ, and tow
ICCDR
tCDR tR
0 tRC
VDR 2.0V
VIH
PRELIMINARY
A623308 Series
Ordering Information
Part No. A623308M-70S A623308V-70S A623308M-70SI A623308V-70SI A623308M-70SU A623308V-70SU 70 Access Time (ns) Operating Current Max. (mA) 35 35 35 35 35 35 Standby Current Max. (A) 10 10 15 15 15 15 Package 28L SOP 28L TSOP (Forward) 28L SOP 28L TSOP (Forward) 28L SOP 28L TSOP (Forward)
PRELIMINARY
10
A623308 Series
Package Information SOP (W.B.) 28L Outline Dimensions
28 15
unit: inches/mm
14
Detail F
D c A2 S Seating Plane y D A1
L1 See Detail F
Dimensions in inches Symbol A A1 A2 B C D E e H L L1 S y Min 0.004 0.093 0.014 0.008 0.326 0.044 0.453 0.028 0.059 0 Nom 0.098 0.016 0.010 0.713 0.331 0.050 0.465 0.036 0.067 Max 0.112 0.103 0.020 0.012 0.728 0.336 0.056 0.477 0.044 0.075 0.047 0.004 8
Dimensions in mm Min 0.10 2.36 0.36 0.20 8.28 1.12 11.51 0.71 1.50 0 Nom 2.49 0.41 0.25 18.11 8.41 1.27 11.81 0.91 1.70 Max 2.85 2.62 0.51 0.30 18.49 8.53 1.42 12.12 1.12 1.91 1.19 0.10 8
Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash.
PRELIMINARY
11
A623308 Series
Package Information TSOP 28L TYPE I (8 X 13.4mm) Outline Dimensions
unit: inches/mm
D1 1 28 A2
Detail "A"
A1
14 D
15
Detail "A"
Dimensions in inches Symbol A A1 A2 b c E L D D1 e S y 0 Min 0.002 0.037 0.007 0.005 0.311 0.012 0.520 0.461 Nom 0.039 0.009 0.315 0.020 0.528 0.465 0.022 BSC 0.017 TYP 0.004 5 Max 0.049 0.041 0.011 0.008 0.319 0.028 0.536 0.469
Dimensions in mm Min 0.05 0.95 0.17 0.12 7.90 0.30 13.20 11.70 Nom 1.00 0.22 8.00 0.50 13.40 11.80 0.55 BSC 0.425 TYP 0 0.10 5 Max 1.25 1.05 0.27 0.21 8.10 0.70 13.60 11.90
Notes: 1. The maximum value of dimension D1 includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash.
PRELIMINARY
12