EE 290C

CMOS Analog Design Using

All-region MOSFET Modeling
Carlos Galup-Montoro
Univ. of Santa Catarina, Brazil; UC Berkeley
373 Cory Hall
carlosgalup@gmail.com
http://eel.ufsc.br/~lci/faculty.html
2
Course Format: Two hours of lecture and one hour
of project discussion per week
Prerequisites: EE140 Linear Integrated Circuits or
equivalent
Grading Policy: Homework 50% + Project 50%
Textbook: CMOS Analog Design Using All-region
MOSFET Modeling, M. C. Schneider and C. Galup-
Montoro, Cambridge University Press, 2009
290C Basics
CMOS Analog Design Using All Region MOSFET Modeling
Analog Bipolar and MOS Circuits
3
Bipolar and MOS
A. B. Grebene, Bipolar and MOS Analog Integrated Circuit Design, 1983.
K. R. Laker and W. M. C. Sansen, Design of Analog Integrated Circuits and
Systems, 1994.
D. A. Johns and K. Martin, Analog Integrated Circuit Design, 1997.
P. R. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer, Analysis and Design of
Analog Integrated Circuits, Fourth Edition, 2001.
W. M. C. Sansen, Analog Design Essentials, Springer, Dordrecht, 2006
MOS
B. Razavi, Design of Analog CMOS Integrated Circuits, 2001.
F. Maloberti, Analog Design for CMOS VLSI Systems, 2001.
P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design, 2002.
CMOS Analog Design Using All Region MOSFET Modeling
Important Differences between Bipolar
Transistors (BJTs) and MOSFETs
4
A) BJTs are three-terminal devices and MOSFETs are four-
terminal devices
B) Differences in the internal symmetries of the most
commonly used BJTs and MOSFETs
C) BJT exponential current law vs. MOS current law
D) The geometric degrees of freedom for MOSFETs in
analog design
E) Quality of BJT and MOSFET models
CMOS Analog Design Using All Region MOSFET Modeling
5
Ebers-Moll Equivalent Circuit of an npn
Transistor
E
B

R
I
R

F
I
F
I
F
I
R
I
E
I
C
I
B
C
D
E D
C
C F F R
I I I =
E R R F
I I I =
( ) (1 ) (1 )
B C E F F R R
I I I I I = + = +
Forward and reverse currents
CMOS Analog Design Using All Region MOSFET Modeling
The Capacitive Model of the MOS
Structure
6
V
GB
p- type neutral
region
depletion
region

s
1
s ox
GB ox b
d C
dV C C n

= =

+
V
GB
ox
C

b
C

CMOS Analog Design Using All Region MOSFET Modeling

7
MOSFET: Symmetric Strong and Weak
Inversion Models
Strong inversion
weak inversion
V
DB
(b)
p-type substrate
n
+
n
+
V
SB
V
GB
I
D
D F R
I I I =
( )
2
( ) ( ) 0
2
F R GB SB DB T
I V nV V
n

=
( ) ( )
( )
0 0
/ /
0
GB T SB t GB T DB t
V V nV n V V nV n
D F R
W
I I I I e e
L

= =
ox
W
C
L


=
CMOS Analog Design Using All Region MOSFET Modeling
Intrinsic Gain Stages: (a) Common-
Source and (b) Common-Emitter
Amplifiers
8
CMOS Analog Design Using All Region MOSFET Modeling
Small-Signal Circuit and Frequency
Response of the Amplifiers
9
m
o i
L
b
g
v v
j C


>>
CMOS Analog Design Using All Region MOSFET Modeling
Design of Common-Emitter and
Common-Source Amplifiers
10
BJT
MOSFET
( )
1
v u
A =
2 . .
m u L L
g C G B W C = =
2 . . .
C m t L t
I g GBW C = =
/
BE t
V
C S
I I e

=
( )
2
0
1
2
Dsi ox GB T SB
W
I C V V nV
n L

| |

=
|
\ ( )
2
2 /
m
Dsi
ox
ng
I
C W L
=

CMOS Analog Design Using All Region MOSFET Modeling

Example: GBW = 10 MHz, C
L
= 10 pF
= 8010
-6
A/V
2
, n = 1.35
W/L I
Dsi
( A)
1
I
D
( A)
2
0 22
500 6.6 28.6
100 33.2 55.2
50 66.4 88.4
10 332 354
11
ox
C

2 . . 628 /
m L
g GBW C A V = =
1
Strong inversion model.
2
Accurate all-
region MOSFET model
CMOS Analog Design Using All Region MOSFET Modeling
All Region Empirical Model of the
MOSFET
12
6 3
1.35 628 10 .26 10 22
WI m t
I ng A

= = =
( )
1
2 /
m
D WI Dsi m t
ox t
g
I I I ng
C W L

(
= + = +
(

(

( )
( )
/
1
/
th
D WI
W L
I I
W L
(
= +
(
(

( ) ( )
/ 2
m ox t
th
g W L C

=
22
D Dsi
I A I = +
CMOS Analog Design Using All Region MOSFET Modeling
Aspect Ratio vs. Current Excess in a
MOSFET Design
13
( )
( )
/
1
/
th
D WI
W L
I I
W L
(
= +
(
(

CMOS Analog Design Using All Region MOSFET Modeling
14
Consistent Modeling of FETs: Use of
Series Associations of FETs
D
S
G
B
W
L
D
D
W
L
S
S
I
D
X
M
D
M
S
I
D
= (
W
L
eq
[ g( V
G
V
S
- g ( V
G
V
D
) , ) , ) ]
(
W
L
eq =
W
L
D
W
L
S
(
W
L
D
+ (
W
L
S
)
( ) ( )
) )
CMOS Analog Design Using All Region MOSFET Modeling
15
Series-Parallel Associations of FETs
CMOS Analog Design Using All Region MOSFET Modeling
16
Series Associations of FETs vs. Long
Channel MOSFETs
Series association Long-channel
nominal V
T
L-dependent V
T
Characterize one
transistor ( performance
of the shortest transistor
is optimized)
L-dependent characterization
(halo/pocket implants effects)
accurate for current
mirrors
L-dependent accuracy
Gate current more
predictable
CMOS Analog Design Using All Region MOSFET Modeling
17
Application of Series
Parallel Associations of FETs-
Three M:1 Current Mirrors
a) M :1
B) N=M, N:1/N
C) M: N/N
M
I
Out
M : 1
M
B
N
N
M
a
M
b
(c)
M
A
N
I
in
I
Out
M
a1
N
M
b2
N
2
: 1
(b)
V
G
M
A
M
B
M
a
M
A
= M parallel M
a
transistors
M
B
I
in
I
Out
M : 1
(a)

aj
, V
Taj

B
V
TB
V
G
M
A
I
in
CMOS Analog Design Using All Region MOSFET Modeling
18
Current Mismatch in Two M:1 Current
Mirrors
Arnaud, JSSC Sep. 06
CMOS Analog Design Using All Region MOSFET Modeling
19
M-2M Digital-to-Analog Converter 1:
M
bb
can be substituted by set of four transistors
V
G
I
D1
I
D2
I
D
I
D2a
I
D2b
I
D1
M
a
M
bb
M
ba
M
bd
M
bc
M
d
M
c
CMOS Analog Design Using All Region MOSFET Modeling
20
M-2M Digital-to-Analog Converter 2:
8 bit DAC with M-2M Ladder
Q
0
Q
6
Do
D Q
ck
Q
1
D Q
ck
Q
7
D Q
ck
Di
Ck
D Q
ck
M
72
M
71
M
73
Q
7
-Q
7
-Q
7
Q
7
M
62
M
61
M
64
M
63
Q
6
-Q
6
-Q
6
Q
6
M
02
M
01
M
04
M
03
Q
0
-Q
0
-Q
0
Q
0
M
B2
M
B1
I
0
V
0
I
G
V
G
M
00
V
R
I
R
I
B
V
B
G
B
CMOS Analog Design Using All Region MOSFET Modeling
21
M-2M Digital-to-Analog Converter 3:
Normalized current mismatch for a 10 m x 10 m
transistor
CMOS Analog Design Using All Region MOSFET Modeling
22
M-2M Digital-to-Analog Converter 4
Standard deviation of the measured error from 20
samples of DAC0
CMOS Analog Design Using All Region MOSFET Modeling
23
M-2M Digital-to-Analog Converter 5
Top area is the M-2M ladder and the bottom area is the
serial register.
Klimach. ISCAS 08
CMOS Analog Design Using All Region MOSFET Modeling
290C Course Outline
24
- MOSFET modeling (3 weeks)
- Mismatch and noise (2 weeks)
- Basic CMOS building blocks (5 weeks)
- Op amps ( 4 weeks)
CMOS Analog Design Using All Region MOSFET Modeling
25
290C Learning Goals
Understand and use an all-region ( accumulation,
WI, MI and SI) compact MOSFET model for analog
design
Acquire a deep understanding ( nonlinearities,
noise, mismatch) of the basic CMOS build blocks
and op amps
Apply the above concepts in a design project
CMOS Analog Design Using All Region MOSFET Modeling
Similar Approaches to CMOS Design
26
Paul G. A. Jespers; The gm/ID Design Methodology for CMOS
Analog Low Power Integrated Circuits
2009, ISBN: 978-0-387-47100-6
D. M. Binkley; Tradeoffs and Optimization in Analog CMOS
Design ISBN: 978-0-470-03136-0, Wiley 2008.
Danica Stefanovic and Maher Kayal; Structured Analog CMOS
Design Series: Analog Circuits and Signal Processing
2009, ISBN: 978-1-4020-8572-7
CMOS Analog Design Using All Region MOSFET Modeling