Parity flag

From Wikipedia, the free encyclopedia In computer processors the parity flag indicates if the number of set bits is odd or even in the binary representation of the result of the last operation. It is normally a single bit in a processor status register. For example, assume a machine where a set parity flag indicates even parity. If the result of the last operation were 26 (11010 in binary), the parity flag would be 0 since the number of set bits is odd. Similarly, if the result were 102 (1100110 in binary) then the parity flag would be 1.

[edit] x86 Processors

In x86 processors, the parity flag reflects the parity only of the least significant byte of the result, and is set if the number of set bits of ones is even. According to 80386 Intel manual, the parity flag is changed in the x86 processor family by the following instructions:

All arithmetic instructions; Compare instruction (equivalent to a subtract instruction without storing the result); Logical instructions - XOR, AND, OR; the TEST instruction (equivalent to the AND instruction without storing the result). the POPF instruction

The parity flag is usually used in conditional jumps, where e.g. the JP instruction jumps to the given target when the parity flag is set and the JNP instruction jumps if it is not set. The flag may be also read directly with instructions such as PUSHF, which pushes the flags register on the stack. One common reason to test the parity flag actually has nothing to do with parity. The FPU has four condition flags (C0 to C3), but they can not be tested directly, and must instead be first copied to the flags register. When this happens, C0 is placed in the carry flag, C2 in the parity flag and C3 in the zero flag[1]. The C2 flag is set when e.g. incomparable floating point values (NaN or unsupported format) are compared with the FUCOM instructions.

Overflow flag
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In computer processors, the overflow flag (sometimes called V flag) is usually a single bit in a system status register used to indicate when an arithmetic overflow has occurred in an operation, indicating that the signed two's-complement result would not fit in the number of bits used for the operation (the ALU width). Some architectures may be configured to automatically generate an exception on an operation resulting in overflow. Although not very precise, the overflow flag could be considered a two's complement form of a carry flag, but the typical usage is quite different. An illustrative example is what happens if we add 127 and 127 using 8-bit registers. 127+127 is 254, but using 8-bit aritmetics the result would be 1111 1110 binary, which is -2 in two's complement, and thus negative. A negative result out of positive operands (or vice versa) is an overflow. The overflow flag would then be set so the program can be aware of the problem and mitigate this or signal an error. The overflow flag is thus set when the most significant bit (here considered the sign bit) is changed by adding two numbers with the same sign (or subtracting two numbers with opposite signs). Overflow never occurs when the sign of two addition operands are different (or the sign of two subtraction operands are the same). Internally, the overflow flag is usually generated by an exclusive or of the internal carry into and out of the sign bit. As the sign bit is the same as the most significant bit of a number considered unsigned, the overflow flag is "meaningless" and normally ignored when unsigned numbers are added or subtracted. The overflow flag is typically changed by all arithmetic operations, including compare instructions (equivalent to a subtract instruction without storing the result). In many processor architectures, the overflow flag is cleared by bitwise operations (and, or, xor, not), possibly including shifts and rotates, but it may also be left undefined by these. Instructions such as multiply and divide often leave the flag undefined, or affected by the last partial result.

[edit] Notes and references

Status register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 (bit position) - - - - O D I T S Z - A - P - C Flags

Negative flag
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removed. (December 2009) In computer processor the negative flag or sign flag is a single bit in a system status (flag) register used to indicate whether the result of last mathematic operation resulted in a value whose most significant bit was set. In a two's complement interpretation of the result, the negative flag is set if the result was negative. For example, in an 8-bit signed number system, -37 will be represented as 1101 1011 in binary (the most significant bit is 1), while +37 will be represented as 0010 0101 (the most significant bit is 0). The negative flag is changed in the x86 series processors by the following instructions (referring to the Intel 80386 manual [1]):

All arithmetic operations except multiplication and division; compare instructions (equivalent to subtract instructions without storing the result); Logical instructions - XOR, AND, OR; TEST instructions (equivalent to AND instructions without storing the result).

Carry flag
From Wikipedia, the free encyclopedia In computer processors the carry flag (usually indicated as the C flag) is a single bit in a system status (flag) register used to indicate when an arithmetic carry or borrow has been generated out of the most significant ALU bit position. The carry flag enables numbers larger than a single ALU width to be added/subtracted by carrying (adding) a binary digit from a partial addition/subtraction to the least significant bit position of a more significant word. It is also used to extend bit shifts and rotates in a similar manner on many processors (sometimes done via a dedicated X flag). For subtractive operations, two (opposite) conventions are employed as most machines sets the carry flag on borrow while some machines (such as the 6502 and the PIC[disambiguation needed ]) instead resets the carry flag on borrow (and vice versa).

[edit] Uses
The carry flag is affected by the result of most arithmetic (and typically several bitwise) instructions and is also used as an input to many of them. Several of these instructions has two forms which either reads or ignores the carry. In assembly languages these instructions are called by names such as ADD/SUB, ADC/SBC (ADD/SUB including carry), SHL/SHR (bit shifts), ROL/ROR (bit rotates), RCR/RCL (rotate through carry), and so on. [1] The use of the carry flag in this manner enables multi-word add, subtract, shift, and rotate operations. An example is what happens if one were to add 255 and 255 using 8-bit registers. The result should be 510 which is 1_1111_1110 in binary, requiring 9 bits. The 8 least significant bits always stored in the register would be 1111_1110 binary (254 decimal) but since there is carry out of bit 7 (the eight bit), the carry is set, indicating that the result needs 9-bits. The valid 9-bit result is the concatenation of the carry flag with the result. Note that in an 8-bit two's complement interpretation, this operation is -1 + -1 and yields the correct result of -2, with no overflow, even if the carry is ignored.

Another example may be an 8-bit register with the bit pattern 0101_0101 and the carry flag set; if we execute a rotate left through carry instruction, the result would be 1010_1011 with the carry flag cleared because the most significant bit (bit 7) was rotated into the carry while the carry was rotated into the least significant bit (bit 0). While the first micro processors Intel 4004 (CLC) and Intel 8008 (FC) had specific operations to set the carry bit to 0, the later Intel 8080 and it's compatible processors (such as the Z80) only had operations to set the carry bit to 1. For setting it to zero they use the logic instructions (AND, OR, XOR) which are actual does not use the carry bit at all for their functions.

[edit] Carry flag vs. Borrow flag

While the carry flag is well-defined for addition, there are two possible ways to use the carry flag for subtractive operations. One uses the bit as a borrow flag, setting it if a<b when computing ab, and a borrow must be performed. A subtract with borrow (SBB) instruction will compute abC = a(b+C), while a subtract without borrow (SUB) acts as if the borrow bit were clear. The 8080, Z80, x86 and 68k families (among others) use a borrow bit.[1] The other takes advantage of the identity that x = not(x)+1 and computes ab as a+not(b)+1. The carry flag is set according to this addition, and subtract with carry computes a+not(b)+C, while subtract without carry acts as if the carry bit were set. The 6502 and PowerPC processors use this convention. The 6502 is a particularly well-known example because it does not have a subtract without carry operation, so software must ensure that the carry flag is set before every subtract operation where a borrow is not required. The modern convention is to refer to the first alternative as a "borrow bit", while the second is called a "carry bit". However, there are exceptions in both directions; the VAX and NS320xx architectures use the borrow bit convention, but call their abC operation "subtract with carry" (SBWC). PA-RISC uses a carry bit convention, but calls its a+not(b) +C operation "subtract with borrow" (SUBB) The Zero Flag is a single bit flag that is a central feature on most conventional CPU architectures (including x86, ARM, PDP-11, 68000 and numerous others). It is often stored in a dedicated register, typically called status register or flag register, along with other flags. The zero flag is typically abbreviated Z or ZF or similar in most documentation and assembly languages. Along with a carry flag, a sign flag and an overflow flag, the zero flag is used to check the result of an arithmetic operation, including bitwise logical instructions. It is set if an arithmetic result is zero, and reset otherwise. This includes results which are not stored, as most traditional instruction sets implement the compare instruction as a subtract where the result is discarded. It is also common that processors have a bitwise AND-instruction that does not store the result. In most processors, the zero flag is mainly used in conditional branch instructions, which alter control flow on previous instruction results, but there are often other uses as well. In some instruction sets such as the MIPS architecture, a dedicated flag register is not used; jump instructions instead check a register for zero. The Zero Flag is a single bit flag that is a central feature on most conventional CPU architectures (including x86, ARM, PDP-11, 68000 and numerous others). It is often stored in a dedicated register, typically called status register or flag register, along with

other flags. The zero flag is typically abbreviated Z or ZF or similar in most documentation and assembly languages. Along with a carry flag, a sign flag and an overflow flag, the zero flag is used to check the result of an arithmetic operation, including bitwise logical instructions. It is set if an arithmetic result is zero, and reset otherwise. This includes results which are not stored, as most traditional instruction sets implement the compare instruction as a subtract where the result is discarded. It is also common that processors have a bitwise AND-instruction that does not store the result. In most processors, the zero flag is mainly used in conditional branch instructions, which alter control flow on previous instruction results, but there are often other uses as well. In some instruction sets such as the MIPS architecture, a dedicated flag register is not used; jump instructions instead check a register for zero.

For a number of reasons, it can be important to export a number of status codes from the ALU, for detecting errors, and for making decisions.

Contents
[hide]

1 Comparisons 2 Zero Flag 3 Overflow Flag 4 Carry/Borrow flag 5 Comparisons 6 Latch ALU flags or not?

[edit] Comparisons
Comparisons between two values are typically performed by subtracting them. We can determine the relationship between the two values by examining the difference:

If the first is larger than the second, the result will be positive If the second is larger than the first, the result will be negative If the two are equal, the result will be zero.

[edit] Zero Flag

Determining whether two values are equal requires the ALU to determine whether the result is zero. This can be accomplished by feeding each bit of the result into a NOR gate. The beauty of this is that a single multi-port NOR gate requires less hardware than an entire array of equivalent 2-port gates.

[edit] Overflow Flag

It is good to know when the result of an addition or multiplication is larger than the maximum result size. Likewise, it is also good to know if the result of a subtraction or a division is smaller than possible, and thus creates underflow. Either two separate flags can be used for these conditions, or one flag can be interpreted in different ways, depending on the input operation.

[edit] Carry/Borrow flag

This flag indicates when an operation results in a value larger than the accumulator can represent (carry/overflow) or smaller than the accumulator can represent (borrow/underflow). It can be used by software to implement arbitrary-width arithmetic, such as a "bignum" library.

[edit] Comparisons
Many ALUs need to compare data items, and determine if a particular value is greater than or less than another value. In these cases, the ALU will also export flags for these values. A comparison in a processor can typically be performed by a subtraction operation. If the result is a positive number, the first item is greater than the second item. If the result is a negative number, the first item is less than the second. If the numbers being compared are unsigned, the value of the carry flag will serve the same purpose as the greater-than or less-than flag.