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EXPERIMENT STEPS
MOSFETS:
GAIN
GRAPH
DIFFERENTIAL OP AMP
Mosfets mn6 and mn7 are removed. The new node of vout is at node x. The capacitor is now connected at node x. MOSFETS:
GRAPH
PERFORMANCE COMPARISON Structure two stage amplifier gain (dB) -3dB (MHz) 56.9 6.9734 G.B (MHz) 7.2623
differential amplifier
43 0.48794
0.53044
Hence from the simulation results, the performance of the Two-Stage Operational amplifier is much better than Differential Amplifier.
All the mosfets operate in saturation region as seen below and Id does not exceed 10uA,
The figure shows the graph of the phase margin and the gain.
The graph below shows the Vin Vout curve expressed in terms of time,
Hence the Phase Margin is, PM = 180 177.86 = 2.14 As we connected the circuit as a unit gain buffer, we can see that the phase margin is less than 0 degrees. Hence we add the negative value of phase margin to 180 degrees to get our final phase margin, which is 2.14. Hence the system is unstable. It is because the typical value of phase margin must be larger than 45 degrees for it to be considered a stable system.
Phase Margin = 180 135.07 = 44.93 45 After compensation, pole1 frequency decreased and pole 2 frequency increased making the phase margin around 45 and also the system becomes more stable.
Hspice code
at 2.15p
PM=180-136.47=43.53
at 3pf
PM=180-128.87=51.53
at 5pf
PM=180-120.27=59.53
at 10pf
Hspice code
At 2pF
At 3pF
At 5pF
At 10pF
Conclusion:As we increase Cc the slew rate decreases, because larger Cc need more time to charge or discharge
From the simulation, we can see that the gain does not increase after second pole, it means that the zero is moved to infinite. And PM = 180-127.2= 52.8 We try a new value of Rc which is, Rc =( 1/gm6)((Cc+Cl)/Cc) = (1/138.2344u) (2.15p+10p)/(2.15p) = 40.88k At Rc= 40.88k
Phase Margin = 180 93.19 = 86.81 Hence the phase margin increased.
ICMR = 1.77 - 0.572= 1.198. Hence it is still is in the range of the typical value for ICMR. Output Voltage Swing We have the hspice code,
The graph below shows the Vin and Vout curve for the output voltage swing,
Common Mode Rejection Ratio (CMRR): the ability of ejecting common mode signal. HSPICE CODE: two stage amp-CMRR_mench .lib 'C:\synopsys\rf018.l' TT .option post mp3 a a vdd vdd pch l=1u w=5.5u mp4 x a vdd vdd pch l=1u w=5.5u mn1 x vin+ b gnd nch l=1u w=2.5u mn2 a vin- b gnd nch l=1u w=2.5u mn5 b c gnd gnd nch l=1u w=5u mn8 c c gnd gnd nch l=1u w=5u mp6 vout x vdd vdd pch l=1u w=33u mn7 vout c gnd gnd nch l=1u w=12u vdd vdd gnd 1.8 Cl vout gnd 10p Iref vdd c 3.7u
vin+ vin+ gnd dc 0.9 ac 1 vin- vin- gnd dc 0.9 ac 0 .ac dec 10 100 10g .print vdb(vout) .alter
Slew Rate: the maximum rate of change dvo/dt is called slew rate. Settling Time: the time during output signal be stable shown as left figure We have the following HSPICE CODE for Vinp which has a peak voltage of 1V
From the simulation, we can see that the slew rate will increase while the swing of input pulse increases.
QUESTION
Ans The common source is used for higher gain. If we use other structures, theres a posiibility that it the gain would be much lower.