Documente Academic
Documente Profesional
Documente Cultură
. . . . . . . .
HIGH SPEED tPD = 15 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 A (MAX.) AT TA = 25 C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS BALANCED PROPAGATION DELAYS tPLH = tPHL SYMMETRICAL OUTPUT IMPEDANCE IOL = IOH = 4 mA (MIN.) HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS164
DESCRIPTION The M54/74HC164 is a high speed CMOS 8 BIT SIPO SHIFT REGISTER fabricated in silicon gate 2 C MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. The HC164 is an 8 bit shift register with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (A or B), either of these inputs can be used as an active high enable for data entry through the other input. An unused input must be high, or both inputs connected together. Each low-to-high transition on the clock input shifts data one place to the right and enters into QA, the logic NAND of the two data inputs (A B), the data that existed before the rising clock edge. A low level on the clear input overrides all other inputs and clears the register asynchronously, forcing all Q outputs low. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
October 1992
NC = No Internal Connection
1/12
M54/M74HC164
INPUT AND OUTPUT EQUIVALENT CIRCUIT
TRUTH TABLE
INPUTS CLEAR L H H H H CLOCK X SERIAL IN A X X L X H B X X X L H L L H QA L QB L QAn QAn QAn OUTPUS ............ ............ QH L QGn QGn QGn
X: Dont Care QAn - QGn : The level of QA -QG, respectively. before the most-recent transition of th clock.
LOGIC DIAGRAM
2/12
M54/M74HC164
PIN DESCRIPTION
PIN No 1, 2 3, 4, 5, 6, 10, 11, 12, 13 8 9 7 14 SYMBOL A, B QA to QH NAME AND FUNCTION Data Inputs Outputs
Clock Input (LOW to HIGH, Edge-triggered) Master Reset Input Ground (0V) Positive Supply Voltage
C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied. (*) 500 mW: 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC
ns
3/12
M54/M74HC164
DC SPECIFICATIONS
Test Conditions Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 V OH High Level Output Voltage 2.0 4.5 6.0 4.5 VOL Low Level Output Voltage 6.0 2.0 4.5 6.0 4.5 6.0 II ICC Input Leakage Current Quiescent Supply Current 6.0 6.0 VI = IO=-20 A VIH or V IL IO=-4.0 mA IO=-5.2 mA VI = IO= 20 A VIH or V IL IO= 4.0 mA IO= 5.2 mA VI = VCC or GND VI = VCC or GND 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.26 0.26 0.1 4 TA = 25 oC 54HC and 74HC Min. Typ. Max. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.33 0.33 1 40 Value -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 1 80 A A V V 1.5 3.15 4.2 0.5 1.35 1.8 V V Unit
VIH
V IL
4/12
M54/M74HC164
AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns)
Test Conditions Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 5 99 TA = 25 C 54HC and 74HC Min. Typ. 30 8 7 57 19 16 60 20 17 18 53 62 24 6 5 40 10 9 16 4 3 Max. 75 15 13 160 32 27 175 35 30 5.0 25 30 75 15 13 75 15 13 50 10 9 5 5 5 5 5 5 10 95 19 16 95 19 16 65 13 11 5 5 5 5 5 5 10
o
Value -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. 95 19 16 200 40 34 220 44 37 4.2 21 25 110 22 19 110 22 19 75 15 13 5 5 5 5 5 5 10 Min. Max. 110 22 19 240 48 41 265 53 45
Unit
Output Transition Time Propagation Delay Time (CLOCK - Q) Propagation Delay Time (CLEAR - Q) Maximum Clock Frequency Minimum Pulse Width (CLOCK) Minimum Pulse Width (CLEAR) Minimum Set-up Time (A, B - CK) Minimum Hold Time (A, B - CK) Minimum Removal Time Input Capacitance Power Dissipation Capacitance
ns
ns
ns
fMAX
6.2 31 37
MHz
ns
ns
ts
ns
th
ns
tREM
ns pF pF
(*) CPD is defined as the value of the ICs internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD VCC fIN + ICC
5/12
M54/M74HC164
TIMING CHART
6/12
M54/M74HC164
SWITCHING CHARACTERISTICS TEST WAVEFORM CLEAR MODE SERIAL MODE
7/12
M54/M74HC164
DIM.
P001A
8/12
M54/M74HC164
DIM.
P053C
9/12
M54/M74HC164
P013G
10/12
M54/M74HC164
DIM.
P027A
11/12
M54/M74HC164
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A
12/12