LG GT500 GT505 Service Manual

Service Manual
Internal Use Only
Service Manual GT500
Model : GT500
Date: June, 2009 / Issue 1.0
Table Of Contents
1. INTRODUCTION ............................................... 5
1.1 Purpose ......................................................................5 1.2 Regulatory Information .................................................5 4.19 Checking Front End Module Block input logic ..........133 4.20 Checking WCDMA Block ........................................144 4.21 Checking GSM Block .............................................157
2. PERFORMANCE............................................... 7
2.1 System Overview .........................................................7 2.2 Usable environment .....................................................8 2.3 Radio Performance ......................................................8 2.4 Current Consumption .................................................16 2.5 RSSI .........................................................................16 2.6 Battery Bar................................................................16 2.7 Sound Pressure Level ................................................17 2.8 Charging ...................................................................18
5. Download ................................................... 169

5.1 Requirements..........................................................169 5.2 GT500 / GT505 Download .......................................170
6. Block Diagram ........................................... 178 7. CIRCUIT DIAGRAM ...................................... 179 8. BGA Pin Map .............................................. 189 9. PCB LAYOUT ............................................... 195 10. CALIBRATION ............................................ 203
10.1 General Description ...............................................203 10.2 Environment ..........................................................203 10.3 Calibration Environment .........................................204 10.4 Program Operation ................................................205
3. Technical Description .................................. 19

3.1 Digital Baseband (DBB) & Multimedia Processor ..........19 3.2 Visual part.................................................................39 3.3 Audio Part .................................................................47 3.4 GPADC (General Purpose ADC) and AUTOADC2 ...........54 3.5 Charger control .........................................................55 3.6 Voltage Regulation .....................................................61 3.7 RF Technical Description ............................................62
11. EXPLODED VIEW & REPLACEMENT PART LIST ................................................. 211

11.1 EXPLODED VIEW ...................................................211 11.2 Replacement Parts ................................................213 11.3 Accessory .............................................................243
4. TROUBLE SHOOTING ..................................... 73

4.1 Power ON Trouble ......................................................73 4.2 USB Trouble ..............................................................74 4.3 SIM Detect Trouble ....................................................75 4.4 MicroSD card Trouble ................................................76 4.5 Key and Touch Screen Trouble ....................................77 4.6 Camera Trouble .........................................................81 4.7 Main LCD Trouble ......................................................87 4.8 Keypad Backlight Trouble ...........................................90 4.9 Audio Trouble Shooting ..............................................93 4.10 Charger Trouble Shooting .......................................108 4.11 Bluetooth Trouble...................................................111 4.12 Wi-Fi Trouble .........................................................114 4.13 GPS Trouble ..........................................................116 4.14 RF Component ......................................................119 4.15 Procedure to check ...............................................120 4.16 Checking Common Power Source Block..................121 4.17 Checking VCXO Block ............................................128 4.18 Checking Front End Module Block ..........................132
Copyright 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
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LGE Internal Use Only
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1. INTRODUCTION
1. INTRODUCTION
1.1 Purpose
This manual provides the information necessary to repair, calibration, description and download the features of this model.
1.2 Regulatory Information

A. Security Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example, persons other than your companys employees, agents, subcontractors, or person working on your companys behalf) can result in substantial additional charges for your telecommunications services. System users are responsible for the security of own system. There are may be risks of toll fraud associated with your telecommunications system. System users are responsible for programming and configuring the equipment to prevent unauthorized use. The manufacturer does not warrant that this product is immune from the above case but will prevent unauthorized use of common-carrier telecommunication service of facilities accessed through or connected to it. The manufacturer will not be responsible for any charges that result from such unauthorized use.
B. Incidence of Harm If a telephone company determines that the equipment provided to customer is faulty and possibly causing harm or interruption in service to the telephone network, it should disconnect telephone service until repair can be done. A telephone company may temporarily disconnect service as long as repair is not done.
C. Changes in Service A local telephone company may make changes in its communications facilities or procedure. If these changes could reasonably be expected to affect the use of the this phone or compatibility with the network, the telephone company is required to give advanced written notice to the user, allowing the user to take appropriate steps to maintain telephone service.
D. Maintenance Limitations Maintenance limitations on this model must be performed only by the manufacturer or its authorized agent. The user may not make any changes and/or repairs expect as specifically noted in this manual. Therefore, note that unauthorized alternations or repair may affect the regulatory status of the system and may void any remaining warranty.
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1. INTRODUCTION
E. Notice of Radiated Emissions This model complies with rules regarding radiation and radio frequency emission as defined by local regulatory agencies. In accordance with these agencies, you may be required to provide information such as the following to the end user.
F. Pictures The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly different.
G. Interference and Attenuation Phone may interfere with sensitive laboratory equipment, medical equipment, etc.Interference from unsuppressed engines or electric motors may cause problems.
H. Electrostatic Sensitive Devices
ATTENTION Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by the sign. Following information is ESD handling:
Service personnel should ground themselves by using a wrist strap when exchange system boards. When repairs are made to a system board, they should spread the floor with anti-static mat which is also grounded. Use a suitable, grounded soldering iron. Keep sensitive parts in these protective packages until these are used. When returning system boards or parts like EEPROM to the factory, use the protective package as described.
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2. PERFORMANCE
2. PERFORMANCE
2.1 System Overview
Item Shape Size Weight Power Talk Time Specification GSM850/900/1800/1900 & WCDMA Band 1, 8 Bar type - Dual Mode Handset 107 x 54.5 x 11.8 mm 98g (with standard battery) 1000mAh Li-ion Over 200 Min (WCDMA, Tx=10 dBm, Voice) Over 200 Min (GSM, Tx=Max, Voice) Over 300 hrs (WCDMA, DRX=7) Standby Time Antenna Main LCD Main LCD BL Vibrator Speaker MIC Receiver Earphone Jack SIM Socket Volume Key Camera Key External Memory I/O Connect Over 300 hrs (GSM, Paging period=5) Intenna type 3"(400x240), 262K TFT Color LCD White LED Backlight Yes (Coin Type) Yes Yes (SMD Type) Yes Yes Yes(SIM Block Type) : 3.0V & 1.8V Push Type ( + , - ) Push Type Micro SD Socket 5 Pins
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2. PERFORMANCE
2.2 Usable environment

1) Environment
Item Voltage Operating Temp. Storage Temp. Humidity Spec. 3.7 (Typ), 3.4 (Min), (Shut Down: 3.2) -20 ~ + 60 -30 ~ + 85 max. 85 Unit V C C %
2) Environment (Accessory)
Item Power Spec. Available power Min 100 Typ. 220 Max 240 Unit Vac
* CLA : 12~24V (DC)
2.3 Radio Performance

1) Transmitter GSM Mode
No Item GSM 100k ~ 1GHz MS allocated Channel 1G ~ 12.75GHz Conducted Spurious Emission Idle Mode 100k ~ 880MHz 880M ~ 915MHz 915M ~ 1000Mz 1G ~ 1.71GHz 1.71G ~ 1.785GHz 1.785G ~ 12.75GHz -33dBm -60dBm -62dBm -60dBm -50dBm -56dBm -50dBm -39dBm DCS/PCS 9k ~ 1GHz 1G ~ 1710MHz 1710M ~ 1785MHz 1785M ~ 12.75GHz 100k ~ 880MHz 880M ~ 915MHz 915M ~ 1000MHz 1G ~ 1.71GHz 1.71G ~ 1.785GHz 1.785G ~ 12.75GHz -39dBm -33dBm -39dBm -33dBm -60dBm -62dBm -60dBm -50dBm -56dBm -50dBm
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2. PERFORMANCE
No
Item
GSM 30M ~ 1GHz -36dBm
DCS/PCS 30M ~ 1GHz -36dBm -30dBm -36dBm -30dBm -57dBm -59dBm -57dBm -47dBm -53dBm -47dBm
MS allocated Channel Radiated 1 Spurious Emission Idle Mode
1G ~ 1710MHz 1710M ~ 1785MHz 1785M ~ 4GHz 30M ~ 880MHz 880M ~ 915MHz 915M ~ 1000MHz 1G ~ 1.71GHz 1.71G ~ 1.785GHz 1.785G ~ 4GHz 0.1ppm 5(RMS) 20(PEAK)
1G ~ 4GHz 30M ~ 880MHz 880M ~ 915MHz 915M ~ 1000Mz 1G ~ 1.71GHz 1.71G ~ 1.785GHz 1.785G ~ 4GHz
-30dBm -57dBm -59dBm -57dBm -47dBm -53dBm -47dBm
2 3
Frequency Error Phase Error
0.1ppm 5(RMS) 20(PEAK) 3dB below reference sensitivity
3dB below reference sensitivity RA250: 250Hz HT100: 250Hz TU50: 150Hz TU1.5: 200Hz
Frequency Error Under Multipath and Interference Condition 4
RA250: 200Hz HT100: 100Hz TU50: 100Hz TU3: 150Hz 0 ~ 100kHz 200kHz 250kHz +0.5dB -30dB -33dB -60dB -66dB -69dB -71dB -77dB -19dB -21dB -21dB -24dB
0 ~ 100kHz 200kHz 250kHz 400kHz 600 ~ 1800kHz 1800 ~ 6000kHz 6000kHz
+0.5dB -30dB -31dB -33dB -60dB -60dB -73dB
Due to Output RF Spectrum modulation
400kHz 600 ~ 1800kHz 1800 ~ 3000kHz 3000 ~ 6000kHz 6000kHz
5 Due to Switching transient
400kHz 600kHz 1200kHz 1800kHz
400kHz 600kHz 1200kHz 1800kHz
-22dB -24dB -24dB -27dB
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2. PERFORMANCE
No
Item
GSM
DCS/PCS Frequency offset 800kHz
Intermodulation attenuation
Intermodulation product should be Less than 55dB below the level of Wanted signal Tolerance (dB) 3 3 3 3 3 3 3 3 3 3 3 5 5 5 5 Power control Level 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Power (dBm) 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 Mask IN Tolerance (dB) 3 3 3 3 3 3 3 3 3 4 4 4 4 4 5 5
Power control Level 5 6 7 8 9 10 8 Transmitter Output Power 11 12 13 14 15 16 17 18 19
Power (dBm) 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5
Burst timing
Mask IN
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2. PERFORMANCE
2) Transmitter WCDMA Mode
No 1 2 3
Item Maximum Output Power Frequency Error Open Loop Power control in uplink
Specification Class3: +24dBm(+1/-3dB) Class4: +21dBm(2dB) 0.1ppm 9dB@normal, 12dB@extreme Adjust output cmd 1dB +1 +0.5/1.5 0 -0.5/+0.5 -1 -0.5/-1.5 group(10equal +1 +8/+12 (TPC command) 2dB 3dB +1/3 +1.5/4.5 -0.5/+0.5 -0.5/+0.5 -1/-3 -1.5/-4.5 command group) +
Inner Loop Power control in uplink
Minimum Output Power
-50dBm(3.84MHz) Qin/Qout:DPCCH quality levels Toff@DPCCH/lor:-22->-28dB Ton@DPCCH/lor:-24->-18dB -56dBm(3.84M) 25us PRACH, CPCH, uplink compressed mode
Out-of-synchronization handling of output power
Transmit OFF Power
Transmit ON/OFF Time Mask
Change of TFC
25us power varies according to the data rate DTX: DPCH off (minimize interference between UE) 3dB(after 14slots transmission gap) 5MHz(99%) -35-15*(f-2.5)dBc@f=2.5~3.5MHz, 30k -35-1*(f-3.5)dBc@f=3.5~7.5MHz, 1M -39-10*(f-7.5)dBc@f=7.5~8.5MHz, 1M -49 dBc@f=8.5~12.5MHz, 1M
10 11
Power setting in uplink compressed Occupied Bandwidth(OBW)
12
Spectrum emission Mask
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2. PERFORMANCE
No 13
Item Adjacent Channel Leakage Ratio(ACLR)
Specification 33dB@5MHz, ACP>-50dBm 43dB@10MHz, ACP>-50dBm -36dBm@f=9~150KHz, 1k BW -36dBm@f=150KHz~30MHz, 10k -36dBm@f=30~1000MHz, 100k -30dBm@f=1~12.75GHz, 1M -41dBm*@1893.5~1919.6MHz, 300k -67dBm*@925~935MHz, 100k -79dBm*@935~960MHz, 100k -71dBm*@1805~1880MHz, 100k -31dBc@5MHz, Interferer -40dBc -41dBc@10MHz, Interferer -40dBc 17.5% (>-20dBm) (@12.2k, 1DPDCH+1DPCCH) -15dB@SF=4, 768kbps, multi-code transmission
14
Spurious Emissions *: additional requirement
15
Transmit Intermodulation
16
Error Vector Magnitude(EVM)
17
Transmit OFF Power
3) Receiver - GSM Mode

No Item GSM -105dBm C/Ic=7dB C/Ia1=-12dB C/Ia2=-44dB Wanted Signal: -98dBm 1st interferer: -44dBm 2st interferer: -45dBm Wanted Signal: -101dBm Unwanted Signal: Depend on freq. DCS/PCS -105dBm C/Ic=7dB C/Ia1=-12dB C/Ia2=-44dB Wanted Signal: -96dBm 1st interferer: -44dBm 2st interferer: -44dBm Wanted Signal: -101dBm Unwanted Signal: Depend on freq.
1 Sensitivity (TCH/FS Class II) 2 3 Co-Channel Rejection (TCH/FS Class II, RBER, TUhigh/FH) Adjacent Channel Rejection 200kHz 400kHz
Intermodulation Rejection
Blocking Response (TCH/FS Class II, RBER)
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2. PERFORMANCE
4) Receiver WCDMA Mode
No 1
Item Reference Sensivitivity Level
Specification -106.7dBm(3.84M) -25dBm(3.84MHz) -44dBm/3.84MHz(DPCH_Ec) UE@+20dBm output power(class3) 33dB UE@+20dBm output power(class3) -56dBm/3.84MHz@10MHz UE@+20dBm output power(class3)
Maximum Input Level
Adjacent Channel Selectivity(ACS)
In-band Blocking -44dBm/3.84MHz@15MHz UE@+20dBm output power(class3) -44dBm/3.84MHz@f=2050~2095 & 2185~2230MHz, band a) UE@+20dBm output power(class3) -30dBm/3.84MHz@f=2025~2050 & 2230~2255MHz, band a) UE@+20dBm output power(class3) -15dBm/3.84MHz@f=1~2025 & 2255~12500MHz, band a) UE@+20dBm output power(class3)
Out-band Blocking
Spurious Response
-44dBm CW UE@+20dBm output power(class3) -46dBm CW@10MHz & -46dBm/3.84MHz@20MHz UE@+20dBm output power(class3) -57dBm@f=9KHz~1GHz, 100k BW -47dBm@f=1~12.75GHz, 1M
Intermodulation Characteristic
Spurious Emissions
-60dBm@f=1920~1980MHz, 3.84MHz -60dBm@f=2110~2170MHz, 3.84MHz
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2. PERFORMANCE
5) Bluetooth Mode 5.1) Transmitter

No 1 2 3 Out Power Power Density Power Control Item Class 2 : -6~4dBm Power density < 20dBm per 100kHz EIRP Option 2dB step size 8dB fmax & fmin @ below the level of -30dBm (100khz BW) within 2.4GHz~2.4835GHz 1MHz -20dBm @ C/I = 2MHz -40dBm @ C/I 3MHz 140kHz delta f1 avg 175kHz delta f2max 115kHz at least 99.9% of all deltaf2max delta f2avg/deata f1avg0.8 75KHz 1 slot : 25kHz 3 slot : 40kHz 5 slot : 40kHz Maximum drift rate 20KHz/50usec Freq.Range 30MHz~1GHz 10 Out of Band Spurious Emissions Above 1GHz~12.75GHz 1.8~1.9GHz 5.15~5.3GHz Operating -36dBm -30dBm -47dBm -47dBm Standby -57dBm -47dBm -47dBm -47dBm Specification
4 5 6
TX Output Spectrum -Frequency range TX Output Spectrum -20dB Bandwidth Tx Output Spectrum -Adjacent channel Po
Modulation Characteristics
Init. Carrier Freq. Tolerance
Carrier Frequency Drift
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2. PERFORMANCE
5.2) Receiver
No 1 2 Item Sensitivity single slot packets Sensitivity multi slot packets BER0.1%@-70dBm BER0.1%@-70dBm BER 0.1%@ (Low,Mid,High Frequency) 2405MHz, 2441MHz, 2477MHz Interference Co-Channel interference, C/I co-channel 3 C/I performance Adjacent(1MHz)interference, C/I 1MHz Adjacent(2MHz)interference, C/I 2MHz Adjacent(3MHz)interference, C/I 3MHz Adjacent(3MHz)interference to in band mirror frequency, C/I image 1MHz BER 0.1%@wanted signal -67dBm interfering Signal Frequency 30MHz~2000MHz 4 Blocking Characteristic 2000MHz~2400MHz 2500MHz~3000MHz 3000MHz~12.75GHz -27dBm -27dBm -10dBm Power Level -10dBm Ratio 11dB 0dB -30dB -40dB -9dB -20dB Specification
Intermodluation Performance
BER 0.1%@wanted signal -64dBm static sinwave signal at f1=-39dBm a BT modulated signal f2=-39dBm(payload PRBS15) BER 0.1%@-20dBm
Maximum Input Level
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2. PERFORMANCE
2.4 Current Consumption

(VT test : Speaker off, LCD backlight On)
Stand by 310 Hours = 3.2mA WCDMA (DRX=7) 300 Hours = 3.3 mA GSM (paging=5period) (Tx=Max) (Tx=10dBm) 205 Min = 290 mA (Tx=10dBm) Voice Call 210 Min = 280 mA VT 150 Min = 400 mA
2.5 RSSI
GSM BAR 7 BAR 5 BAR 4 BAR 2 BAR 1 BAR 0 -922 =< RSSI -972 =< RSSI -1002 =< RSSI -1032 =< RSSI -1052 =< RSSI -1052 > RSSI WCDMA -902 =< RSSI -1052 =< RSSI -1092 =< RSSI -1112 =< RSSI -1132 =< RSSI -1132 > RSSI
2.6 Battery Bar

Indication BAR 3 (100%) : level full BAR 3 (40%) -> 2 (12%) BAR 2 (12%) -> 1 (3%) BAR 1 (3%) -> Icon Blinking & Alerting Sound POWER OFF Voltage 4.17V 0.05V 3.72 0.05V 3.62 0.05V 3.53 0.05V
3.20 0.05V
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2. PERFORMANCE
2.7 Sound Pressure Level

No 1 2 3 4 5 6 7 8 A C O U S T I C 9 10 11 12 13 14 15 16 Test Item Sending Loudness Rating (SLR) Receiving Loudness Rating (RLR) Side Tone Masking Rating (STMR) Echo Loss (EL) Sending Distortion (SD) Receiving Distortion (RD) Idle Noise-Sending (INS) Idle Noise-Receiving (INR) Sending Loudness Rating (SLR) Receiving Loudness Rating (RLR) Side Tone Masking Rating (STMR) Echo Loss (EL) Sending Distortion (SD) Receiving Distortion (RD) Idle Noise-Sending (INS) Idle Noise-Receiving (INR) TDMA NOISE GSM: Power Level: 5 DCS: Power Level: 0 (Cell Power: -90 ~ -105dBm) Acoustic(Max Vol.) MS/HEADSET SLR: 83dB MS/HEADSET RLR: -131dB/15dB (SLR/RLR: mid-Value Setting) GSM MS DCS GSM Headset DCS SEND REV. SEND REV. SEND REV. SEND REV. -62dBm under HEAD SET MS NOM MAX NOM MAX NOM MAX NOM MAX Specification 83dB -13dB -153dB 17dB over 40dB over
refer to TABLE 30.3 refer to TABLE 30.4 NOM MAX NOM MAX NOM MAX NOM MAX NOM MAX NOM MAX -64dBm0p under -47dBPA under -36dBPA under 83dB -13dB -123dB 25dB over 40dB over
refer to TABLE 30.3 refer to TABLE 30.4 NOM MAX NOM MAX -55dBm0p under -45dBPA under -40dBPA under
17
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2. PERFORMANCE
2.8 Charging
Normal mode: Complete Voltage: 4.2V Charging Current: 700mA Await mode: In case of During a Call, should be kept 3.9V (GSM: It should be kept 3.9V in all power level WCDMA: It will not be kept 3.9V in some power level) Extend await mode: At Charging prohibited temperature(0C under or 45C over) (GSM: It should be kept 3.7V in all power level WCDMA: It will not be kept 3.7V in some power level)
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3. Technical Description
3. Technical Description
3.1 Digital Baseband (DBB) & Multimedia Processor
3.1.1 General Description
Access subsystem - Access Central Processing Unit (CPU) subsystem ARM926, Joint Test Action Group (JTAG), Embedded Trace Module (ETM), Instruction and Data (I&D)-cache, and I&D-TCM - Access peripheral subsystems Subscriber Identity Module (SIM) interface, IrDA, Universal Serial Bus (USB), Universal Asynchronous Receiver/Transmitter (UART), and so on - Digital Signal Processor (DSP) subsystem CEVA-X1620, JTAG, Static Random Access Memory (SRAM), and Program Data Read Only Memory (PDROM) - EDGE/GSM/GPRS (EGG) subsystem EGG hardware accelerators -WCDMA subsystem WCDMA hardware accelerators -Application subsystem - Application CPU subsystem containing ARM926, JTAG, ETM, I&D-cache, and I&D-TCM - Application peripheral subsystems I2C, keypad, UART, and so on - Graphics subsystem XGAM subsystem - Audio Processing Execution (APEX) and video encoder subsystems In addition to the two subsystems above, there is also a test block, chip control block, and a pad multiplexing block residing at the top level DSP - The Digital Signal Processor Subsystem (DSPSUB) includes a DSP megacell, which contains the DSP CPU together with a tightly coupled memory. The DSP is the Ceva-X 1620 core with a 64 KiB instruction RAM and a 64 KiB data RAM. It also contains debug logic and interfaces. In addition to the megacell, the DSPSUB includes external memories, peripheral units, and interfaces. The DSP megacell is clocked at 208 MHz. - The DSPSUB includes an AHB master and an AHB slave interface. The AHB master provides a direct access to the Internal Random Access Memory (IRAM) in the EGG core through the AHB. The AHB slave interface allows the CPU and the DMA to access in the program and data RAM residing in the DSPSUB. Image Signal Processor(MV9319) - MV9319 is high-end Image Signal Processor (ISP) supporting image sensors up to 5 mega pixels. Its powerful image processing fuctions such as edge enhancement, color correction, advance interpolation, Auto White Balancing increases the quality of sensor image. MV9319 also supports serial interfaces to Flash LED control. WCDMA subsystem - The digital baseband controller WCDMA subsystem incorporate a WCDMA modem - An interface to the WCMDA together with memory control and an internal single port RAM. The WCDMA subsystem has three AHB slave interfaces. - The Ericsson DB 3200 also includes HSDPA class 6 functionality. - The WCDMA subsystem is handled and provided by Ericsson. XGAM subsystem - The XGAM subsystem is a graphics acceleration module that provides hardware support in the creation of visual imagery and the transfer of this data to a display. The XGAM also provides support for connecting a Camera module. The visual data could be graphics, still images, or video. - The XGAM subsystem is handled and provided by Ericsson. Operation and Services - I2C Interface - SIM Interfaces - General Purpose I/O (GPIO) Interface - External Memory Interface that supports NAND, NOR, PSRAM, SDRAM, - JTAG - RTC - ETM9
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3. TECHNICAL DESCRIPTION
GT500 Block Diagram
Figure 3-1-1 GT500 Block Diagram
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Data Communication - IrDA (SIR) - UARTs (ACB, EDB (RS232)) - USB Package - 12 by 12 mm 376 balls, 0.5mm pitch TFBGA Production Package
3.1.2 External memory interface

RF calibration data, Audio parameters and battery calibration data etc are stored in flash memory area. A. GT500 2Gb NAND flash memory + 1Gb SDRAM
Dev ice Part Name Maker Item Time Size Speed
Program speed 200s 1 page = 528 Byte 2.64MByte/s NAND flash K5D1G12ACD-D075 Samsung Erase speed 2ms 1 Block = 16K Byte 8MByte/s
Table 3- 1- 1. External Memory Interface Spec. of GT500
Figure 3- 1- 2. External Memory Configuration of GT500
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3.1.3 Hardware Architecture

A. Block Diagram
g
Figure 3-1-3. Access system of Ericsson DB3200
Figure 3-1-4. Application system of Ericsson DB3200
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B. CPU Subsystem - Access CPU subsystem The digital baseband controller includes an access CPU subsystem, which includes the submodules described below. 32 KiB I-cache 32 KiB D-cache Page table Memory Management Unit (MMU) JTAG ETM9 26 KiB I-TCM 8 KiB D-TCM - Application CPU subsystem The digital baseband controller includes an Application CPU subsystem, which includes the submodules described below. 32 KiB I-cache 32 KiB D-cache Page table MMU JTAG ETM9 8 KiB I-TCM 8 KiB D-TCM C. Peripheral Hardware Subsystem The digital baseband controller includes hardware that supports mobile terminal peripherals such as a MMC, SD, UART, I2C, USB, keypad, and infrared. Collectively, this hardware comprises the Peripheral subsystem. The functional blocks of the Peripheral subsystem connect to the peripheral bus through four separate bridges, which provide a simple interface to support different timing and memory access arrangements. D. DSP Hardware Subsystem The Digital Signal Processor Subsystem (DSPSUB) includes a DSP megacell, which contains the DSP CPU together with a tightly coupled memory. The DSP is the Ceva-X 1620 core with a 64 kiB instruction RAM and a 64 kiB data RAM. It also contains debug logic and interfaces. In addition to the megacell, the DSPSUB includes external memories, peripheral units, and interfaces. The DSP megacell is clocked at 208 MHz. The DSPSUB includes an AHB master and an AHB slave interface. The AHB master provides a direct access to the Internal Random Access Memory (IRAM) in the EGG core through the AHB. The AHB slave interface allows the CPU and the DMA to access in the program and data RAM residing in the DSPSUB.
E. XGAM Subsystem The XGAM subsystem is a graphics acceleration module that provides hardware support in the creation of visual imagery and the transfer of this data to a display. The XGAM also provides support for connecting a Camera module. The visual data could be graphics, still images, or video. The XGAM subsystem is handled and provided by Ericsson.
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F. System Control Subsystem The SYSCON is responsible for clock generation and clock and reset distribution within the digital baseband controller, as well as to external devices. The digital baseband controller chip-ID number is readable from the SYSCON. The block is a slave peripheral under control of the ARM processor. The programming of the SYSCON controls the fundamental modes of operation within the digital baseband controller. Individual blocks can also be reset and their clocks held inactive by accessing the appropriate control registers.
3.1.4 RF Interface
A. GSM Radio Link Interface DB3200 controls GSM RF part using these signals through GSM RF chip-RF3300. RF_DATA_A RF_DATA_B RF_DATA_C RF_DATA_STRB
RF_DATA_A RF_DATA_B RF_DATA_C TX_ADC_STRB RF_DATA_STRB B15 B16 C15 D15 A16 QDATA_AMP_MSB IDATA_FREQ_MSB AMP_FREQ_LSB TX_ADC_STRB DATA_STR
Figure 3-1- 5. Schematic of GSM RF Interface
B. WCDMA Radio Link Interface RF_WCDMA_PA_0_EN RF_WCDMA_PA_1_EN RF_WCDMA_DCDC_EN RF_WCDMA_PWRDET_EN
RF_WCDMA_PA_0_EN RF_WCDMA_PA_1_EN RF_WCDMA_DCDC_EN RF_WCDMA_PWRDET_E ADC_I_NEG ADC_I_POS ADC_Q_NEG ADC_Q_POS TX_POW DAC_I_NEG DAC_I_POS DAC_Q_NEG DAC_Q_POS
B14 D14 B13 C13 D9 C9 C8 D8 B6 E7 D7 E6 D6
WTX_BAND_1_EN WTX_BAND_2_EN WTX_BAND_8_5_EN WPOW_DET_EN WRX_I_N WRX_I_P WRX_Q_N WRX_Q_P WPOW_DET WTX_I_N WTX_I_P WTX_Q_N WTX_Q_P
Figure 3-1-6. Schematic of WCDMA RF Interface
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3.1.5 SIM Interface

SIM interface scheme is shown in Figure3-1-7. SDAT, SCLK, SRST ports are used to communicate DBB(DB3200) with ABB(AB3100) and filter. SIM (Interface between DBB and ABB) SDAT SCLK SRST SIM card bidirectional data line SIM card reference clock SIM card async/sync reset Table 3-1-2. SIM Interface DB3200 SIMVCC AB3100 10K SDAT SCLK SRST SDAT SCLK SRST SIMDAT SIMCLK SIMRST DAT CLK RST CARD 10K VDD
VDDE_1V8
Figure 3-1-7. SIM Interface
3.1.6 UART Interface

UART signals are connected to DB3200 GPIO through IO connector UART0 Resource ACC_GPIO_2 ACC_GPIO_3 Name ACC_UART0_RX ACC_UART0_TX UART1 APP_GPIO_0 APP_GPIO_1 APP_UART_RX APP_UART_TX APP Receive Data APP Transmit Data Note ACC Receive Data ACC Transmit Data
Table 3-1-3. UART Interface
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3.1.7 GPIO (General Purpose Input/Output) map

In total 60 allowable resources. This model is using 35 resources. GPIO Map, describing application, I/O state are shown in below table. Access GPIO GPIO ACC_GPIO_0 ACC_GPIO_1 ACC_GPIO_2 ACC_GPIO_3 ACC_GPIO_4 ACC_GPIO_5 ACC_GPIO_10 ACC_GPIO_11 ACC_GPIO_12 ACC_GPIO_13 ACC_GPIO_16 ACC_GPIO_17 ACC_GPIO_20 ACC_GPIO_21 ACC_GPIO_22 ACC_GPIO_26 ACC_GPIO_27 ACC_GPIO_28 ACC_GPIO_29 ACC_GPIO_30 ACC_GPIO_31 ACC_GPIO_32 Assigned Name ACC_USB_HS_STP ACC_USB_HS_DIR ACC_UART0_RX ACC_UART0_TX ACC_USB_HS_IN_CLK ACC_USB_HS_NXT ACC_USB_HS_DATA(4) ACC_USB_HS_DATA(5) ACC_USB_HS_DATA(6) ACC_USB_HS_DATA(7) ACC_UART3_RX ACC_UART3_TX ACC_UART3_CTS ACC_UART3_RTS ACC_SPI_3AXIS_CSn Not used ACC_GP_USB_CS ACC_GP_SPI_WLAN_IRQn ACC_GP_GPS_RESETn ACC_GP_WLAN_RESETn ACC_GP_WLAN_EN ACC_GP_WLAN_PWR_DOWNn Output Output Input Output Input Input Input Input Input Input Input Output Input Output Output Output Output Input Output Output Output Output Init Status
Table 3-1-4. DB3200 ACC GPIO Map Table
- 26 -
3.1.8 GPIO (General Purpose Input/Output) map
Application GPIO GPIO APP_GPIO_0 APP_GPIO_1 APP_GPIO_2 APP_GPIO_4 APP_GPIO_7 APP_GPIO_8 APP_GPIO_10 APP_GPIO_11 APP_GPIO_12 APP_GPIO_13 APP_GPIO_14 APP_GPIO_16 APP_GPIO_17 APP_GPIO_21 APP_GPIO_22 APP_GPIO_23 APP_GPIO_24 APP_GPIO_25 Assigned Name APP_UART_RX APP_UART_TX APP_GP_ISP_FLASH_SET APP_GP_VGA_SDN APP_GP_TOUCH_SCL APP_GP_TOUCH_SDA input APP_GP_TOUCH_LDO_EN APP_GP_ISP_LDO_EN APP_GP_LCD_ID Not used APP_GP_MOTORLDO_EN APP_MMC_FB_CLK APP_GP_LCD_IF1 APP_GP_USW_SCL APP_GP_USW_SDA input DCON (Dedicated) Input Output Output Output Output Output/ Output Output Output Input Output Output Input Output Output Output/ Input/Output Output Init Status
Table 3-1-5. DB3200 APP GPIO Map Table
- 27 -
3.1.9 USB
The USB block supports the implementation of a High-speed" device fully compliant to USB 2.0 standard. It provides an interface between the CPU (embedded local host) and the USB wire, and handles USB transactions with minimal CPU intervention. The USB specification allows up to 15 pairs of endpoints. Data for each endpoint is buffered in RAM within the USB block and is read/written from the endpoint FIFO using DMA transfers or FIFO register access. High-speed (high throughput) endpoints can use DMA while slower endpoints can use FIFO register access. The USB block can request up to six DMA channels, three for IN endpoints and three for OUT endpoints.
USB Function USB_STP USB_DIR USB_CLK USB_NXT USB_DAT0 USB_DAT1 USB_DAT2 USB_DAT3 USB_DAT4 USB_DAT5 USB_DAT6 USB_DAT7 USB_CS_PD VBUS
Note ULPI stop signal ULPI direction signal USB clock ULPI next signal USB data0 USB data1 USB data2 USB data3 USB data4 USB data5 USB data6 USB data7 USB chip select Power supply for Asta USB block Table 3-1-6. USB Signal Interface of DB3200
- 28 -
USB_DATA(0) USB_DATA(1) USB_DATA(2) ACC_USB_HS_STP ACC_USB_HS_DIR ACC_UART0_RX ACC_UART0_TX ACC_USB_HS_IN_CLK ACC_USB_HS_NXT ACC_USB_HS_DATA(4) ACC_USB_HS_DATA(5) ACC_USB_HS_DATA(6) ACC_USB_HS_DATA(7) ACC_UART3_RX ACC_UART3_TX ACC_UART3_CTS ACC_UART3_RTS
J2 USB_SE0_VM K2 USB_DAT_VP L3 USB_OE J3 K3 L8 G1 K8 F1 J8 G3 H3 G2 H9 E1 H10 D1 F3 D4 C3 G5 E4 G4 ACC_GPIO_0 ACC_GPIO_1 ACC_GPIO_2 ACC_GPIO_3 ACC_GPIO_4 ACC_GPIO_5 ACC_GPIO_6 ACC_GPIO_7 ACC_GPIO_8 ACC_GPIO_9 ACC_GPIO_10 ACC_GPIO_11 ACC_GPIO_12 ACC_GPIO_13 ACC_GPIO_14 ACC_GPIO_15 ACC_GPIO_16_USBPRB ACC_GPIO_17 ACC_GPIO_18
ACC_GP_USB_CS ACC_GPS_START ACC_USB_HS_DATA(3)
Figure 3-1-8. Schematic of DB3200 USB block
High Speed USB Interface

VBAT 10V R641 VDDE_1V8
R500
51K
R655
C500 0.1u
C501 4.7u
VCC NC2 NC1
F3 F2 F1
ACC_GP_USB_CS ACC_USB_HS_IN_CLK USB_DATA(0) USB_DATA(1) USB_DATA(2) ACC_USB_HS_DATA(3) ACC_USB_HS_DATA(4) ACC_USB_HS_DATA(5) ACC_USB_HS_DATA(6) ACC_USB_HS_DATA(7) ACC_USB_HS_NXT ACC_USB_HS_STP ACC_USB_HS_DIR
C3
TP500 A4
GND3 E4 GND2 D2 GND1 C5
B1 TP501 A1 A2 A3 A5 A6 B6 C6 D5 D6 E5 E1 E6
TEST CHIP_SEL VCC_IO1 CLOCK VCC_IO2 DATA0 RREF DATA1 DM DATA2 U502 DP DATA3 ISP1508AET FAULT DATA4 ID DATA5 CFG2 DATA6 DATA7 CFG1 NXT PSW_N STP VBUS DIR REG3V3 XTAL1 CFG0 XTAL2 REF1V8
C4 B5 B2 C2 C1 D1 E2 D3 B3 B4 D4 F4 E3 F5 F6 0.1u 4.7u 0.1u 12K
USB_DM USB_DP
R509 VBUS
TP502
1K
USB_XTAL1
C512 4.7u
C513 0.1u
1%
C514
C515
C516
USB Transceiver
Figure 3-1-9. Schematic of USB Transceiver
R510
C517
2.2u
- 29 -
3.1.11 Bluetooth Interface

GT500 supports Bluetooth operation using STs STLC2593C Bluetooth module. A. General Description The Bluetooth interface utilizes the SPI interface for control signals going to and from the Bluetooth module. The SPI is also used for data transmissions. It uses the PCM interface for transmitting audio to and from the Bluetooth module. The Bluetooth module uses both the 26 MHz master clock signal and the 32,768 kHz low-frequency clock signal for internal timing within the Bluetooth module. The intention is to use the low-frequency clock as a low-power timing provider and to use the 26 MHz as a high precision timing reference used mainly by the Bluetooth radio during operation. The clock request mechanism is used to minimize current consumption for the total system. The intention is to use the CLKREQ signal to ask for the master clock when needed, for example, when the Bluetooth radio is operating. B. SPI Interface The physical SPI interface is made up of 5 signals : clock, chip select, data in, data out and interrupt. When the SPI mode is selected , these signals are available through the BT_UART/BT_SPI and BT_HOST_WAKEUP pins. The SPI interface is Master at the Host side, and Slave at the BT Controller side. It is designed to work with the H4 and enhanced H4 protocol. Also synchronous data packet transfer (sSCO) over HCI is supported. The SPI data length and endianness are configurable. The SPI interface can only operate in half duplex mode. C. PCM Interface The PCM interface is used to send audio to and from the Bluetooth module. The interface is a synchronous interface using a PCM clock and a PCM sync signal for synchronization. Two data signals are used for data, one in each direction. The PCM clock signal operates at frequencies as high as 1 MHz. The word length of the audio data can be 8 or 16 bits. Furthermore, the PCM interface has a function known as MP-PCM, which is an addressing scheme, used to have more than two devices talking on the bus. To add this function, the data pins have to be bi-directional. Additionally, the position of the audio data relative to the frame sync pulse must be selectable. During the periods within a frame that a device is not transmitting audio data, it must put both PCM data signals in a high-impedance state to allow other devices access. D. Master Clock and Clock Request Interface The master clock (MCLK) is a 26 MHz signal used as the high precision clock signal for the Bluetooth module. The signal can be switched on and off by the platform. The master clock request (CLKREQ) is used by the Bluetooth module to ask for the master clock. If the Bluetooth module asserts the signal high, it gets the master clock. The other alternative for the Bluetooth module is to set the clock request output to high impedance state, indicating that it does not need the master clock. The Bluetooth module receives the master clock, if other parts of the chipset request it. E. Low Frequency Clock Interface The low-frequency clock signal (RTCCLK) is used by the Bluetooth module as a low-power clock. The clock is used in different Bluetooth modes, like sniff and park, to have a correct timing on the Bluetooth air interface without having the master clock running.
- 30 -
The low-frequency clock is always present, in some applications even when the chipset is powered down. F. STLC2593C Based on Ericsson Technology Licensing Baseband Core (EBC) Bluetooth specification compliance: V2.1 + EDR.(Lisbon) Point-to-point, point-to-multi-point (up to 7 slaves) and scatternet capability Support ACL and SCO links Entended SCO (eSCO) links Faster Connection HW support for packet types ACL: DM1, DM3, DM5, DH1, DH3, DH5, 2-DH1, 2-DH3,2-DH5,3-DH1,3-DH3, 3-DH5 SCO: HV1, HV3 and DV eSCO: EV3, EV4, EV5, 2-EV3, 2-EV5, 3-EV3, 3-EV5 Adaptive Frequency Hopping (AFH) Channel Quality Driven Data Rate (CQDDR) Lisbon Feature Encryption Pause/Resume (EPR) Entended Inquiry Response (EIR) Link Supervision Time Out (LSTO) Secure Simple Pairing Sniff Subrating Quality of Service (QoS) : Packet Boundary Flag, Erroneous Data Delivery Transmit Power Power Class 2 and Power Class 1.5 (above 4 dBm) Programmable output power Power Class 1 compatible HCI HCI H4 and enhanced H4 Transport Layer HCI proprietary commands (e.g. peripherals control) Single HCI command for patch/upgrade download eSCO over HCI supported Supports Pitch-Period Error Concealment (PPEC) Efficient and flexible support for WLAN coexistence scenarios Low power consumption Ultra low power architecture with 3 different low power levels Deep Sleep modes, including Host-power saving feature Dual Wake-up mechanism: initiated by the Host or by the Bluetooth device Communication interfaces Fast UART up to 4 MHz Flexible SPI interface up to 13 MHz PCM interface Up to 10 additional flexibly programmable GPIOs External interrupts possible through the GPIOs Fast I2C interface as master Clock support System clock input (digital or sine wave) at 9.6, 10, 13, 16, 16.8, 19.2, 26, 33.6 or 38.4MHz Low Power clock input at 3.2, 32 and 32.768 kHz ARM7TDMI CPU Memory organization On chip RAM, including provision for patches On chip ROM, preloaded with SW up to HCI Ciphering support up to 128 bits key11
- 31 -
G. GT500 Bluetooth Schematic

VDD_BT VDDE_1V8
BT_CLKREQ_n MCLKSEC
U730 SN74LVC1G125DRLR 5 1 _OE VCC 2 A 4 3 GND Y R731 C730 0.1u C731 4.7u 100K
VDD_BT R730 BT_CLK 33
VDDE_1V8
RF GND: Isolate from Common GND on L1, L2 and L3 Analog GND must be Isolated from Common GND on L1, L2 and L3
R732
Careful routing of BT_CLK Keep away from noise signals U731

RESOUT2_n BT_CLK RTCCLK K7 BT_RESETN F6 BT_REF_CLK_IN K9 BT_LP_CLK L9 ACC_SPI_MOSI ACC_SPI_CLK PCM_SYNC PCM_CLK PCM_DLD PCM_ULD BT_WAKEUP BT_RFP BT_RFN BT_VIO_A BT_VIO_B BT_VIO_C BT_VIO_D BT_VIO_E BT_VSSDIG1 BT_VSSDIG2 BT_VSSDIG3 BT_VSSDIG4 BT_VSSDIG5 BT_VSSANA1 BT_VSSANA2 BT_VSSANA3 BT_VSSANA4 BT_VSSANA5 BT_VSSANA6 BT_VSSANA7 BT_VSSANA8 BT_VSSANA9 BT_VSSANA10 BT_VSSANA11 BT_VSSANA12 BT_VSSRF1 BT_VSSRF2 BT_VSSRF3 BT_VSSRF4 BT_HVA1 BT_HVA2 BT_HVA3 BT_HVA4 BT_HVA5 BT_TEST1 BT_TEST2 BT_AF_PRG
100K
STLC2593
BT_CLK_REQ_OUT_1 BT_UART_TXD BT_UART_RTS J7 G7 J6 K1 J1
ACC_SPI_MISO ACC_GP_SPI_BT_CSn
FL730 5 4 VDDE_1V8 BP1 BP2
DEA212450BT-7043C1 1 U_BP BP_DC 2
C732 100p BT_TXRX
N4 BT_PCM_SYNC M4 BT_PCM_CLK K5 BT_PCM_A M5 BT_PCM_B M3 K3 K4 J3 L3 BT_GPIO_9 BT_GPIO_11 BT_GPIO_10 BT_GPIO_16 BT_GPIO_8
M6 J9 N3 N5 G8 H6 H7 H8 K8 L8 D1 D2 E3 F1 F2 F3 F4 G1 G3 G4 H3 H4 H1 L1 J2 K2 L2 D3 E1 E2 E4 H2 G2 G6 VSS_BT_ANA
FB730 60
VSS_BT_RF
PTA_BT_PRIO PTA_BT_STATE PTA_WLAN_ACTIVE WLAN_SLEEPn R733 DNI VDDE_1V8 VDDE_1V8 ACC_GP_SPI_BT_IRQ
C733 0.1u
G9 BT_GPIO_0 E7 BT_CLK_REQ_IN_1 F9 BT_CLK_REQ_IN_2 E8 BT_HOST_WAKEUP L7 BT_CONFIG_1 M7 BT_CONFIG_2 N6 BT_CONFIG_3 J8 B2 C3 M8 C1 C2 M2 J4 BT_CLK_REQ_OUT_2 BT_RSVR_CL1 BT_RSVR_CL2 BT_RSVR_D BT_RSVR_DSM BT_RSVR_N BT_RSVR_RF BT_REG_CTRL
VSS_BT_ANA
R734
100K
VDDK_2V75
BT_CLKREQ_n VDD_BT VDDK_2V75
R735
VSS_BT_RF
R742
N7 BT_HVD E6 BT_VDD_CLD 0.1u
C734 0.1u
VDDE_1V8
C736
0.1u
VDDE_1V8
VBAT
VDDE_1V8
C735
R738
R740
100K
D4 F7 F8 L4 L5 L6
NC1 NC2 NC3 NC4 NC5 NC6
R737 0 C737 C738 1u 1u FM_RP FM_LP APP_I2C_SDA
FM_ROUT FM_LOUT FM_VIO FM_SDIO FM_GND1 FM_GND2 FM_GND3 FM_GND4 FM_GND5 FM_GND6 FM_GND7 FM_GND8 FM_RFGND
C5 B5 D6 D8 A3 B4 B6 B7 C4 C6 C7 D5 C8
R739 110 C739 0.1u
APP_GP_FM_GPIO2
RESOUT1_n RTCCLK R741 APP_I2C_SCL 110 22n 22n 10p
A4 B3 A7 A6 A5 B8 C9 D7 D9 E9
FM_VA FM_VD FM_GPIO1 FM_GPIO2 FM_GPIO3 FM_FMIP FM_RSTB FM_RCLK FM_SENB FM_SCLK
C740
C741
C742
6 3
H9 BT_UART_RXD K6 BT_UART_CTS
G2 G1
C743 120p
FM_ANT
Figure 3-1-11. Schematic of STLC2593C Clock - Clock request Connected to CLKREQ of DB3200 and AB3100, input to RF3300 - Fast clock : 26MHz Supplied MCLK from RF3300 Frequency deviation : 20ppm - Low power clock : 32.768kHz Supplied RTCCLK from AB3100 Power - Supplied 2.75V, 1.8V from internal regulators of AB3100 Reset - RESOUT2n signal of DB3200 controls STLC2593C reset. SPI - Connected to SPI of DB3200 - HCI interface between DB3200 and STLC2593C PCM - Audio signal interface between DB3200/AB3100 and STLC2593C ANT - 2.4GHz, 50 ohm matching
- 32 -
3.1.12 MicroSD Interface card

GT500 supports the MicroSD card interface as external memory card. MicroSD card has 4-data line, so GT500 uses 4-data lines. All control and data lines are connected to DB3200. Cause of the difference between DB3200 and MicroSD card, a level shifter should be added. MicroSD card Interface APP_GP_MMC_DETn MICROSD_CMD_2V7 MICROSD_CLK_2V7 MICROSD_DAT[3:0]_2V7 VDDG_2V85 Card detection, connected to GPIO of DB3200 Command/Response Clock Data line Supply voltage from AB3100 internal LDO Table 3-1-7. MicroSD card Interface Card detection - When there are no card in MicroSD card socket, APP_GP_MMC_DETn pin is high cause of an external pull-up. - If card is inserted in socket, APP_GP_MMC_DETn pin is changed to Low cause of the mechanical switch in the socket. - If card is removed, APP_GP_MMC_DETn pin changes high.
VDDE_1V8 VDDG_2V85
2 4 6 8 100K R637
RA400
100K
U403 A5 C5 B2 C1 A2 B4 A4 B5 B1 A3 A1 B3 C3 C409 0.1u VCCA DAT0_DIR DAT0A DAT123_DIR DAT1A DAT2A DAT3A CMD_DIR CMDA CLKA CLK_F GND1 GND2
SN74AVCA406EZXYR D5 VCCB DAT0B DAT1B DAT2B DAT3B D2 D1 C4 D4 MICROSD_DAT0_2V85 MICROSD_DAT1_2V85 MICROSD_DAT2_2V85 MICROSD_DAT3_2V85
MICROSD_DAT0 MICROSD_DAT_DIR MICROSD_DAT1 MICROSD_DAT2 MICROSD_DAT3 MICROSD_CMD_DIR MICROSD_CMD MICROSD_CLK APP_MMC_FB_CLK
1 3 5 7
C2 CMDB D3 CLKB C410 0.1u
MICROSD_CMD_2V85 MICROSD_CLK_2V85
VDDG_2V85
GND MICROSD_DAT2_2V85 MICROSD_DAT3_2V85 MICROSD_CMD_2V85 MICROSD_CLK_2V85 MICROSD_DAT0_2V85 MICROSD_DAT1_2V85 VA400 VA401 VA402 VA403 VA404 VA405 1 2 3 4 5 6 7 8
SWA SWB
R416
2.2
S400 DM3AT-SF-PEJ Hirose ( Micro-SD Socket, Normal ,T= 1.68) ENSY0020901
VDDE_1V8 EVLC18S02015 EVLC18S02015 EVLC18S02015 EVLC18S02015 EVLC18S02015 EVLC18S02015
1608 C408 10u
R419 APP_GP_MMC_DETn
220K
MICROSD SOCKET
VA406 EVLC18S02003
Figure 3-1-12. Micro SD card and Schematic of Micro SD card Interface
- 33 -
3.1.13 Power On Sequence

User presses END key and then ONSWAn signal is changed to Low. AB3100 initiates the internal oscillator and powers on the regulators. AB3100 generates power for DB3200. AB3100 releases the power reset signal (PWRRSTn) and generates an interrupt(IRQ0n) to DB3200.
AB3100 Power for DB3200 Press END key PWRRST_N ONSWAn ONSWA_N IRQ PWRRSTn IRQ0n
DB3200
PWRRSTN IRQ0_N
Figure 3-1-13. Power On Sequence
- 34 -
3.1.14 Key Pad

There are 8 buttons in Figure 3-1-14/15. END Key is connected ONSWAn for AB3100.
KEYIN0 KEYOUT0 KEYOUT1 KEYOUT2 KEYOUT3 KEYOUT4 GND VOLUME DOWN END (ONSWA_n) VOLUME UP SEND Clear Lock camera AF KEYIN1 KEYIN2 KEYIN3 KEYIN4 KEYIN5 GND
Table 3-1-8. Key Matrix Mapping Table
SEND KEYIN3
SW1000 EVPAHBD6A
KEYOUT0 CLR ONSWA_n
END
C B D
C_ B_ A HALF SHUTTER FULL SHUTTER
KEYOUT1
KEYIN0
D1000
KEYOUT2 ONSWA_n
RB521S-30
KEYIN3
KEYOUT1
SEND CLEAR KEY
END KEY
AUTO FOCUS KEY
LOCK KEYOUT2
KEYIN0 KEYIN2
VOLUME_DOWN
VOLUME_UP
KEYIN0
TOUCH LOCK KEY
VOLUME KEY
Figure 3-1-14. Key Circuit
- 35 -
3.1.15 Touch Screen

When Touch button and Touch screen is touched, Interrupt is given to DB3200 than, it read the status register what coordinate is touched by I2C. I2C is realize by DB3200 GPIO..
VDD_TOUCH_2V8
R420
2.7K R421 C1 C2 C3 D1 D2 D3 U405 A1 A2 A3 B1 B2 B3 TSC2007IYZGR SDA A1 XSCL GND Y-
C411 1u
C412 0.1u
R424
R422
DNI
2.7K
APP_GP_TOUCH_PENIRQn_2V75
AUX VDD_REF X+ PENIRQA0 Y+
APP_GP_TOUCH_SDA_2V75 TOUCH_X-
APP_GP_TOUCH_SCL_2V75
TOUCH_Y-
EUSY0337101
TOUCH_Y+
TOUCH_X+ ZD401 RSB6.8CST2R ZD403 RSB6.8CST2R ZD400 RSB6.8CST2R ZD402 RSB6.8CST2R
TOUCH SCREEN DRIVER IC
VDDE_1V8
VDD_TOUCH_2V8
R642 R425 51K
B2
B1 VCCB
VCCA
A4
A4
R423 A3 A3 R426
0 APP_GP_TOUCH_SDA 0 APP_GP_TOUCH_SCL APP_GP_TOUCH_PENIRQn
B3 B4 APP_GP_TOUCH_PENIRQn_2V75 C1
OE
GND TXS0104EZXUR A2 A2 U404 B1 B2 B3 B4 A1 A1
C2
C3
APP_GP_TOUCH_SCL_2V75 APP_GP_TOUCH_SDA_2V75
TOUCH LEVEL SHIFTER
Figure 3-1-15. Touch screen schematics
C4
- 36 -
3.1.16 A-GPS
GT500 supports A-GPS operation using Broadcom BCM4750 A-GPS module. The BCM4750 is a single chip, single die AGPS receiver that combines a high-performance RF front end with an adaptive baseband processor. The BCM4750s small footprint and minimal parts count provide significant reductions in the design, layout, manufacturing, and testing resources required to integrate AGPS technology with mobile handsets and portable devices. The BCM4750 uses a host-based integration architecture that splits processing functions between the GPS chip and the CPU on the host system. Host-based architecture enables a simplified IC design that can be executed in a much smaller and less expensive package than competing System on Chip solutions which require an onchip CPU subsystem and flash memory in addition to the RF and baseband blocks. Demands on the host CPU are minimal and no real time requirements are imposed. Feature Fully integrated GPS RF front-end and baseband processor on a single CMOS die Supports UART, I2C, and SPI host interfaces Industry-leading power consumption efficiency Synchronization input, PPS output Fractional-N Synthesizer supports reference frequencies from 10 to 40 MHz Companion software driver supports Assisted, Autonomous, and Enhanced Autonomous operating mode
Figure 3-1-16. Functional Block Diagram of BCM4750
- 37 -
VDDE_1V8
GPS Power
RP101K182D 4 VDD 3 CE PGND VGPS_1V8 0 1u 1u 5 1 VOUT 2 GND R755 U752 ACC_GP_GPS_PON
VBAT
GPS Clock Buffer

ACC_GP_GPS_PON MCLKSEC OE A GND
U750
R752 10
NL17SZ126XV5T2G
VCC
C753 0.1u
C754 2.2u
R753
GPS_CNTIN
33
VGPS_1V8
VGPS_1V8 X750 1 GND1 NC1 GND2 OUT 4 C750 2.2u C751 0.1u C771 0.1u R750 0 NC2 5 VCC 2 3 KT2520F16369ACW18T 6 R757 VDDE_1V8 2.2nH L770 0
Figure 3-1-16. Schematic of BCM4750
10 R770
2.2u C770
RTCCLK ACC_GPS_START GPS_CNTIN VDDE_1V8 F2 CNTIN E7 SYNC_PPS B6 VDDIO1 G3 VDDIO2 G7 VDDIO3 A3 LPREGIN F5 RTCCLK A2 TCXO C752 1u C4 BBRFREGIN R772 0 C6 B4 C5 ACC_UART3_RX ACC_UART3_TX ACC_UART3_RTS ACC_UART3_CTS G6 G2 G1 G5 F7 ACC_GP_GPS_RESETn ACC_GP_GPS_PON G4 F3 A6 A7 C7 B7 A5 BMS0 BMS1_I2C_A0 BMS2_UARTCS_N D5 VPD F1 TESTMODE RFIN TX_SDA_MISO RX_SCL_SCK CTS_N_I2C_GRP1_SCS_N RTS_N_I2C_GRP0_MOSI INTR_N RESET_N STANDBY_N TRST_N TCK TDI TDO TMS B2 ATEST0 C3 ATEST1 R756 100K VSSD1 VSSD2 VSSD3 VSSD4 VSSD5 VSSD6 U751 BCM4750 E1 RFSREGOUT D1 VDDIFSYNTH F6 VDDLP_LPREGOUT C761 1u BBREGOUT VDDCORE1 VDDCORE2 VDDCORE3 VDDCORE4 C1 VSSRFSYNTH B3 VSSIFSUB A4 D4 D6 E3 E6 C762 1u B5 D3 D7 E4 E5 F4 C760 1u B1 1
ACC_GP_GPS_PON
10nH L771
S_D
2.2nH C755 L750 6.8nH 5 VDD 4 FIL_OUT E2 RFREGOUT D2 VDDRF C759 1u 2 RF_IN 3 GND
CN750 1
CN751 1
100p C772
NA
GT500 A-GPS Schematic
C756
GPS LNA block
C763 1u
C764 1u
TP751
TP752
TP753
100nH
U770 ALM-1612 0.5p
C758
L772 100nH
C757
- 38 -
C766
C765
100K
R754
CLKN CLKP DATAN DATAP
VA600
8 P8 7 P7 6 P6 5 P5
1 P1 2 P2 3 P3 4 P4
ULCA2114C015FR
3 2 1 4
3.2 Visual part
FL603
P4
P3
P2
P1
CI_PCLK CI_VSYNC CI_HSYNC CI_RES_n

TP221 TP222
ICMF214P101M
P6 P7 P8
P5
5MCAM_RESET_N
6 7 8 5
D603 PRSB6.8C
3.2.1 Camera & Camera Interface
9 3 2
12 CN603
11
10
CI_DATA[0] CI_DATA[1] CI_DATA[2] CI_DATA[3] CI_DATA[4] CI_DATA[5] CI_DATA[6] CI_DATA[7]
U21 R20 U23 T21 U19 V19 V20 W20 U20 T20 V23 W23 W22 V22 CI_PCLK CI_VSYNC CI_HSYNC CI_RES_N CI_D0 CI_D1 CI_D2_CLK0_M CI_D3_CLK0_P CI_D4_DAT0_M CI_D5_DAT0_P CI_D6_CLK1_M CI_D7_CLK1_P CI_D8_DAT1_M CI_D9_DAT1_P
Figure 3-2-1. Camera Interface (in DB3200)
ENBY0034201 GB042-24S-H10-E3000
Figure 3-2-2. 5M Camera Connector(24Pin Main Board)
- 39 22 23 CAM_DVDD_1V8 C606 FB601 C607 0.1u CAM_AVDD_2V8 24 FB600 0.1u
13
14
15
16
17
18
19
20
21
LCD_RESET_N LCD_VSYNC LCD_WE_N LCD_RS LCD_CS_N LCD_RD_N

TP223
D602 PRSB6.8C
LC Filter for power noise from GSM RF L600 47nH
ISP_SENS_I2C_SCL R614
ISP_SENS_I2C_SDA
C610 7.5p
C621 220p 47 ISP_SENS_MCLK
LCD_DATA[0] LCD_DATA[1] LCD_DATA[2] LCD_DATA[3] LCD_DATA[4] LCD_DATA[5] LCD_DATA[6] LCD_DATA[7]
K20 K23 J16 K22 K16 L22 L21 L23 L20 M22 J20 M23 K15 N22 N15
PDI_RES_N PDI_C0 PDI_C1 PDI_C2 PDI_C3 PDI_C4 PDI_C5 PDI_D0 PDI_D1 PDI_D2 PDI_D3 PDI_D4 PDI_D5 PDI_D6 PDI_D7
CAM_AFVDD_2V8
C622 2.2u
FB602 BLM15AG100PN1
U602 D601 PRSB6.8C CI_RES_n SYSCLK0 CI_DATA[7] CI_DATA[6] CI_DATA[5] CI_DATA[4] CI_DATA[3] CI_DATA[2] CI_DATA[1] CI_DATA[0] CI_PCLK CI_HSYNC CI_VSYNC APP_I2C_SDA APP_I2C_SCL G7 H7 H8 H6 C3 E8 F5 F4 G4 H4 F3 G3 H3 F2 E1 E2 F1 B3 A3 A8 B8 C7 C8 G1 D1 F8 B2 A2 A1 B1 A6 B6 A5 B5 4.3K 4.3K
MV9319
R632 R633
0 0
ISP_GP_FLASH_SET ISP_GP_FLASH_EN ISP_GP_FLASH_INH
SOMI_S_GPIO30 SIMO_S_GPIO31 SCLK_S_SDO9 SS_S_SDO8 NRESET MCLK SDO7 SDO6 SDO5 SDO4 SDO3 SDO2 SDO1 SDO0 PCLKO HSYNCO VSYNCO SDA_S SCL_S TCLK TCLKB TDATA TDATAB NSRESET SRESET SMCKO
SDA_M_MISO_M
GPIO25_SS_M GPIO26_MISO_M GPIO27_MOSI_M GPIO24_SCLK_M GPIO20_PWM0 GPIO21_PWM1 GPIO22_PWM2 GPIO23_PWM3 GPIO28_SCL_M GPIO29_SDA_M RXD TXD RGVDD_1_8V VDDIO_2_8V
VDDCO
F6 G6 G5 H5 H1 G2 H2 D2 C1 C2 E7 F7 E4 E5 D3 D4 D5 D6 C6 A7 B7 C5 B4 C4 D7 D8 E3 E6 A4 G8
ISP_DVDD_1V8
C608 1u
C609 0.1u
TP600 TP601
ISP_AVDD_2V8
5MCAM_RESET_N ISP_SENS_MCLK ISP_SENS_I2C_SDA ISP_SENS_I2C_SCL
VDDCO_E AVDDP AVDD VDDA_2_8RX VDDA_2_8TX VSSA_TX VSSA_RX DGND1

DGND2
R617
100ohm
C615 1u
C616 0.1u
C617 1u
C618 1u
C619 1u
C620 1u
CLKP CLKN DATAP DATAN
SCL_M_SS_M GPIO10_SCLK_M GPIO11_MOSI_M RCLK RCLKB RDATA RDATAB
DGND3 DGND4 DGND5 DGND6 TEST_0 SEL1
FB603
C623 1u
C624 0.1u
ISP_DVDD_1V8 R618 R619
Figure 3-2-3. ISP Interface (MV9319)
VBAT
U800 ISP_GP_FLASH_SET ISP_GP_FLASH_EN 1 2 3 4 5 6 7 L800 1u CT EN_SET FLEN AGND IN LX PGND
100K
100K
AAT1270IFO-T1 14 RSET 13 FLOUTA 12 FLGND 11 FLOUTB 10 FLINH 9 GND 8 OUT LD800 2.2u C807
G_SLUG
200K
R801
C801 47n
ISP_GP_FLASH_INH
CAMERA FLASH LED

VA807 EVLC14S02050 VA806 EVLC14S02050
R806
R807
C800 2.2u
C806 DNI
Figure 3-2-4. Flash LED (Sub Board)
15
- 40 -
CAM_DVDD_1V8
CAM_AVDD_2V8
A2 IOVDD B6 DVDD E5 AVDD
SYSCLK0 APP_GP_VGA_SDN CI_RES_n APP_I2C_SDA APP_I2C_SCL
B5 C6 D3 C5 D6
EXTCLK PWRDWN RESET SDA SCL
U901 TCM9000MD
DCLK HSYNC VSYNC DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 GND1 GND2 GND3 GND4
A3 D1 D2 B3 B1 B2 B4 C1 C2 C3 D4 A4 C4 E2 E3
R904
51
CI_PCLK CI_HSYNC CI_VSYNC CI_DATA[0] CI_DATA[1] CI_DATA[2] CI_DATA[3] CI_DATA[4] CI_DATA[5] CI_DATA[6] CI_DATA[7]
C901 0.1u
C900 0.1u
C913 0.1u
Figure 3-2-5. VGA Camera (TCM9001MD) (SMT type_VGA FPCB)
F1
PGND
A5 VDD15_1 E4 VDD15_2
CAM_AVDD_2V8 CN901
CAM_DVDD_1V8
1 R910 47 2 3 4 TOUCH_X+ 5 TOUCH_X6 TOUCH_Y+ 7 TOUCH_Y8 9 10 APP_GP_VGA_SDN 11 APP_I2C_SDA 12 APP_I2C_SCL 13 CI_RES_n 14 15 2 1 CN902 SPK_RCV+ SPK_RCVSPK_RCV+ 16 SPK_RCV17
34 33 32 31 30 CI_DATA[0] 29 CI_DATA[1] 28 CI_DATA[2] 27 CI_DATA[3] 26 CI_DATA[4] 25 CI_DATA[5] 24 CI_DATA[6] 23 CI_DATA[7] 22 CI_HSYNC 21 CI_VSYNC 20 19 CI_PCLK 18
SYSCLK0
PLUG
Figure 3-2-6. VGA Camera FPCB Interface with main board
- 41 -
The 5M Camera modules are connected to 24-pin main board and VGA Camera module is mounted to VGA FPCB and VGA FPCB is connected to 34-pin main board. Its interface is dedicated camera interface port in DB3200. The camera port supply 24MHz master clock to 5M ISP and 12Mhz Master clock to VGA module and receive 48MHz pixel clock(15fps) for ISP and 9.5Mhz pixel clock(15fps) for VGA camera, vertical sync signal, horizontal sync signal, reset signal and 8bits YUV data from camera module. The camera module is controlled by I2C port.
Table 3-2-1. Interface between Main board and 5M camera (in Main)
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
Symbol GND SYSCLK0 GND TOUCH_X+ TOUCH_XTOUCH_Y+ TOUCH_YGND GND APP_GP_VGA_SDN APP_I2C_SDA APP_I2C_SCL CI_RES_n GND SPK_RCV+ SPK_RCV GND
Description Ground VGA MCLK Ground touch signal touch signal touch signal touch signal Ground Ground VGA shutdown I2C DATA I2C Clock CAMERA RESET Ground speaker signal speaker signal Ground
Pin No. 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18
Symbol GND CAM_AVDD_2V8 GND CAM_DVDD_1V8 CI_DATA[0] CI_DATA[1] CI_DATA[2] CI_DATA[3] CI_DATA[4] CI_DATA[5] CI_DATA[6] CI_DATA[7] CI_HSYNC CI_VSYNC GND CI_PCLK GND
Description Ground Analog Voltage Ground I/O & Digital Voltage Parallel Data 0 Parallel Data 1 Parallel Data 2 Parallel Data 3 Parallel Data 4 Parallel Data 5 Parallel Data 6 Parallel Data 7 horizontal sync vertical sync Ground Camera Pixel clock Ground
Table 3-2-2. Interface between VGA Camera FPCB and main board.
- 42 -
3.2.2 Camera Regulator

APP_GP_CAM_LDO_EN enables 1.8V & 2.8V Camera Regulator for both 5M and VGA Camera. (5M : 2.8V for analog, 2.8V for AF VDD control, 1.8V for I/O, 1.8V for digital), (VGA : 2.8V for analog, 1.8V for I/O, digital)
CAM_AFVDD_2V8 CAM_AVDD_2V8 VBAT CAM_DVDD_1V8
R634 APP_GP_CAM_LDO_EN R616 5.6K 1u 0 1u
U601 1 VIN 2 EN1 3 EN2 4 NC1
RT9011-MGPQW 8 VOUT1 7 VOUT2 6 NC2 5 GND
PGND
C611
C612
C613
1u
Figure 3-2-5. 1.8V and 2.8V Camera Regulator APP_GP_ISP_LDO_EN enables 1.8V & 2.8V regulator for ISP. (ISP : 2.8V for anlalog, 1.8V for I/O and digital),
C614 ISP_AVDD_2V8 ISP_DVDD_1V8
VBAT
R635 R625 APP_GP_ISP_LDO_EN 5.6K C629 1u 0
U603 1 VIN 2 EN1 3 EN2 4 NC1 C630 1u
RT9011-MGPQW 8 VOUT1 7 VOUT2 6 NC2 5 GND C628 1u C627 1u
Figure 3-2-6. Camera Regulator for ISP
PGND
1u
- 43 -
3.2.3 Display & LCD FPC Interface

LCD module include device in table 3-2
Device Main LCD Main LCD Backlight Type 240 RGB 400 262K Color TFT LCD 5 White LEDs
Table 3-2-3. Device in LCD Module
LCD Module is connected to Key FPCB with 40-pin Connector and key FPCB is connected to Main board with 50-pin connector. The LCD is controlled by 8-bit PDI(Parallel Data Interface) in DB3200.
LCD_AVDD_2V8
LCD_DVDD_1V8
VBAT
VDDE_1V8
4.7K
10K
DNI
R609
R608
R607
LCD_DATA[0] LCD_DATA[1] LCD_DATA[2] LCD_DATA[3]
1 2 3 4
INOUT_A1 INOUT_B1 INOUT_A2 INOUT_B2 INOUT_A3 INOUT_B3 INOUT_A4 INOUT_B4 G1 G2
9 8 7 6
R628
EVRC14S03Q030050R
FL600
EVRC14S03Q030050R LCD_DATA[4] LCD_DATA[5] LCD_DATA[6] LCD_DATA[7]

1 2 3 4 INOUT_A1 INOUT_B1 INOUT_A2 INOUT_B2 INOUT_A3 INOUT_B3 INOUT_A4 INOUT_B4 G1 G2 9 8 7 6
FL601
EVRC14S03Q030050R LCD_RS LCD_CS_N LCD_RD_N LCD_WE_N

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 53 54
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26
10K
10K R603
R604
10K
CN604 51 52
Close to ABB
C625 C626 47n FB604 47n FB605
CCO1 MIC1P MIC1N KEYIN0 KEYIN3 KEYIN2
10
R627 R626
100ohm 100ohm
ONSWA_n
KEY_LED1 KEY_LED2 KEYOUT0 KEYOUT1 KEYOUT2 APP_GP_LCD_ID WLED1 WLED2 WLED3 WLED4 WLED5
R610
10K
10
APP_GP_LCD_IF1
LCD_RESET_N
RSB6.8CST2R
RSB6.8CST2R
FL602 WLED_PWR PRSB6.8C PRSB6.8C
ICVS0514X350FR
10
LCD_VSYNC
R621
TRICKLE 100K R622
1u
DNI
1u
ZD605
D600 PRSB6.8C
R611
C604
Table 3-2-4. LCD module Connector
ZD600
ZD601
C605
- 44 -
ZD606
VA603
3.2.4 LCD Module Block diagram
Data(0~7)
Figure 3-2-9. LCD Module Block diagram
- 45 -
3.2.5 LCD Backlight Illumination

There are 5 white LEDs in LCD Backlight circuit which is driven Charge Pump(AAT3169). APP_GP_BL_EN is used for Backlight brightness control.
VBAT
U604 R629 4 0 1u C632 5 C1+ C1-
AAT3169IFO-T1 7 C2+ C2OUTCP 8 6 1u C633 R631 0 WLED_PWR
IN D1 D2 D3 D4 D5 D6
APP_GP_BL_EN
EN_SET
R630
100K
10 GND 15 PGND C635 1u
11 12 13 14 1 2 C634 1u
WLED1 WLED2 WLED3 WLED4 WLED5
Figure 3-2-10. SUB PMIC Circuit LCD Backlight
3.2.6 Keypad Illumination

There are 4 side view white LEDs in Main board backlight circuit, which are driven by LED1, LED2 port from AB3100.
LD1000 KEY_LED1 VBAT SSC-TWH104-HL LD1001 SSC-TWH104-HL LD1002
B4
A4
D3
KEY_LED1 KEY_LED2
KEY_LED2
SSC-TWH104-HL
Figure 3-2-11. Keypad Backlight LED Interface and Backlight Circuit
- 46 -
LED1_N LED2_N LED3_N
SSC-TWH104-HL LD1003
C3
3.3. Audio Part

3.3.1 Audio Part Block Diagram
Figure 3-3-1. Audio Part Block Diagram
3.3.2 Audio Signal Processing & Interface

Audio signal processing is divided Uplink path and downlink path. The uplink path amplifies the audio signal from MIC and converts this analog signal to digital signal and then transmit it to DBB Chip (DB3200). This transmitted signal is reformed to fit in GSM & WCDMA Frame format and delivered to RF Chip. The downlink path amplifies the signal from DBB chip (DB3200) and outputs it to Receiver (or Speaker). The audio interface consists of PCM encoding and decoding circuitry, microphone amplifiers and earphone drivers. The PCM encoder and decoder blocks are two-channel, 16-bit circuits with programmable gain amplifiers (PGA). The decoder has a receive volume control. The audio inputs and outputs can be switched to normal or auxiliary ports.
- 47 -
Figure 3-3-2. Audio Interface Detailed Diagram(AB3100)
Audio Subsystem
VBAT
C332 1u 1u C336
C333 1u
C334 0.1u
A3
B1 VDD
A4 C338 1u A5
C1N C1P
PVDD
VSS
C5
HPR HPL
A1 A2
HS_EAR_R HS_EAR_L
EAR_R EAR_L SPKRP SPKRN
C339 C342 C343 C344
1u 1u 18000p 18000p
D1 INA2 D2 INA1 C1 INB2 C2 INB1 B2 BIAS
U301 MAX9877AEWP_TG45 OUT+ OUTD5 B5 VA300 ICVL0505101V150FR VA301 ICVL0505101V150FR SPK_RCV+ SPK_RCV-
AMP_I2C_SDA AMP_I2C_SCL BEARP BEARN 1% R322 15 R323 15 1%
B3 SDA C3 SCL 22p PGND D4 RXIN+ B4 RXINC354 1u 22p
Main MIC
CCO1 C1000 47p MIC100
GND
C352
D3
C4
C353
Audio Subsystem
1 P 2 G1 3 G2 4 O SPU0410HR5H-PB
MIC1N MIC1P
Figure 3-3-3 . Audio Section scheme
- 48 -
3.3.3 Audio Mode

Audio Mode includes three states.( Voice call, Midi.MP3). Each states is sorted by the total 7 Modes according to external Devices (Receiver,Loud Speaker,Headset). Video Telephony Mode Operate on state of the WCDMA CALL.
Mode Receiver Mode Loud Speaker Mode Voice call Headset Mode Video Telephony Mode MIDI MP3 Headset Mode Only Loud Speaker Loud Speaker Mode
AB3100 In /Out Port IN MIC1P/MIC1N MIC1P/MIC1N MIC2P/MIC2N MIC1P/MIC1N OUT BEARP/BEARN SPKRP/SPKRN AUXO1/AUXO2 SPKRP/SPKRN SPKRP/SPKRN SPKR/SPKN AUXO1/AUXO2
Table 3-3-1. Audio Mode
- 49 -
3.3.4 Voice Call

A. Voice call Downlink Mode(Receiver, Speaker, Headset)
This section provides a detailed description of the Voice Call RX functions.
Figure 3-3-4. Voice call Downlink Scheme
The voice decoder accepts a serial input stream of linear PCM coded speech. The receive band-pass filter is the next step in the CODEC receive path. Following the filter is the DAC, followed by a PGA enabling to adjust or trim the circuit in the product for different sensitivity of the earphone and spread in the RX path. The final step in the receive path is the auxiliary output. The auxiliary audio amplifier is intended to drive low impedance headphones. The earphone amplifier and the auxiliary audio outputs can be powered down (muted) via I2C. Both the earphone driver and one of the auxiliary drivers can simultaneously provide an output signal during voice decoding.
Receiver Mode : BEARP/N Port
Receiver(32) SPKR/N
Loud Speaker / Video Telephony Mode : AB3100 SPK Amp AUDIO AMP(TPA6205) Headset Mode : Auxiliary audio amplifier Speaker(8) AUXO1/2 Head Phone
AUDIO AMP(MAX9724D)
- 50 -
B. Voice Call Uplink Mode (Receiver,Speaker,Headset) This section provides a detailed description of the Voice Call TX functions.
Figure 3-3-5. Voice call Uplink Scheme
From the audio path view point, voice call has the same structure as video telephony. The TXMIX connection enables insertion of audio into the uplink audio path. This can, for example, be used to play dictation recordings for the listener at the other party, in a voice call or video telephony call. The connection to TXMIX from the Audio Mixer must be performed in 8 kHz mono, since this is supported by the Voice mode. Due to performance reasons it may not be possible to decode every audio format during video telephony. Each Voice Uplink Mode paths shown below. Receiver Mode : C-MIC(SPM0410LR5H) AB3100 Input(MIC1N/1P) Loud Speaker Mode : C-MIC(SPM0410LR5H) AB3100 Input(SPK1N/1P) Video Telephony Mode : C-MIC(SPM0410LR5H) AB3100 Input(MIC1N/1P) Headset Mode : Headset MIC Analog Switch(FSA201) AB3100 Input(AUXI1N/1P)
- 51 -
3.3.5 MIDI (Ring Tone Play)

This section provides a detailed description of the MIDI and WAV-file functions.
Figure 3-3-6 External MIDI path In Figure 2-4-6, External MIDI path is the same as Voice Loudspeaker downlink Mode , except source in DB3200 (DSP and Audio Mixer). MIDI : DB3200 PCM Decoder Auxiliary audio amplifier SPKRP/N Port AUDIO AMP(TPA6205A) Speaker(8)
3.3.6 MP3 (Audio Player)

This section provides a detailed description of the MP3 file functions.
Figure 3-3-7. MP3 Scheme MP3 function supports PCM 44/48KHz sampling rate.The PCM44/48 RX-path is intended to be used as a audio amp and one speaker.
- 52 -
3.3.7 Video Telephony

This section provides a description of the Video Telephony functions.
Figure 3-3-8. Video Telephony Scheme
Video Telephony Mode has same paths with Loud Speaker Mode.
3.3.8 Audio Main Component

There are 4 components in GT500 schematic Diagram. Part Number marked on GT500 Schematic Diagram.
NO 1 2 3 4
ITEM Speaker/Receiver MIC Audio Amp Ear-jack SET
PART NUMBER SUSY0027506 SPU0410HR5H-PB MAX9877AEWP_TG45 SGEY0003741

Table 3-3-2. Audio Component List
MAKER Ki-Rin KNOWLES ACOUSTICS Maxim I-sound
- 53 -
3.4 GPADC (General Purpose ADC) and AUTOADC2

The GPADC consists of a 14 input MUX and an 8-bit ADC. The analog input signal is selected with the MUX and converted in the ADC. The GPADC has a built in controller, AUTOADC2, which is able to operate in the background without software intervention. The AUTOADC2 periodically measures the battery voltage or current. (Fig.2-4-1) shows the schematic of GPADC part. The GPADC channel spec is as following (Table 2-4-1).
PCB_VERSION TESTOUT RTEMP
A9 B9 C9 B8 A8 C8 D8
B7
TP300
Fig 3-4-1. Schematic of GPADC and AUTOADC2
Fig 3-4-2. GPADC and AUTOADC2 Block diagram
ADC 2 channels Resource GPA3 GPA7 Name PCB_VERSION VBACKUP Description HW PCB Version check Backup battery
Table 3-4-1. GPADC channel spec
GPA0 GPA1 GPA2 GPA3 GPA4 GPA5 GPA6 GPA7 GPA12
C7
VBACKUP
- 54 -
3.5 Charger control

A programmable charger in AB3100 is used for battery charging. It is possible to set limits for the output voltage at CHS- and the output current from DCIO via the sense resistor to CHS-. The voltage at CHS- and the current feed to CHS- cannot be measured directly by the GPADC. Instead, the two measuring amplifiers translate these inputs to a voltage proportional to the input and within the range of the GPADC. (Fig.3-5-1) shows the schematic of charging control part.
SRST_n SCLK SDAT BDATA FGS+
M2 M1 N3 A11 J14
SRST_N SCLK SDAT BDATA FGSENSEP
Charging Circuit
VBUS Q300
S2
VA605 varistor VBAT FGSJ13 G2 H1
SIA911DJ
G2
FGSENSEN VBAT_D CHSENSEP
D2
Charging
D4
CHS+
D3
D1
CHSG1
H2 H3
CHSENSEN CHREG
S1
CHREG
CHREG
DCIO_INT VBAT_H R314 0 USB charging path VDDE_1V8 VDD_REF VDDC_2V65 C330 22p D302
C1 1 A2 2 A1_C2 3
OTP
DCIO_INT
VBAT 2012 1/4W 1% CHS+ R316 Route as a differential pair 0.1 CHS-
VBUS VBUS TRICKLE R317 1u
D301
RSX101VA-30TR
J2 F1 E2 F2 C5 B5 C4
DCIO_INT DCIO VBUS TRICKLE DAC_DAT DAC_STR DAC_CLK
VBAT
RF_CTRL_DATA RF_CTRL_STR_1 RF_CTRL_CLK
C331 33u
Discharging
P13 P3
BDATA C337 22p R320 300K
VDD_SPKR VDD_BEAR VDD_AUDIO VDD_AUXO G1 VDD_REF

P6
P7
KDS221E_RTK
A12
VDD_IO
D12 A13 A14
CN300 D1 1 2 3 D2
Causion when PCB lLayout Direction of BAT and GND
C345 R321
SPARE1 SPARE2
B10 A2
N5
Phone ground return path
FGS+
2012 1/4W
1%
R324 0.025
Route as a differential pair FGS-
Make an Area at 8, 9 Layer
Fig. 3-5-1. Battery charging circuit
Name CHS+ CHS-
Type Analog Analog
Unused VBAT VBAT
Description Current sensing input positive Current sensing input negative
Table 3-5-1. Charger Control channel spec
M7
- 55 -
VSS_BEAR VSS_SPKR
C346 0.1u
C347 1u
C348 0.1u
C349 0.1u
1u 100K
TEST VREF IREF
3.5.1 Fuel Gauge

AB3100 supports the measurement of the current consumption/charging current in the GT500 with a fuel gauge block. By constantly integrating the current flowing into and out of the battery, the fuel gauge block is used to determine the remaining battery capacity. The function of the fuel gauge block is schematically described in (Fig.3-5-3). A sense resistor R_FGSENSE is connected in series with the battery. The voltage across the resistor, equivalent to the current entering/leaving the battery, is integrated using an ADC block.
Fig. 3-5-2. The analog front-end of the fuel gauge block

M2 M1 N3 A11 J14
FGS+
2012 1/4W
1%
R324 0.025
CHS+
CHSCHREG
H2 H3
CHSENSEN CHREG
Fig. 3-5-3 The Schematic of the fuel gauge block
Name FGS+ FGS-
Type Analog Analog
Unused VBAT VBAT
Description Fuel gauge current sensing input positive Fuel gauge current sensing input negative
Table 3-5-2. Fuel Gauge channel spec
- 56 -
3.5.2 Battery Temperature Measurement

The BDATA node, the constant current source, feed the battery data output while monitoring the voltage at the battery data node with GPADC. This battery data is converted to the battery temperature. (Fig.3-5-5) shows the schematic of battery temperature measurement part.
D302
C1 1 A2 2 A1_C2 3
Disch
BDATA C337 22p R320 300K
KDS221E_RTK
M2 M1 N3 A11 J14
CN300 D1 1 2 3 D2
VA605 varistor
FGS-
J13
FGSENSEN
Fig 3-5-4. Battery Temperature Measurement
Name BDATA
Type Digital Input/Output
Unused Unconnected
Description current output
Table 3-5-3 BDATA channel spec
- 57 -
3.5.3 Charging Part

The charging block in AB3100 processes the charging operation by using VBAT voltage. It is enabled or disabled by the assertion/negation of the external signal DCIO. Part of the charging block are activated and deactivated depending on the level of VBAT. (Fig.3-5-6) shows the schematic of charging part.
SCLK SDAT BDATA FGS+
N3 A11 J14
SCLK SDAT BDATA FGSENSEP
Charging Circuit
VBUS Q300
S2
SIA911DJ
G2
D2
Charging
D4
CHS+
D3
D1
CHSG1
H2 H3
CHSENSEN CHREG
S1
CHREG
CHREG
DCIO_INT VBAT_H R314 0 USB charging path VDDE_1V8 VDD_REF VDDC_2V65 C330 22p D302
C1 1 A2 2 A1_C2 3
OTP
DCIO_INT
VBAT CHS+ 2012 1/4W 1% R316 Route as a differential pair 0.1 CHS-
VBUS VBUS TRICKLE R317 1u
D301
RSX101VA-30TR
J2 F1 E2 F2 C5 B5 C4
DCIO_INT DCIO VBUS TRICKLE DAC_DAT DAC_STR DAC_CLK
VBAT
C331 33u
Discharging
P13 P3
BDATA C337 22p R320 300K
VDD_SPKR VDD_BEAR VDD_AUDIO VDD_AUXO G1 VDD_REF

P6
P7
KDS221E_RTK
A12
VDD_IO
D12 A13 A14
CN300 D1 1 2 3 D2
C345 R321
SPARE1 SPARE2
B10 A2
N5
FGS+
2012 1/4W
1%
R324 0.025
Fig. 3-5-5. Charging Part When VBAT is below a certain value, 3.2V, a current generator take care of initial charging of the CHSENSE+ node and internal trickle charge signal is active. This part of the charging block is powered on and active when DCIO is asserted. The DCIO signal is asserted when its voltage is above the voltage at VBAT. As soon as generator is turned off and all parts of the charging block are functional and active. Battery block indication as shown in (Fig.3-5-7)
4.17 ~3.72 (V) 100~40 (%)
3.72 ~3.62 (V)
3.62 ~3.53 (V)
3.53 ~3.20 (V) 3~0(%)
Fig. 3-5-6 Battery Block Indication 40~12 (%) 12~3 (%)
Fig. 3-5-6 Battery Block Indication
- 58 -
M7
VSS_BEAR VSS_SPKR
C346 0.1u
C347 1u
C348 0.1u
C349 0.1u
1u 100K
TEST VREF IREF
Trickle charging When the VBAT is below a certain value, 3.2V, a current generator take care of internal trickle charge signal is active. The charging current is set to 50mA. Parameter Trickle current Min 30 Typ 40 Max 60 Unit mA
Table. 3-5-4. Trickle charging spec Normal charging When the VBAT voltage is within limits or the internal regulators are turned on, the current source for trickle charging is turned off and all parts of the charging block are active. The charging method is CCCV. (Constant Current Constant Voltage) This charging method is used for Lithium chemistry battery packs. The CCCV method regulates the charge current and the VBAT voltage. This charging method prevents the battery voltage to go above the charge set in the CCCV algorithm. (Fig.3-5-8) shows the charging voltage and charging current change.
Fig. 3-5-7. CCCV charging method
- 59 -
Charging Method : CCCV (Constant Current Constant Voltage) Maximum Charging Voltage : 4.2V Maximum Charging Current : 700mA Nominal Battery Capacity : 950 mAh Charger Voltage : 5.1V Charging time : Max 3.5h Full charge indication current (icon stop current) : 80mA Low battery POP UP : Idle - 3.43V, Dedicated 3.43V Low battery alarm interval : Idle - 3 min, Dedicated - 1 min Cut-off voltage : standby : 3.25V, Call : 3.25V
Charging of Extended Temperature When the battery temperature is outside the normal charging specification, the battery voltage, VBAT, is maintained at 3.7V. Under 0 C : Extended temperature From 0 C to 45 C : Normal charging temperature Over 45 C : Extended temperature
- 60 -
3.6. Voltage Regulation

The LDO regulators and the BUCK converter generate a range of programmable voltages, each optimized for its load. When the analog baseband controller boots up or down, internal signals activate or deactivate the LDO regulators and the BUCK converter. In active mode, the LDO regulators and the BUCK converter are activated and deactivated through I2C. The low power regulator is on all the time and has extremely low power consumption with limited output current. It provides power for the 32 kHz oscillator and the real-time clock (RTC).
LDO LDO_A LDO_D LDO_E LDO_C LDO_H LDO_F LDO_G LDO_K LDO_LP BUCK
Net Name VDDA_2V8 VDDD_2V65 VDDE_1V8 VDIGRAD_1V8 VDDC_2V65 VDDH_2V75 VDDF_2V5 VDDG_2V85 VDDK_2V75 VBACKUP VCORE
Output Voltage 2.8V 2.65V 1.8V 1.8V 2.65V 2.75V 2.5V 2.85V 2.75V 2.2V 1.2V
Output Current 150mA 200mA 200mA 200mA 200mA 30mA 100mA 200mA 6.5mA 600mA
Usage RF Tranceiver AB3100 analog Memory, I/O RF3300 Digital AB3100 Audio Block 3Axis DB3200 analog SD card, LCD Bluetooth Backup Battey DB3200 core
Table. 3-6-1. LDO and Buck
- 61 -
3.7. RF Technical Description

3.7.1. General Description
The RF platform of GT500 supports two different communication modes (WCDMA/GSM modes) including four communication bands (WCDMA2100/WCDMA900/GSM850/900/1800/1900). The all the RF blocks can be divided into three main parts, which are a WCDMA part, a GSM, and a RF front-end. Different from other general solutions, the RF front-end of GT500 consists of an antenna switch and an EDGE power amplifier module (PAM). The simplified block diagram is shown in Figure 3-7-1.
U330
VBAT
WCDMA/GSM/GPRS/EDGE TRX
1930 1990 MHz
GSM/EDGE HB GSM/EDGE HB GSM/EDGE LB GSM/EDGE LB WRxIA
LNA LNA LNA LNA LNA
WRxIB
1805 1880 MHz
0 90
WRxQA WRxQB
925 960 MHz
869 894 MHz
WCDMA HB
EDataStr
A
VAPC
WCDMA HB
EDataA
LNA LNA
VCO VCO
D
EDataC
WCDMA LB
A D
N.M
EDataB
ANT
ESD
PA
GSM850/ 900 Input
824 915 MHz
GSM/ EDGE LB
2.75 V VRAD
PA
DCS/PCS Input
1710 1910 MHz VBAT

PWM/PFM WDCDCREF
GSM/ EDGE HB
+
DAC DAC
LPF
ChP
PhD
XO
GSM/EDGE PA + Ant Sw.
VccWPA
DAC 1.8 V VIO
Switch Control Logic
En RFCtrl1
GSM/EDGE AM
UL: 1920 1980 MHz DL: 2110 2170 MHz
+
RFCtrl1
DAC
CLK RADCLK RADDAT RADSTR
FB
VccWPA
RFCtrl1
LPF
RFCtrl2
ChP
PhD
Serial Control
DATA STROBE
Power coupler UL: 1749.9 1784.9 MHz DL: 1844.9 1879.9 MHz
RFCtrl2
DET
Bias
En
VCO
WCDMA HB
N.M
WTxIA
VccWPA
WCDMA HB
WTxIB
WCDMA HB
0 90
WTxQA WTxQB
Power coupler UL: 830 840 MHz DL: 875 885 MHz
DET
Bias
En
WCDMA LB
MCLK
VccWPA
XOn MCLKSec
2.75 V VRAD
26MHz X-tal DET Bias En
XOp
XO
CLKREQ
RF Pow det Det

En
WPOW_DET_EN
Figure 3-7-1. Block diagram of RF part
3.7.2. WCDMA Part

The W-CDMA transceiver uses differential analog in-phase and quadrature-phase interfaces, that is an IQ-interface, both in the receiver and transmitter information path. The transceiver has the following general features: . Power class : Power class 3 (+24dBm) in Band I . Power class : Power class 3 (+24dBm) in Band VIII . Zero-IF Receiver.No IF filter needed . Direct IQ modulation transmitter
- 62 -
3.7.2.1. Transmitter Part

The W-CDMA transmitter architecture is an on frequency linear direct up-conversion IQ-modulator. The TX IQ modulator has differential voltage I and Q inputs. It converts input signals to RF output frequency and is designed to achieve LO and image suppression. The in-phase and quadrature-phase reconstruction filters are fully integrated and a programmable gain amplifier implements the gain control. The transmit output stage provides at least +5 dBm at maximum power control at the single-ended 50 output. Gain is set through the 3-wire bus. An external SAW filter between the W-CDMA circuit and the power amplifier is used to improve noise performance. Two 10-bit DACs are used to control the DC/DC converter and the PA gain. After the power amplifier, the signal is sent through an isolator and through the duplex filter, which directs the transmit signal to the antenna connector through the antenna switch. The supply voltage and bias of the power amplifier are adapted depending on the output power to achieve high efficiency at every transmitter power level. A high efficiency DC/DC converter regulates the supply voltage and the bias operation point is controlled by a D/A-converter in the W-CDMA radio circuit. These DACs are controlled through the 3-wire-bus
VBAT
1930 1990 MHz
LNA LNA LNA LNA LNA
WRxIB
1805 1880 MHz
0 90
WRxQA WRxQB
925 960 MHz
869 894 MHz
WCDMA HB
EDataStr
A
VAPC
WCDMA HB
EDataA
LNA LNA
VCO VCO
D
EDataC
WCDMA LB
A D
N.M
EDataB
ANT
ESD
PA
GSM850/ 900 Input
824 915 MHz
GSM/ EDGE LB
2.75 V VRAD
PA
DCS/PCS Input
1710 1910 MHz VBAT

PWM/PFM WDCDCREF
GSM/ EDGE HB
+
DAC DAC
LPF
ChP
PhD
XO
VccWPA
DAC 1.8 V VIO
En RFCtrl1
GSM/EDGE AM
UL: 1920 1980 MHz DL: 2110 2170 MHz
+
RFCtrl1
DAC
FB
VccWPA
RFCtrl1
LPF
RFCtrl2
ChP
PhD
Serial Control
DATA STROBE
RFCtrl2
DET
Bias
En
VCO
WCDMA HB
N.M
WTxIA
VccWPA
WCDMA HB
WTxIB
WCDMA HB
0 90
WTxQA WTxQB
DET
Bias
En
WCDMA LB
MCLK
VccWPA
XOn MCLKSec
2.75 V VRAD
26MHz X-tal DET
XOp
XO
CLKREQ
Figure 3-7-2. WCDMA Transmitter Architecture
- 63 -
3.7.2.2. Receiver Part

The W-CDMA receiver architecture is a direct down-conversion Zero Intermediate Frequency (ZIF) receiver with integrated low-pass channel filter, i.e. the front-end receiver converts the aerial RF signal from W-CMDA band I down to a ZIF. The first stage consists of one single-ended low noise amplifier (LNA) with a 16 dB gain step. This LNA is followed through an external filter by an IQ down-mixer which consists of a mixer in parallel driven by quadrature out-of-phase LO signals. The In phase (I) and Quadrature phase (Q) ZIF signal are then low pass filtered to provide protection from high frequency offset interferer fed into the channel filter. The front-end zero IF I and Q outputs are applied to the integrated low-pass channel filter with a provision for 4 x 8 dB gain steps in front of the filter. The filter is a self-calibrated 6 pole, 2 zero filter with a cut-off frequency around 2.15 MHz and a second order group delay compensation (2 poles, 2 zeroes). Once filtered, the zero IF I and Q signals are further amplified with provision of 31 x 1 dB steps and DC offset compensation. The zero IF output buffer provides close rail-to-rail outputs signal.
1930 1990 MHz
LNA LNA LNA LNA LNA
WRxIB
1805 1880 MHz
0 90
WRxQA WRxQB
925 960 MHz
869 894 MHz
WCDMA HB
EDataStr
A
VAPC
WCDMA HB
EDataA
LNA LNA
VCO VCO
D
EDataC
WCDMA LB
A D
N.M
EDataB
ANT
ESD
PA
GSM850/ 900 Input
824 915 MHz
GSM/ EDGE LB
2.75 V VRAD
PA
DCS/PCS Input
1710 1910 MHz VBAT

PWM/PFM WDCDCREF
GSM/ EDGE HB
+
DAC DAC
LPF
ChP
PhD
XO
VccWPA
DAC 1.8 V VIO
En RFCtrl1
GSM/EDGE AM
UL: 1920 1980 MHz DL: 2110 2170 MHz
+
RFCtrl1
DAC
FB
VccWPA
RFCtrl1
LPF
RFCtrl2
ChP
PhD
Serial Control
DATA STROBE
RFCtrl2
DET
Bias
En
VCO
WCDMA HB
N.M
WTxIA
VccWPA
WCDMA HB
WTxIB
WCDMA HB
0 90
WTxQA WTxQB
DET
Bias
En
WCDMA LB
MCLK
VccWPA
XOn MCLKSec
2.75 V VRAD
26MHz X-tal DET
XOp
XO
CLKREQ
Figure 3-7-3. WCDMA Receiver Architecture
- 64 -
3.7.2.3. Synthesizer
WCDMA Transmitter Synthesizer All RF frequencies are generated in the WCDMA Tx 4 GHz VCO, subsequently divided by 2 or 4 to arrive at the final frequency. The WCDMA Tx RF-VCO is locked to the XO in a fractional N PLL consisting of a prescaler, a phase frequency detector, a charge-pump, a sigma-delta modulator, and a fully integrated loop filter. Automatic trimming of the VCO center frequency and the RC constant ensures that the variation of the PLL dynamics is sufficiently low. GSM/EDGE and WCDMA Receiver Synthesizer All RF frequencies are generated in either of the two 4 GHz VCOs, subsequently divided by 2 or 4 (depending on final frequency). The selection of either of the two VCOs is done using the digital bus. The selected RF-VCO is locked to the XO in a fractional N PLL consisting of a prescaler, a phase-frequency detector, a charge-pump, a sigma-delta modulator, and a fully integrated loop filter. Automatic trimming of the VCO center frequency and the RC constant ensures that the variation of the PLL dynamics is sufficiently low.
VRAD_2V8
VDDA_2V8
R123 R126 R127 DNI R124 390 C160 FB100 0
560 1800 C161 DNI C159 3.9p 4.3nH R125 GRX_1900
U108
C162 4 C163 TX_ADC_STRB 1 2 3 _OE VCC A GND Y 5 VRAD_2V8
FL103
L104 3.3nH GND6 10 GND4 8 GND2 7 6 C164 15p 9 OUT_1842_5 IN_1842_5 1 L107 NA OUT_1960 GND5 5 GND3 3 GND1 2 IN_1960 4 3.9nH L105 NA
0.01u
22p
SN74LVC1G125DRLR
TX_ADC_STRB_2V8
33p
closed to RF3300
R128 GRX_1800
0.01u
22p
WRX_Q_N WRX_Q_P WRX_I_N WRX_I_P
C166
C167
VDDA_2V8
R129 270
27 270
R130 C169
0 C170
C165 DNI
SAWEN1G84BC0F25
L106 2.2nH
GTX_1800_1900
R131
AMP_FREQ_LSB DATA_STR 55 53 49 47 45 43 41 39
R132
DNI
2.7p
0 C172 3.3p
R133 GRX_900
FL104
GND6 10 GND4 8 GND2 7 6 9 OUT_942_5 OUT_881_5 GND5 5 GND3 3 GND1 2 IN_942_5 IN_881_5 4 0 1 L112 NA R140 GRX_850 L109 NA
270
R138 DNI
R139 DNI
3 WRXIN 4 WRXIP 6 EDATAC 7 EDATASTR 8 EDATAA 9 EDATAB 10 11 12 STR DATA CLK
R136
56 ETXHB 54 ETXLB EAMMOD 52
R137
51 VCCA2 27 VCCA1
270
QDATA_AMP_MSB IDATA_FREQ_MSB
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8
R134
27
GTX_850_900 L110 8.2nH L111 NA
1 WRXQN 2 WRXQP
C177 GTX_VAM L113 10nH C178
3.3p
DNI R141
SAWEN881MBA0F25
L114 NA
50 ERXHB2 48 ERXHB1 46 ERXLB2 44 ERXLB1 42 WRXHB2 38 WRXHB1 WRXLB 40 39nH L116 DNI R145 WDCDC_EN C180 DNI 560 R143
RF_CTRL_STR_1 RF_CTRL_DATA RF_CTRL_CLK TESTOUT MCLKREQ MCLK R148 DNI
33p
U111 RF3300
R142
18p
WRX_BAND_1 C179 10nH R146 4.7K ADOUT
R144
13 TESTOUT 14 CLKREQ 15 MCLK 17 XON 18 XOP

4
TX_ADC_STRB_2V8
L115 5.6nH
TN4-26562 26MHz
2 GND1 3 HOT2 HOT1 1 GND2
37 RFCTRL1 36 RFCTRL2 35
C181 100p
PT100
R149
R150
X100
DNI
23 WTXLP 24 WTXIN 25 WTXQP 26 WTXQN
R155 DNI
C185 DNI
31 WTXHB3 33 WTXHB2 29 WTXHB1 PGND 57
R151
FL105 SAFEB897MAM0F00
WRX_BAND_2 DNI WTX_BAND_8_5_TO_PA R153 R152 0 L117 2.2nH
IN
OUT
DNI
DNI
G1 G2 G3
TEMP SENSOR
L118
FL106 SAFEB1G95KA0F00
R158
5 16 19 22 28 30 32 34
MCLKSEC
R157
10nH WRX_BAND_8_5
R159 DNI
R161 0 C187 DNI
3 1
G3 IN OUT G1 G2
R162
0 R164 DNI WTX_BAND_1_TO_PA L119 1.8p
NA L120
VDIGRAD_1V8 C188 DNI C189 DNI
RF TRANCEIVER
0 C191 DNI WTX_I_P WTX_I_N WTX_Q_P WTX_Q_N R165
FL107 SAFEA1G88KB7F00 3 1
G3 IN OUT G1 G2
R166
0 R168 DNI WTX_BAND_2_TO_PA
Figure 3-7-4. WCDMA Transceiver schematic
- 65 -
4.7K
20 MCLKSEC 21 VCCD
RTEMP
WTXLB
3.7.2.4. Power Amplifier Module

The SKY77182 Power Amplifier module is a fully matched 10-pad surface mount module developed for Wideband Code Division Multiple Access (WCDMA) applications. This small and efficient power amplifier packs full coverage of the 19201980 MHz bandwidth into a single compact package.
Figure 3-7-5. SKY77182 Functional Block Diagram
The SKY77181 Power Amplifier module is a fully matched 8-pad surface mount module developed for Wideband Code Division Multiple Access (WCDMA) applications. This small and efficient power amplifier packs full coverage of the 880915 MHz bandwidth into a single compact package.
Figure 3-7-6. SKY77181 Functional Block Diagram
- 66 -
VDDA_2V8 VBAT
VRAD_2V8
R100
R101
DNI
C103 0.1uF
C104 22p
C105 22p
U100 1 R103 2 R104 3 75 VDD RF_IN
LMV221 OUT REF DAP EN 6 5 4
R102 WPOW_DET 1K C106 33nF
C100 10u
C101 0.1u
C102 1000p U102 SKY77182 9 PGND 8 GND2 GND1 RFOUT VCC 7 6 5
120
GND
WTX_BAND_1_EN BIAS_CTRL WTX_BAND_1_TO_PA C115 1000p C116 1000p
1 2 3 4
VENB VCTRL RFIN VBIAS
C110 0.1u L100 18p C117 NA C118 NA
C111 22p
WPOW_DET_EN
VBAT VCC_WPA C120 0.1uF C121 22p C122 22p
3 1 FL100
IN
COU
3 R109 DNI
TX RX ANT 6
L601 2.2nH
U103 LDC151G8620Q-359 1 4 OUT TER
7 GND4 8 GND5 9 GND6 C119 100p
5 GND3 4 GND2 2 GND1
R107
10
U105
1 2 VEN_BAND_2 IN_BAND_2 GND1 VCC1 VCONT IN_BAND_5
SKY77175
PGND GND4 OUT_BAND_2 GND3 VC2 VBIAS OUT_BAND_5 15 L101 14 C127 DNI 1.8nH 13 12 11 10 C137 1000p 9 8 C136 22p U104 LDC151G8620Q-359 1 4 OUT TER C128 1.5p
WRF_BAND_1 C124
SAYFP1G95AA0B00 3.6nH
56
WTX_BAND_2_EN WTX_BAND_2_TO_PA BIAS_CTRL WTX_BAND_8_5_TO_PA C133 C134 WTX_BAND_8_5_EN DNI 100p R116 R118 DNI
3 4 5 6
R113
C123
DNI
WRX_BAND_1
GND4 GND5 GND6 C135 100p TX R117 56 DNI RX FL101 C138
GND3 GND2 GND1 C636 3.3nH ANT ACMD-7407 C143 0.5p
C141 1000p
7 C142 22p
IN
COU
VEN_BAND_5
GND2
WRF_BAND_2
R120
24
DNI
VBAT U107 1 C148 10u C149 0.1u C150 1000p 2 3 4 C157 1000p C158 1000p VBIAS RF_IN VCONT VEN SKY77181 8 VCC RF_OUT 7 C146
WRX_BAND_2 GND4 GND5 GND6 C145 100p TX R121 56 R652 DNI RX FL102 C153 1000p C154 0.1u C155 10u C156 DNI L103 8.2nH C151 LT56B ANT 6.8nH C152 0 WRF_BAND_8_5 GND3 GND2 GND1
C144
U106 LDC15874M19Q-360 1 4 OUT TER C147 22p 2 IN COU 3
100p
6 GND2 5 GND1 9 PGND
BIAS_CTRL
WCDMA PA Block
WRX_BAND_8_5
Figure 3-7-8. WCDMA PAM schematic
3.7.3. WCDMA/EDGE/GPRS/GSM RF block

The transceiver is a multi-mode transceiver for WCDMA/EGDE/GPRS/GSM. The EDGE/GPRS/GSM part of the transceiver use a digital baseband interface that is shared between received and transmitted data. The receive interface is based on I and Q data and the transmitter interface is based on envelope and frequency data. The WCDMA part of the transceiver use differential analog in-phase and quadraturephase interfaces, that is an IQ-interface, in the receiver and the transmitter data paths. The EDGE/GSM/GPRS part of the transceiver has the following general features: Power class - GMSK low bands: Class 4 (33 dBm) - GMSK high bands: Class 1 (30 dBm) - 8PSK low bands: Class E2 (27 dBm) - 8PSK high bands: Class E2 (26 dBm) - WCDMA: class 3 (+24dBm)
- 67 -
VBAT
1930 1990 MHz
LNA LNA LNA LNA LNA
WRxIB
1805 1880 MHz
0 90
WRxQA WRxQB
925 960 MHz
869 894 MHz
WCDMA HB
EDataStr
A
VAPC
WCDMA HB
EDataA
LNA LNA
VCO VCO
D
EDataC
WCDMA LB
A D
N.M
EDataB
ANT
ESD
PA
GSM850/ 900 Input
824 915 MHz
GSM/ EDGE LB
2.75 V VRAD
PA
DCS/PCS Input
1710 1910 MHz VBAT

PWM/PFM WDCDCREF
GSM/ EDGE HB
+
DAC DAC
LPF
ChP
PhD
XO
VccWPA
DAC 1.8 V VIO
En RFCtrl1
GSM/EDGE AM
UL: 1920 1980 MHz DL: 2110 2170 MHz
+
RFCtrl1
DAC
FB
VccWPA
RFCtrl1
LPF
RFCtrl2
ChP
PhD
Serial Control
DATA STROBE
RFCtrl2
DET
Bias
En
VCO
WCDMA HB
N.M
WTxIA
VccWPA
WCDMA HB
WTxIB
WCDMA HB
0 90
WTxQA WTxQB
DET
Bias
En
WCDMA LB
MCLK
VccWPA
XOn MCLKSec
2.75 V VRAD
XOp
XO
CLKREQ
RF Pow det Det

En
WPOW_DET_EN
Figure 3-7-9. GSM Transceiver Architecture
3.7.3.1. Transmitter Part

Transmitter There are two transmitter blocks, one for GSM/EDGE and one for WCDMA. GSM/EDGE Transmitter Block A separate block is used to convert the digital bit streams from the baseband into parallel words to be used in the DACs and Sigma Delta modulator. This block also includes programmable delays for optimizing timing between the different modulation paths. A separate output is generated for the auto-tuning block of the second FM path. The block also outputs a low-frequency square wave to the FM paths, to enhance the speed of the auto tuning for the second FM path.
- 68 -
The combined DAC and LP filter is used to convert the digital words of the digital block into analog signals. The LP filters are 3rd order Bessel reconstruction filters. The second FM path is used to add the high-frequency part of the FM to the VCO. It also includes an autotuning block that compensates for VCO gain variations. The AM block converts the differential voltage from the DAC to a single-ended output that drives the PA. The output is scaled according to the desired output power, and an offset can be added for PA linearization. The Tx-buffer is used to drive the PA with the correct power level. A divide by 2 or 4 block is used to generate the correct output frequency from the 4 GHz VCO. WCDMA Transmitter Block The transmitter has differential voltage I and Q inputs. The IQ signal is filtered in a second order LP filter before it is up-converted to the RF in the direct IQ mixer. Automatic trimming of the filter RC constant ensures that the bandwidth variation is sufficiently low. The signal path is split in one low and three high band paths. The RF signal is amplified in a PGA, which is controlled by the 3-wire control bus. The low band and two of the high band transmit output stages provide +5 dBm (minimum) and the last high band output stage provide +7 dBm (minimum) at maximum power control. The output power is set through the serial bus.
3.7.3.2. Receiver part

Receiver The receiver is a homodyne receiver with direct conversion of the received radio channel to baseband I and Q channels. The receiver block consists of multi-band front ends with separate LNAs, a common mixer and a common LP filter with configurable bandwidth. GSM/EDGE Receiver The front end block is followed by a baseband block with active anti-aliasing filters that also suppress blocking signals and interferers. Automatic trimming of the filter RC constant ensures that the bandwidth variation is sufficiently low. The baseband block is followed by a fully integrated ADC of sigma delta structure with high dynamic range. The analog signals are converted to digital bit-streams in a sigma delta converter. The digital output signals are sent over a serial interface to the digital baseband controller for further processing and detection. WCDMA Receiver The front end block is followed by a baseband block with active anti-aliasing filters that suppress blocking signals and interferers. Automatic trimming of the filter RC constant ensures that the bandwidth variation is sufficiently low. The baseband signal is amplified in a PGA, which is controlled by the 3-wire control bus. The PGA has a built in second order loop for DC-offset cancellation. The output of the receiver is analog differential I, Q signals.
- 69 -
3.7.4. Front-End Module (FEM)

A single antenna is used for all bands. The single antenna is used for all transmission and reception. The Front End block connects the proper block in the radio system to the antenna. The Front End has two inputs for EDGE/GSM/GPRS, one for low band (850/900 MHz) and one for high band (1800/1900 MHz). The EDGE/GSM/GPRS power amplifier output is filtered by the low pass filter in the Front End and then connected to the antenna through a switch. In receive mode, the EDGE/GSM/GPRS signal from the antenna passes through the switch to one of the four receive SAW filters. The SAW filter provides receive band selectivity. In GSM/GRPS/EDGE systems, transmit and receive operations are divided in time and the switch connects the proper block in accordance with the mode of operation (that is, transmit or receive; one at a time). In WCDMA the transmit outputs from the WCDMA transceiver are filtered by an external SAW filter that cleans up the spectrum. The SAW filter output is connected to the power amplifier, one for each band. For power control, a sample of the transmit output is taken by a directional coupler and converted to a DC level by the power detection circuit. This signal is used to control the transmitter output power. The transmit signal passes through an isolator and then a duplexer. The duplexer output is selected by the switch in the Front End for connection to the antenna. In WCDMA receive mode the signal from the antenna is switched by the Front End to the correct duplexer. The output from the duplexer is connected to the LNA input in the WCDMA receiver.
Figure 3-7-10. Front-End Module
- 70 -
3.7.4.1. Front End Part

SKY77521 is a transmit and receive Front End Module (FEM) designed in a very low profile (1 mm), compact form factor for quad-band cellular handsets comprising GSM850/900, DCS1800, and PCS1900 operation a complete transmit VCO-to-Antenna and Antenna-to receive SAW filter solution. The FEM also supports Class 12 General Packet Radio Service (GPRS) multi-slot operation and EDGE Polar Modulation. WCDMA switch-through support is provided by three dedicated high-linearity ports.
Figure 3-7-11. SKY77521Functional Block Diagram

VBAT
C108 0.01u
30 29 28 27 26 25 24 23 22 21 12 11 2 GTX_850_900 GTX_1800_1900 ANTSW2 ANTSW1 R111 R112 0 0 C129 22p C130 22p
GND13 GND12 GND11 GND10 GND9 GND8 GND7 GND6 GND5 GND4 GND3 GND2 GND1
PGND1 31 PGND2 32 PGND3 33 PGND4 34
VBATT VAPC
C107 10u
C109 47p
5 4 C112 C113 C114 22p 33p 22p GRX_850 GRX_900 GRX_1800 GRX_1900 R108 DNI WRF_BAND_2 WRF_BAND_8_5 WRF_BAND_1
R105 R106 DNI
GTX_VAM
WCDMA3 20 WCDMA2 19 WCDMA1 18
U101
RX1 16 RX2 15 RX3 14 RX4 13 RSVD MODE _TXEN ANT 10

G2
SW100
KMS-518
G1 C A
LB_RF_IN 3 HB_RF_IN 1 BS2 6 BS1 7
9 8 C125 17 C126 DNI 22p
SW101 UFL-R-SMT10 L102 100p ANT C132 DNI G1 G2
SKY77521
ANTSW0 ANTSW3
R114 R115
0 0 C139 22p C140 22p
GSM PA WITH ASM

Figure 3-7-12. Front End part schematic
- 71 -
3.7.5. Control Flow

The access side of the digital baseband controller controls the overall radio system. In both EDGE/GSM/GPRS and W-CDMA air interface mode, the digital baseband controller controls the radio system through a threewire serial bus. The digital baseband controller also manages PA band control and the antenna switch mechanism in the front end module. The 26 MHz VCXO clock residing in the GSM/EDGE transceiver is turned on only when required, the digital baseband controller initiates this. The EDGE/GSM/GPRS RF system requires control, which is temperature dependent. The temperature within the RF system is estimated by a voltage measurement performed by the analog baseband controller. The control flow for the RF system is shown in Figure 3-7-11.
Figure 3-7-13. RF Control Flow
- 72 -
4. TROUBLE SHOOTING
4. TROUBLE SHOOTING
4.1 Power ON Trouble 4.1 Power ON Trouble
VPPFLASH_E CTS_ON APP_ACC_UART_RX APP_ACC_UART_TX
TP800 TP801 TP802 TP803 TP804
START
OTP_SUB
TP1
The voltage of main battery is higher than 3.3V ? Yes No change main battery
END key operates well? UART_TX(TP1) level is 1.8V when END key pressed.
No
Follow the keypad Trouble shooting guide
TP10
TP8
Yes
TP5
TP6
Check the voltage.
TP9
TP3 TP2
TP7 TP4
TP3 TP2 TP4
< Main Board Bottom side >

VDDA_2V8 VDDD_2V65 VDDE_1V8 VDIGRAD_1V8 VBAT
VDDA_2V8 (TP2) 2.8V VDDD_2V65 (TP3) 1.5V

R302 0
VBAT VDDA_2V8 R303 R304 R305 C302 2.2u C303 2.2u C304 2.2u VDDC_2V65 EXT_LDO VDDH_2V75 VDDF_2V5 VDDG_2V85 VDDK_2V75 0 VDDD_2V65 0 VDDE_1V8 0 VDIGRAD_1V8 to RF3300 digital to All I/O Supplies and Memory to AB3100 CODECs/ADC/PLL to RF3300 Power Detector
VDDE_1V8 (TP4) 1.8V VDDC_2V65(TP5) 2.65V VDDH_2V75(TP6) 2.75V VDDF_2V5 (TP7) 2.5V VDDG_2V85 (TP8) 2.75V VDDK_2V75(TP9) 2.75V VCORE(TP10) 1.2V
TP5 TP6 TP7 TP8 TP9
R306 R307 R308 R309 R310
0 VDDC_2V65 0 VDDH_2V75 0 VDDF_2V5 0 VDDG_2V85 0 VDDK_2V75 to Bluetooth to SD Card and LCD to DB3100 analog to 3xis to Hall Switch and AB3100 BEAR
R311 VBACKUP 4.7K C307 2.2u C308 1u C309 1u C310 4.7u 1608 C311 1u C312 1u VBAT_C VBAT VCORE
BLM18PG121SN1J 120ohm 1608 2A 50mohm Bead FB300
TP10
VCORE to DB3210 CORE
No Change main board

C314 0.1u C315 10u
2.8*2.6*1.0 0.7A 240mohm 20% R312 L300 4.7uH D300 RB521S-30 C317 10u C318 10u C319 0.1u Parallel with VCORE Local ground plane 0
- 73 -
4. TROUBLE SHOOTING
4.2 USB Trouble

START (Connect a USB Cable from a PC) Yes No
Is it open state between USW_ID(TP1) & TP2? Yes
Change main board
No ACC_GP_USB_CS(TP3) is 1.8V? Yes Finish Change main board
TP2
TP1 TP3
VBAT 10V
R500
MUIC
D2 BAT VB D5 USW_DM USW_DP R502 R504 2.2K R507 R508 DNI DNI 0 VBAT USW_ID
V
51K R655
C500 0.1u
C501 4.7u
A4 DN1 A5 DP2 B3 U1 A3 U2 A1 MIC D4 AUD1 D3 AUD2 ISET SCL SDA INT

2 A2
C5 COM1 B5 COM2 U501 B4 MAX14526EEWP_TCC6 UID RES CAP B1 D1
VCC NC2 NC1
F3 F2 F1
C4 GND C3 IC
TI : PD = USB, MAXIM : NA = U
C2 C1 B2
C3
TP500 A4
If TI, then 10nF If Maxim, then 4.7uF
TP2
C512 4.7u C513 0.1u
- 74 -
C509 4.7u
B1 TP501 A1 A2 A3 A5 A6 B6 C6 D5 D6 E5 E1 E6
TEST CHIP_SEL VCC_IO1 CLOCK VCC_IO2 DATA0 RREF DATA1 DM DATA2 U502 DP DATA3 DATA4 ISP1508AET FAULT DATA5 DATA6 DATA7 NXT STP DIR CFG0 REF1V8 ID CFG2 CFG1 PSW_N VBUS REG3V3 XTAL1 XTAL2
C4 B5 B2 C2 C1 D1 E2 D3 B3 B4 D4 F4 E3 F5 F6
4. TROUBLE SHOOTING
4.3 SIM Detect Trouble

SIM control path
- DB3200 generates SIM interface signals(1.8V level) to AB3100. - AB3100 converts SIM interface signals to 3V.
START
Reconnect SIM card
SIM works well? No Resolder J800 on main PCB and check the contact between J800 and SIM card
Yes
Finish J800
SIM works well? No Change SIM card
Yes
Finish
< Sub Board >
SIM works well? No Change Sub board
Yes
Finish
J800 4 GND VCC 5 VPP RST 6 I_O CLK 8 GND2 GND1
1 2 3 7
- 75 -
4. TROUBLE SHOOTING
4.4 MicroSD card Trouble

GND 1 2 3 4 5 6 7 8
SWA SWB
START
R416
2.2
Re-insert MicroSD card
MicroSD works well? No Check operation of MicroSD card using other notebook or PDA
Yes
Finish TP1
H EN
TP2
MicroSD works well? Yes Re-insert MicroSD Yes
No
Change the MicroSD
S100
< Main Board - Top side > VDDG_2V85 (TP1) is same to 2.85V? No Change Main board
Yes
APP_GP_MMC_DETn(TP2) is same to 0 V?
No
Change Main board
Yes MicroSD works well? No Change main board Yes Finish
- 76 -
4. TROUBLE SHOOTING
4.5 Key and Touch Screen Trouble

4.5.1 Key Trouble
START
Press the key button
Key works well? No
Yes
Finish
Check key button. If Key button is pressed or appearance is abnormal, Change the key button.
works well? No
Yes
Finish
Check BtoB connector(CN2) Re-assemble CN2. Check connector soldering. Re-solder CN2.
works well? No Change the key FPCB.
Yes
Finish
works well? No Change Main Board
Yes
Finish
- 77 -
4. TROUBLE SHOOTING
1
Check key button. If Key button is pressed or appearance is abnormal, Change the key button.
CN2
2
Check BtoB connector(CN2) Re-assemble CN2. Check connector soldering. Re-solder CN2.
- 78 -
4. TROUBLE SHOOTING
4.5.2 Touch Screen Trouble

START
Reboot the phone
Touch screen works well? No Perform Touch Calibration
Yes
Finish
Touch screen works well? No
Yes
Finish
Check connector. CN400, CN901 Re-assemble or Re-solder. Yes
Touch screen works well? No
Finish
Check U404, U405, U406 and peripheral circuit. Re-solder U404, U405, U406 and peripheral circuit.
Touch screen works well? No Change touch window
Yes
Finish
Touch screen works well? No Change main board
Yes
Finish
- 79 -
4. TROUBLE SHOOTING
CN400
1
Check connector. CN400, CN901 Re-assemble or Re-solder.
CN901
Peripheral circuit U405
2
U406 U404
Check U404, U405, U406 and peripheral circuit. Re-solder U404, U405, U406 and peripheral circuit.
- 80 -
4. TROUBLE SHOOTING
4.6 Camera Trouble

Camera control signals are generated by DB3200 with ISP
4.6.1 5M Camera
START
Press END Key to turn on the power
NO Is the circuit powered?
Follow the Power On Trouble Shooting
YES Reconnect the 5M 24pin B to B connector
YES 5M Cameras Operation is OK?
NO Change 5M Camera
NO
Pin7 of U603 or C628=1.8V? Pin8 of U603 or C627=2.8V?
Change U603
YES
Change Main Board
5M Camera Works
- 81 -
4. TROUBLE SHOOTING
pin7
pin8
U603
CN600
C628 C627
< Main Board Top side >
ISP_AVDD_2V8 VBAT ISP_DVDD_1V8
R635 R625 APP_GP_ISP_LDO_EN 5.6K C629 1u 0
U603 1 VIN 2 EN1 3 EN2 4 NC1 C630 1u
RT9011-MGPQW 8 VOUT1 7 VOUT2 6 NC2 5 GND C628 1u C627 1u
PGND
C628
C627
- 82 -
4. TROUBLE SHOOTING
4.6.2 VGA Camera

VGA Camera control signals are generated by DB3200.
START
NO Is the circuit powered? YES Follow the Power On Trouble Shooting
1
Reconnect the 34pin B to B connector CN503 and VGA 34pin Camera Connector YES VGA Camera Operation OK? NO
NO
Pin33(TP1) of CN503) or pin 8 of U 601(TP2) =2.8V? Pin31(TP3) of CN503) or pin 7 of U 601(TP4)=1.8V?
Change U601
YES
C901(TP5) =2.8V? C900(TP6)=1.8V?
NO
Change VGA FPCB
YES NO
C913 (TP7) =1.5V?
YES
1
Check the CN 901 soldering status And resolder the CN 901.
VGA Camera works well.
- 83 -
4. TROUBLE SHOOTING
CN 503
CN901
VGA CAM FPCB (Top)
Main board (Bottom)
- 84 -
4. TROUBLE SHOOTING
2 TP1 (pin33)
34
TP3(pin31)
18
Main board (Bottom)
CN 503
1 17
TP4 (pin7)
U601 Main board (Top)
TP2 (pin8)
TP2 TP4
VBAT CAM_DVDD_1V8
CAM_AFVDD_2V8 CAM_AVDD_2V8
U601 1 VIN 2 EN1 3 EN2 4 NC1
PGND
C611
C612
C613
1u
C614
1u
- 85 -
4. TROUBLE SHOOTING
TP6
TP5 TP7
VGA CAM FPCB(Bottom)

CAM_DVDD_1V8
CAM_AVDD_2V8
TP6
TP5
A2 IOVDD B6 DVDD E5 AVDD DCLK HSYNC VSYNC DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 GND1 GND2 GND3 GND4 A3 D1 D2 B3 B1 B2 B4 C1 C2 C3 D4 A4 C4 E2 E3 R904 51 CI_PCLK CI_HSYNC CI_VSYNC CI_DATA[0] CI_DATA[1] CI_DATA[2] CI_DATA[3] CI_DATA[4] CI_DATA[5] CI_DATA[6] CI_DATA[7]
B5 C6 D3 C5 D6
EXTCLK PWRDWN RESET SDA SCL
U901 TCM9000MD
TP7
C901 0.1u C900 0.1u
C913 0.1u
F1
PGND
A5 VDD15_1 E4 VDD15_2
- 86 -
4. TROUBLE SHOOTING
4.7 Main LCD Trouble

LCD control signals are generated by DB3200.
START
Press END Key to turn on the power. NO Is the circuit powered? YES No Is the backlight on? 1
Follow the Power On Trouble Shooting
Reconnect the LCD FPCB 50pin(CN2) and 40pin (CN1) LCD connector. Or Change Key FPCB.
YES
Yes Is the backlight on? No 2 Yes Change the U604
LCD display OK? NO 1 Reconnect the LCD FPCB 50pin(CN2) and 40pin (CN1) LCD connector. Or Change Key FPCB.
The LCD works
3 No LCD display OK? Is the R600 (TP1) 1.8V? And Is the R601(TP2) 2.8V? Yes 5 The LCD works Is the LCD ID High? (CN1 Pin3 (TP3)) Yes No No Change LCD No Change the U600
Yes
Yes
IS the CN1 Pin11(TP4) Low? And Is the CN1 pin 19(TP5) high?
Change the main board
- 87 -
4. TROUBLE SHOOTING
1
Key FPCB CN 1
CN 2
Key FPCB 40 pin B to B Connector
Key FPCB 50 pin B to B Connector
U604
U600
Main board (Bottom)
- 88 -
4. TROUBLE SHOOTING
4
TP1 R600
U600 1 VIN 2 EN1 3 EN2 4 NC1 RT9011-MGPQW 8 VOUT1 7 VOUT2 6 NC2 5 GND VBAT
LCD_AVDD_2V8
TP1
LCD_DVDD_1V8
R600
U604 R601 TP2
PGND
APP_GP_LCD_ALDO_EN APP_GP_LCD_DLDO_EN
R653 R654
0 0 1u
R601
TP2
1u
C601
Main board (Bottom)

LDO for LCD Power
21
20
6
TP5 (pin19) TP4 (pin11)
40 CN 1
TP3 (pin3)
Key FPCB(Bottom)
- 89 -
C602
C603
1u
4. TROUBLE SHOOTING
4.8 Keypad Backlight Trouble
START
YES Keypad Backlight Works? NO NO VBAT applied? (TP1)
Keypad Backlight Works
Change Main Board
YES Check V at LD1000 or LD1001 or LD1002 or LD1003 is confirm (TP2) YES NO Change LD1000 or LD1001 Of LD1002 or LD 1003
Check V at R626(TP3)or R627(TP4) is confirm
NO Change Key FPCB
YES
Keypad Backlight Works
- 90 -
4. TROUBLE SHOOTING
LD1000
TP1
VBAT SSC-TWH104-HL LD1001 SSC-TWH104-HL LD1002 SSC-TWH104-HL LD1003
KEY_LED1
TP1
KEY_LED2 SSC-TWH104-HL
TP1
TP2
Key FPCB(Top)
- 91 -
4. TROUBLE SHOOTING
TP3
TP4
CN604
Main board (Bottom)
- 92 -
4. TROUBLE SHOOTING
4.9 Audio Trouble Shooting

4.9.1. Receiver
Signals to the receiver Receiver signals are generated at AB3100 BEARP, BEARN Receiver path : AB3100 (BEARP, BEARN) R322, R323 on main board Camera FPCB Receiver
Note : It is recommended that engineer should check the soldering of R, L, C along the corresponding path before every step.
- 93 -
4. TROUBLE SHOOTING
START
Connect the phone to network Equipment and setup call. Setup 1KHz tone out.
NO
Does the sine wave appear at TP1, TP2 ?
Change the main board
YES The sine wave not appear Does the sine wave appear at Number TP3, TP4 in the main Bd CN503? NO Change U301
YES
Does the sine wave appear at EAR(+) PAD(TP5) in LCD FPCB?
NO
Change the Camera FPCB
YES
Is the soldering of the receiver OK?
NO Resolder the Receiver
YES
Can you hear sine wave out of the receiver ?
NO Change the Receiver
YES
END
- 94 -
4. TROUBLE SHOOTING
TP2 1
Audio Subsystem
VBAT
C332 1u 1u
C333 1u
C334 0.1u
TP1
U301
EAR_R EAR_L SPKRP SPKRN C338 1u
C336
A3
B1 VDD
A4 A5
C1N C1P
PVDD
VSS
C5
HPR HPL
A1 A2
HS_EAR_R HS_EAR_L
C339 C342 C343 C344
1u 1u 18000p 18000p
B3 SDA C3 SCL 22p PGND GND C352 D3 D4 RXIN+ B4 RXINC354 1u 22p C353
TP1 Main PCB Bottom 2 34
TP2
Audio Subsystem
CN503 18
TP3 TP4
SYSCLK0 TOUCH_X+ TOUCH_XTOUCH_Y+ TOUCH_YTOUCH_Y- : GND line shielding to CN APP_GP_VGA_SDN APP_I2C_SDA APP_I2C_SCL CI_RES_n 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 CN503
C4
CAM_AVDD_2V8
CAM_DVDD_1V8
1 TP3 TP4
17
SPK_RCV+ SPK_RCV-
34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 C523 0.1u C525 0.1u
CI_DATA[0] CI_DATA[1] CI_DATA[2] CI_DATA[3] CI_DATA[4] CI_DATA[5] CI_DATA[6] CI_DATA[7] CI_HSYNC CI_VSYNC CI_PCLK
ENBY0040301 GB042-34S-H10-E3000
Main PCB Bottom
TP5
2 1 CN902
SPK_RCV+ SPK_RCV-
TP5 Camera FPCB Bottom
- 95 -
4. TROUBLE SHOOTING
1 2
Measured 1khz Sine Wave Signal
- 96 -
4. TROUBLE SHOOTING
4.9.2. Speaker (Voice Loud Speaker,Midi, MP3,Key Tone)
Signals to the speaker Speaker signals are generated at AB3100 SPKRP, SPKRN Speaker path : 1.AB3100 (SPKRP, SPKRN) 2. C343, C344 on the main board 3. U301(audio amp) on the main board 4. C352, C353 on the main board 5. Speaker
Note : It is recommanded that engineer should check the soldering of R, L, C along the corresponding path before every step.
- 97 -
4. TROUBLE SHOOTING
START
Connect the phone to network Equipment and setup call Setup 1KHz tone out
Does the sine wave appear at C343(TP1),C344(TP2)?
NO Change the main board
YES The sine wave not appear
Does the sine wave appear at U301 ? YES
NO Change the U301
Does the sine wave appear at R352(TP3),R353(TP4) ?
NO Change the U301
YES
Can you hear sine wave out of a speaker ?
NO Change each Speaker
YES
END
- 98 -
4. TROUBLE SHOOTING
TP3
TP4
U301
TP1 TP2
Audio Subsystem
VBAT
C332 1u 1u C336
C333 1u
C334 0.1u
TP1
C338 1u
A4 A5
C1N C1P
PVDD
VDD
VSS
TP3
HPR HPL A1 A2 HS_EAR_R HS_EAR_L
A3
C339 C342 C343 C344
1u 1u 18000p 18000p
TP2
B3 SDA C3 SCL 22p PGND D4 RXIN+ B4 RXINC354 1u 22p
B1
C5
TP4
GND
C352
D3
Audio Subsystem
C4
C353
- 99 -
4. TROUBLE SHOOTING
- 100 -
4. TROUBLE SHOOTING
4.9.3. Microphone (Voice call, Voice Recorder, Video Recorder)
Microphone Signal Flow MIC is enable by MIC Bias CCO, MIC1P, MIC1N signals to AB3100 Check Points Microphone bias Audio signal level of the microphone Soldering of components Signal from the mic MIC C625,C626 on main board AB3100
- 101 -
4. TROUBLE SHOOTING
START
Does not open Tx path about Mic?
No
Yes
Change the MIC
Yes
No Does it work properly ?
Yes
END
- 102 -
4. TROUBLE SHOOTING
1 MIC
- 103 -
4. TROUBLE SHOOTING
4.9.4. Headset Receiver (Voice call, Video Telephony,MP3 )

START
1
Insert Headset. Does the Headset icon display on the main LCD? NO Does the level of R502 (TP1) under 0.5Volt ? NO
YES
2
YES Change the U501
3
Resolder R502(TP1) And try
again from the start
YES
Insert Headset. Does the Headset icon display on the main LCD?
NO Does the sine wave appear at R339(TP2),R342(TP3) ? YES NO Change the main B,d
Does the sine wave appear at R505(TP4),R506(TP5) ?
NO
Change the U301
YES
Does the sine wave appear at TP6, TP7 at CN501 ?
NO
Change the U501
7
Resolder CN501 Pins or change the Headset
Can you hear sine wave out of the receiver ? YES
NO Change the main Bd
END
- 104 -
4. TROUBLE SHOOTING
4.9.5. Headset MIC(Voice call, Video Telephony )

START
1
Insert Headset. Does the Headset icon display on the main LCD? NO Does the level of R502 (TP1) under 0.5Volt ? NO
YES
2
YES Change the U501
3
Resolder R502(TP1) And try
again from the start
YES
Insert Headset. Does the Headset icon display on the main LCD?
Check the signal level at C505(TP8) at the putting Audio signal in MIC Change the main B,d NO
6
A few hundred of mV Of the signal measured at C505(TP8) ? NO Resolder C505(TP8) and try again. If fail again, Change the main Bd
YES
Change the main Bd
NO Does it work properly ?? Try again from the start
YES
END
- 105 -
4. TROUBLE SHOOTING
4.9.6. Headset
VBAT
MUIC
VBUS
TP1
1u
TP8 TP4
MIC2P HS_EAR_L HS_EAR_R C505 R505 R506 0.1u 10 10
D2 USB_DM USB_DP R501 APP_ACC_UART_RX APP_ACC_UART_TX R503 0 0
BAT
VB
D5 USW_DM USW_DP R502 R504 2.2K R507 R508 DNI DNI TI : PD = USB, PU = UART MAXIM : NA = USB, PU = UART C509 4.7u 0 VBAT USW_ID C504 1u
C503
A4 DN1 A5 DP2 B3 U1 A3 U2 A1 MIC D4 AUD1 D3 AUD2 ISET SCL SDA INT

TP602 A2
FB500 FB501 FB502 C506 C507 C508 22p 22p 22p
TP5
Close to MUIC
VDDE_1V8
C4 GND C3 IC
C2 C1 B2
If TI, then 10nF If Maxim, then 4.7uF
APP_GP_USW_SCL APP_GP_USW_SDA APP_GP_USW_INT
Audio Subsystem
R511
2.2K
VBAT
C332 1u 1u C336
C333 1u
C334 0.1u
A3
A4 C338 1u A5
C1N C1P
PVDD
VDD
VSS
TP2
B1
C5
TP7
HPR HPL A1 A2 HS_EAR_R HS_EAR_L
TP6
1 2 3 4 5
6
8
10 CN501 12
14
C339 C342 C343 C344
1u 1u 18000p 18000p
USW_DM USW_DP
USW_ID
7
9
TP3
11
13 15
B3 SDA C3 SCL 22p PGND GND C352 D3 C4 D4 RXIN+ B4 RXINC354 1u 22p C353
Audio Subsystem
- 106 -
4. TROUBLE SHOOTING
CN501 TP4 TP5
TP8
TP6 TP7
U501
U301 TP1
TP3 TP2
- 107 -
4. TROUBLE SHOOTING
4.10 Charger Trouble Shooting

Charging Circuit
VBUS Q300
S2
SIA911DJ
G2
D2
Charging
D4
D3
D1
S1
G1
CHREG
DCIO_INT VBAT_H R314 0 USB charging path VBAT 2012 1/4W 1% CHS+ R316 Route as a differential pair 0.1 CHS-
C330 22p D302

C1 1 A2 2 A1_C2 3
C331 33u
Discharging
BDATA C337 22p R320 300K
KDS221E_RTK
CN300 D1 1 2 3 D2
FGS+
2012 1/4W
1%
R324 0.025
Main Battery Charging Path Charging Procedure - Connecting TA and Charger Detection - Control the charging current by AB1000 - Charging current flows into the battery Check Point - Connection of TA - Charging current path - Battery Trouble shooting setup - Connect TA and battery to the phone Trouble Shooting Procedure - Check the charger connector - Check the Charging current Path - Check the battery
- 108 -
4. TROUBLE SHOOTING
start
Check the pin(TP1) and battery connect terminals of I/O connector
Connection OK?
NO
Change I/O connector
YES
Is the TA voltage(TP2) 5.1V?
NO
Change TA
YES
NO
3
Is the VBUS voltage(TP3) 5.1V?
Change Main board
YES
4 3
Is it charging properly after changing Q400(TP4)?
YES
END
NO
Change Main board
Trouble Shooting - Charging
- 109 -
4. TROUBLE SHOOTING
TP1
TP2
VBUS Q300
S2
SIA911DJ
G2
TP3
Charging
D2
TP4
D4
D3
D1
S1
G1
CHREG
DCIO_INT
Main Board ( Bottom side) - I/O connector and FET

VBUS
9
FM_ANT L500 C502 VA500
G2
G1
3
4 3 DRAIN CNTRL GND IN
U500 SRC GATE OUT VCC DRAIN_THERMAL NUS3065MUTAG 5 6 7 8 9
OUT IN 2 1 NFM21PC105B1A3 FL500 ZD500
TP2
82nH
DNI
ULCE0505C015FR
TP1
1 2 3 4 5
6
8
INSTPAR SD12T1G
10 CN501 12
14 CN500 1 2
C510
2012
C511
USW_DM USW_DP
USW_ID
1 uF
22p
TP3
Close by uUSB CONN
7
9
11
13 15
- 110 -
4. TROUBLE SHOOTING
4.11 Bluetooth Trouble

Bluetooth IC (STLC2593) gets power from PMIC (AB3100) and clock (MCLK) from RFIC. (RF3300) After checking them, Bluetooth RF path should be examined.
4.11.1 Bluetooth Power path

1 start TP1 TP2 1
1. Check BT IC Block TP1: 1.8V , TP2 : 2.75V
OK NG
2. Check Mainboard Connector TP3: 1.8V , TP4 : 2.75V
Go to 4.11.2
OK
Sub PCB
VDD_BT VDDK_2V75
NG
B2 C3 M8 C1 C2 M2 J4 BT_RSVR_CL1 BT_RSVR_CL2 BT_RSVR_D BT_RSVR_DSM BT_RSVR_N BT_RSVR_RF BT_REG_CTRL
Replace Sub PCB
TP1
R742 0
Check AB3100 (U300)
N7 BT_HVD E6 BT_VDD_CLD 0.1u C735
TP2
C736
0.1u
D4 NC1 F7 NC2 F8 NC3 L4 NC4
VDDE_1V8
VDDK_2V75
R638
TP4 (3rd pin from the end of the connector)

1 2 3 4 5
CN601 G1 G2 60 59 58 57 56
Main PCB (Bottom side)
TP3 (2nd pin from the end of the connector)
TP3
TP4
- 111 -
4. TROUBLE SHOOTING
4.11.2 Bluetooth Clock path

1 start
1
1. Check BTCLK (Buffered MCLKSEC) TP1: 26MHz
TP1 NG TP2
2. Check MCLKSEC TP2: 26MHz
OK
Go to 4.11.3
OK
Replace U730
Sub PCB
TP2
U730 SN74LVC1G125DRLR 5 1 _OE VCC 2 A 4 3 GND Y R731 C730 0.1u C731 4.7u 100K
NG
TP1
VDD_BT
3. Check Mainboard Connector TP3: 26MHz

R730 BT_CLK 33
BT_CLKREQ_n MCLKSEC
OK NG Check RF3300 (U111)
Replace Sub PCB
2 TP3 (4th pin from the end of the connector)

24 25 26 27 28 29 30 G3 G4 37 36 35 34 33 32 31
TP3
FM_ANT MCLKSEC RTCCLK
- 112 -
4. TROUBLE SHOOTING
4.11.3 Bluetooth RF path

TP1
FL730 5 DEA212450BT-7043C1 1 U_BP BP_DC 2 C732 100p BT_TXRX
TP1
4
BP1 BP2
VSS_BT_RF
6 3
TP2
G2 G1
TP2
ANT780 C700
DUMMY FEED
VDDK_2V75
R700
C701 100p
0 4.7nH R780 WIFI_TXRX BT_TXRX R701 ANT_SEL_N R781 0
FL700 XM0830SK-TL1301TMP 3 RFGND1 ANT 7 RFGND2 GND1 GND2 GND3 GND4 GND5 PGND 1 4 6 9 11 13
1p C702
DNI C704
8 PORT1 2 PORT2 12 10 VCTL VDD
C705 4p
C706 4p
WIFI_RF_G
WIFI_RF_G
C707 1u WIFI_RF_G VSS_BT_RF
WIFI_RF_G
start
Check Power level at BT IC Output (C732) with Spectrum Analyzer
No
TP1: Range 0 ~ 4dBm ?
Replace BT Chip (U731)
Yes
Check Power level at RF SW Output (C701) with Spectrum Analyzer
No
TP2: Range 0~4dBm ?
Replace RF Switch (FL700)
Yes
Replace ANT780
- 113 -
4. TROUBLE SHOOTING
4.12 Wi-Fi Trouble

Wi-Fi module (M710) gets power from 2 LDOs (U710, U711) and clock from oscillator inside the module. RF path is shared with Bluetooth RF.
4.12.1 Wi-Fi Power path

VBAT
TP1 TP2
TP1
R717 0
POWER
RP101K332D 4 VDD 3 CE C722 1u U710 1 VOUT 2 GND C721 1u PGND 5
TP2
R716 VDD_WLAN_3V3 0
ACC_GP_WLAN_EN
TP3
TP3
RP101K182D 4 VDD 3 CE U711 1 VOUT 2 GND C723 1u VDD_WLAN_1V8
C724 1u
Sub PCB
start
1. Check VBAT TP1: VBAT
No Yes
2. Check 1.8V LDO TP2: 1.8V
Change Sub PCB
No Yes
3. Check 3.3V LDO TP3: 3.3V
Replace U710
No Yes Go Next Step
Replace U711
- 114 -
PGND
4. TROUBLE SHOOTING
4.12.2 Wi-Fi RF path

TP1
C717 100p WIFI_TXRX
TP713
TP2
C725 DNI
WIFI_RF_G
1 2 3 4 5 6 7 8
GND1 ANT GND2 ANT_SEL_P SPI_SDO_S SCLK ESCN GND3
WIFI_RF_G
TP1
TP2
ANT780 C700
DUMMY FEED
VDDK_2V75
R700
C701 100p
0 4.7nH R780 WIFI_TXRX BT_TXRX R701 ANT_SEL_N R781 0
FL700 XM0830SK-TL1301TMP 3 RFGND1 ANT 7 RFGND2 GND1 GND2 GND3 GND4 GND5 PGND 1 4 6 9 11 13
1p C702
DNI C704
8 PORT1 2 PORT2 12 10 VCTL VDD
C705 4p
C706 4p
WIFI_RF_G
WIFI_RF_G
C707 1u WIFI_RF_G VSS_BT_RF
WIFI_RF_G
start
Check Power level at Wi-Fi module Output (C717) with Spectrum Analyzer
TP1: Range 13 ~ 17dBm at 802.11b?
No Replace Wi-Fi module (M710)
Yes
Check Power level at RF SW Output (C701) with Spectrum Analyzer
TP2: Range 13~17dBm at 802.11b ?
No Replace RF Switch (FL700)
Yes
Replace ANT780
- 115 -
4. TROUBLE SHOOTING
4.13 GPS Trouble

GPS IC (U751; BCM4750) gets power from a single 1.8V LDO (U752). Clock comes from TCXO (X750) and RFIC. (RF3300) After checking them, GPS RF path should be examined.
4.13.1 GPS Power path

1 TP1 TP4 1 TP3 TP2
1. Check Voltage at GPS IC TP1: 1.8V, TP2: 1.8V
start
TP1
KT2520F16369ACW18T 6 VCC NC2 OUT 5 4 C750 2.2u C751 0.1u R757 0
Sub PCB
VGPS_1V8
Yes No
VDDE_1V8
Power OK Go to 4.13.2
TP2
R750 0
2. Check Voltage at LDO TP3: 1.8V, TP4: VBAT
Yes No
V8 F2 CNTIN E7 YNC_PPS B6 VDDIO1 G3 VDDIO2 G7 VDDIO3 A3 LPREGIN F5 RTCCLK A2 TCXO C752 1u C4 RFREGIN
Change Sub PCB
2
3. Check Mainboard Connector TP5: VBAT
C6
BMS0
VPD
D5
VBAT
TP4
RP101K182D 4 VDD 3 CE U752 1 VOUT 2 GND 1u R755 PGND
TP3
VGPS_1V8 0
Yese No Check AB3100 (U300)
Change U752
1u
C765
2
VBAT
C766
R644
100K
CN601 G1 G2 1 2 3 4 5 60 59 58 57 56
TP5 (2nd and 3rd pin from the end of the connector)
TP5
- 116 -
4. TROUBLE SHOOTING
4.13.2 GPS Clock path
4.13.2 GPS Clock path

start
1 TP2 TP1 1 TP3

1. Check TCXO output TP1: 16.369MHz
No Yes
Replace X750
Sub PCB
X750 1 2 3 GND1 NC1 GND2 KT2520F16369ACW18T 6 VCC NC2 OUT 5 4 R757 0
2. Check Buffered MCLKSEC TP2: 26MHz
TP1
Yes
No
C750 2.2u
C751 0.1u
Go to 4.11.3
3. Check MCLKSEC TP3: 26MHz
VDDE_1V8
F5 CCLK A2 TCXO
F2 NTIN E7 _PPS
OK
VDDE_1V8
Replace U750
NG
GPS Clock Buffer

U750
NL17SZ126XV5T2G ACC_GP_GPS_PON MCLKSEC OE A VCC
R752 10
C753 0.1u
C754 2.2u
4. Check Mainboard Connector TP4: 26MHz
OK
R753 Y 33 100K R754 GPS_CNTIN
GND
NG Check RF3300 (U111)
Replace Sub PCB
TP3
TP2
2 TP4 (4th pin from the end of the connector)
TP4
24 25 26 27 28 29 30 G3 G4 37 36 35 34 33 32 31
FM_ANT MCLKSEC RTCCLK
- 117 -
4. TROUBLE SHOOTING
4.13.3 GPS RF path

start
1 1
1. Check GPS Antenna pad contact
2 2. Change the LNA (U750)
2 3 3 3. Change GPS IC (U751)
Change the sub PCB
VGPS_1V8
VDDE_1V8
2.2nH L770
10 R770
R750 0
C771 0.1u
2.2u C770
3
D5 VPD F1 TESTMODE RFIN B1 E2 RFREGOUT D2 VDDRF E1 RFSREGOUT D1 VDDIFSYNTH F6
C752 1u
10nH L771
2
1 S_D L750 6.8nH 5 VDD 4 FIL_OUT 0.5p
ACC_GP_GPS_PON R772 0
1
2.2nH C755 CN750 1 CN751 1 C757 C758 100nH
C760 1u
_LPREGOUT
C756
C759 1u
GPS LNA block
- 118 -
NA
U770 ALM-1612
L772 100nH
100p C772
2 RF_IN 3 GND
4. TROUBLE SHOOTING
4.14 RF Component
U109 FL106 FL105 U100 U102 FL100 FL102 U107 FL103 U111 FL104 X100
U101
Main Board : Top side
Reference FL100 FL102 FL103 FL104 FL105 FL106 SW100
Description WCDMA BC 1 Duplexer WCDMA BC 8 Duplexer GSM High Band Rx Filter GSM Low Band Rx Filter WCDMA BC 8 Tx Filter WCDMA BC 1 Tx Filter RF Mobile Switch
Reference X100 U100 U101 U102 U107 U109 U111
Description X-tal Power Detector GSM PAM with ASM WCDMA BC 1 PAM WCDMA BC 8 PAM DCDC Converter RF Transceiver
- 119 -
4. TROUBLE SHOOTING
4.15 Procedure to check

start
Oscilloscope setting
1. Check Power Source Block
2. Check VCXO Block
3. Check Ant. SW Module
Agilent 8960 : Test mode (WCDMA) Ch. 9750 (Uplink) Ch. 10700 (Downlink)
4. Check WCDMA Block
Agilent 8960 : Test mode (GSM) Ch. 190, P.L. 7 level setting Ch. 190, -60dBm setting
5. Check GSM Block
Redownload SW, Cal
- 120 -
4. TROUBLE SHOOTING
4.16 Checking Common Power Source Block
WCDMA DC/DC VBAT
Step 1 PAM VBAT Block
Step 2 GSM PAM Block Step 3 WCDMA PAM Block GSM PA VBAT
Main Board : Top side - Common Source Block
- 121 -
4. TROUBLE SHOOTING
4.16.1 Step 1
TP1
TP5 TP3 TP4
TP2 Main Board (Top side) - Step 1 : VBAT Block Main Board (bottom side) - Power Source Block
VBAT_H R314 0 USB charging path
VBAT 2012 1/4W 1% CHS+ R316 Route as a differential pair 0.1 CHS-
C330 22p D302

C1 1 A2 2 A1_C2 3
C331 33u
Discharging
TP1 TP3 TP4

BDATA
KDS221E_RTK
C337 22p
R320 300K
TP2
CN300 D1 1 2 3 D2
- 122 -
4. TROUBLE SHOOTING
Step 1 Check Point (TP1) in
3.7V OK?
No
Power Source Block Yes To Check Power source to Check if main power source input or not Proceed to the Step 2
Check Point (TP2) in Power Source Block To Check Power source

3.7V OK? Yes
No
Check the Power Supply
Check (TP1 & TP2) in Block to check inner line connection From TP4 to TP3
Short? Yes
No
Change Board
Soldering Check Component (CN300) In Power Source Block
- 123 -
4. TROUBLE SHOOTING
4.16.2 Step 2
TP1
TP4 TP5 TP3
GSM PAM (Bottom) Figure 4-6. Step 2 : GSM PAM Block TP2 Main Board (bottom side) - Power Source Block
TP3
TP4
VBAT
TP5
C108 0.01u
PGND1 31 PGND2 32 PGND3 33 PGND4 34
30 29 28 27 26 25 24 23 22 21 12 11 2 GTX_850_900 GTX_1800_1900 ANTSW2 ANTSW1 R111 R112 0 0 C129 22p C130 22p
GND13 GND12 GND11 GND10 GND9 GND8 GND7 GND6 GND5 GND4 GND3 GND2 GND1
VBATT VAPC
C107 10u
C109 47p
5 4 C112 C113 C114 22p 33p 22p GRX_850 GRX_900 GRX_1800 GRX_1900 R108 DNI WRF_BAND_2 WRF_BAND_8_5 WRF_BAND_1
R105 R106 DNI
GTX_VAM
WCDMA3 20 WCDMA2 19 WCDMA1 18
U101
RX1 16 RX2 15 RX3 14 RX4 13 RSVD MODE _TXEN ANT 10

G2
SW100
KMS-518
G1 C A
9 8 C125 17 C126 DNI 22p
SKY77521
ANTSW0 ANTSW3
R114 R115
0 0 C139 22p C140 22p
GSM PA WITH ASM
- 124 -
4. TROUBLE SHOOTING
Step 2 Check VBATI (TP3,TP4,TP5) in GSM PAM Block to Check if main power source input or not
3.7V OK? Yes
No
Proceed to the Step 3
Check Point (TP1) in Power Source Block To Check Power source Check (TP1&TP3,TP4,TP5) in Block to check inner line connection From TP1 to TP3,TP4,TP5
Short? Yes 3.7V OK? Yes
No
No
Change Board
- 125 -
4. TROUBLE SHOOTING
4.16.3 Step 3
TP1
TP3
TP4
TP5
TP2 Main Board (bottom side) Step 3 :WCDMA PAM Block - Power Source Block
Step 3 Check VBAT (TP3) in WCDMA PAM Block
3.7V OK? Yes
No
See the Next Page
Check Point (TP1) in Power Source Block To Check Power source

3.7V OK? Yes
No
Check (TP1 & TP3) in Block , to check inner line connection From TP3 to TP1
No Short ? Yes
Change Board
- 126 -
4. TROUBLE SHOOTING
4.16.4 Checking VCC
AB3100
TP2
TP1 Main Board (Bottom side) : Power for Radio ASIC
TP1
VDDA_2V8 VDDD_2V65 VDDE_1V8 VDIGRAD_1V8 VBAT VBAT R302 R303 R304 R305 0 VDDA_2V8 0 VDDD_2V65 0 VDDE_1V8 0 VDIGRAD_1V8 to RF3300 digital C302 2.2u C303 2.2u C304 2.2u VDDC_2V65 OA_OUT C12 EXT_LDO
L12 G14 K13
to RF3300 Power Detector to AB3100 CODECs/ADC/PLL to All I/O Supplies and Memory
AB3100
EXT_LDO
VDDH_2V75
VDDF_2V5
VDDG_2V85
VDDK_2V75
TP2
OD OUT
Check Point VRADA_2V8 (TP1) Check Point VDIGRAD_1V8 (TP2)
2.8V OK?
No Yes
Check the AB31000
1.8V OK?
No Yes Common Input Power is OK See The Next Part
Check the AB31000
- 127 -
4. TROUBLE SHOOTING
4.17 Checking VCXO Block

The reference frequency (26MHz) from U111(Transceiver RF3300) is used WCDMA TX part and BB part, Bluetooth part. Therefore, 3 test points in the following figure should be checked.
U201 Digital Base Band
X100
DB3200
Crystal
RF3300
U111 Transceiver
Main board : bottom side
Main board : Top side
Notebook to send TP command Oscilloscope
Phone
Connection for Checking VCXO Block
- 128 -
4. TROUBLE SHOOTING
Check 1. Crystal and RF3300 (Transceiver) part If you already check this crystal part, you can skip check 1
TP1
Test Point (Crystal Part)

RF_CTRL_STR_1 RF_CTRL_DATA RF_CTRL_CLK TESTOUT MCLKREQ MCLK R148 DNI 10 11 12 STR DATA CLK
R144

4
TN4-26562 26MHz
RF3300
R149
R150
X100
20 MCLKSEC 21 VCCD 23 WTXLP 24 WTXIN 25 WTXQP 26 WTXQN D9
TP1
DNI
Schematic (Crystal Part)
Figure 4-15. 26MHz at TP1
DNI
- 129 -
4. TROUBLE SHOOTING
Check 3. 26MHz at BB part
TP1
Test Point (Crystal Part) Figure 4-18. Test point (26MHz at BB part) Test Point (Crystal Part)
RF_CTRL_STR_1 RF_CTRL_DATA RF_CTRL_CLK TESTOUT MCLKREQ MCLK R148 DNI 10 11 12 STR DATA CLK
MCLK
RF3300
MCLK RTCCLK BT_CLKREQ_n MCLKREQ SYSCLK0 SYSCLK1 USB_XTAL1 ACC_IRQ_n APP_IRQ_n R200 3.3K
DB3200
E17 A15 B18 B17 A18 A17 A19 C19 C20 MCLK RTCCLKIN SYSCLKREQN MCLKREQ SYSCLK0 SYSCLK1 SYSCLK2 MSACCIRQN MSAPPIRQN
R144

4
TN4-26562 26MHz
R149
R150
X100
20 MCLKSEC 21 VCCD 23 WTXLP 24 WTXIN 25 WTXQP 26 WTXQN ND9
DNI
TP1
Figure 4-19. Schematic (26MHz at BB Part)
DNI
Figure 4-20. 26MHz at TP1
- 130 -
4. TROUBLE SHOOTING
Check TP1 Refer to Figure 4-15 Yes
Checking No 1, 3 26MHz at VCXO
VCXO part has a problem. Changing XTAL or U111
VCXO part is O.K. Check next stage
- 131 -
4. TROUBLE SHOOTING
4.18 Checking Front End Module Block
<Top>
Antenna Switch Module (+ GSM/EDGE PA)
TP1 TP2 TP3 TP4
Figure 4-21. Front End Module Block
TP4
GTX_850_900 GTX_1800_1900 ANTSW2 ANTSW1 R111 R112 0 0 C129 22p C130 22p LB_RF_IN 3 HB_RF_IN 1 BS2 6 BS1 7 MODE _TXEN ANT 9 8 17
SKY77521
TP3
0 0 C139 22p C140 22p
TP2 TP1
ANTSW0 ANTSW3
R114 R115
- 132 -
4. TROUBLE SHOOTING
4.19 Checking Front End Module Block input logic

4.19.1 Mode Logic by TP Command
WCDMA 2100 ANTSW3 WCDMA 900
ANTSW1
ANTSW0/2
GSM850/EGSM Tx ANTSW0/1
DCS/PCS Tx
ANTSW2
ANTSW3
GSM850 Rx ANTSW0
EGSM Rx
ANTSW2
ANTSW3
DCS Rx ANTSW0
PCS Rx
ANTSW2
ANTSW3
- 133 -
4. TROUBLE SHOOTING
Table 4-1. Front End module Logic
- 134 -
4. TROUBLE SHOOTING
4.19.2 Checking Switch Block power source

Before Checking this part, must check common power source (through AB3100) part
TP Command MODE=3 SWRX=190,3
No
Check Soldering It is necessary to check short condition. Using Tester. Check 3 capacitors ANTSW0(TP2),ANTSW1(TP3) ANTSW2(TP4)
Open?
Yes
Check soldering (C106)
High?
Check ANTSW0(TP2) To check Switch input power source
No
OK?
No
Resoldering
Yes
Yes
Check each mode By TP command
Change the Board
- 135 -
4. TROUBLE SHOOTING
A. GSM850 Rx mode
GSM850 Rx MODE=3 SWRX=190,3 ANTSW0 High Low
ANTSW2
ANTSW3
Low
Figure 4-22-1. GSM850 Rx Mode
No
GSM850 Rx Logic OK? 4.17 part Check OK?
No
Try 4.17 part
Yes
Yes
See the Next mode (EGSM Rx Mode)
Change the Board
- 136 -
4. TROUBLE SHOOTING
B. EGSM Rx mode
EGSM Rx MODE=0 SWRX=49,3 ANTSW0 High ANTSW2
Low
ANTSW3
High
Figure 4-22-2. EGSM Rx Mode
No
EGSM Rx Logic OK? 4.17 part Check OK?
No
Try 4.17 part
Yes
Yes
See the Next mode (GSM850/EGSM Tx Mode)
Change the Board
- 137 -
4. TROUBLE SHOOTING
C. GSM850/EGSM Tx mode
GSM850/EGSM Tx MODE=3 SWTX=190,64,7
ANTSW0/1
Low
ANTSW2
Low
High ANTSW3
Figure 4-23.GSM850/EGSM Tx Mode
No
GSM850/EGSM Tx Logic OK? 4.17 part Check OK?
No
Try 4.17 part
Yes
Yes
See the Next mode (DCS Rx Mode)
ANTSW0/1:Low ANTSW2:Low ANTSW3:High WON : Low
No
Change the Board
Yes
Change U101
- 138 -
4. TROUBLE SHOOTING
D. DCS Rx mode DCS Rx MODE=2 SWRX=699,3
ANTSW0 High
ANTSW2
High
Low ANTSW3
Figure 4-24. DCS Rx Mode
No
DCS Rx Logic OK? 4.17 part Check OK?
No
Try 4.17 part
Yes
Yes
See the Next mode (DCS Tx Mode)
Change the Board
- 139 -
4. TROUBLE SHOOTING
E. PCS Rx mode
PCS Rx MODE=1 SWRX=661,3
ANTSW0
High
High ANTSW2 High ANTSW3
Figure 4-25. PCS Rx Mode
No
PCS Rx Logic OK? 4.17 part Check OK?
No
Try 4.17 part
Yes
Yes
See the Next mode (PCS Tx Mode)
Change the Board
- 140 -
4. TROUBLE SHOOTING
F. DCS / PCS Tx mode
DCS / PCS Tx MODE=2 SWTX=1,699,0
ANTSW0/1
Low
ANTSW2
High
ANTSW3
High
Figure 4-26. DCS / PCS Tx Mode
No
DCS Tx Logic OK? 4.17 part Check OK?
No
Try 4.17 part
Yes
Yes
WCDMA1900 Mode
Change the Board
- 141 -
4. TROUBLE SHOOTING
G. WCDMA 2100 mode
WCDMA2100 Mode MODE=4 WTXC=10700,1,890,903,542,557
ANTSW3 Low ANTSW1
High
ANTSW0/2
Low
Figure 4-27-1. WCDMA2100 Mode
No WCDMA2100 Logic OK? Yes 4.17 part Check OK? Yes
No Try 4.17 part
WCDMA900 Mode
Change the Board
- 142 -
4. TROUBLE SHOOTING
H. WCDMA 900 mode
WCDMA900 Mode MODE=11 WTXC=3012,1,890,903,542,557
ANTSW3 High ANTSW1
Low
ANTSW0/2 Low
Figure 4-27-2. WCDMA900 Mode
No WCDMA900 Logic OK? Yes 4.17 part Check OK? Yes
No Try 4.17 part
Input Signal and Power to Front End Module block is OK. See the Next Page
Change the Board
- 143 -
4. TROUBLE SHOOTING
4.20 Checking WCDMA Block

start
1. Check VCXO Block
2. Check Front End Module
3. Check Control Signal
4. Check RF TX Level
5. Check PAM Block
6. Check RF RX Level
Re-download SW, Cal
- 144 -
4. TROUBLE SHOOTING
4.20.1 Checking VCXO Block

Refer to 4.17
4.20.2 Checking Ant. SW module

Refer to 4.18
4.20.3 Checking Control Signal

First of all, control signal should be checked. (data, clk, strobe)
TP3 [RF_CTRL_CLK] TP2 [RF_CTRL_DATA] TP1 [RF_CTRL_STR1]
Bottom View
Figure 4-28-1. Test points (Control Signal)
- 145 -
4. TROUBLE SHOOTING
TP1 [RF_CTRL_STR1]
RF_CTRL_STR_1
6 EDATAC 7 EDATASTR 8 EDATAA 9 EDATAB 10 STR DATA CLK
DNI R141
RF3300
TP2 [RF_CTRL_DATA]
RF_CTRL_DATA
11 12
TP3 [RF_CTRL_CLK]
RF_CTRL_CLK
U1 RF3
Figure 4-28-2. Schematic (Control Signal)
Notebook to send TP command Oscilloscope
Phone
Figure 4-29. Connection for Checking Control Signal
- 146 -
4. TROUBLE SHOOTING
TP1 (RF_CTRL_STR1) TP2 (RF_CTRL_DATA) TP3 (RF_CTRL_CLK)
TP1 (RF_CTRL_STR1) TP2 (RF_CTRL_DATA) TP3 (RF_CTRL_CLK)
Figure 4-30. Control Signal

TP Command MODE=4 WTXC=9750, 1,754,643,418,568 SYCT=9750
Check TP1, TP2, TP3. Check shape and pk-pk level Refer to Figure 4-30
No
Similar ?
Download the SW If signal is not OK even after downloading, Change the U201
Yes
Control Signal is O.K. Check next stage
- 147 -
4. TROUBLE SHOOTING
4.20.4 Checking RF TX Level
<Top side>
TP2 [WBAND 1 PAM Input] TP4 [RF3300 Output BAND 1]
TP1 [WBAND 8 PAM Input]
TP3 [RF3300 Output BAND 8]
<Bottom side>
TP7 Ant.
TP5 FEM Output
TP6 Ant. SW
Figure 4-31. Test point (RF TX Level)
- 148 -
4. TROUBLE SHOOTING
TP3 [RF3300 Output BAND 8]
WTXLB
35 R151 0 C185 DNI

FL105 SAFEB897MAM0F00 1
G1 G2 G3
GND15 GND16
R158
34
DNI
PGND
57
R161 0 C187 DNI
3 1
G3 IN OUT G1 G2
R162
NCEIVER
R165 0 C191 DNI
G3 IN OUT G1 G2
R166
TP4 [RF3300 Output BAND 1] TP6 Ant. SW
R108 RSVD MODE _TXEN ANT 10
DNI
SW100
KMS-518
G2 G1 C A
9 8 C125 17 C126 DNI 22p
R155 DNI
31 WTXHB3 33 WTXHB2 29 WTXHB1
IN
OUT
R152
0 WTX_BAND_8_5_TO_PA
521
TP5 FEM Output
TP7 Ant.
- 149 -
4. TROUBLE SHOOTING
Notebook to send TP command Spectrum Analyzer
Phone
Fig. 4-32 Connection for Checking RF TX Level
Fig. 4-33-1 Output Level at PAM Input ( TP1&TP2)
Fig. 4-33-2 Output Level at RF3300 Output ( TP3&TP4)
- 150 -
4. TROUBLE SHOOTING
Fig. 4-33-3 Output Level at FEM Output (TP5)
Fig. 4-33-4 Output Level at RF test connector ( TP6)
Fig. 4-33-5 Output Level at TP7 .Ant
- 151 -
4. TROUBLE SHOOTING
To verify that the phone fulfils requirements on maximum output power.
Set the FDD Test of the Agilent 8960 Set the Maximum Power
TP Command MODE=4 WTXC=9750, 1,754,643,418,568 SYCT=9750 TFTI=9750
Check output power at the TP6 with antenna Cable. Refer to Figure 4-33-4
TP6 About 22~23dBm?
Yes
TP7 About 19dBm? No The L102 will be broken. Change the L102
Yes
RF TX Level is OK Check next stage
No
Check the power at the TP7.Ant with probe. Refer to Figure 4-33-5
Check the power at the TP5 with probe. Refer to Figure 4-33-3
TP5 About 15dBm? No
Yes The SW100 has any problem. Change the SW100
Check the power at the TP1/TP2 with probe. Refer to Figure 4-33-1
TP1&TP2
About -6dBm? No The U111 will be not operated. Change the board
Yes The U102 has any problem. You have to check PAM block.
- 152 -
4. TROUBLE SHOOTING
4.20.5 Checking PAM Block

WPAM input (R162, R152)
DC/DC converter
WCDMA band1 PAM
Bias_CTRL (C115, C157)
VCC_PA (C103, C155) from DC/DC Duplexer Output (L601, C152)
WCDMA band8 PAM Figure 4-34. Test points of WCDMA TX PAM block
- 153 -
4. TROUBLE SHOOTING
TP Command -mode =5 - WTXC=9750, 1,754,643,418,568
Check Duplex output (L601, C152) To Check PAM output
No 22dBm ? Level < -10dBm? Yes
No
Download the SW & Calibrate
Yes
WCDMA PAM is OK See the Next page
Check R162, R152 To Check PAM Input level
Level >2dBm No Yes
Check the WCDMA RF Tx Chip (RF3300)
Check C115, C157 To Check PAM control signal from AB3100 (Bias_CTRL) Check C103, C155 To Check PAM VCC BIAS from DC/DC converter (VCC_WPA)
1.1V at Po_max? Yes
No
Check the RF3300 to WCDMA PAM Signal line
3.4V ? No Yes
Change the DC/DC
Change The PAM
- 154 -
4. TROUBLE SHOOTING
4.20.6 Checking RX I,Q

To verify the RX path you have to check the pk-pk level and the shape of the RX I,Q.
WRX_I_P (PIN 4) WRX_I_N (PIN 3) WRX_Q_P( PIN 2) WRX_Q_N( PIN 1)
Figure 4-35. RF3300, WCDMA Transceiver (Bottom)
About 2 MHz
Feed a CW signal at 2142MHz with a power level of 60dBm. Figure 4-36-1. RX I,Q signal (CW:2142MHz)
WRX_Q_P (PIN 2) WRX_Q_N (PIN 1) WRX_I_P (PIN 4) WRX_I_N (PIN 3)
Figure 4-36-2. RX I, Q signal
- 155 -
4. TROUBLE SHOOTING
Set the CW Mode of the Agillent 8960 Feed a CW signal at 1950MHz Set the RX Continuous mode
TP Command MODE=4 WRXC=9750
Check the pk-pk level at PIN 1, PIN 2, PIN 3, PIN 4 With Oscilloscope. Refer to Figure 4-36-1
No About 130mVp-p? Change RF3300 (U111)
Yes Check the Mean level at PIN 1, PIN 2, PIN 3, PIN 4 With Oscilloscope. Refer to Figure 4-36-1 No About 160mV? Change RF3300 (U111)
Yes Check the frequency at PIN 1, PIN 2, PIN 3, PIN 4 With Oscilloscope. Refer to Figure 4-36-2 No About 2MHz? Change RF3300 (U111)
Yes Verify whether the signal was similar as Figure 4-36-2 with Oscilloscope. No Similar? Change RF3300 (U111)
Yes
Check Next Stage
- 156 -
4. TROUBLE SHOOTING
4.21 Checking GSM Block

start
1. Check VRAD_2V8
2. Check VCXO Block
3. Check FEM Module
4. Check Control Signal
5. Check RF TX Path
6. Check RF RX Path
Figure 4-37-1. GSM Block (Bottom)
Re-download SW, Cal
- 157 -
4. TROUBLE SHOOTING
4.21.1 Checking Regulator Circuit

Refer to 4.16 Checking Power Source block IF you already check this point while checking power source block (4.15), You can skip this test.
4.21.2 Checking VCXO Block

Refer to 4.17 Checking VCXO block IF you already check this point while checking VCXO block (4.17), You can skip this test.
4.21.3 Checking Front End Module

Refer to 4.19.2 Checking Ant. SW Module IF you already check this point while checking Ant. SW module (4.19.2), You can skip this test.
- 158 -
4. TROUBLE SHOOTING
4.21.4 Checking Control Signal

Test Program Script MODE=3 SWTX=190,7,1024,1
Figure 4-38. Test points of RF control signals RF_CTRL_CLK (PIN12) RF_CTRL_DATA( PIN11) RF_CTRL_STRB (PIN10)
RF3300 GSM PAM
STRB CLK DATA
Figure 4-39. GSM RF Control signal
- 159 -
4. TROUBLE SHOOTING
Check PIN10,PIN11,PIN12 of RF3300. Check if there is any Major difference. Refer to Figure 4-39 No No
Similar? Yes
Short? Yes Change the board
Re-download SW
Control signal is OK. See next page to check
- 160 -
VBAT
1930 1990 MHz
GSM/EDGE HB WRxIA
LNA
WRxIB
1805 1880 MHz
GSM/EDGE HB
LNA
0 90
WRxQA WRxQB
925 960 MHz
GSM/EDGE LB
LNA LNA LNA

EDataStr
869 894 MHz
GSM/EDGE LB
WCDMA HB
A
EDataA WCDMA HB
VAPC
EDataC WCDMA LB
LNA LNA
D A
EDataB
D
VCO VCO
ANT
A. GSM Tx path Level
ESD
PA 2.75 V VRAD
GSM850/ 900 Input
824 915 MHz
GSM/ EDGE LB
N.M
PA VBAT
PWM/PFM WDCDCREF
DCS/PCS Input
1710 1910 MHz
GSM/ EDGE HB
4.21.5 Checking RF Tx Path
+
LPF ChP PhD
XO

DAC DAC VccWPA
Switch Control Logic En RFCtrl1
DAC
GSM/EDGE AM
1.8 V VIO
+
DAC RFCtrl1
UL: 1920 1980 MHz DL: 2110 2170 MHz

FB
VccWPA
RFCtrl1
CLK
RADCLK DATA STROBE RADDAT RADSTR
LPF
RFCtrl2
ChP
PhD
Serial Control
RFCtrl2
Power coupler
DET Bias En
VCO
WCDMA HB
- 161 N.M
VccWPA
WCDMA HB WCDMA HB
UL: 1749.9 1784.9 MHz DL: 1844.9 1879.9 MHz
WTxIA WTxIB
0 90
WTxQA WTxQB
Power coupler
DET Bias En
UL: 830 840 MHz DL: 875 885 MHz VccWPA

XOn
WCDMA LB
MCLK
MCLKSec
2.75 V VRAD
XOp
26MHz X-tal
XO
CLKREQ

DET Bias En
RF Pow det Det

En
WPOW_DET_EN
4. TROUBLE SHOOTING
4. TROUBLE SHOOTING
(Top)
PIN 6,7,8,9
(Bottom)
Figure 4-41. Test Points of GSM850/EGSM/DCS/PCS Tx Path
- 162 -
4. TROUBLE SHOOTING
B. GSM Tx Output Level Check
Figure 4-42. GSM850/EGSM/DCS/PCS Tx Level at Test Program Script 1. GSM850 Tx MODE=3 SWTX=190,64,5,1024,1 2. EGSM Tx MODE=0 SWTX=49,5,1024,1 3. DCS Tx MODE=2 SWTX=699,0,1024,1 4. PCS Tx MODE=1 SWTX=661,0,1024,1
v Agilent 8960 Setting : GSM BCH+TCH Mode v Oscilloscope Setting Check GSM850/EGSM/DCS/PCS output power at . No Check if there is any Major difference. Similar? Refer to Figure 4-42. GSM850>32dBm Yes EGSM>32dBm DCS>29dBm PCS>29dBm GSM850/EGSM/DCS/PCS Tx path OK. See Chapter 4.8.6 to check Rx path
See Next page to check Tx path
- 163 -
4. TROUBLE SHOOTING
C. GSM RF Transceiver Check
`
DCS/PCS Tx (R129) Vapc (PIN 52)
GSM Tx (R134)
RF3300 (U111)
Figure 4-43. GSM850/EGSM/DCS/PCS Transceiver (RF3300)
Check GSM RF Transceiver Output power at .
GSM850/EGSM/DCS/PCS >5dBm Yes See Next page to check Tx path
No
Redownload SW
- 164 -
4. TROUBLE SHOOTING
D. GSM PAM Check
(Top)
Vapc (PIN 52) GSM850/EGSM/ DCS/PCS Tx (C125)
(Bottom)
GSM/EDGE PAM (+Ant. SW) U101
Figure 4-44-1. Test points of GSM850/EGSM/DCS/PCS Tx
Check Vapc level. Check if there is any Major difference. Refer to Figure 4-44-1
GSM850/EGSM>1.5 V? DCS/PCS>1.3 V? Yes GSM850/EGSM:32.0dBm DCS/PCS: 30.0dBm Yes GSM Tx path OK. See Next page to check
No
Redownload SW, Cal
Check GSM850/EGSM/DCS/PCS PAM output power at C111.
No
Changing GSM PAM (U100)
- 165 -
DCS/PCS : -51.7dBm
VBAT

WRxIA
1930 1990 MHz
GSM/EDGE HB
LNA
WRxIB
1805 1880 MHz
GSM/EDGE HB
LNA
0 90
WRxQA WRxQB
925 960 MHz
GSM/EDGE LB
LNA LNA LNA

EDataStr
4. TROUBLE SHOOTING
869 894 MHz
GSM/EDGE LB
A. GSM Rx path Level
WCDMA HB
A
EDataA WCDMA HB
VAPC
EDataC WCDMA LB
LNA LNA
D A
EDataB
D
VCO
4.21.6 Checking RF Rx Path
ANT
ESD
PA
GSM850/ 900 Input
824 915 MHz
GSM/ EDGE LB
VCO
N.M
2.75 V VRAD
PA
DCS/PCS Input
1710 1910 MHz
GSM/ EDGE HB
VBAT
PWM/PFM WDCDCREF
+
LPF ChP PhD
XO

DAC DAC VccWPA
Switch Control Logic En RFCtrl1
DAC
GSM/EDGE AM
1.8 V VIO
+
RFCtrl1
DAC
CLK RADCLK DATA STROBE RADDAT RADSTR
UL: 1920 1980 MHz DL: 2110 2170 MHz

FB
VccWPA
RFCtrl1
Figure 4-45. GSM/DCS/PCS Rx Path Level

LPF ChP PhD
- 166
RFCtrl2
Serial Control
RFCtrl2
Power coupler
DET Bias En
VCO
WCDMA HB
UL: 1749.9 1784.9 MHz DL: 1844.9 1879.9 MHz
N.M
WTxIA WTxIB

VccWPA
WCDMA HB WCDMA HB
0 90
WTxQA WTxQB
Power coupler
DET Bias En
UL: 830 840 MHz DL: 875 885 MHz VccWPA

XOn
WCDMA LB
MCLK
MCLKSec
2.75 V VRAD
XOp
XO
CLKREQ
RF Pow det Det

En
WPOW_DET_EN
DCS : -50dBm
PCS : -50dBM
EGSM : -50dBm
GSM850 : -50dBm
GSM850/EGSM : 51.5dBm
4. TROUBLE SHOOTING
(Top)
GSM Transceiver RF3300 U111
(Bottom)
GSM8 EGSM DCS PCS 50 Rx Rx Rx Rx
GSM/EDGE PAM U101
Figure 4-46. Test Points of GSM/DCS/PCS Rx
Test Program Script 1. GSM850/EGSM Rx SWRX=3,190,5,1024,1 (GSM850) SWRX=0,65,5,1024,1 (EGSM) 2. DCS/PCS Rx SWRX=2,700,0,1024,1 SWRX=1,700,0,1024,1
(DCS) (PCS)
v Agilent 8960 Setting CW Mode GSM850 : -50dBm@Ch190(881.6MHz) EGSM : -50dBm@Ch65(948MHz) DCS : -50dBm@Ch700(1842.8MHz) PCS : -50dBm@ch700(1967.8MHz) v Oscilloscope Setting
- 167 -
4. TROUBLE SHOOTING
B. GSM RF Level Check
(Top)
GSM Transceiver RF3300 U111
(Bottom)
GSM8 EGSM DCS PCS 50 Rx Rx Rx Rx
GSM/EDGE PAM U101
Figure 4-47. GSM850/EGSM/DCS/PCS Rx path
v Agilent 8960 Setting CW Mode GSM850 : -50dBm@Ch190(881.6MHz) EGSM : -50dBm@Ch65(948MHz) DCS : -50dBm@Ch700(1842.8MHz) PCS : -50dBm@ch700(1967.8MHz)
Check GSM850/EGSM/DCS/PCS Rx signal level at .
GSM850/EGSM:-51.5dBm DCS/PCS:-51.7dBm Yes GSM Rx path OK.
No
Change Ant. SW module (U101)
- 168 -
5. Download
5. Download
The downloading purpose is described below: 1) To make a phone operate at the first manufacturing A phone = Hardware + Software A phone cannot operate with hardware alone. The hardware with the suitable software can operate properly. 2) To upgrade the software of the phone The software of the phone may be changed to enhance the performance of the phone. The older version software of the phone can be replaced to the newer version.
5.1 Requirements
5.1.1 Download Items
Items needed to download SW images with LGEDP. A. Micro-USB Cable B. Target( GT500 / GT505 Phone ) C. PC and LGEDP Software D. SW Images
A
5.1.2 System Requirement
The table below shows the requirements for setting up. You should check the requirements below first to set up your PC.
USB Driver cannot support Windows 98, Windows Me, and Windows XP Service Pack 1. Although it can do, it cannot be guaranteed. So, highly recommend OS upgrade.
5.1.3 Required Tool

LGEDP : Download tool for GT500 / GT505 software
- 169 -
5. Download
5.2 GT500 / GT505 Download

Install LGEDP USB Driver in the following order. 1) Go to the directory = ../LGEDP_U330_SVC_EURO_YYYYMMDD/wrapper_USBDriver 2) Click installme.bat
5.2.1. USB Driver Install

* Please make sure that install this usb driver for download not for a pc sync driver. There are two different type of usb driver. One for downloading , the other for PC sync. If you use LGEDP Tool firstly, Error will happen because of USB Driver uninstalled. If you see Found New Hardware when phone is connect after complete install, and then follow as indicated blew. when connect the phone, must be check that phone should be turn off and battery should be full-gauge (At lease three(75%) more). The installation procedure of LGEDP USB Driver is described below:
1) Push the Next Button in Found New Hardware Wizard
- 170 -
5. Download
2) Select Search for the best driver in these locations in Found New Hardware Wizard 3) Select Include this location in the search in Found New Hardware Wizard 4) Push the Browse Button , and then select USB driver Information file This File is provided with LGEDP.
- 171 -
5. Download
5) Select Mobile Equipment USB Flash in Found New Hardware Wizard
You must be select this..!
6) Continue Anyway
- 172 -
5. Download
7) Please wait while the wizard installs the software.. 8) Push the Finish Button in Found New Hardware Wizard
- 173 -
5. Download
5.2.2 Download Menu Selection.

Download Menu Selection in the following order: 1) Click Configuration download in Menu bar.
6
- 174 -
5. Download
5.2.3 LGEDP Configuration & SW & GDFS Image Selection.

The installation procedure of Download Configuration is described below: 1) You must select Window Size 1 ~ 4. ( Defualt is 4 ) 2) You must select Chipset U330 for GT500 / GT505. 3) You can select SW image to download by clicking Add button. Select next two image files orderly. Order is important. Main image : cxc000000_APPLICATION_PHONE_SB_IAR-ARM-NAND.ssw, FileSystem image : CXC_FS_CABS_LP_NAND.ssw LGPXO image : CXC_LGPXO_SYS_CABS_LP_NAND.ssw 4) You can select GDFS map to download by clicking Add button. Select next two GDFS files. Acc GDFS : GT500 / GT505_Update_GDFS_Acc_XXXXXXXX.gdf, App GDFS : GT500 / GT505_Update_GDFS_App_XXXXXXXX.gdf. 5) After choose all image to download, click OK button.
1)
3)
4)
5)
- 175 -
5. Download
5.2.4 Starting Download

Follow the procedure described below to start download. You should follow the instruction below and be sure to follow in right order. 1) 2) 3) 4) 5) 6) 7) If you have not detached Battery from the phone yet, detach Battery from the phone. Connect your phone with Micro-USB cable. Insert the Battery into phone. In case of GT500/GT505, press Side-Up-Key. Keep pressing until step 6. Press Power-Key. And then Downloading will be started. Release both Side-Up-Key and Power-Key after start downloading in GT500 If Downloading has not started yet, Repeat procedure 1) ~ 6).
< Before phone is turned on >
- 176 -
5. Download
5. 2.5 Download is on going
< After phone is turned on >
- 177 -
6. Block Diagram
6. Block Diagram
Figure 6-1 GT500 Block Diagram
- 178 -
7. CIRCUIT DIAGRAM
10
11
12
VDDA_2V8 VBAT
VRAD_2V8
VBAT
R100
R101
DNI
C103 0.1uF
C104 22p
C105 22p
U100 1 R103 2 R104 3 75 VDD RF_IN
LMV221 OUT REF DAP EN 6 5 4
R102 C108 0.01u 1K C106 33nF PGND1 31 PGND2 32 PGND3 33 PGND4 34 C107 10u C109 47p WPOW_DET
C100 10u
C101 0.1u
C102 1000p U102 SKY77182 9 PGND 8 GND2 GND1 RFOUT VCC 7 6 5
120
GND
WTX_BAND_1_EN BIAS_CTRL WTX_BAND_1_TO_PA C115 1000p C116 1000p
1 2 3 4
VENB VCTRL RFIN VBIAS
C110 0.1u L100 18p C117 NA C118 NA
C111 22p
WPOW_DET_EN 30 29 28 27 26 25 24 23 22 21 12 11 2 WRF_BAND_1 C124 GTX_850_900 GTX_1800_1900 ANTSW2 ANTSW1 R111 R112 0 0 C129 22p C130 22p GND13 GND12 GND11 GND10 GND9 GND8 GND7 GND6 GND5 GND4 GND3 GND2 GND1
VBATT 5 VAPC 4 WCDMA3 20 WCDMA2 19 WCDMA1 18 C112 C113 C114 22p 33p 22p GRX_850 GRX_900 GRX_1800 GRX_1900 R108 RSVD MODE _TXEN ANT 10
G2
R105 WRF_BAND_2 WRF_BAND_8_5 WRF_BAND_1 R106 DNI
GTX_VAM
VBAT
L601 2.2nH
U103 LDC151G8620Q-359 1 4 OUT TER 2 IN COU 3
7 GND4 8 GND5 9 GND6 C119 100p 3 1 FL100 C123 TX RX
5 GND3 4 GND2 2 GND1
U101
RX1 16 RX2 15 RX3 14 RX4 13 DNI
R107
10
VCC_WPA C120 0.1uF C121 22p C122 22p
SW100
KMS-518
G1 C A
B
SW101 UFL-R-SMT10 L102 100p ANT G1 G2
R109
U105
1 2 VEN_BAND_2 IN_BAND_2 GND1 VCC1 VCONT IN_BAND_5
SKY77175
PGND GND4 OUT_BAND_2 GND3 VC2 VBIAS OUT_BAND_5 15 L101 14 C127 DNI C128 1.5p 1.8nH 13 12 11 10 C137 1000p 9 8 C136 22p U104 LDC151G8620Q-359 1 4 OUT TER
DNI
ANT
SAYFP1G95AA0B00 3.6nH
9 8 C125 17 C126 DNI 22p
56
WTX_BAND_2_EN WTX_BAND_2_TO_PA BIAS_CTRL WTX_BAND_8_5_TO_PA C133 C134 WTX_BAND_8_5_EN DNI 100p R116 R118 DNI
3 4 5 6
R113
DNI
WRX_BAND_1
SKY77521
GND4 GND5 GND6 C135 100p TX R117 56 DNI RX FL101 C138
GND3 GND2 GND1 C636 3.3nH ANTSW0 ANTSW3 WRF_BAND_2 C143 0.5p
R114 R115
0 0 C139 22p C140 22p
C141 1000p
7 C142 22p
IN
COU
VEN_BAND_5
GND2
ANT ACMD-7407
C132 DNI
R120
24
DNI
VBAT U107 1 C148 10u C149 0.1u C150 1000p 2 3 4 C157 1000p C158 1000p VBIAS RF_IN VCONT VEN SKY77181 8 VCC RF_OUT 7 C146
WRX_BAND_2 GND4 GND5 GND6 C145 100p TX R121 56 R652 DNI RX FL102 C153 1000p C154 0.1u C155 10u C156 DNI L103 8.2nH C151 LT56B ANT 6.8nH C152 0 WRF_BAND_8_5 GND3 GND2 GND1
GSM PA WITH ASM
C144
U106 LDC15874M19Q-360 1 4 OUT TER C147 22p 2 IN COU 3
100p
6 GND2 5 GND1 9 PGND
GT500 GND contact for ANT

WRX_BAND_8_5 CN198 1 1 2 3 4 5 6 7 8 9
BIAS_CTRL
SC1 10 11 12 13 14 15 16 17 18
WCDMA PA Block
VRAD_2V8 VDDA_2V8
CN199 1
R123 R126 R127 DNI R124 390 C160 FB100 0
560 1800 C161 DNI C159 3.9p 4.3nH R125 GRX_1900
U108
C162 4 C163 TX_ADC_STRB 1 2 3 _OE VCC A GND Y 5 VRAD_2V8
FL103
L104 3.3nH GND6 10 GND4 8 GND2 7 6 C164 15p 9 OUT_1842_5 IN_1842_5 1 L107 NA C168 10u U109 C171 0 C172 3.3p R133 GRX_900 DCDC_REF GND5 5 GND3 3 GND1 2 IN_942_5 IN_881_5 4 0 9 C177 3.3p OUT_881_5 1 L112 NA L113 10nH C178 33p L114 NA R140 GRX_850 L109 NA R135 WDCDC_EN 220 C176 22p 0.01u C2 C1 VCON EN B1 A1 VDD PVIN LM3208TL A2 SW FB C3 C173 4.7u C174 1000p C175 22p L108 3.3uH VCC_WPA OUT_1960 GND5 5 GND3 3 GND1 2 IN_1960 4 3.9nH L105 NA
0.01u
22p
SN74LVC1G125DRLR E
TX_ADC_STRB_2V8
33p
closed to RF3300
R128 GRX_1800
VBAT
0.01u
22p
WRX_Q_N WRX_Q_P WRX_I_N WRX_I_P
C166
C167
VDDA_2V8
R129 270
27 270
R130 C169
0 C170
C165 DNI
SAWEN1G84BC0F25
L106 2.2nH
GTX_1800_1900
AMP_FREQ_LSB DATA_STR 55 53 49 47 45 43 41 39
R131
R132
2.7p
DNI
FL104
GND6 10 GND4 8 GND2 7 6 OUT_942_5
R138 DNI
R139 DNI
3 WRXIN 4 WRXIP 6 EDATAC 7 EDATASTR 8 EDATAA 9 EDATAB 10 11 12 STR DATA CLK
F
DNI R141
56 ETXHB 54 ETXLB EAMMOD 52
R136
R137
51 VCCA2 27 VCCA1
270
270
QDATA_AMP_MSB IDATA_FREQ_MSB
R134
27
GTX_850_900 L110 8.2nH L111 NA
B3 SGND A3 PGND
1 WRXQN 2 WRXQP
SAWEN881MBA0F25 Placement Notice:PGND must be isolated from Common GND on L1, L2 and L3
GTX_VAM
50 ERXHB2 48 ERXHB1 46 ERXLB2 44 ERXLB1 42 WRXHB2 38 WRXHB1 WRXLB 40 39nH L116 DNI R145 WDCDC_EN C180 DNI 560 R143
RF_CTRL_STR_1 RF_CTRL_DATA RF_CTRL_CLK TESTOUT MCLKREQ MCLK R148 DNI
DC-DC CONVERTER
R142 18p WRX_BAND_1 C179 10nH R146 4.7K PGND 5 VRAD_2V8 GND 2 VOUT 1 U110 C183 2.2u R147 0 ADOUT VBAT
U111 RF3300
R144

4
TX_ADC_STRB_2V8
L115 5.6nH
TN4-26562 26MHz
37 RFCTRL1 36 RFCTRL2 35
C181 100p
PT100
R149
R150
X100
DNI
23 WTXLP 24 WTXIN 25 WTXQP 26 WTXQN
R155 DNI
C185 DNI
31 WTXHB3 33 WTXHB2 29 WTXHB1 PGND 57
R151
FL105 SAFEB897MAM0F00
WRX_BAND_2 DNI WTX_BAND_8_5_TO_PA R153 R152 0 L117 2.2nH
4.7K
20 MCLKSEC 21 VCCD
RTEMP C182 1u
WTXLB
CE 3 VDD 4
RP101K282D
IN
OUT
DNI
DNI
G1 G2 G3
R156
TEMP SENSOR
L118
VDDA_2V8 0 R160
R158
5 16 19 22 28 30 32 34
MCLKSEC
R157
10nH WRX_BAND_8_5 EXT_LDO
R159 DNI
R161 0 C187 DNI
3 1
G3 IN OUT G1 G2
DNI R162 0 R164 DNI WTX_BAND_1_TO_PA L119 1.8p NA L120
EXTERNAL LDO
H
VDIGRAD_1V8 C188 DNI C189 DNI
RF TRANCEIVER
0 C191 DNI WTX_I_P WTX_I_N WTX_Q_P WTX_Q_N R165
G3 IN OUT G1 G2
R166
10
11
12
- 179 -
7. CIRCUIT DIAGRAM
4
WTX_BAND_1_EN WTX_BAND_2_EN WTX_BAND_8_5_EN QDATA_AMP_MSB IDATA_FREQ_MSB AMP_FREQ_LSB TX_ADC_STRB DATA_STR
10
11
12
RF_CTRL_DATA RF_CTRL_CLK RF_CTRL_STR_1
WPOW_DET_EN WRX_I_N WRX_I_P WRX_Q_N WRX_Q_P WPOW_DET
WTX_I_N WTX_I_P WTX_Q_N WTX_Q_P
KEYOUT0 KEYOUT1 KEYOUT2
ANTSW0 ANTSW1 ANTSW2 ANTSW3
Service mode for WEB D/L Added in the REV.D
DNU1 DNU2 DNU3 DNU4 DNU5 DNU6 DNU7 DNU8 DNU9 DNU10 DNU11 NC1 NC2 NC3 NC4 NC5
VDDE_1V8 SD_DATA(0) SD_DATA(1) SD_DATA(2) SD_DATA(3) SD_DATA(4) SD_DATA(5) SD_DATA(6) SD_DATA(7) SD_DATA(8) SD_DATA(9) SD_DATA(10) SD_DATA(11) SD_DATA(12) SD_DATA(13) SD_DATA(14) SD_DATA(15) B3 C4 C3 D4 D3 E4 E3 F4 J4 K3 K4 L3 L4 M3 M4 N3 R299 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
A2 A9 A10 B1 B10 N1 N10 P1 P2 P9 P10 B2 B7 B9 F3 J3
KEYIN2 KEYIN3
KEYIN0
SD_ADDR(1:13)
MCP 2G NAND 1G SDRAM

A
SD_DATA(0:15)
DNI R298 U202 KEY_LED5 PWRRST_n R297 R296 DNI DNI

1 IN1 2 IN2 GND 3 OUT 4 VCC 5
RF_WCDMA_PA_0_EN RF_WCDMA_PA_1_EN RF_WCDMA_DCDC_EN RF_WCDMA_PWRDET_E
RF_CTRL_DATA RF_CTRL_CLK RF_CTRL_STRB1 RF_CTRL_STRB2
RF_DATA_A RF_DATA_B RF_DATA_C TX_ADC_STRB RF_DATA_STRB
NC7SZ08P5X MCLK RTCCLK BT_CLKREQ_n MCLKREQ SYSCLK0 SYSCLK1 USB_XTAL1 ACC_IRQ_n APP_IRQ_n R200 3.3K E17 A15 B18 B17 A18 A17 A19 C19 C20
B
0 R295
KEY_LED6 D201 RB521CS-30 C203 1000p KEYIN2 D200 RB521CS-30 RESOUT0_n RESOUT1_n RESOUT2_n
TP209
B10 PWRRSTN J14 RESOUT0N B19 RESOUT1N E18 RESOUT2N D17 ACCSLEEP D18 APPSLEEP C21 DCON C18 SERVICEN E2 PCMCLK E3 PCMSYN D2 PCMULD D3 PCMDLD G22 F22 G20 F21 G21 E21 G19 E22 I2S0CLK I2S0WS I2S0ULD I2S0DLD I2S1CLK I2S1WS I2S1ULD I2S1DLD
ACCSLEEP APPSLEEP DCON
SD_BA0 SD_BA1 SD_DATA(0) SD_DATA(1) SD_DATA(2) SD_DATA(3) SD_DATA(4) SD_DATA(5) SD_DATA(6) SD_DATA(7) SD_DATA(8) SD_DATA(9) SD_DATA(10) SD_DATA(11) SD_DATA(12) SD_DATA(13) SD_DATA(14) SD_DATA(15) SD_CS_n SD_CLK SD_CKE SD_CAS_n SD_RAS_n SD_WE_n SD_DQML_n SD_DQMU_n
U200 KA100J00BA-AJYY
VDDQ1 VDDQ2 VDDQ3
D2 F2 K2
R620
Q200 VPPFLASH
B IN
C OUT
KRC402E
PCM_CLK PCM_SYNC PCM_ULD PCM_DLD DB_I2S0_CLK DB_I2S0_WS DB_I2S0_ULD DB_I2S0_DLD DB_I2S1_CLK DB_I2S1_WS DB_I2S1_ULD DB_I2S1_DLD
GND
R203
2.2K
VDDE_1V8
EMIF1_D0 EMIF1_D1 EMIF1_D2 EMIF1_D3 EMIF1_D4 EMIF1_D5 EMIF1_D6 EMIF1_D7 EMIF1_D8 EMIF1_D9 EMIF1_D10 EMIF1_D11 EMIF1_D12 EMIF1_D13 EMIF1_D14 EMIF1_D15 EMIF1_SDCSN EMIF1_SDCLK EMIF1_SDCKEN EMIF1_SDCASN EMIF1_SDRASN EMIF1_WEN EMIF1_BE0N EMIF1_BE1N
VDDE_1V8
R202
10K
H4 J4 L4 K4 M3 M4 P4 P3 R4 N8 P8 R8 T4 U5 U4 U3 Y2 W3 V4 Y3 V2 W2 W1 V3 AC12 AA11 AB13 AC14 AB14 AB15 AA15 AB16 AC16 AC17 AB17 AB18 AC18 AA18 AB19 AC19 AA19 AB20 AA20 AB21 Y21 AA21 AB22 AA22 Y22 V21 Y13 Y14 T11 AA12 AA13 AA14 Y15 AA16 AA17 Y16 W17 W18 Y17 Y20 Y18 Y19 Y10 AB8 AA7 AA9 AC8 AB9 AC10 AB10 Y11 AA10 T10 Y12 AC9 AC11 AB12 AB11
VSS1 VSS2 VSS3 VSS4 VSSQ1 VSSQ2 VSSQ3
C2 F9 G2 N4 E2 J2 L2
C204 0.1u
C205 0.1u
C206 1u
VDDE_1V8
NF_IO(0) NF_IO(1) NF_IO(2) NF_IO(3) NF_IO(4) NF_IO(5) NF_IO(6) NF_IO(7)
J5 L5 J6 L6 J7 L7 J8 L8
IO0 IO1 IO2 IO3 IO4 IO5 IO6 IO7
VCC1 VCC2 VCCQ
B6 N7 N6 C207 0.1u C208 0.1u C209 0.1u
MCLK RTCCLKIN SYSCLKREQN MCLKREQ SYSCLK0 SYSCLK1 SYSCLK2 MSACCIRQN MSAPPIRQN
EMIF1_A1 EMIF1_A2 EMIF1_A3 EMIF1_A4 EMIF1_A5 EMIF1_A6 EMIF1_A7 EMIF1_A8 EMIF1_A9 EMIF1_A10 EMIF1_A11 EMIF1_A12 EMIF1_A13 EMIF1_SDBS0_A14 EMIF1_SDBS1_A15
L1 L2 M2 M1 N1 N2 P1 P2 R3 R2 T2 T3 U2 U1 V1
SD_ADDR(1) SD_ADDR(2) SD_ADDR(3) SD_ADDR(4) SD_ADDR(5) SD_ADDR(6) SD_ADDR(7) SD_ADDR(8) SD_ADDR(9) SD_ADDR(10) SD_ADDR(11) SD_ADDR(12) SD_ADDR(13)
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12
C7 C8 C9 B8 M9 L9 K9 J9 H7 H8 D9 H9 G7
SD_ADDR(1) SD_ADDR(2) SD_ADDR(3) SD_ADDR(4) SD_ADDR(5) SD_ADDR(6) SD_ADDR(7) SD_ADDR(8) SD_ADDR(9) SD_ADDR(10) SD_ADDR(11) SD_ADDR(12) SD_ADDR(13)
DNI
C17 C16 D16 C14
H11 H13 H14 H15
B15 B16 C15 D15 A16
B14 D14 B13 C13
C22 D22 D21 F20 E20 F19 KEYIN0 KEYIN1 KEYIN2 KEYIN3 KEYIN4 KEYIN5
D9 C9 C8 D8 B6
DAC_I_NEG DAC_I_POS DAC_Q_NEG DAC_Q_POS
ADC_I_NEG ADC_I_POS ADC_Q_NEG ADC_Q_POS TX_POW
ANT_SW0 ANT_SW1 ANT_SW2 ANT_SW3
KEYOUT0 KEYOUT1 KEYOUT2 KEYOUT3 KEYOUT4
J13 J10 K9 L9 J11
E7 D7 E6 D6
SD_CS_n SD_CS2_n SD_CLK SD_CKE SD_WE_n SD_BA0 SD_BA1 SD_RAS_n SD_CAS_n SD_DQML_n SD_DQMU_n
E9 E8 H4 G8 F8 D7 D8 E7 F7 G3 H3
_CS1 _CS2 CLK CKE1 _WED BA0 BA1 _RAS _CAS LDQM UDQM
VDD1 VDD2 VDD3 VDD4
B4 G9 H2 M2
VDDE_1V8
B
C200 0.1u C201 0.1u C202 0.1u
SDAT SCLK SRST_n USB_DATA(0) USB_DATA(1) USB_DATA(2) ACC_USB_HS_STP ACC_USB_HS_DIR ACC_UART0_RX ACC_UART0_TX ACC_USB_HS_IN_CLK ACC_USB_HS_NXT ACC_USB_HS_DATA(4) ACC_USB_HS_DATA(5) ACC_USB_HS_DATA(6) ACC_USB_HS_DATA(7) ACC_UART3_RX ACC_UART3_TX ACC_UART3_CTS ACC_UART3_RTS
B2 SDAT C2 SCLK C4 SRSTN J2 USB_SE0_VM K2 USB_DAT_VP L3 USB_OE J3 K3 L8 G1 K8 F1 J8 G3 H3 G2 H9 E1 H10 D1 F3 D4 C3 G5 E4 G4 C1 F4 F2 H2 V5 AB3 AA4 Y4 P9 AC4 T9 AA5 R10 Y5 H20 G23 H21 H22 J22 J21 H23 K21 L16 J23 P15 P16 B22 R14 N16 R21 R16 U22 T13 T14 T15 T23 P21 R23 P20 ACC_GPIO_0 ACC_GPIO_1 ACC_GPIO_2 ACC_GPIO_3 ACC_GPIO_4 ACC_GPIO_5 ACC_GPIO_6 ACC_GPIO_7 ACC_GPIO_8 ACC_GPIO_9 ACC_GPIO_10 ACC_GPIO_11 ACC_GPIO_12 ACC_GPIO_13 ACC_GPIO_14 ACC_GPIO_15 ACC_GPIO_16_USBPRB ACC_GPIO_17 ACC_GPIO_18 ACC_GPIO_19 ACC_GPIO_20 ACC_GPIO_21 ACC_GPIO_22 ACC_GPIO_23 ACC_GPIO_24 ACC_GPIO_25 ACC_GPIO_26 ACC_GPIO_27 ACC_GPIO_28 ACC_GPIO_29 ACC_GPIO_30 ACC_GPIO_31 ACC_GPIO_32 ACC_GPIO_33_A27 APP_GPIO_0 APP_GPIO_1 APP_GPIO_2 APP_GPIO_3 APP_GPIO_4 APP_GPIO_5 APP_GPIO_6 APP_GPIO_7 APP_GPIO_8 APP_GPIO_9 APP_GPIO_10 APP_GPIO_11 APP_GPIO_12 APP_GPIO_13 APP_GPIO_14 APP_GPIO_16 APP_GPIO_17 APP_GPIO_18 APP_GPIO_19 APP_GPIO_20 APP_GPIO_21 APP_GPIO_22 APP_GPIO_23 APP_GPIO_24 APP_GPIO_25 B20 I2CSCL D19 I2CSDA B21 I2CSCL2 D20 I2CSDA2
DNI
R658
DNI
U201-1 DB3200_A
100K
ACC_GP_USB_CS ACC_GPS_START ACC_USB_HS_DATA(3) ACC_SPI_WLAN_CSn ACC_SPI_MISO ACC_SPI_MOSI ACC_SPI_CLK ACC_GP_GPS_PON ACC_GP_SPI_BT_CSn ACC_GP_SPI_BT_IRQ ACC_GP_SPI_WLAN_IRQn ACC_GP_GPS_RESETn ACC_GP_WLAN_RESETn ACC_GP_WLAN_EN ACC_GP_WLAN_PWR_DOWNn
EMU_MODE_0
NF_IO(0:7) NF_IO(0) NF_IO(1) NF_IO(2) NF_IO(3) NF_IO(4) NF_IO(5) NF_IO(6) NF_IO(7)
CI_PCLK CI_VSYNC CI_HSYNC CI_RES_N CI_D0 CI_D1 CI_D2_CLK0_M CI_D3_CLK0_P CI_D4_DAT0_M CI_D5_DAT0_P CI_D6_CLK1_M CI_D7_CLK1_P CI_D8_DAT1_M CI_D9_DAT1_P
MCCLK MCCMD MCDAT0 MCDAT1 MCDAT2 MCDAT3 MCCMDDIR MCDATADIR
PDI_RES_N PDI_C0 PDI_C1 PDI_C2 PDI_C3 PDI_C4 PDI_C5 PDI_D0 PDI_D1 PDI_D2 PDI_D3 PDI_D4 PDI_D5 PDI_D6 PDI_D7
APP_GP_VGA_SDN APP_GP_TOUCH_SCL APP_GP_TOUCH_SDA APP_GP_TOUCH_LDO_EN APP_GP_ISP_LDO_EN APP_GP_LCD_ID APP_GP_LCD_ALDO_EN APP_GP_MOTORLDO_EN APP_MMC_FB_CLK APP_GP_LCD_IF1 APP_GP_USW_SCL APP_GP_USW_SDA APP_GP_MMC_DETn APP_GP_CAM_LDO_EN APP_GP_TOUCH_PENIRQn APP_GP_USW_INT APP_GP_3AXIS_INT APP_GP_3AXIS_SCL APP_GP_FM_GPIO2 APP_GP_3AXIS_SDA APP_GP_LCD_DLDO_EN APP_GP_BL_EN
TDI TMS TRST_N TCK EMU_MODE_0 EMU_MODE_1 TDO RTCK
ETM_TCLK ETM_TSYNC ETM_TPKT0 ETM_PSTAT0 ETM_PSTAT1 ETM_PSTAT2 ETM_TPKT1 ETM_TPKT2 ETM_TPKT3 ETM_TPKT4 ETM_TPKT5 ETM_TPKT6 ETM_TPKT7
VCORE
N3 EFUSE_HV4 N4 VDDA_AF
AC22 DU1 AC23 DU2 B1 DU3
AB4 W4 AB2 AA2 AC1 AB1 AA3 AA1
AB5 Y6 Y9 AB6 Y7 AA6 Y8 AB7 AA8 AC7 W6 AC6 W7
C210
APP_UART_RX APP_UART_TX
EMIF2_D00 EMIF2_D01 EMIF2_D02 EMIF2_D03 EMIF2_D04 EMIF2_D05 EMIF2_D06 EMIF2_D07 EMIF2_D08 EMIF2_D09 EMIF2_D10 EMIF2_D11 EMIF2_D12 EMIF2_D13 EMIF2_D14 EMIF2_D15 EMIF2_NFIF_READY EMIF2_WAITN EMIF2_CS0N EMIF2_CS1N EMIF2_CS2N EMIF2_CS3N EMIF2_SDCAS_RE_OEN EMIF2_WEN EMIF2_SDCLK EMIF2_CLK EMIF2_FBCLK EMIF2_SDCKEN0 EMIF2_SDCKEN1 EMIF2_SDRAS_ADVN EMIF2_BE0N EMIF2_BE1N
TDI TMS TRST_N TCK EMU_MODE_0 EMU_MODE_1 TDO RTCK
EMU_MODE_1
PWRRST_n VDDE_1V8
EMIF2_A01 EMIF2_A02 EMIF2_A03 EMIF2_A04 EMIF2_A05 EMIF2_A06 EMIF2_A07 EMIF2_A08 EMIF2_A09 EMIF2_A10 EMIF2_A11 EMIF2_A12 EMIF2_A13 EMIF2_SDBS0_A14 EMIF2_SDBS1_A15 EMIF2_A16 EMIF2_CLE_A17 EMIF2_ALE_A18 EMIF2_A19 EMIF2_A20 EMIF2_A21 EMIF2_A22 EMIF2_A23 EMIF2_A24 EMIF2_A25 EMIF2_CRE_A26
2G v1.8 x8 NAND + 1G v1.8 x16 SDRAM(MCP)
G4 G5 G6 H5 H6 K5 K6 K7 K8 M5 M6 M7 M8 N2 N9
NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 NC19 NC20
R657
NF_CS0_N SD_CKE2 NF_ALE NF_CLE NF_OE_N NF_READY NF_WE_N RESOUT0_n
C6 F6 D5 C5 E5 E6 D6 F5
_CE CKE2 ALE CLE _RE R__B _WE _WP
VSS5 VSS6 VSS7
B5 N5 N8
DNI
DNI
DNI
DNI
DNI
DNI
R648
R647
R649
R646
R650
R659
JTAG and ETM

VDDE_1V8
TMU200
TCK PS_HOLD
RESIN
RTCK
TRST
GND
VCC
TDO
TMS
TCK
JTG201
100K
R643
NF_CLE NF_ALE
TCK
TDI
TMU201
E
TRST_N TMS TDI TDO RTCK TCK
R204
VDDF_2V5
DB3200 POWER
0.1u
VDDF_2V5
F
C212 33nF
NF_READY NF_CS0_N
TP220
SD_CS2_n NF_OE_N NF_WE_N
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
C213 C214 C215 C216 C217 C218 C219 C220 C221 C222 C223 C224 C225 C226 C227 C229 C230 C231 C237 C238 C239 C240 C241
SD_CKE2
B4 D13 A7 J1 K1 T1 AC3 AC15 AC21 AA23 N23 D23 C23 A21 A14 A4 A3 H1 R1 Y1 AC5 AC13 AC20 Y23 F23 E23 A20 A13
VDDC_ADDA_ESD VDDC_IO VDDC_PLL VDDC1 VDDC2 VDDC3 VDDC4 VDDC5 VDDC6 VDDC7 VDDC8 VDDC9 VDDC10 VDDC11 VDDC12 VDDC13 VDDE1 VDDE2 VDDE3 VDDE4 VDDE5 VDDE6 VDDE7 VDDE8 VDDE9 VDDE10 VDDE11 VDDE12
1u C211
A10 PLL_26_VCONT A9 PLL_26_FILTVDD VDDA_ADDA VDDA_ADDA_REF VDDA_ADDA_ESD VDDA_ADGP VDDA_DA A6 B8 C7 C6 D5
U201-2 DB3200_B
C12 VDDA_PLL_13_208 B12 VDDA_PLL_26_208 D12 VDDA_PLL_26_60 A12 VDDA_PLL_32_13 C10 VDDA_PLL_ESD VSS_ADDA_ESD VSS_PLL VSSA_AD VSSA_ADDA VSSA_ADDA_ESD VSSA_ADDA_REF VSSA_ADGP VSSA_DA B3 A8 B9 A5 E5 B7 B5 C5 C232
VDDE_1V8
G
0.1u 0.1u 0.1u 0.1u 0.1u C236
T22 N20 R22 N21 P22 M21 P23 M20
U21 R20 U23 T21 U19 V19 V20 W20 U20 T20 V23 W23 W22 V22
K20 K23 J16 K22 K16 L22 L21 L23 L20 M22 J20 M23 K15 N22 N15
C234
C233
C235
VDDE_1V8
B11 VSSA_PLL_13_208 C11 VSSA_PLL_26_208 D11 VSSA_PLL_26_60 A11 VSSA_PLL_32_13 D10 VSSA_PLL_ESD VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21
TP221 TP222
SHARED_I2C_SCL SHARED_I2C_SDA APP_I2C_SCL APP_I2C_SDA
LCD_RESET_N LCD_VSYNC LCD_WE_N LCD_RS LCD_CS_N LCD_RD_N
TP223
MICROSD_CLK MICROSD_CMD MICROSD_DAT0 MICROSD_DAT1 MICROSD_DAT2 MICROSD_DAT3 MICROSD_CMD_DIR MICROSD_DAT_DIR
CI_PCLK CI_VSYNC CI_HSYNC CI_RES_n
CI_DATA[0] CI_DATA[1] CI_DATA[2] CI_DATA[3] CI_DATA[4] CI_DATA[5] CI_DATA[6] CI_DATA[7]
3300 3300
R214 3300 R211 3300
3300 3300
1u
R15 J9 N9 J15 M15 M8 R11 R13 W19 F5 T12 W5 R12 R9 M9 W21 L15 E19 M16 J12 H12
R212 R213
R209 R210
R639
APP_GP_3AXIS_SDA APP_GP_3AXIS_SCL 0 APP_GP_USW_SDA APP_GP_USW_SCL 0 R215 R216 AMP_I2C_SDA AMP_I2C_SCL
A1 A2 A22 A23 AB23 AC2 B23
DU4 DU5 DU6 DU7 DU8 DU9 DU10
C228
I2C MAP
R205 R206 R207 R208
3300 3300 3300 3300
1u
H
VDDE_1V8
APP_GP_TOUCH_SDA APP_GP_TOUCH_SCL
10
11
12
- 180 -
7. CIRCUIT DIAGRAM
10
11
12
GPA3:PCB_Rev_ADC A, H : 100K : 6.2K : 0.155V B, I : 100K : 12.1K : 0.286V C, J : 100K : 20.0K : 0.442V D, K : 100K : 27.0K : 0.563V E, L : 100K : 39.0K : 0.744V F, M : 100K : 51.0K : 0.895V G, N : 100K : 68.0K : 1.073V 1.0 : 100K : 100K : 1.325V 1.1 : 100K : 150.0K : 1.59V 1.2 : 100K : 215K : 1.809V 1.3 : 100K : 390K : 2.109V 1.4 : 100K : 680K : 2.31V PCB_VERSION
VDDD_2V65
SHARED_I2C_SDA SHARED_I2C_SCL
PCB_VERSION TESTOUT RTEMP
MOTOR_PWM
KEY_LED1 KEY_LED2
KEY_LED5 KEY_LED6
100K
R300
ADOUT
TX_ADC_STRB
VBACKUP
A
VDDD_2V65 VDDA_2V8 VDDD_2V65 VDDE_1V8 VDIGRAD_1V8 VBAT
ONSWA_n ONSWB_n DCON ACC_IRQ_n APP_IRQ_n PWRRST_n
VBAT 100K R301
SYSCLK1 ACCSLEEP APPSLEEP
TP300
VBAT
TP302 TP304
H13
D14
C14
B13
C13
C11
C10
E13
E14
E12
E11
F13
F12
F11
A9
B9
C9
B8
A8
C8
D8
B7
B4
A4
D3
C3
A3
B3
C7
A5
C301 4.7u
TP301 TP303
C300 0.1u
R302 R303 R304 R305 C302 2.2u C303 2.2u C304 2.2u
0 VDDA_2V8 0 VDDD_2V65 0 VDDE_1V8 0 VDIGRAD_1V8 to RF3300 digital to All I/O Supplies and Memory to AB3100 CODECs/ADC/PLL to RF3300 Power Detector
ONSWA_N ONSWB_N ONSWC IRQA_N IRQB_N PWRRST_N
VIBR_OUT
C305 4.7u
K12
AD_OUT VDD_ADC
MCLK SLEEP_A SLEEP_B
LED1_N LED2_N LED3_N LED4_N LED5_N LED6_N
GPA0 GPA1 GPA2 GPA3 GPA4 GPA5 GPA6 GPA7 GPA12
SDA SCL
TXON
VDDC_2V65 VBAT_A
VDDH_2V75
VDDF_2V5
VDDG_2V85
VDDK_2V75
B
K14
LDO_A LDO_D
2.75V 150mA 2.65V 200mA
LDOA_OUT C12 EXT_LDO

L12
K13
EXT_LDO
VBAT_B
C306 4.7u
F14
LDO_G 1.50~2.85V 100mA

VBAT_E
LDOD_OUT G14 LDOE_OUT R306 0 VDDC_2V65 R307 R308 LDOF_OUT L13 LDOG_OUT
G13 N12
to Hall Switch and AB3100 BEAR to 3xis to DB3100 analog to SD Card and LCD to Bluetooth
M13
LDO_E
VBAT_F
1.80V 200mA
VBAT_H
N14 F3 M3
LDOC_OUT L14 LDOH_OUT
0 VDDH_2V75 0 VDDF_2V5 0 VDDG_2V85 0 VDDK_2V75
LDO_F 1.05~2.65V 30mA

VBAT_G VBAT_H VBAT_K VBAT_L VBAT_M VBAT_C
R309 R310
Charger Block
LDO_H 1.20~1.80V 200mA 2.75V 100mA LDO_K 1.80~2.75V 200mA
LDOK_OUT
M14
VBAT_C
B14 A1
R311 VBACKUP
C
D1
LDO_C
2.65V 200mA
C307 2.2u C308 1u C309 1u C310 4.7u 1608 C311 1u C312 1u VBAT_C BLM18PG121SN1J 120ohm 1608 2A 50mohm Bead FB300 VBAT
4.7K
C
VCORE
VDD_REF
LDO_LP
2.20V
LDOLP_OUT BUCK_FB
D13 E1
B12
2.8*2.6*1.0 0.7A 240mohm 20% MOD1 BUCK 1.2V 5% VBUCK

C1
R312 L300 C314 0.1u C315 10u 4.7uH D300 RB521S-30 C317 10u C318 10u
0 VCORE C319 0.1u Parallel with VCORE to DB3210 CORE
X300 Route as a differential pair 22p 22p 1 2 32.768KHz
A10
XTAL1 D11 XTAL2 R313

B11
RTCCLK 1 % 27 C322 DNI

TP305
XTAL_OUT Local ground plane VSS_BUCK

B1
C320
C321
Use multiple via
D
RTC_GND
P2
SIMOFF_N
U300 AB3100
SIMLDO_OUT
L1
SIMVCC Close to ABB C323 1u
M2 M1 N3 A11 J14
SIMRST_N N2 SIMCLK P1 SIMDAT

K3
N1
SIMRST_n SIMCLK SIMDAT
Charging Circuit
VBUS Q300
S2
SCK1 J3 WS1 J1 SDI1 K2 SDO1 SCK2 K1 WS2 K4 SDI2 L2 SDO2

N10 M10 N9 P9 N8 P8 N11 P10 L3
DB_I2S0_CLK DB_I2S0_WS DB_I2S0_ULD DB_I2S0_DLD DB_I2S1_CLK DB_I2S1_WS DB_I2S1_ULD DB_I2S1_DLD
SIA911DJ
G2
E
Charging
D2
E
MIC1P MIC1N MIC2P FM_RP FM_LP 0.1u 0.1u 0.1u 22p 22p 22p
D4
CHS+
D3
D1
CHSG1
H2 H3
CHSENSEN CHREG
S1
CHREG
CHREG
MIC1P MIC1N MIC2P MIC2N MIC3P MIC3N MIC4P MIC4N
DCIO_INT VBAT_H R314 0 USB charging path VBAT CHS+ 2012 1/4W 1% R316 Route as a differential pair 0.1 CHSDCIO_INT VBUS VBUS TRICKLE R317 VDDE_1V8 VDD_REF VDDC_2V65 C330 22p D302
C1 1 A2 2 A1_C2 3
OTP
CCO1 CCO2 SPKRP_OUT SPKRN_OUT BEARP_OUT BEARN_OUT AUXO1_OUT AUXO2_OUT LINEIN1 LINEIN2 MIDR_OUT
N13 P14 N7 N6 P5 M5 M4 P4 P12 P11 N4
C325
C326
C327
C328
D301
RSX101VA-30TR
C329
C631
CCO1 SPKRP SPKRN BEARP BEARN EAR_R EAR_L C335 22p
F1
E2
DCIO_INT DCIO VBUS F2 TRICKLE DAC_DAT DAC_STR DAC_CLK
J2
Audio Subsystem
VBAT
VBAT
C4
1u
F
C331 33u Discharging
1u
C5 B5
C332 1u C336
C333 1u
C334 0.1u
P7 P6 P13 P3 G1
BDATA C337 22p R320 300K
VDD_SPKR VDD_BEAR VDD_AUDIO VDD_AUXO VDD_REF
Audio Block Audio Block Digital Block Audio Block Charger Block
A3
VDD
R319
24K
A4 C338 1u A5
C1N C1P
PVDD
VSS
PLL_DEC3 J12 PLL_DEC4
H14
B1
C5
KDS221E_RTK
A12
C340
C341
VDD_IO
SW_BOOST C2 BOOST_ISP D2 BOOST_ISN B2 VBOOST DACO_0 B6 DACO_1 A6 DACO_2 C6 DACO_3

A7
47n
E3
3300p
HPR HPL
A1 A2
HS_EAR_R HS_EAR_L
C339 C342 C343 C344
1u 1u 18000p 18000p
D12 A13 A14
CN300 D1 1 2 3 D2
1u 100K
TEST VREF IREF
DCDC_REF BIAS_CTRL
Audio Block
C345 R321
VSS_BEAR VSS_SPKR
22p
SPARE1 SPARE2
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67
PGND
GND
C352
1% C354 1u
E4
E5
E6
E7
E8
E9
F10
L10
E10
L11
J4
J5
J6
J7
J8
N5
D4
D5
D6
D9
H4
H5
H6
H7
H8
H9
J9
K5
K6
K7
K8
K9
D3
M11
FGS+
2012 1/4W
1%
R324 0.025
M12
G10
G11
G12
J10
D10
H10
H11
H12
J11
K10
B10
K11
Audio Subsystem
C4
F4
F5
F6
F7
F8
F9
L4
L5
L6
L7
L8
M7
L9
M6
M8
M9
D7
G4
G5
G6
G7
G8
G3
G9
A2
C353
BEARP BEARN
D4 RXIN+ B4 RXIN-
22p
C346 0.1u
C347 1u
C348 0.1u
C349 0.1u
AMP_I2C_SDA AMP_I2C_SCL 1% R322 15 R323 15
B3 SDA C3 SCL
H Make an Area at 8, 9 Layer
10
11
12
- 181 -
7. CIRCUIT DIAGRAM
10
11
12
Three-Axis Interface
VDDH_2V75
VDDE_1V8
Motor Interface
VDD_MOTOR_3V3 VDD_MOTOR_3V3
R640
R656 U401 1 2 3 4 5 R409 C400 22n NC1 VDD GND INT CSB BMA150 10 NC2 9 VDDIO 8 SDI 7 SDO 6 SCK R402 150K APP_GP_3AXIS_SDA APP_GP_3AXIS_SCL R408 0.1u C401 MOTOR_PWM R411 51K 51K C1 BYPASS B1 _SHUTDOWN C2 IN+ C3 INU400 R413 1K VDD TPA6205A1ZQVR R412 150K VO+ A3 VOB3 GND A1 B2 APP_GP_3AXIS_INT 11 NOT1 12 NOT2
MOTOR_N MOTOR_P
390
Three-Axis Sensor
R414 1K 0.01u C403
C404 1u
MOTOR AMP
Micro SD Card Interface

C
VDDE_1V8 VDDG_2V85
VDDG_2V85 2 4 6 8
VBAT 100K R637 100K RA400 GND U403 A5 C5 B2 C1 A2 B4 A4 B5 B1 A3 A1 B3 C3 C409 0.1u VCCA DAT0_DIR DAT0A DAT123_DIR DAT1A DAT2A DAT3A CMD_DIR CMDA CLKA CLK_F GND1 GND2 SN74AVCA406EZXYR D5 VCCB DAT0B D2 MICROSD_DAT0_2V85 MICROSD_DAT1_2V85 MICROSD_DAT2_2V85 MICROSD_DAT3_2V85 MICROSD_DAT2_2V85 MICROSD_DAT3_2V85 MICROSD_CMD_2V85 MICROSD_CLK_2V85 MICROSD_DAT0_2V85 MICROSD_DAT1_2V85 VA400 VA401 VA402 VA403 VA404 VA405 1 2 3 4 5 6 7 8
SWA SWB
VDD_MOTOR_3V3
1 3 5 7
RP103K331D 4 VDD 3 CE
U402 1 VOUT 2 GND
R416
2.2
EVLC18S02015
EVLC18S02015
EVLC18S02015
C2 CMDB D3 CLKB C410 0.1u
MICROSD_CMD_2V85 MICROSD_CLK_2V85 R419 220K
EVLC18S02015
EVLC18S02015
EVLC18S02015
MICROSD_DAT0 MICROSD_DAT_DIR MICROSD_DAT1 MICROSD_DAT2 MICROSD_DAT3 MICROSD_CMD_DIR MICROSD_CMD MICROSD_CLK APP_MMC_FB_CLK
D1 DAT1B C4 DAT2B D4 DAT3B
APP_GP_MOTORLDO_EN S400 DM3AT-SF-PEJ Hirose ( Micro-SD Socket, Normal ,T= 1.68) ENSY0020901 C406 1u
PGND
D
C407 1u
VDDE_1V8
1608 C408 10u
LDO 3.3V For MOTOR 150mA

VA406 EVLC18S02003
APP_GP_MMC_DETn
MICROSD LEVEL SHIFTER

E
MICROSD SOCKET
Touchscreen Interface
VDDE_1V8 VDD_TOUCH_2V8 R642
VDD_TOUCH_2V8
R420
F
C411 1u C412 0.1u R424 2.7K U405 A1 A2 A3 B1 B2 B3 TSC2007IYZGR SDA A1 XSCL GND YC1 C2 C3 D1 D2 D3 AUX VDD_REF X+ PENIRQA0 Y+ R421 2.7K R422
R425
51K
B2
B1
A4
VBAT
VCCA
VCCB
A4
VDD_TOUCH_2V8
R423 A3 A3 R426
0 APP_GP_TOUCH_SDA 0 APP_GP_TOUCH_SCL
B3 RP103K281D-TR-F 4 VDD 3 CE U406 1 VOUT 2 GND APP_GP_TOUCH_PENIRQn_2V75 B4 C1
OE
DNI
APP_GP_TOUCH_SDA_2V75 TOUCH_X-
GND TXS0104EZXUR A2 A2 U404 B1 B2 B3 B4 A1 A1
APP_GP_TOUCH_PENIRQn_2V75
APP_GP_TOUCH_PENIRQn
APP_GP_TOUCH_SCL_2V75
TOUCH_Y-
APP_GP_TOUCH_LDO_EN
PGND
EUSY0337101
C2
C3
R429
100K
C413 1u
C414 1u
APP_GP_TOUCH_SCL_2V75 APP_GP_TOUCH_SDA_2V75
G
TOUCH_Y+
C4
TOUCH_X+ ZD400 RSB6.8CST2R ZD401 RSB6.8CST2R ZD402 RSB6.8CST2R ZD403 RSB6.8CST2R
TOUCH LEVEL SHIFTER
TOUCH SCREEN DRIVER IC
10
11
12
- 182 -
7. CIRCUIT DIAGRAM
10
11
12
High Speed USB Interface

VBAT 10V R641 VDDE_1V8
MUIC Circuit
Micro USB Interface

A
A
0 R500 51K C500 0.1u C501 4.7u
VBAT
R655
MUIC
D2 BAT VB D5 USW_DM USW_DP R502 R504 2.2K R507 R508 DNI DNI 0 VBAT USW_ID
VBUS
VBUS
9
FM_ANT L500 C502 VA500
F3 F2 F1
1u
C2 C1 B2
C3 TP500 A4 B1 TP501 A1 A2 A3 A5 A6 B6 C6 D5 D6 E5 E1 E6
DATA5 DATA6 DATA7 NXT STP DIR CFG0 REF1V8
ID CFG2 CFG1 PSW_N VBUS REG3V3 XTAL1 XTAL2
ISET
SCL SDA INT
C506 C507 C508 R509 VBUS

TP502
TP602 A2
C4 GND C3 IC
INSTPAR SD12T1G
TEST CHIP_SEL CLOCK VCC_IO1 DATA0 VCC_IO2 RREF DATA1 DATA2 DM U502 DATA3 DP DATA4 ISP1508AET FAULT
C4 B5 B2 C2 C1 D1 E2 D3 B3 B4 D4 F4 E3 F5 F6 0.1u 4.7u 0.1u 12K
C503
USB_DM USB_DP R501 APP_ACC_UART_RX APP_ACC_UART_TX R503 0 0
A4 DN1 A5 DP2 B3 U1 A3 U2 A1 MIC D4 AUD1 D3 AUD2
VCC NC2 NC1
4
C504 1u
G2 OUT
G1 IN
3
4 3 DRAIN CNTRL GND IN
U500 82nH DNI SRC GATE OUT VCC DRAIN_THERMAL NUS3065MUTAG ULCE0505C015FR 5 6 7 8 9
2 1 NFM21PC105B1A3 FL500 ZD500
USB_DM USB_DP
MIC2P HS_EAR_L HS_EAR_R
C505 R505 R506
0.1u 10 10
FB500 FB501 FB502
2 1
6
8
10 CN501 12
14
TI : PD = USB, PU = UART MAXIM : NA = USB, PU = UART
22p 22p 22p
C510
If TI, then 10nF If Maxim, then 4.7uF C509 4.7u 2012 Close by uUSB CONN
C511
1K
USB_XTAL1
Close to MUIC
VDDE_1V8
USW_DM USW_DP
USW_ID
1 uF
22p
1 2 3 4 5 7
9
CN500 1 2
C512 4.7u
C513 0.1u
1%
2.2u
11
13 15 R511 2.2K APP_GP_USW_SCL APP_GP_USW_SDA APP_GP_USW_INT
C514
C515
C516
USB Transceiver
R510
C517
ESD / EMI Filter

KNATTE2-C2 APP_UART_RX ACC_UART0_RX ACC_UART0_TX APP_UART_TX D2 C3 D4 D3 C5 VPPFLASH D5 D1 DTMS_I CTMS_I CFMS_I DFMS_I DCIO_I
VDDE_1V8
OJ
FL501 OJ500 DTMS_E CTMS_E CFMS_E DFMS_E DCIO_E A1 A3 A4 A2 B5 R513 R515 R517 R518 DNI 0 0 DNI APP_ACC_UART_RX OJ501
Backlight Charge Pump

VBAT
VCC
C4
U604 0 APP_ACC_UART_TX R629 4 1u C632 5 C1+ C1-
AAT3169IFO-T1 7 C2+ C2OUTCP 8 6 1u C633 R631 0 WLED_PWR
9 A5 B1 VPPFLASH_E CTS_ON APP_GP_BL_EN 3
IN D1 D2 D3 D4 D5 D6
VPPFLS_I CTS_ON_I
VPPFLS_E CTS_ON_E
ONSWB_n
EN_SET
GND5 C2 GND4 C1 GND3 B4 GND2 B3 GND1 B2
R630
100K
10 GND 15 PGND C635 1u
11 12 13 14 1 2 C634 1u
WLED1 WLED2 WLED3 WLED4 WLED5
34 pin connector To VGA FPCB

E
Download Point And TP Test Point

E
2.5G APP_ACC_UART_RX APP_ACC_UART_TX then remove VBUS CTS_ON VBUS 1 2 3 4 5 6 7 8 9 10 11 12

GND RX TX
3G
If VBUS not used,

CAM_AVDD_2V8 CAM_DVDD_1V8
If VBUS not used, then remove
GND RX TX VCHAR ON_SW ON_SW VBAT VBAT NC2 PWR NC3 URXD NC4 UTXD
NC1 DSR RTS CTS
VPPFLASH_E CN503
SYSCLK0 TOUCH_X+ TOUCH_XTOUCH_Y+ TOUCH_YTOUCH_Y- : GND line shielding to CN APP_GP_VGA_SDN APP_I2C_SDA APP_I2C_SCL CI_RES_n SPK_RCV+ SPK_RCV-
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 C523 0.1u C525 0.1u
URT500 VBAT
DOWNLOAD POINT
CI_DATA[0] CI_DATA[1] CI_DATA[2] CI_DATA[3] CI_DATA[4] CI_DATA[5] CI_DATA[6] CI_DATA[7] CI_HSYNC CI_VSYNC VPPFLASH_E CI_PCLK CTS_ON APP_ACC_UART_RX APP_ACC_UART_TX
TP607 TP605 TP606 TP603 TP604 TP608 TP609
ENBY0040301 GB042-34S-H10-E3000
G
OTP_A VBAT
Test Point
10
11
12
- 183 -
7. CIRCUIT DIAGRAM
10
11
12
50 Pin Connector To KEY and LCD FPCB

LCD_AVDD_2V8 LCD_DVDD_1V8 VBAT VDDE_1V8 VBAT
LCD_AVDD_2V8 LCD_DVDD_1V8
60 Pin Connector To Sub PCB

VBAT VDDE_1V8 VDDK_2V75
4.7K
10K
DNI
R600
10K
10K
10K
R609
R608
R607
R628
C601
C602
C603
1 2 3 4
INOUT_A1 INOUT_B1 INOUT_A2 INOUT_B2 INOUT_A3 INOUT_B3 INOUT_A4 INOUT_B4 G1 G2
9 8 7 6
1u
1u
C625 C626
47n FB604 47n FB605
MIC1P MIC1N KEYIN0 KEYIN3 KEYIN2
1u
Close to ABB
CCO1
PGND
APP_GP_LCD_ALDO_EN APP_GP_LCD_DLDO_EN
100K
R644
EVRC14S03Q030050R
FL600
B
EVRC14S03Q030050R
FL601
EVRC14S03Q030050R LCD_RS LCD_CS_N LCD_RD_N LCD_WE_N

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 53 54
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26
R603
R604
R653 R654
0 0
U600 1 VIN 2 EN1 3 EN2 4 NC1
R601
CN604 51 52
R638 CN601 G1 G2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 G3 G4 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
0 ISP_GP_FLASH_SET ISP_GP_FLASH_EN ISP_GP_FLASH_INH ACC_GP_WLAN_RESETn ACC_GP_WLAN_PWR_DOWNn ACC_SPI_WLAN_CSn ACC_GP_SPI_WLAN_IRQn ACC_GP_WLAN_EN ACC_SPI_MOSI ACC_SPI_CLK ACC_SPI_MISO SIMRST_n SIMDAT SIMVCC SIMCLK APP_ACC_UART_TX APP_ACC_UART_RX VPPFLASH_E CTS_ON FM_ANT MCLKSEC RTCCLK
R627 R626
100ohm 100ohm
ONSWA_n
KEY_LED1 KEY_LED2 KEYOUT0 KEYOUT1 KEYOUT2 APP_GP_LCD_ID WLED1 WLED2 WLED3 WLED4 WLED5
FM
LDO for LCD Power
OTP OTP_A
RESOUT1_n APP_GP_FM_GPIO2 APP_I2C_SCL APP_I2C_SDA VBACKUP

MOTOR_P MOTOR_N ACC_GP_SPI_BT_IRQ ACC_GP_SPI_BT_CSn BT_CLKREQ_n RESOUT2_n PCM_ULD PCM_DLD PCM_SYNC PCM_CLK ACC_GP_GPS_PON ACC_UART3_RX ACC_UART3_TX ACC_UART3_RTS ACC_UART3_CTS ACC_GPS_START ACC_GP_GPS_RESETn FM_LP FM_RP
10
FLASH WLAN SPI SIM TP

B
R645
10
R610
10K
BT
10
APP_GP_LCD_IF1
LCD_RESET_N
KEYOUT0 KEYOUT1 KEYOUT2

ICVS0514X350FR RSB6.8CST2R RSB6.8CST2R
GPS
10
LCD_VSYNC FL602 WLED_PWR PRSB6.8C PRSB6.8C
RSB6.8CST2R
EVLC14S02050
INSTPAR ESD9X5.0ST5G
EVLC14S02050
KEYIN0 KEYIN3 KEYIN2
R621
C638 2.2u
TRICKLE 100K R622
SOCKET
DNI
1u
1u
VA603
D600 PRSB6.8C
C604
C605
ZD605
ZD606
ZD601
VA604
ZD603
ZD604
ZD600
KEY ESD Protection

D D
5M Camera Interface
VBAT CAM_DVDD_1V8
VA602
ZD602
VA601
R611
CAM_AFVDD_2V8 CAM_AVDD_2V8
CAM_AVDD_2V8
U602 D601 PRSB6.8C CI_RES_n SYSCLK0 CI_DATA[7] CI_DATA[6] CI_DATA[5] CI_DATA[4] CI_DATA[3] CI_DATA[2] CI_DATA[1] CI_DATA[0] CI_PCLK CI_HSYNC CI_VSYNC APP_I2C_SDA APP_I2C_SCL G7 H7 H8 H6 C3 E8 F5 F4 G4 H4 F3 G3 H3 F2 E1 E2 F1 B3 A3 A8 B8 C7 C8 G1 D1 F8 B2 A2 A1 B1 A6 B6 A5 B5 4.3K 4.3K
MV9319
PGND
R632 R633
0 0
ISP_GP_FLASH_SET ISP_GP_FLASH_EN ISP_GP_FLASH_INH
CAM_DVDD_1V8
U601 1 VIN 2 EN1 3 EN2 4 NC1
E
1u 1u C614
SOMI_S_GPIO30 SIMO_S_GPIO31 SCLK_S_SDO9 SS_S_SDO8 NRESET MCLK SDO7 SDO6 SDO5 SDO4 SDO3 SDO2 SDO1 SDO0 PCLKO HSYNCO VSYNCO SDA_S SCL_S TCLK TCLKB TDATA TDATAB NSRESET SRESET SMCKO
SDA_M_MISO_M
GPIO25_SS_M GPIO26_MISO_M GPIO27_MOSI_M GPIO24_SCLK_M GPIO20_PWM0 GPIO21_PWM1 GPIO22_PWM2 GPIO23_PWM3 GPIO28_SCL_M GPIO29_SDA_M RXD TXD RGVDD_1_8V VDDIO_2_8V
VDDCO
F6 G6 G5 H5 H1 G2 H2 D2 C1 C2 E7 F7 E4 E5 D3 D4 D5 D6 C6 A7 B7 C5 B4 C4 D7 D8 E3 E6 A4 G8
0.1u
C606
1 C608 1u C609 0.1u FL603 CLKN CLKP DATAN DATAP ULCA2114C015FR

1 2 3 4 P1 P2 P3 P4 P8 P7 P6 P5 8 7 6 5
24 23 22 21 20
2 3 4 5 6 7 8 9
C607
CN603
FB600
FB601
0.1u
R614
47
ISP_SENS_MCLK
TP600 TP601
ISP_AVDD_2V8
D602 PRSB6.8C
C610 7.5p CAM_AFVDD_2V8
C611
VA600
1 P1 2 P2 3 P3 4 P4
ICMF214P101M
LDO for 5M & VGA Camera

F
19 18 17 16 15 14 ISP_SENS_I2C_SDA R635 R625 ISP_SENS_I2C_SCL APP_GP_ISP_LDO_EN C621 220p C622 2.2u 5.6K C629 1u 0 13 U603 1 VIN 2 EN1 3 EN2 4 NC1 C630 1u RT9011-MGPQW 8 VOUT1 7 VOUT2 6 NC2 5 GND C628 1u C627 1u LC Filter for power noise from GSM RF L600 47nH ISP_AVDD_2V8 FB602 BLM15AG100PN1 VBAT ISP_DVDD_1V8
5MCAM_RESET_N ISP_SENS_MCLK ISP_SENS_I2C_SDA ISP_SENS_I2C_SCL
VDDCO_E AVDDP AVDD VDDA_2_8RX VDDA_2_8TX VSSA_TX VSSA_RX DGND1

DGND2
R617
100ohm
C615 1u
C616 0.1u
C617 1u
C618 1u
C619 1u
C620 1u
8 P8 7 P7 6 P6 5 P5
10 11 5MCAM_RESET_N 12 D603 PRSB6.8C
CLKP CLKN DATAP DATAN
SCL_M_SS_M GPIO10_SCLK_M GPIO11_MOSI_M RCLK RCLKB RDATA RDATAB
DGND3 DGND4 DGND5 DGND6 TEST_0 SEL1
FB603
C623 1u
C624 0.1u
ENBY0034201 GB042-24S-H10-E3000
PGND
C613
ISP_DVDD_1V8
C612
ISP_DVDD_1V8 R618 R619
5M CAMERA Conector 5M camera ISP(MTEK vision)

LDO for ISP
10
11
12
- 184 -
7. CIRCUIT DIAGRAM
10
11
12
VDDK_2V75
WLAN
4.7nH R780 R781 0 WIFI_RF_G
TP710
ANT780 C700
DUMMY FEED
C701 100p
0 WIFI_TXRX BT_TXRX R701 ANT_SEL_N 0
FL700 XM0830SK-TL1301TMP 5 3 ANT RFGND1 7 RFGND2 8 PORT1 2 PORT2 12 10 VCTL VDD GND1 GND2 GND3 GND4 GND5 PGND 1 4 6 9 11 13
BT+FM
BT_CLKREQ_n MCLKSEC C705 4p C706 4p WIFI_RF_G VSS_BT_RF
VDD_BT
VDDE_1V8
R700
1p C702
DNI C704
U730 SN74LVC1G125DRLR 5 1 _OE VCC 2 A 4 3 GND Y C730 0.1u C731 4.7u 100K R731
A
VDD_BT R730 BT_CLK 33
WIFI_RF_G VDD_WLAN_3V3
WIFI_RF_G VDD_WLAN_1V8
C707 1u
VDDE_1V8
RF GND: Isolate from Common GND on L1, L2 and L3 Analog GND must be Isolated from Common GND on L1, L2 and L3
FB710
FB711
TP711
TP712
VDD_WLAN_1V8
Careful routing of BT_CLK Keep away from noise signals U731 STLC2593
BT_CLK_REQ_OUT_1 BT_UART_TXD BT_UART_RTS BT_RFP BT_RFN BT_VIO_A BT_VIO_B BT_VIO_C BT_VIO_D BT_VIO_E BT_VSSDIG1 BT_VSSDIG2 BT_VSSDIG3 BT_VSSDIG4 BT_VSSDIG5 BT_VSSANA1 BT_VSSANA2 BT_VSSANA3 BT_VSSANA4 BT_VSSANA5 BT_VSSANA6 BT_VSSANA7 BT_VSSANA8 BT_VSSANA9 BT_VSSANA10 BT_VSSANA11 BT_VSSANA12 BT_VSSRF1 BT_VSSRF2 BT_VSSRF3 BT_VSSRF4 BT_HVA1 BT_HVA2 BT_HVA3 BT_HVA4 BT_HVA5 BT_TEST1 BT_TEST2 BT_AF_PRG J7 G7 J6 K1 J1 RESOUT2_n K7 BT_RESETN F6 BT_REF_CLK_IN K9 BT_LP_CLK L9 RTCCLK ACC_GP_WLAN_RESETn ACC_GP_WLAN_PWR_DOWNn ACC_SPI_MOSI ACC_SPI_CLK PCM_SYNC PCM_CLK PCM_DLD PCM_ULD BT_WAKEUP
100K
R732
ACC_SPI_MISO ACC_GP_SPI_BT_CSn
10u C712
C710
22p C713
10u C714
C711
for WLAN-BT coexistence

PTA_BT_PRIO PTA_BT_STATE PTA_WLAN_ACTIVE WLAN_SLEEPn
B
FL730 5 4 VDDE_1V8 BP1 BP2 DEA212450BT-7043C1 1 U_BP BP_DC 2 C732 100p BT_TXRX
R710 100K
R711 100K
BT_CLK RTCCLK
1u
1u
T_R_N SLEEP_CLK GPIO0 BT_PRIORITY RESETN PDN WL_ACTIVE BT_STATE VDD_PA VDD30
10u C716
37 PGND1 38 PGND2 39 PGND3 40

PGND4
C717 100p WIFI_TXRX

TP713
VDD_HOST_IO GPIO6 GPIO5 SD_DAT3 GPIO2 SPI_CLK_SD_CLK GPIO4 GPIO1 VDD18 VDD12
C725 DNI
WIFI_RF_G
1 2 3 4 5 6 7 8
PGND5 PGND6 PGND7 PGND8 PGND9
1u
41 42 43 44 45 26 25 24 23 22 21 20 19
C715
N4 BT_PCM_SYNC M4 BT_PCM_CLK K5 BT_PCM_A M5 BT_PCM_B M3 BT_GPIO_9 K3 BT_GPIO_11 K4 BT_GPIO_10 J3 BT_GPIO_16 L3 BT_GPIO_8
M6 J9 N3 N5 G8 H6 H7 H8 K8 L8 D1 D2 E3 F1 F2 F3 F4 G1 G3 G4 H3 H4 H1 L1 J2 K2 L2 D3 E1 E2 E4 H2 G2 G6 VSS_BT_ANA
36 35 34 33 32 31 30 29 28 27
FB730 60
VSS_BT_RF
VDD_WLAN_1V8 PTA_BT_PRIO PTA_BT_STATE PTA_WLAN_ACTIVE WLAN_SLEEPn R733 DNI ACC_GP_SPI_WLAN_IRQn ACC_SPI_WLAN_CSn ACC_SPI_MOSI ACC_SPI_CLK ACC_SPI_MISO VDDE_1V8 VDDE_1V8 ACC_GP_SPI_BT_IRQ
100K
100K
GND1 ANT GND5 VDD18A GND2 ANT_SEL_P LBWA18HNVZ-305 ANT_SEL_N SPI_SDO_SD_DAT1 T_R3_N SPI_SINTN_SD_DAT2 SCLK ESCN SPI_SCSN_SD_DAT0 SPI_SDI_SD_CMD GND3 GND4
M710
ANT_SEL_N
R713 100K
C733 0.1u
G9 BT_GPIO_0 E7 BT_CLK_REQ_IN_1 F9 BT_CLK_REQ_IN_2 E8 BT_HOST_WAKEUP L7 BT_CONFIG_1 M7 BT_CONFIG_2 N6 BT_CONFIG_3 J8 B2 C3 M8 C1 C2 M2 J4 BT_CLK_REQ_OUT_2 BT_RSVR_CL1 BT_RSVR_CL2 BT_RSVR_D BT_RSVR_DSM BT_RSVR_N BT_RSVR_RF BT_REG_CTRL
6 3
H9 BT_UART_RXD K6 BT_UART_CTS
G2 G1
VSS_BT_ANA
R734
R714
VDD_WLAN_1V8
R715
9 10 11 12 13 14 15 16 17 18
100K
WIFI_RF_G
VDD_WLAN_1V8
VDDK_2V75
VBAT
POWER
RP101K332D 4 VDD 3 CE C722 1u U710 1 VOUT 2 GND C721 1u VDD_WLAN_3V3 0 R716 PGND 5
BT_CLKREQ_n VDD_BT VDDK_2V75
R717
R735
0.1u
VSS_BT_RF
1u
C720
C719
ACC_GP_WLAN_EN
R742
C718 1u
0.1u
C736
VDDE_1V8 RP101K182D 4 VDD 3 CE C724 1u U711 1 VOUT 2 GND C723 1u VDD_WLAN_1V8
VBAT
VDDE_1V8
C735
0.1u
N7 BT_HVD E6 BT_VDD_CLD
C734 0.1u
VDDE_1V8
PGND
R738
R740
100K
D4 F7 F8 L4 L5 L6
NC1 NC2 NC3 NC4 NC5 NC6
R737 0 C737 C738 1u 1u FM_RP FM_LP APP_I2C_SDA
FM_ROUT FM_LOUT FM_VIO FM_SDIO FM_GND1 FM_GND2 FM_GND3 FM_GND4 FM_GND5 FM_GND6 FM_GND7 FM_GND8 FM_RFGND
C5 B5 D6 D8 A3 B4 B6 B7 C4 C6 C7 D5 C8
R739 110 C739 0.1u
APP_GP_FM_GPIO2
RESOUT1_n RTCCLK
E
APP_I2C_SCL
R741 110 22n
A4 B3 A7 A6 A5 B8 C9 D7 D9 E9
FM_VA FM_VD FM_GPIO1 FM_GPIO2 FM_GPIO3 FM_FMIP FM_RSTB FM_RCLK FM_SENB FM_SCLK
A-GPS
X750 1 2 GND1 NC1 GND2 KT2520F16369ACW18T 6 VCC NC2 OUT 5 4 C750 2.2u C751 0.1u R757 0
C740
22n C741
VGPS_1V8 C743 120p
C742
10p
FM_ANT VGPS_1V8
VDDE_1V8
2.2nH L770
10 R770
R750 0
C771 0.1u
2.2u C770
VDDE_1V8
Reference Number
78x: BT/WiFi Antenna Pattern 70x: BT/WiFi RF path
C754 2.2u
RTCCLK ACC_GPS_START GPS_CNTIN VDDE_1V8 F2 CNTIN E7 SYNC_PPS B6 VDDIO1 G3 VDDIO2 G7 VDDIO3 A3 LPREGIN F5 RTCCLK A2 TCXO C752 1u ACC_GP_GPS_PON R772 0 D5 VPD F1 TESTMODE RFIN TX_SDA_MISO RX_SCL_SCK CTS_N_I2C_GRP1_SCS_N RTS_N_I2C_GRP0_MOSI INTR_N RESET_N STANDBY_N TRST_N TCK TDI TDO TMS U751 BCM4750 E1 RFSREGOUT D1 VDDIFSYNTH F6 C761 1u C760 1u B1 10nH L771 C4
GPS Clock Buffer

U750
NL17SZ126XV5T2G ACC_GP_GPS_PON MCLKSEC 2.2nH C755 100p C772 CN750 1 CN751 1 OE A VCC BBRFREGIN
R752 10
C753 0.1u
S_D
C6 B4 C5 ACC_UART3_RX ACC_UART3_TX ACC_UART3_RTS ACC_UART3_CTS G6 G2 G1 G5 F7 ACC_GP_GPS_RESETn ACC_GP_GPS_PON G4 F3 A6 A7 C7 B7 A5
BMS0 BMS1_I2C_A0 BMS2_UARTCS_N
R753 GND Y 33 GPS_CNTIN
L750
6.8nH
5 VDD 4 FIL_OUT
2 RF_IN 3 GND L772 100nH
71x~72x: WiFi 73x~74x: Bluetooth 75x~76x: A-GPS 77x: GPS LNA

G
C757
0.5p
NA
VDDLP_LPREGOUT
C756
C759 1u
GPS LNA block
100nH
E2 RFREGOUT D2 VDDRF
U770 ALM-1612
C758
C1 VSSRFSYNTH B3 VSSIFSUB
PGND
B2 ATEST0 C3 ATEST1 R756 100K VSSD1 VSSD2 VSSD3 VSSD4 VSSD5 VSSD6
BBREGOUT VDDCORE1 VDDCORE2 VDDCORE3 VDDCORE4
A4 D4 D6 E3 E6 C762 1u
GPS Power
ACC_GP_GPS_PON
TP751 TP752 TP753
VBAT
R754
100K
RP101K182D 4 VDD 3 CE 1u
U752 1 VOUT 2 GND 1u R755 VGPS_1V8 0
WIFI_RF_G
VSS_BT_RF VSS_BT_ANA
C763 1u
C764 1u
C765
C766
B5 D3 D7 E4 E5 F4
10
11
12
- 185 -
7. CIRCUIT DIAGRAM
10
11
12
60 Pin Connector From Main PCB

A A
VBAT
VDDE_1V8
VDDK_2V75
FM
B
R814 0 CN800 G1 G2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 G3 G4 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
FLASH
B
Motor
CN801 1 2
MOTOR_P MOTOR_N
BT
C
GPS
RESOUT1_n APP_GP_FM_GPIO2 APP_I2C_SCL APP_I2C_SDA VBACKUP OTP_SUB MOTOR_P MOTOR_N ACC_GP_SPI_BT_IRQ ACC_GP_SPI_BT_CSn BT_CLKREQ_n RESOUT2_n PCM_ULD PCM_DLD PCM_SYNC PCM_CLK ACC_GP_GPS_PON ACC_UART3_RX ACC_UART3_TX ACC_UART3_RTS ACC_UART3_CTS ACC_GPS_START ACC_GP_GPS_RESETn FM_LP FM_RP
ISP_GP_FLASH_SET ISP_GP_FLASH_EN ISP_GP_FLASH_INH ACC_GP_WLAN_RESETn ACC_GP_WLAN_PWR_DOWNn ACC_SPI_WLAN_CSn ACC_GP_SPI_WLAN_IRQn ACC_GP_WLAN_EN ACC_SPI_MOSI ACC_SPI_CLK ACC_SPI_MISO SIMRST_n SIMDAT SIMVCC SIMCLK APP_ACC_UART_TX APP_ACC_UART_RX VPPFLASH_E CTS_ON FM_ANT MCLKSEC RTCCLK
WLAN
SPI SIM TP Backup Battery

C
D
BACKUP BATTERY VBACKUP BAT800
PLUG
Boost Converter for Camera Flash

VBAT
SIM Interface
For Product inspection TP(7PIN)
F
SIMVCC SIMDAT and SIMCLK Siganls to be separated when routing SIMVCC
TP800 TP801 TP802 TP803 TP804
VPPFLASH_E CTS_ON APP_ACC_UART_RX SIMRST_n SIMCLK EVLC18S02003 VA800 EVLC18S02003 VA801 APP_ACC_UART_TX OTP_SUB
R801
200K
10K
C801 47n U800 ISP_GP_FLASH_SET ISP_GP_FLASH_EN 1 2 3 4 5 6 7 L800 1u CT EN_SET FLEN AGND IN LX PGND AAT1270IFO-T1 14 RSET 13 FLOUTA 12 FLGND 11 FLOUTB 10 FLINH 9 GND 8 OUT
SIMDAT R805 0
J800 4 1 GND VCC 2 5 RST VPP 3 6 CLK I_O 8 7 GND2 GND1 C803 22p C804 1u C805 33p
G_SLUG
CAMERA FLASH LED

LD800 VA807 EVLC14S02050 VA806 EVLC14S02050
R806
R807
EVLC18S02003 VA802
ISP_GP_FLASH_INH
100K
100K
C802 33p
15
R803
2.2u C807 C800 2.2u C806 DNI
SIM CONNECTOR
10
11
12
- 186 -
7. CIRCUIT DIAGRAM
5 6
10
11
12

LCD_AVDD_2V8 LCD_DVDD_1V8 VBAT CN2 51 52 1 2 50 49 48 47 CCO1 5 LCD_DATA[1] 6 LCD_DATA[2] 7 LCD_DATA[3] 8 LCD_DATA[4] 9 LCD_DATA[5] 10 LCD_DATA[6] 11 LCD_DATA[7] 12 39 40 KEYIN2 41 KEYIN3 42 KEYIN0 43 44 MIC1N 45 MIC1P 46
40 Pin Connector To LCD

LCD_AVDD_2V8 LCD_DVDD_1V8
CN1 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 R6 0
B
LCD_DATA[0]
3 4
APP_GP_LCD_ID WLED_PWR WLED1 WLED2 WLED3 WLED4 WLED5 APP_GP_LCD_IF1 LCD_RS LCD_CS_N LCD_RESET_N LCD_RD_N LCD_WE_N LCD_VSYNC LCD_IF0
ONSWA_n
C
APP_GP_LCD_IF1 LCD_RS
13 14 15 LCD_CS_N 16 LCD_RESET_N 17 LCD_RD_N 18 LCD_WE_N 19 20 LCD_VSYNC 21 22 LCD_IF0
38 KEY_LED1 37 KEY_LED2 36 35 KEYOUT0 34 KEYOUT1 33 KEYOUT2 32 APP_GP_LCD_ID 31 WLED1 30 WLED2 29 WLED3 28 WLED4 27 WLED5 26 53 54
SOCKET
D
WLED_PWR
23 24 25
Key Matrix
F
Main Key LED ( 4ea)

LD1000 KEY_LED1 VBAT SSC-TWH104-HL LD1001
F
SSC-TWH104-HL LD1002 SSC-TWH104-HL LD1003
SEND KEYIN3
SW1000 EVPAHBD6A
KEY_LED2
KEYOUT0 CLR ONSWA_n
LOCK END
C B D C_
VOLUME_DOWN
VOLUME_UP
SSC-TWH104-HL
KEYOUT2
B_ A HALF SHUTTER FULL SHUTTER KEYIN0 KEYIN2
KEYOUT1
KEYIN0
Main MIC
CCO1 C1000 47p MIC100 1 P 2 G1 3 G2 4 O SPU0410HR5H-PB
ANT Feeding
SW1001 UFL-R-SMT10 G1 G2 R4 ANT 0 0 R3 OUT101 OUT100
KEYIN0
D1000
KEYOUT2 ONSWA_n
RB521S-30
KEYIN3
KEYOUT1
SEND CLEAR KEY
END KEY
AUTO FOCUS KEY
TOUCH LOCK KEY
VOLUME KEY
MIC1N MIC1P
C1004 DNI
C1002 DNI
R123 0
5 6
10 0
11
12
- 187 -
7. CIRCUIT DIAGRAM
10
11
12

CAM_AVDD_2V8 CN901 CAM_DVDD_1V8 1 R910 47 2 3 4 TOUCH_X+ 5 TOUCH_X6 TOUCH_Y+ 7 TOUCH_Y8 9 10 APP_GP_VGA_SDN 11 APP_I2C_SDA 12 APP_I2C_SCL 13 CI_RES_n 14 15 2 1 CN902 SPK_RCV+ SPK_RCVSPK_RCV+ 16 SPK_RCV17 18 19 CI_PCLK 21 CI_VSYNC 20 22 CI_HSYNC 24 CI_DATA[6] 23 CI_DATA[7] 27 CI_DATA[3] 26 CI_DATA[4] 25 CI_DATA[5] 28 CI_DATA[2] 29 CI_DATA[1] 30 CI_DATA[0] 34 33
SYSCLK0
B
32 31
PLUG
D D
VGA Camera
E
CAM_DVDD_1V8
TOUCH CONNECTOR
E
CAM_AVDD_2V8
A2 IOVDD B6 DVDD E5 AVDD
B5 EXTCLK C6 PWRDWN D3 RESET C5 SDA D6 SCL
U901 TCM9000MD
DCLK HSYNC VSYNC DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 GND1 GND2 GND3 GND4
A3 D1 D2 B3 B1 B2 B4 C1 C2 C3 D4 A4 C4 E2 E3
R904
51
CI_PCLK CI_HSYNC CI_VSYNC CI_DATA[0] CI_DATA[1] CI_DATA[2] CI_DATA[3] CI_DATA[4] CI_DATA[5] CI_DATA[6] CI_DATA[7]
conn_axk7l10225
CN400 G1 G2 1 2 3 4 5 G3 G4 10 9 8 7 6
TOUCH_Y+ TOUCH_X+
TOUCH_XTOUCH_Y-
C901 0.1u
C900 0.1u
C913 0.1u
F1
PGND
A5 VDD15_1 E4 VDD15_2
11
12
- 188 -
8. BGA Pin Map
8. BGA Pin Map

DB3200 ( Digital BB)
: NC pin
- 189 -
8. BGA Pin Map
AB3100 (Analog Baseband)
: NC pin
- 190 -
8. BGA Pin Map
MCP (2G NAND / 1G SDRAM)
- 191 -
8. BGA Pin Map
RF3300
- 192 -
8. BGA Pin Map
Bluetooth STLC2593
Top View
NC pin
- 193 -
8. BGA Pin Map
GPS BCM4750 Top View
TCK
TDO
TDI
VSSD3
SYNC_PPS
INTR_N
VDDIO3
TRST_N
VDDIO1
BMS0
VDDCORE2
VDDCORE4
VDDLP_LPREGOUT
TX_SDA_MISO
TMS
VSSD1
BMS2_UARTCS_N
VPD
VSSD5
RTCCLK
RTS_N_I2C_GRP0_MOSI
BBREGOUT
BMS1_I2C_A0
BBRFREGIN
VDDCORE1
VSSD4
VSSD6
RESET_N
LPREGIN
VSSIFSUB
ATEST1
VSSD2
VDDCORE3
STANDBY_N
VDDIO2
TCXO
ATEST0
VDDRF
RFREGOUT
CNTIN
RX_SCL_SCK
RFIN
VSSRFSYNTH
VDDIFSYNTH
RFSREGOUT
TESTMODE
CTS_N_I2C_GRP1_SCS_N
Not use
- 194 -
9. PCB LAYOUT
U404 Touch Level shifter No touch operation S400 SD card socket No SD card operation U405 Touch screen driver IC No touch operation U406 LDO for touch No touch operation U602 ISP chipset No 5M camera U603 LDO for ISP No 5M camera U601 LDO for camera No VGA camera No 5M camera FL501 EMI/ESD lter No UART communication No download
U400 Motor Amp No motor operation
U402 LDO for Motor No Motor operation
U403 MicroSD level shifter No SD card operation U401 3-Axis sensor No 3-Axis sensor operation
U102 WCDMA band I PA No service U107 WCDMA band VIII PA No service U109 DC/DC converter No service
X100 26M Crystal No booting No service U111 RFIC No service U101 FEM + GSM PA No service
- 195 -
9. PCB LAYOUT
CN603 5M camera Con. No 5M camera U502 USB transceiver No download No data service U200 Memory No booting U201 DBB No booting No service No display
CN503 VGA FPCB Con. No VGA camera No touch operation No sound
CN500 5Pin Micro USB Con. No Charging No headset No download
U500 OVP IC No charging U501 MUIC No download No headset
CN601 60Pin Sub Con. No SIM No GPS operation No Wi-Fi operation No BT operation No FM radio operation No Flash
SW100 No service
U301 Audio Amp No Sound SW101 No service
U600 LDO for LCD No display CN604 50Pin Con. No display No keypad input No power on No mic input
U300 PMIC No power on No service No charging No sound
X300 crystal No power on
U604 Backlight charge pump No display
- 196 -
9. PCB LAYOUT
X750 TCXO for GPS No GPS CN750/CN751 GPS ant. pad No GPS
LD800 No ash
U800 bust converter No ash
CN801 Motor pad No motor operation
U770 GPS LNA No GPS U751 GPS IC No GPS
ANT780 No BT connection No Wi-Fi service U731 BT+FM radio IC No BT connection No FM radio
M710 Wi-Fi Module No wi-service
J800 SIM socket No SIM
CN800 60Pin Sub Con. No SIM No GPS operation No Wi-Fi operation No BT operation No FM radio operation No Flash
- 197 -
9. PCB LAYOUT
CN2 50Pin Con. No display No keypad input No power on No mic input
LD1001 No power on
MIC100 No mic
SW100 No service
- 198 -
9. PCB LAYOUT
CN1 40Pin Con. No display
- 199 -
9. PCB LAYOUT
CN400 touch con. No touch operation
CN901 VGA FPCB Con. No VGA camera No touch operation No sound
U901 VGA camera No VGA operation
- 200 -
9. PCB LAYOUT
CN902 speaker pad No sound
- 201 -
- 202 -
10. CALIBRATION
10. CALIBRATION
10.1 General Description
This document describes the installation and software usage for the calibration of LGs GSM/GPRS/EDGE/WCDMA Multimedia Mobile Phone. The calibration menu and its result is displayed in PC terminal by Mobile phone.
10.2 Environment
10.2.1 H/W Environment
- PC with RS-232 Interface & GPIB card installed - GSM/GPRS/EDGE/WCDMA Multimedia Mobile Set - Agilent 8960 Series 10 E5515C Instrument (E1987A above version A.05.28) - Tektronix PS2521G Power Supply or Agilent A66311B - ETC (GPIB cable, Serial cable, RF cable, Power cable, Dummy battery)
10.2.2 S/W Environment

- National Instrument GPIB & VISA (version 2.60 full) driver install - Agilent 8960 VXI driver(E1960) install - HotKimchi EXE files - OS : Window98, Window2000, WindowXP
10.2.3 Configuration Diagram of Calibration Environment
KF757
Figure 10-1. Calibration Configuration
- 203 -
10. CALIBRATION
10.3 Calibration Environment

Ensure that the following conditions are maintained throughout the duration of the tests and calibrations described within this document.
Parameter Temperature Relative Humidity Vbatt Supply current
Min 15 20 3.6 0
Typical 25 40 3.7
Max 30 75 3.8 3
Unit C % V A
Table 10-1. Nominal Environmental Test Conditions
- 204 -
10. CALIBRATION
10.4 Program Operation

10.4.1 HotKimchi Program Overview
When trying to calibrate the mobile phone, the service engineers make a configuration of calibration environment like Figure10-1. And if you finish making configuration, please execute the HotKimchi program. See Figure 10-2. HotKimchi supports following functions. - Calibration of GSM850/900/1800/1900, WCDMA 2100/900 - Instrument (Agilent8960, Tektronix PS2521G) control - UART communication with mobile phone
GT500
Figure 10-2. HotKimchi Window
- 205 -
10. CALIBRATION
10.4.2 SETTING
Select a Ezlooks menu.
Select OFF-LINE in the EZLOOKS Mode.
- 206 -
10. CALIBRATION
Select a Line System menu.
Select MANUAL in the RUN MODE. Select NO in the MULTI CAL SYSTEM.
GT500
- 207 -
10. CALIBRATION
Select a Logic Operation menu.
Select LOGIC MODE that you want. 1. CAL only 2. AUTO only 3. CAL + AUTO Select UART Port for only S/B1 to communicate with mobile phone.
GT500
- 208 -
10. CALIBRATION
10.4.3 Calibration Procedure

Select a model name GT500. Click the START button.
GT500
RF Calibration steps as follow : DCS PCS PCS GSM850 WCDMA2100 WCDMA900 When RF calibration is finished, the result of judgment will be displayed.
GT500
- 209 -
- 210 -
11. EXPLODED VIEW & REPLACEMENT PART LIST

11.1 EXPLODED VIEW
60 67 31 30
26 25 20 18 19 63
27
28 29 32 64
4 5 1
9 33
14 63
65
2 59 17 16 10 11 68 61 21 22 40 39 8 50 38 35 36 34 51 37 66 6 47 45 48 46 55 12 41 42 44 43 52 53 56 57 15 58 3 7
13 24
49 54
- 211 -
ASSY EXPLODED VIEW
D F
A B E
F E D C B A
- 212 -
11.2 Replacement Parts

<Mechanic component>
Level Location No. AAAY00 Description Part Number
Note: This Chapter is used for reference, Part order is ordered by SBOM standard on GCSC
Spec
Color WITHOUT COLOR
Remark
ADDITION
AAAY0395901
AMBA00
MANUAL ASSY,OPERATION
AMBA0155801
GT500 manual assy for TMU
WITHOUT COLOR SILVER SNOW WITHOUT COLOR BLACK WITHOUT COLOR BLACK WITHOUT COLOR WITHOUT COLOR Without Color Without Color BLACK F, 7 D, 12
MCHZ00
COMPACT DISK
MCHZ0078101
COMPLEX, (empty), , , , ,
MMBB00
MANUAL,OPERATION
MMBB0343001
PRINTING, (empty), , , , ,
APKA00
PEN ASSY,STYLUS
APKA0001101
MBAD00
BAG,VINYL(PE)
MBAD0008404
MCJA00
COVER,BATTERY
MCJA0082401
MOLD, PC LUPOY SC-1004A, , , , ,
MPHY00
PROTECTOR
MPHY0016901
COMPLEX, (empty), , , , , GT500 TMU(TR1/3018&4541 LB/WD-9501/Angle/PLB2ea/Seal/Bag) TR1 Angle Palletizing (Angle/WD-9501/400ea)
APAY00
PACKAGE
APAY0131205
APLY00
PALLET ASSY
APLY0002303
MCJZ00
COVER
MCJZ0030520
COVER(for TR 1 Angle_COVER_GSM)
4 3
MPCY00 BSEA00
PALLET SUPPLEMENTARY PART
MPCY0009501 BSEA0003901
PALLET(G7100 for Orange UK_EUR) PACKING-LIST ENVELOPE
MBAD00
BAG,VINYL(PE)
MBAD0005204
Without Color Without Color Without Color Without Color WITHOUT COLOR WITHOUT COLOR Red
MLAC00
LABEL,BARCODE
MLAC0004541
MLAC01
LABEL,BARCODE
MLAC0003018
MLAJ00
LABEL,MASTER BOX
MLAJ0004402
LABEL,MASTER BOX(for CGR TDR 2VER. mbox_label)
MLAZ
LABEL
MLAZ0048203
MLAZ00
LABEL
MLAZ0050901
MPAE00
PACKING,BLISTER
MPAE0007803
- 213 -
Level 2 3 4
Location No. APEY00 ACGM00 MCCE00 PHONE
Description
Part Number APEY0750101 ACGM0129501 MCCE0049201
Spec
Color BLACK BLACK
Remark
COVER ASSY,REAR CAP,RECEPTACLE
C 54
MOLD, PC LUPOY SC-1004A, , , , ,
BLACK WITHOUT COLOR BLACK BLACK BLACK WITHOUT COLOR BLACK WITHOUT COLOR BLACK WITHOUT COLOR BLACK BLACK BLACK BLACK WITHOUT COLOR WITHOUT COLOR WITHOUT COLOR BLACK BLACK SILVER BLACK
MCCF00
CAP,MOBILE SWITCH
MCCF0060901
4 4 4
MCCG00 MCJN00 MDAD00
CAP,MULTIMEDIA CARD COVER,REAR DECO,CAMERA
MCCG0019101 MCJN0098701 MDAD0045101
MOLD, PC LUPOY SC-1004A, , , , , MOLD, PC LUPOY SC-1004A, , , , , ELECTROFORMING, Cu, , , , ,
52 53 58
MGAD01
GASKET,SHIELD FORM
MGAD0197801
46
MHCY00
HANGER
MHCY0003101
MOLD, Urethane Rubber S195A, , , , ,
44
MLAB03
LABEL,A/S
MLAB0003601
MLCE00
LENS,FLASH
MLCE0012701
MOLD, PMMA HI835M, , , , ,
48
MPBF00
PAD,FLEXIBLE PCB
MPBF0041401
41
4 4 4 4
MPBJ00 MPBT00 MPBZ00 MPBZ01
PAD,MOTOR PAD,CAMERA PAD PAD
MPBJ0062001 MPBT0072101 MPBZ0225101 MPBZ0228201
COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , ,
43 49 47 45
MTAA00
TAPE,DECO
MTAA0188101
57
MTAB00
TAPE,PROTECTION
MTAB0332701
66
MTAK00
TAPE,CAMERA
MTAK0024701
56
4 3 4 4 5 5 5 5
MWAE00 ACGV00 ABGF00 ACGK00 MBJL00 MBJL01 MCJK01 MDAG01
WINDOW,CAMERA COVER ASSY,BAR BUTTON ASSY,MAIN COVER ASSY,FRONT BUTTON,SIDE BUTTON,SIDE COVER,FRONT DECO,FRONT
MWAE0045001 ACGV0004301 ABGF0012901 ACGK0130701 MBJL0081801 MBJL0081701 MCJK0102001 MDAG0046701
CUTTING, PMMA MR 200, , , , ,
13 A 3
MOLD, PC LUPOY SC-1004A, , , , , MOLD, PC LUPOY SC-1004A, , , , , MOLD, PC LUPOY SC-1004A, , , , , MOLD, PC LUPOY SC-1004A, , , , ,
BLACK BLACK BLACK SILVER
15 14 9 4
- 214 -
Level 5 5
Location No. MDAK01 MFBC01
Description DECO,REAR FILTER,SPEAKER
Part Number MDAK0018001 MFBC0048501
Spec MOLD, PC LUPOY SC-1004A, , , , , COMPLEX, (empty), , , , ,
Color BLACK BLACK WITHOUT COLOR WITHOUT COLOR WITHOUT COLOR WITHOUT COLOR WITHOUT COLOR WITHOUT COLOR WITHOUT COLOR WITHOUT COLOR
Remark 11 20
MFBD01
FILTER,MIKE
MFBD0038201
17
MPBT01
PAD,CAMERA
MPBT0075501
19
MPBU01
PAD,CONNECTOR
MPBU0063501
18
MTAA01
TAPE,DECO
MTAA0187401
10
MTAB01
TAPE,PROTECTION
MTAB0299601
MTAB02
TAPE,PROTECTION
MTAB0336001
68
MTAK01
TAPE,CAMERA
MTAK0024601
63
ADBY00
DECO ASSY
ADBY0015001
MBFZ00
BRACKET
MBFZ0035501
CUTTING, STS, , , , ,
WITHOUT COLOR WITHOUT COLOR WITHOUT COLOR BLACK WITHOUT COLOR WITHOUT COLOR WITHOUT COLOR BLACK
22
MTAD00
TAPE,WINDOW
MTAD0109001
21
AFBZ00
FRAME ASSY
AFBZ0012701
LCD BRACKET assy
MBFF00
BRACKET,LCD
MBFF0024501
PRESS, STS, , , , ,
28
MGAD00
GASKET,SHIELD FORM
MGAD0198601
64
MTAA00
TAPE,DECO
MTAA0197401
62
MTAA01
TAPE,DECO
MTAA0200001
32
4 5 5
AHCZ00 MDAH00 MPBN00
HOLDER ASSY DECO,RECEIVER PAD,SPEAKER
AHCZ0002101 MDAH0025801 MPBN0068601 MOLD, PC LUPOY SC-1004A, , , , , COMPLEX, (empty), , , , , 1.4 mm,1.8 mm,SWCH18A ,N ,+ , ,; ,[empty] ,+ , , ,CR-7 ,WHITE ,[empty] ,[empty] COMPLEX, (empty), , , , ,
BLACK BLACK WHITE SILVER WITHOUT COLOR BLACK
31 30
GMEY00
SCREW MACHINE,BIND
GMEY0019201
29
MGAD00
GASKET,SHIELD FORM
MGAD0196901
59
MPBG01
PAD,LCD
MPBG0089501
- 215 -
Level
Location No. MPBG02
Description
Part Number
Spec
Color WITHOUT COLOR WITHOUT COLOR WITHOUT COLOR WITHOUT COLOR WITHOUT COLOR BLACK WITHOUT COLOR WITHOUT COLOR BLACK
Remark
PAD,LCD
MPBG0096401
61
MTAA00
TAPE,DECO
MTAA0202201
67
MTAB01
TAPE,PROTECTION
MTAB0299901
2, 16
MTAB02
TAPE,PROTECTION
MTAB0333101
65
MTAC01
TAPE,SHIELD
MTAC0091301
60
MWAC01
WINDOW,LCD
MWAC0114501
CUTTING, Tempered Glass, , , , ,
GMEY
SCREW MACHINE,BIND
GMEY0011201
1.4 mm,3 mm,MSWR3(BK) ,N ,+ ,NYLOK
E, 24
MLAA00
LABEL,APPROVAL
MLAA0062304
5 6 6 6
AFBA00 MFEA00 MPBU00 MTAF00
FRAME ASSY,SHIELD FRAME,SHIELD PAD,CONNECTOR TAPE,MOTOR
AFBA0012001 MFEA0027701 MPBU0063301 MTAF0025201 MOLD, PC LUPOY SC-1004A, , , , , COMPLEX, (empty), , , , , COMPLEX, (empty), , , , ,
BLACK BLACK BLACK WITHOUT COLOR WITHOUT COLOR WITHOUT COLOR WITHOUT COLOR BLACK BLACK WITHOUT COLOR
38 37
AFBA01
FRAME ASSY,SHIELD
AFBA0013901
GT505 SHIELD CAN COVER ASSY
MCBA00
CAN,SHIELD
MCBA0043301
PRESS, STS, , , , ,
34
MGAD00
GASKET,SHIELD FORM
MGAD0200401
MPBU00
PAD,CONNECTOR
MPBU0063201
50
7 7
MPBU01 MTAC00
PAD,CONNECTOR TAPE,SHIELD
MPBU0063401 MTAC0087801
COMPLEX, (empty), , , , , COMPLEX, (empty), , , , ,
MLAZ00
LABEL
MLAZ0038301
PID Label 4 Array
- 216 -
11.2 Replacement Parts

<Main component>
Level 1 4 SNGF00 Location No. Description IMT,BAR/FLIP ANTENNA,GSM,FIXED Part Number TIMT0005201 SNGF0046101
Spec
Color BLACK
Remark
3.0 ,-2.0 dBd, ,GPS, FPCB ,; ,SINGLE ,-2.0 ,50 ,3.0 3.0 ,-2.0 dBd, ,GSM850/GSM900/DCS/PCS/Band1/Band8, INTERNAL ,; ,MULTI ,-2.0 ,50 ,3.0
SNGF01
ANTENNA,GSM,FIXED
SNGF0046203
4 5
SACY00 SACE00
PCB ASSY,FLEXIBLE PCB ASSY,FLEXIBLE,SMT PCB ASSY,FLEXIBLE,SMT BOTTOM CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER PCB ASSY,FLEXIBLE,SMT TOP CONNECTOR,BOARD TO BOARD CONNECTOR,BOARD TO BOARD CAMERA PCB,FLEXIBLE PCB ASSY,FLEXIBLE PCB ASSY,FLEXIBLE,SMT PCB ASSY,FLEXIBLE,SMT BOTTOM CONNECTOR,BOARD TO BOARD PCB ASSY,FLEXIBLE,SMT TOP CAP,CERAMIC,CHIP CAP,CHIP,MAKER
SACY0090901 SACE0083501
SACC00
SACC0058701
7 7 7 7 7
C900 C901 C913 R904 R910
ECZH0003103 ECZH0003103 ECZH0003103 ERHZ0000490 ERHZ0000483
0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 51 ohm,1/16W ,J ,1005 ,R/TP 47 ohm,1/16W ,J ,1005 ,R/TP
SACD00
SACD0071701
CN400
ENBY0018601
10 PIN,.4 mm,STRAIGHT , ,H=0.9, SOCKET
CN901
ENBY0040201
34 PIN,0.4 mm,ETC , ,H=1.0, Plug
7 6 4 5
U901 SPCY00 SACY01 SACE00
SVCY0019901 SPCY0175001 SACY0091001 SACE0083601
CMOS ,VGA ,Toshiba(1/10"), 4x4x2.23t, Reflow Type POLYI ,0.3 mm,MULTI-3 , ,; , , , , , , , , ,
SACC00
SACC0059001
CN1
ENBY0036001
40 PIN,0.4 mm,ETC , ,H=1.0, Socket
SACD00
SACD0071801
7 7
C1000 C1002
ECCH0000122 ECZH0000802
47 pF,50V,J,NP0,TC,1005,R/TP 1 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP
- 217 -
Level
Location No. CN2
Description CONNECTOR,BOARD TO BOARD DIODE,SWITCHING
Part Number
Spec 50 PIN,0.4 mm,STRAIGHT , , ,; , ,0.40MM ,STRAIGHT ,MALE ,SMD ,P/TR , , EMD2 ,30 V,1 A,R/TP ,VF=1.5V(IF=200mA) , IR=30uA(VR=10V) WHITE ,1608 ,R/TP ,PB-FREE(ZENER) WHITE ,1608 ,R/TP ,PB-FREE(ZENER) WHITE ,1608 ,R/TP ,PB-FREE(ZENER) WHITE ,1608 ,R/TP ,PB-FREE(ZENER) UNIT ,-42 dB,3.76*2.95*1.1 ,mems smd mic ,; , , ,OMNI ,[empty] , ,[empty] 0 ohm,1/16W ,J ,1005 ,R/TP 0 ohm,1/16W ,J ,1005 ,R/TP 1.5 nH,J ,1005 ,R/TP , 0 ohm,1/16W ,J ,1005 ,R/TP 15 V,20 mA,HORIZONTAL ,1 G, ,; ,1C1P ,[empty] ,[empty] ,[empty] , ,[empty] ,SMD , dB, POLYI ,0.3 mm,MULTI-3 , ,; , , , , , , , , , ASSY ,8 ohm,90 dB,1812 mm,10mm ,; , , , , , , ,[empty] Main ,3.0 inch ,240*400 ,74.9*44.88*2.0t ,262K ,TFT ,TM ,NEC(uPD161710) , , 65 mm, LINE, ,; ,[empty] ,[empty] ,[empty] , ,[empty] , ,[empty]
Color
Remark
ENBY0042001
D1000
EDSY0011901
7 7 7 7
LD1000 LD1001 LD1002 LD1003
DIODE,LED,CHIP DIODE,LED,CHIP DIODE,LED,CHIP DIODE,LED,CHIP
EDLH0011901 EDLH0011901 EDLH0011901 EDLH0011901
MIC100
MICROPHONE
SUMY0010609
7 7 7 7
R123 R3 R4 R6
RES,CHIP,MAKER RES,CHIP,MAKER INDUCTOR,CHIP RES,CHIP,MAKER
ERHZ0000401 ERHZ0000401 ELCH0004726 ERHZ0000401
SW1000
SWITCH,TACT
ESCY0006101
7 6 4
SW1001 SPCY SUSY00
CONN,RF SWITCH PCB,FLEXIBLE SPEAKER
ENWY0003901 SPCY0174901 SUSY0027506
SVLM00
LCD MODULE
SVLM0035301
SWCC00
CABLE,COAXIAL
SWCC0006501
3 4 5 5
SAFY00 SAFB00 BRAH00 SACY00
PCB ASSY,MAIN PCB ASSY,MAIN,INSERT RESIN,PC PCB ASSY,FLEXIBLE PCB ASSY,FLEXIBLE,INSERT PCB ASSY,FLEXIBLE,SMT PCB ASSY,FLEXIBLE,SMT BOTTOM ANTENNA,GSM,FIXED
SAFY0316001 SAFB0103801 BRAH0001301 SACY0090801 ; , , , ,[empty] Black
SACB00
SACB0056001
SACE00
SACE0083401
SACC00
SACC0058601 3.0 ,-2.0 dBd, ,BLUETOOTH, SMD, 3.2*1.6*1.2 ,; ,SINGLE ,-2.0 ,50 ,3.0
ANT780
SNGF0046501
- 218 -
Level
Location No. BAT800
Description
Part Number
Spec 2 V,0.5 mAh,CYLINDER ,Reflow type BB, Max T 1.67, phi 4.8, Pb-Free 0 ohm,1/16W ,J ,1005 ,R/TP 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 1 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP 4 pF,50V,C,NP0,TC,1005,R/TP 4 pF,50V,C,NP0,TC,1005,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm 22 pF,50V,J,NP0,TC,1005,R/TP 10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 4.7 uF,10V ,M ,X5R ,TC ,1608 ,R/TP 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP
Color
Remark
BATTERY,CELL,LITHIUM
SBCL0001701
8 8 8 8 8 8 8 8
C700 C701 C702 C705 C706 C707 C710 C711
RES,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP
ERHZ0000401 ECZH0000813 ECZH0000802 ECCH0000105 ECCH0000105 ECCH0004904 ECCH0004904 ECCH0004904
C712
CAP,CERAMIC,CHIP
ECCH0005604
C713
CAP,CERAMIC,CHIP
ECCH0000115
C714
CAP,CERAMIC,CHIP
ECCH0005604
C715
CAP,CERAMIC,CHIP
ECCH0004904
C716
CAP,CERAMIC,CHIP
ECCH0005604
8 8 8 8 8 8 8 8 8 8 8 8 8 8
C717 C718 C719 C720 C721 C722 C723 C724 C730 C731 C732 C733 C734 C735
CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER
ECZH0000813 ECCH0004904 ECZH0003103 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECZH0003103 ECCH0007802 ECZH0000813 ECZH0003103 ECZH0003103 ECZH0003103
- 219 -
Level 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8
Location No. C736 C737 C738 C739 C740 C741 C742 C743 C750 C751 C752 C753 C754 C755 C756 C758 C759 C760 C761 C762 C763 C764 C765 C766 C770 C771 C772 C800 C801 C802
Description CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP INDUCTOR,CHIP CAP,CHIP,MAKER INDUCTOR,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER
Part Number ECZH0003103 ECCH0004904 ECCH0004904 ECZH0003103 ECCH0000179 ECCH0000179 ECCH0000110 ECCH0000129 ECCH0000198 ECZH0003103 ECCH0004904 ECZH0003103 ECCH0000198 ELCH0004721 ECZH0001002 ELCH0004727 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0000198 ECZH0003103 ECZH0000813 ECCH0005603 ECCH0000163 ECZH0000830
Spec 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 22 nF,16V ,K ,X5R ,HD ,1005 ,R/TP 22 nF,16V ,K ,X5R ,HD ,1005 ,R/TP 10 pF,50V,D,NP0,TC,1005,R/TP 120 pF,50V,J,NP0,TC,1005,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP 2.2 nH,S ,1005 ,R/TP , 0.5 pF,50V ,B ,NP0 ,TC ,1005 ,R/TP 100 nH,J ,1005 ,R/TP , 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 2.2 uF,10V ,K ,X5R ,TC ,1608 ,R/TP 47 nF,10V,K,X5R,HD,1005,R/TP 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
Color
Remark
- 220 -
Level 8 8 8 8 8 8
Location No. C803 C804 C805 C807 CN750 CN751
Description CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CONNECTOR,ETC CONNECTOR,ETC CONNECTOR,BOARD TO BOARD FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,BEAD,CHIP
Part Number ECCH0000115 ECCH0004904 ECZH0000830 ECCH0000198 ENZY0018801 ENZY0018801
Spec 22 pF,50V,J,NP0,TC,1005,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP PIN, mm,ETC , ,RCS=1.35 PIN, mm,ETC , ,RCS=1.35 60 PIN,0.4 mm,STRAIGHT , , ,; , ,0.40MM ,STRAIGHT ,MALE ,SMD ,[empty] , , 600 ohm,1005 , 600 ohm,1005 , 60 ohm,1005 , 800 , MHz,0.3 dB,30 dB,25000 , MHz,0.3 dB,32 dB,SMD ,ETC ,2.5x2.5x0.75 2450 MHz,2.0*1.5*1.0 ,SMD ,Pb-free_B/T_SAW 6 PIN,ETC , ,2.54 mm,H=1.5 6.8 nH,J ,1005 ,R/TP ,Pb Free 2.2 nH,S ,1005 ,R/TP , 10 nH,J ,1005 ,R/TP ,PBFREE 100 nH,J ,1005 ,R/TP , 1 uH,N ,2.5x2.0x1.2 ,R/TP ,MLCI,power inductor ,; ,1uH ,30% ,; ,; ,; ,; ,; ,[empty] ,2.5X2MM ,[empty] ,[empty] ,Inductor,Wire Wound,Chip WHITE ,1 LED,3.5X2.8X0.6T ,R/TP , WiFi Module(Marvell8686), 8.2x8.4x1.0 ,; ,WLAN 100 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 0 ohm,1/16W ,J ,1005 ,R/TP 0 ohm,1/10W ,J ,1608 ,R/TP 33 ohm,1/16W ,J ,1005 ,R/TP
Color
Remark
CN800
ENBY0045401
8 8 8
FB710 FB711 FB730
SFBH0008101 SFBH0008101 SFBH0000909
FL700
FILTER,SEPERATOR,SPDT
SFAC0002101
8 8 8 8 8 8
FL730 J800 L750 L770 L771 L772
FILTER,SAW CONN,SOCKET INDUCTOR,CHIP INDUCTOR,CHIP INDUCTOR,CHIP INDUCTOR,CHIP
SFSY0027301 ENSY0018101 ELCH0001408 ELCH0005001 ELCH0001041 ELCH0004727
L800
INDUCTOR,SMD,POWER
ELCP0008009
8 8 8 8 8 8 8 8 8 8
LD800 M710 R710 R711 R713 R714 R715 R716 R717 R730
DIODE,LED,MODULE MODULE,ETC RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER
EDLM0009401 SMZY0022701 ERHZ0000406 ERHZ0000406 ERHZ0000406 ERHZ0000406 ERHZ0000406 ERHZ0000401 ERHZ0000701 ERHZ0000463
- 221 -
Level 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8
Location No. R731 R732 R734 R735 R737 R738 R739 R740 R741 R742 R750 R752 R753 R754 R755 R756 R757 R770 R772 R780 R781 R801 R803 R805 R806 R807 R814
Description RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER INDUCTOR,CHIP RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER
Part Number ERHZ0000406 ERHZ0000406 ERHZ0000406 ERHZ0000401 ERHZ0000401 ERHZ0000406 ERHZ0000408 ERHZ0000401 ERHZ0000408 ERHZ0000401 ERHZ0000401 ERHZ0000402 ERHZ0000463 ERHZ0000406 ERHZ0000401 ERHZ0000406 ERHZ0000401 ERHZ0000206 ERHZ0000401 ELCH0004704 ERHZ0000401 ERHZ0000238 ERHZ0000405 ERHZ0000401 ERHZ0000406 ERHZ0000406 ERHZ0000701
Spec 100 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 0 ohm,1/16W ,J ,1005 ,R/TP 0 ohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 110 ohm,1/16W ,J ,1005 ,R/TP 0 ohm,1/16W ,J ,1005 ,R/TP 110 ohm,1/16W ,J ,1005 ,R/TP 0 ohm,1/16W ,J ,1005 ,R/TP 0 ohm,1/16W ,J ,1005 ,R/TP 10 ohm,1/16W ,J ,1005 ,R/TP 33 ohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 0 ohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 0 ohm,1/16W ,J ,1005 ,R/TP 10 ohm,1/16W ,F ,1005 ,R/TP 0 ohm,1/16W ,J ,1005 ,R/TP 4.7 nH,S ,1005 ,R/TP , 0 ohm,1/16W ,J ,1005 ,R/TP 200 Kohm,1/16W ,F ,1005 ,R/TP 10 Kohm,1/16W ,J ,1005 ,R/TP 0 ohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 0 ohm,1/10W ,J ,1608 ,R/TP DFN1612-4B ,4 ,R/TP ,300mA 3.3V LDO ,; ,IC,LDO Voltage Regulator DFN1612-4B ,4 ,R/TP ,300mA 1.8V LDO ,; ,IC,LDO Voltage Regulator
Color
Remark
U710
IC
EUSY0367001
U711
IC
EUSY0366901
- 222 -
Level 8
Location No. U730 IC
Description
Part Number EUSY0245902
Spec DRL ,5 PIN,R/TP ,SINGLE,BUFFER,3STATE,1.7X1.7 WFBGA ,100 PIN,R/TP ,Bluetooth+FM 5*7.5*0.8 ,; ,IC,Bluetooth SOT553-5 ,5 ,R/TP ,1.6X1.6 , SINGLE,BUFFER,Noninverting,3STATE,High active ,; ,IC,Buffer WLBGA ,81 ,R/TP ,Pb-free_GPS IC ,; ,IC,GPS DFN1612-4B ,4 ,R/TP ,300mA 1.8V LDO ,; ,IC,LDO Voltage Regulator LNA Module(GPS LNA+B/P Filter) ,; ,RF Module DFN ,14 PIN,R/TP ,700mA Boost converter ,; ,IC,DC,DC Converter 18 V, ,SMD ,3pF, 1005 18 V, ,SMD ,3pF, 1005 18 V, ,SMD ,3pF, 1005 14 V, ,SMD ,50pF, 1005 14 V, ,SMD ,50pF, 1005 16.369 MHz,0.5 PPM,10 pF,SMD ,25X20X0.8 ,Sirf GPS chip clock, 16.369MHz, 1.7~3.5V, Pb-Free ,; ,16.369MHz ,[empty] ,1.8V , , , , ,SMD ,R/TP POLYI ,0.33 mm,BUILD-UP 4 , ,; , , , , , , , , ,
Color
Remark
U731
IC
EUSY0358701
U750
IC
EUSY0149403
U751
IC
EUSY0380101
U752
IC
EUSY0366901
U770
MODULE,ETC
SMZY0016502
U800
IC
EUSY0264502
8 8 8 8 8
VA800 VA801 VA802 VA806 VA807
VARISTOR VARISTOR VARISTOR VARISTOR VARISTOR
SEVY0004001 SEVY0004001 SEVY0004001 SEVY0001001 SEVY0001001
X750
TCXO
EXST0002001
SPCY
PCB,FLEXIBLE
SPCY0171401
SJMY00
VIBRATOR,MOTOR
SJMY0007112
2 V,40 mA,10*3.0 ,Quick response 17mm ,; ,3V , , , , , , , CMOS ,MEGA ,5M AF [FPCB, Sony 5M 1/3.2"(IMX034), CCP2]
SVCY00
CAMERA
SVCY0017301
SAFF00
PCB ASSY,MAIN,SMT PCB ASSY,MAIN,SMT BOTTOM CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP
SAFF0229201
SAFC00
SAFC0125301
6 6 6 6 6 6 6 6
C125 C200 C201 C202 C203 C204 C205 C206
ECCH0000115 ECZH0003103 ECZH0003103 ECZH0003103 ECCH0000143 ECZH0003103 ECZH0003103 ECCH0004904
22 pF,50V,J,NP0,TC,1005,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 nF,50V,K,X7R,HD,1005,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP
- 223 -
Level 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
Location No. C207 C208 C209 C210 C211 C212 C213 C214 C215 C216 C217 C218 C219 C220 C221 C222 C223 C224 C225 C226 C227 C228 C229 C230 C231 C232 C233 C234 C235 C236
Description CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER
Part Number ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECCH0004904 ECCH0000161 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECCH0004904 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103
Spec 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 33 nF,16V,K,X7R,HD,1005,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP
Color
Remark
- 224 -
Level 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
Location No. C237 C238 C239 C240 C241 C300 C301 C302 C303 C304 C305 C306 C307 C308 C309 C310 C311 C312 C314
Description CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER
Part Number ECZH0003103 ECZH0003103 ECZH0003103 ECZH0003103 ECCH0004904 ECZH0003103 ECCH0006201 ECCH0000198 ECCH0000198 ECCH0000198 ECCH0006201 ECCH0006201 ECCH0000198 ECCH0004904 ECCH0004904 ECCH0006201 ECCH0004904 ECCH0004904 ECZH0003103
Spec 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 4.7 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP 4.7 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP 4.7 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 4.7 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm 10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm 10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP
Color
Remark
C315
CAP,CERAMIC,CHIP
ECCH0005604
C317
CAP,CERAMIC,CHIP
ECCH0005604
C318
CAP,CERAMIC,CHIP
ECCH0005604
6 6 6 6 6 6 6
C319 C320 C321 C323 C325 C326 C327
CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER
ECZH0003103 ECCH0000115 ECCH0000115 ECCH0004904 ECZH0003103 ECZH0003103 ECZH0003103
- 225 -
Level 6 6 6
Location No. C328 C329 C330
Description CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP
Part Number ECCH0000115 ECCH0000115 ECCH0000115
Spec 22 pF,50V,J,NP0,TC,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 33 uF,10V ,M ,STD ,2012 ,R/TP ,; , ,[empty] ,[empty] , ,[empty] , ,[empty] ,[empty] ,[empty] ,[empty] 1 uF,10V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,10V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 47000 pF,10V ,K ,B ,HD ,1005 ,R/TP 3.3 nF,50V,K,X7R,HD,1005,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 18000 pF,16V ,K ,X7R ,HD ,1005 ,R/TP 18000 pF,16V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 4.7 uF,10V ,M ,X5R ,TC ,1608 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP
Color
Remark
C331
CAP,TANTAL,CHIP
ECTH0005203
6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
C332 C333 C334 C335 C336 C337 C338 C339 C340 C341 C342 C343 C344 C345 C346 C347 C348 C349 C352 C353 C354 C500 C501 C503 C504
CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP
ECZH0001215 ECZH0001215 ECZH0003103 ECCH0000115 ECCH0004904 ECCH0000115 ECCH0004904 ECCH0004904 ECCH0002002 ECCH0000149 ECCH0004904 ECZH0001102 ECZH0001102 ECCH0004904 ECZH0003103 ECCH0004904 ECZH0003103 ECZH0003103 ECCH0000115 ECCH0000115 ECCH0004904 ECZH0003103 ECCH0007802 ECCH0004904 ECCH0004904
- 226 -
Level 6 6 6 6 6
Location No. C505 C506 C507 C508 C509
Description CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP
Part Number ECZH0003103 ECCH0000115 ECCH0000115 ECCH0000115 ECCH0007802
Spec 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 4.7 uF,10V ,M ,X5R ,TC ,1608 ,R/TP 1000000 pF,50V ,Z ,Y5V ,HD ,2012 ,R/TP , , ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,1.25 mm 22 pF,50V,J,NP0,TC,1005,R/TP 4.7 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 4.7 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,10V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,10V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 220 pF,50V ,K ,X7R ,HD ,1005 ,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP 47 nF,10V,K,X5R,HD,1005,R/TP 47 nF,10V,K,X5R,HD,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 1 uF,10V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,10V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,10V ,K ,X5R ,TC ,1005 ,R/TP
Color
Remark
C510
CAP,CERAMIC,CHIP
ECCH0000391
6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
C511 C512 C513 C514 C515 C516 C517 C523 C525 C601 C602 C603 C604 C605 C607 C621 C622 C625 C626 C631 C632 C633 C634
CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CHIP,MAKER
ECCH0000115 ECCH0006201 ECZH0003103 ECZH0003103 ECZH0003103 ECCH0006201 ECCH0000198 ECZH0003103 ECZH0003103 ECCH0004904 ECCH0004904 ECCH0004904 ECZH0001215 ECZH0001215 ECZH0003103 ECCH0000133 ECCH0000198 ECCH0000163 ECCH0000163 ECCH0000115 ECZH0001215 ECZH0001215 ECZH0001215
- 227 -
Level 6 6 6
Location No. C635 CN300 CN500
Description CAP,CHIP,MAKER CONNECTOR,ETC BRACKET
Part Number ECZH0001215 ENZY0023701 MBFZ0033201
Spec 1 uF,10V ,K ,X5R ,TC ,1005 ,R/TP 3 ,2.5 mm,ETC ,- ,PRESS, STS, , , , , 5 , mm,ANGLE , , ,; , ,0.64MM ,ANGLE ,[empty] ,DIP ,[empty] , 34 PIN,0.4 mm,ETC , ,H=1.0, Socket 60 PIN,0.4 mm,STRAIGHT , , ,; , ,0.40MM ,STRAIGHT ,FEMALE ,SMD ,[empty] , , 24 PIN,0.4 mm,ETC , ,GB042 H=1.0, Socket 50 PIN,0.4 mm,STRAIGHT , ,H=1.0,SOCKET ,; , ,0.40MM ,STRAIGHT ,FEMALE ,SMD ,P/TR , , EMD2 ,30 V,1 A,R/TP ,VF=1.5V(IF=200mA) , IR=30uA(VR=10V) TUMD2 ,30 V,1 A,R/TP , ,; ,1A ,30V , ,5A , , ,[empty] ,[empty] ,2P ,1 SMT ,20 V,200 A,R/TP , DFN-2 ,7.82 V,150 mW,R/TP ,PB-FREE DFN-2 ,7.82 V,150 mW,R/TP ,PB-FREE 120 ohm,1608 ,CHIP BEAD, 2000mA 1800 ohm,1005 ,Bead 1800 ohm,1005 ,Bead 1800 ohm,1005 ,Bead 10 ohm,1005 ,Ferrite Bead 10 ohm,1005 ,Ferrite Bead 1800 ohm,1005 ,Bead 1800 ohm,1005 ,Bead SMD ,3 TERMINAL EMI FILTER SMD ,1608 ,EMI-ESD Filter, 4ch, 14V, 15pF, 50ohm SMD ,1608 ,EMI-ESD Filter, 4ch, 14V, 15pF, 50ohm SMD ,1608 ,EMI-ESD Filter, 4ch, 14V, 15pF, 50ohm SMD ,Pb-free_Common mode filter ,; ,Filter,LCR 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
Color
Remark
Silver
CN501
CONNECTOR,I/O CONNECTOR,BOARD TO BOARD CONNECTOR,BOARD TO BOARD CONNECTOR,BOARD TO BOARD CONNECTOR,BOARD TO BOARD DIODE,SWITCHING
ENRY0008801
CN503
ENBY0040301
CN601
ENBY0045501
CN603
ENBY0034201
CN604
ENBY0041901
D300
EDSY0011901
D301
DIODE,SWITCHING
EDSY0018401
6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
D302 D600 D603 FB300 FB500 FB501 FB502 FB601 FB602 FB604 FB605 FL500 FL600 FL601 FL602 FL603 L102
DIODE,SWITCHING DIODE,TVS DIODE,TVS FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,EMI/POWER FILTER,EMI/POWER FILTER,EMI/POWER FILTER,EMI/POWER FILTER,EMI/POWER CAP,CHIP,MAKER
EDSY0014001 EDTY0008606 EDTY0008606 SFBH0002302 SFBH0008102 SFBH0008102 SFBH0008102 SFBH0007102 SFBH0007102 SFBH0008102 SFBH0008102 SFEY0006501 SFEY0013101 SFEY0013101 SFEY0013101 SFEY0015601 ECZH0000813
- 228 -
Level 6 6 6
Location No. L300 L500 L600
Description INDUCTOR,SMD,POWER INDUCTOR,CHIP INDUCTOR,CHIP
Part Number ELCP0009401 ELCH0004202 ELCH0004722
Spec 4.7 uH,M ,2.8*2.6*1.0 ,R/TP , 82 nH,J ,1608 ,R/TP , 47 nH,J ,1005 ,R/TP , SC70-6 ,6.5 W,-20 V,-4.5 A,R/TP ,P channel FET ,; ,PCHANNEL ,MOSFET ,-20 ,8 ,-4.5 ,0.153 ,6.5 ,SC70 ,R/TP ,6P SOT-23 ,0.15 W,R/TP ,EMT3 3300 ohm,1/16W ,F ,1005 ,R/TP 10 Kohm,1/16W ,J ,1005 ,R/TP 2200 ohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 3300 ohm,1/16W ,J ,1005 ,R/TP 3300 ohm,1/16W ,J ,1005 ,R/TP 3300 ohm,1/16W ,J ,1005 ,R/TP 3300 ohm,1/16W ,J ,1005 ,R/TP 3300 ohm,1/16W ,J ,1005 ,R/TP 3300 ohm,1/16W ,J ,1005 ,R/TP 3300 ohm,1/16W ,J ,1005 ,R/TP 3300 ohm,1/16W ,J ,1005 ,R/TP
Color
Remark
Q300
TR,FET,P-CHANNEL
EQFP0009101
6 6 6 6 6 6 6 6 6 6 6 6 6
Q501 R200 R202 R203 R204 R205 R206 R207 R208 R211 R212 R213 R214
TR,BJT,NPN RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD OPEN
EQBN0007601 ERHZ0000267 ERHZ0000405 ERHZ0000443 ERHZ0000406 ERHZ0000465 ERHZ0000465 ERHZ0000465 ERHZ0000465 ERHZ0000465 ERHZ0000465 ERHZ0000465 ERHZ0000465
R215
SAFP0000501
R216
SAFP0000501
R295
SAFP0000401
R299
SAFO0000401
0OHM DNI
6 6
R300 R301
RES,CHIP,MAKER RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT
ERHZ0000204 ERHZ0000406
100 Kohm,1/16W ,F ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP
R304
SAFP0000501
R305
SAFP0000501
R306
SAFP0000501
- 229 -
Level
Location No. R308
Description PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT RES,CHIP PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER
Part Number
Spec
Color
Remark
SAFP0000501
R310
SAFP0000501
R311
ERHZ0000485
4700 ohm,1/16W ,J ,1005 ,R/TP
R312
SAFP0000501
R313
ERHY0000193
27 ohm,1/16W ,F ,1005 ,R/TP
R314
SAFP0000501
R316
ERHZ0003901
0.1 ohm,1/4W ,F ,2012 ,R/TP ,; ,0.1 ,1% ,1/4W ,2012 ,R/TP
6 6 6 6 6 6 6 6
R317 R319 R320 R321 R322 R323 R324 R500
CAP,CERAMIC,CHIP RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP RES,CHIP RES,CHIP RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT
ECCH0004904 ERHZ0000449 ERHZ0000265 ERHZ0000406 ERHY0000181 ERHY0000181 ERHY0017201 ERHZ0000493
1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 24 Kohm,1/16W ,J ,1005 ,R/TP 300 Kohm,1/16W ,F ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP 15 ohm,1/16W ,F ,1005 ,R/TP 15 ohm,1/16W ,F ,1005 ,R/TP 0.025 ohm,1/4W ,F ,2012 ,R/TP 51 Kohm,1/16W ,J ,1005 ,R/TP
R501
SAFP0000401
R502
SAFP0000401
R503
SAFP0000401
6 6 6 6 6 6
R504 R505 R506 R509 R510 R511
ERHZ0000443 ERHZ0000402 ERHZ0000402 ERHZ0000404 ERHZ0000212 ERHZ0000443
2200 ohm,1/16W ,J ,1005 ,R/TP 10 ohm,1/16W ,J ,1005 ,R/TP 10 ohm,1/16W ,J ,1005 ,R/TP 1 Kohm,1/16W ,J ,1005 ,R/TP 12 Kohm,1/16W ,F ,1005 ,R/TP 2200 ohm,1/16W ,J ,1005 ,R/TP
R600
SAFP0000501
- 230 -
Level
Location No. R601
Description PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER RES,CHIP RES,CHIP RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD OPEN
Part Number
Spec
Color
Remark
SAFP0000501
6 6 6 6 6
R603 R604 R607 R609 R610
ERHZ0000405 ERHZ0000405 ERHZ0000405 ERHY0000254 ERHZ0000405
10 Kohm,1/16W ,J ,1005 ,R/TP 10 Kohm,1/16W ,J ,1005 ,R/TP 10 Kohm,1/16W ,J ,1005 ,R/TP 4.7K ohm,1/16W,J,1005,R/TP 10 Kohm,1/16W ,J ,1005 ,R/TP
R620
SAFP0000501
R621
SAFP0000501
6 6 6 6
R622 R626 R627 R628
ERHZ0000406 ERHY0003301 ERHY0003301 ERHZ0000405
100 Kohm,1/16W ,J ,1005 ,R/TP 100 ohm,1/16W ,J ,1005 ,R/TP 100 ohm,1/16W ,J ,1005 ,R/TP 10 Kohm,1/16W ,J ,1005 ,R/TP
R629
SAFP0000501
R630
ERHZ0000406
100 Kohm,1/16W ,J ,1005 ,R/TP
R631
SAFP0000401
R638
SAFP0000501
R639
SAFP0000501
R641
SAFP0000401
6 6
R643 R644
ERHZ0000406 ERHZ0000406
100 Kohm,1/16W ,J ,1005 ,R/TP 100 Kohm,1/16W ,J ,1005 ,R/TP
R653
SAFP0000501
R654
SAFP0000501
R655
SAFP0000401
R657
SAFO0000501
0OHM_1005_DNI
- 231 -
Level
Location No. R658
Description
Part Number
Spec
Color
Remark
PCB ASSY,MAIN,PAD OPEN
SAFO0000501
0OHM_1005_DNI ,SMD , dB,H=1.85 ,; ,3.00MM ,STRAIGHT ,RF ADAPTER ,SMD ,R/TP ,AU , , ,SMD , dB, FBGA ,107 ,ETC ,FULLY 1.8V 2G(LB/256Mx8) NAND+1G(2CS/16Mx4x16) SDRAM ,; ,IC,MCP BGA ,323 ,R/TP ,HSDPA Digital Baseband ,; ,IC,Digital Baseband Processor BGA ,196 PIN,R/TP ,8x8 EMP U360 ABB CSP ,20 ,R/TP ,Class D(mono) + Capless HP + A/S ,; ,IC,Audio Sub System TLLGA ,8 PIN,R/TP ,OVP WLP ,20 ,R/TP ,MUIC for 5Pin Micro USB ,; ,IC,Analog Switch TFBGA ,36 PIN,R/TP ,USB2.0 Transceiver, 3.5X3.5X0.8
SW100
CONN,RF SWITCH
ENWY0005301
SW101
CONN,RF SWITCH
ENWY0003901
U200
IC
EUSY0316508
U201
IC
EUSY0363001
U300
IC
EUSY0331701
U301
IC
EUSY0360201
U500
IC
EUSY0333701
U501
IC
EUSY0371201
U502
IC
EUSY0320201
U600
IC
EUSY0319001
WDFN-8L ,8 PIN,R/TP ,300mA/300mA 2.8V/1.8V Dual LDO
6 6 6 6
U604 VA300 VA301 VA500
IC VARISTOR VARISTOR VARISTOR
EUSY0336502 SEVY0003601 SEVY0003601 SEVY0007301
, PIN,R/TP , ,; ,IC,Charge Pump 5.6 V, ,SMD ,100pF, 1005 5.6 V, ,SMD ,100pF, 1005 5 V,<0.5pF ,SMD , 14 V, ,SMD ,2012055, LC 10uA, 0.5pF@1MHz, IL 0.05@2GHz, Rt 1ns ,; ,14 , , ,2.0*1.2*0.55 ,[empty] ,SMD ,R/TP 14 V, ,SMD ,50pF, 1005 14 V, ,SMD ,120pF, 1005 32.768 KHz,20 PPM,12.5 pF,70 Kohm,SMD ,3.2*1.5*0.9 ,40'C ~ +85'C, C0 1.05pF, C1 fF ,; ,32.768 ,20PPM ,12.5 , , ,SMD ,R/TP SMD ,12 V,350 W,R/TP , DFN-2 ,7.82 V,150 mW,R/TP ,PB-FREE DFN-2 ,7.82 V,150 mW,R/TP ,PB-FREE SOD-923 ,5 V,150 mW,R/TP ,1.0*0.6*0.4 SOD-923 ,5 V,150 mW,R/TP ,1.0*0.6*0.4 VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1
VA600
VARISTOR
SEVY0008801
6 6
VA601 VA603
VARISTOR VARISTOR
SEVY0001001 SEVY0004201
X300
X-TAL
EXXY0024301
6 6 6 6 6
ZD500 ZD600 ZD601 ZD602 ZD604
DIODE,TVS DIODE,TVS DIODE,TVS DIODE,TVS DIODE,TVS
EDTY0007401 EDTY0008606 EDTY0008606 EDTY0009101 EDTY0009101
ZD605
DIODE,TVS
EDTY0009401
- 232 -
Level
Location No. ZD606
Description
Part Number
Spec VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1
Color
Remark
DIODE,TVS
EDTY0009401
SAFD01
PCB ASSY,MAIN,SMT TOP
SAFD0123001 10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 nF,50V,K,X7R,HD,1005,R/TP 100000 pF,16V ,Z ,X7R ,TC ,1005 ,R/TP , , ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] 22 pF,50V,J,NP0,TC,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 33 nF,16V,K,X7R,HD,1005,R/TP 10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm 10 nF,16V,K,X7R,HD,1005,R/TP 47 pF,50V,J,NP0,TC,1005,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 1 nF,50V,K,X7R,HD,1005,R/TP 1 nF,50V,K,X7R,HD,1005,R/TP 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 3.6 nH,S ,1005 ,R/TP , 22 pF,50V,J,NP0,TC,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP
C100
CAP,CERAMIC,CHIP
ECCH0005604
6 6
C101 C102
CAP,CHIP,MAKER CAP,CERAMIC,CHIP
ECZH0003103 ECCH0000143
C103
CAP,CHIP,MAKER
ECZH0004402
6 6 6
C104 C105 C106
CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP
ECCH0000115 ECCH0000115 ECCH0000161
C107
CAP,CERAMIC,CHIP
ECCH0005604
6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
C108 C109 C110 C111 C113 C114 C115 C116 C119 C124 C129 C130 C134 C139 C140 C145 C146 C147
CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER INDUCTOR,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP
ECCH0000155 ECCH0000122 ECZH0003103 ECCH0000115 ECZH0000830 ECCH0000115 ECCH0000143 ECCH0000143 ECZH0000813 ELCH0003816 ECCH0000115 ECCH0000115 ECZH0000813 ECCH0000115 ECCH0000115 ECZH0000813 ECZH0000813 ECCH0000115
- 233 -
Level
Location No. C148
Description
Part Number
Spec 10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 nF,50V,K,X7R,HD,1005,R/TP 6.8 nH,J ,1005 ,R/TP ,PBFREE 1 nF,50V,K,X7R,HD,1005,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm 1 nF,50V,K,X7R,HD,1005,R/TP 1 nF,50V,K,X7R,HD,1005,R/TP 3.9 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 10 nF,16V,K,X7R,HD,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 15 pF,50V,J,NP0,TC,1005,R/TP 10 nF,16V,K,X7R,HD,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm 2.7 pF,50V ,B ,NP0 ,TC ,1005 ,R/TP 10 nF,16V,K,X7R,HD,1005,R/TP 3.3 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP 4.7 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP 1 nF,50V,K,X7R,HD,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 22 pF,50V,J,NP0,TC,1005,R/TP 3.3 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 10 nH,J ,1005 ,R/TP ,PBFREE 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP
Color
Remark
CAP,CERAMIC,CHIP
ECCH0005604
6 6 6 6 6
C149 C150 C152 C153 C154
CAP,CHIP,MAKER CAP,CERAMIC,CHIP INDUCTOR,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER
ECZH0003103 ECCH0000143 ELCH0001049 ECCH0000143 ECZH0003103
C155
CAP,CERAMIC,CHIP
ECCH0005604
6 6 6 6 6 6 6 6 6
C157 C158 C159 C160 C162 C163 C164 C166 C167
CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP
ECCH0000143 ECCH0000143 ECCH0000195 ECZH0000830 ECCH0000155 ECCH0000115 ECCH0000112 ECCH0000155 ECCH0000115
C168
CAP,CERAMIC,CHIP
ECCH0005604
6 6 6 6 6 6 6 6 6 6 6 6
C170 C171 C172 C173 C174 C175 C176 C177 C178 C179 C180 C182
CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER INDUCTOR,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP
ECCH0000175 ECCH0000155 ECCH0000180 ECCH0006201 ECCH0000143 ECCH0000115 ECCH0000115 ECCH0000180 ECZH0000830 ELCH0001048 ECZH0000830 ECCH0004904
- 234 -
Level 6 6 6 6 6 6 6
Location No. C183 C400 C401 C403 C404 C406 C407
Description CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP
Part Number ECCH0000198 ECCH0000179 ECZH0003103 ECCH0000155 ECZH0001215 ECCH0004904 ECCH0004904
Spec 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP 22 nF,16V ,K ,X5R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 10 nF,16V,K,X7R,HD,1005,R/TP 1 uF,10V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 7.5 pF,50V ,D ,X7R ,TC ,1005 ,R/TP ,; ,C0G TYPE(No X7R) ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP
Color
Remark
C408
CAP,CERAMIC,CHIP
ECCH0005604
6 6 6 6 6 6 6 6 6
C409 C410 C411 C412 C413 C414 C606 C608 C609
CAP,CHIP,MAKER CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CHIP,MAKER
ECZH0003103 ECZH0003103 ECCH0004904 ECZH0003103 ECCH0004904 ECCH0004904 ECZH0003103 ECCH0004904 ECZH0003103
C610
CAP,CERAMIC,CHIP
ECCH0010501
6 6 6 6 6 6 6 6 6 6 6
C611 C612 C613 C614 C615 C616 C617 C618 C619 C620 C623
CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP
ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECZH0003103 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904
- 235 -
Level 6 6 6 6 6 6 6
Location No. C624 C627 C628 C629 C630 C638 CN198
Description CAP,CHIP,MAKER CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CAP,CERAMIC,CHIP CONNECTOR,ETC
Part Number ECZH0003103 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0004904 ECCH0000198 ENZY0018801
Spec 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP PIN, mm,ETC , ,RCS=1.35 VMN2 ,30 V,100 mA,R/TP ,1.0x0.6 ,; , , , , , , ,[empty] ,[empty] ,2P ,1 DFN-2 ,7.82 V,150 mW,R/TP ,PB-FREE DFN-2 ,7.82 V,150 mW,R/TP ,PB-FREE 1800 ohm,1005 ,Chip bead ,; ,1800ohm ,; ,[empty] ,R/TP 10 ohm,1005 ,Ferrite Bead 10 ohm,1005 ,Ferrite Bead 1950 MHz,2140 MHz,1.8 dB,2.4 dB,52 dB,43 dB,2.5*2.0*0.55 ,SMD ,Band1, 2520size, SAW, Rx unbal ,; ,2140 ,2110 to 2170 ,1950 ,1920 to 1980 ,2.4 ,1.8 ,2.5x2.0x0.55 ,DUAL ,SMD ,R/TP 897.5 MHz,942.5 MHz,3.1 dB,3.5 dB,52 dB,45 dB,2.5*2.0*0.5 ,SMD ,SAW, Band8, Rx unbal ,; ,942.5 ,927.4 to 957.6 ,897.5 ,882.4 to 912.6 ,3.5 ,3.1 ,2.5x2.0x0.5 ,DUAL ,SMD ,R/TP 1842.5 MHz,75 MHz,2.6 dB,12 dB,1960 MHz,60 MHz,2.6 dB,12 dB,1.8*1.35*0.5 ,SMD ,1805M~1880M,1930M~1990M,10p,U,50,50,LH,DCS+PCS Rx ,; , ,1.8*1.35*0.5 ,SMD ,R/TP 881.5 MHz,25 MHz,2.6 dB,30 dB,942.5 MHz,35 MHz,2.6 dB,25 dB,1.8*1.35*0.5 ,SMD ,869M~894M,925M~960M,10p,U,50,50,LH,GSM850+EGS M Rx ,; , ,1.8*1.35*0.5 ,SMD ,R/TP 897.5 MHz,1.4*1.1*0.6 ,SMD ,880.48M~914.52M, IL 4.0, 5pin, U-U, 50-50, W-BAND VIII Tx ,; ,897.5 ,1.4*1.1*0.6 ,SMD ,R/TP 1950 MHz,1.4*1.1*0.6 ,SMD ,1920M~1980M, IL 2.9, 5pin, U-U, 50-50, W-BAND I Tx , ,1950 ,1.4*1.1*0.6 ,SMD ,R/TP CSP ,20 PIN,R/TP ,ESD protection & Filtering for analog signals, Pb-free 18 pF,50V,J,NP0,TC,1005,R/TP 8.2 nH,J ,1005 ,R/TP ,
Color
Remark
D200
DIODE,SWITCHING
EDSY0018101
6 6 6 6 6
D601 D602 FB100 FB600 FB603
DIODE,TVS DIODE,TVS FILTER,BEAD,CHIP FILTER,BEAD,CHIP FILTER,BEAD,CHIP
EDTY0008606 EDTY0008606 SFBH0008105 SFBH0007102 SFBH0007102
FL100
DUPLEXER,IMT
SDMY0001901
FL102
DUPLEXER,IMT
SDMY0002001
FL103
FILTER,SAW,DUAL
SFSB0001901
FL104
FILTER,SAW,DUAL
SFSB0001801
FL105
FILTER,SAW
SFSY0037501
FL106
FILTER,SAW
SFSY0028101
FL501
IC
EUSY0269001
6 6
L100 L103
CAP,CERAMIC,CHIP INDUCTOR,CHIP
ECCH0000113 ELCH0004705
- 236 -
Level 6 6 6 6 6 6 6 6 6 6 6 6
Location No. L104 L106 L108 L110 L113 L115 L116 L118 L119 L601 PT100 Q200
Description INDUCTOR,CHIP INDUCTOR,CHIP INDUCTOR,SMD,POWER INDUCTOR,CHIP INDUCTOR,CHIP INDUCTOR,CHIP INDUCTOR,CHIP INDUCTOR,CHIP CAP,CERAMIC,CHIP INDUCTOR,CHIP THERMISTOR TR,BJT,NPN PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD OPEN PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER
Part Number ELCH0003826 ELCH0004721 ELCP0008003 ELCH0004705 ELCH0001041 ELCH0004718 ELCH0004716 ELCH0001048 ECCH0000183 ELCH0004709 SETY0007101 EQBN0012401 3.3 nH,S ,1005 ,R/TP ,chip 2.2 nH,S ,1005 ,R/TP ,
Spec
Color
Remark
3.3 uH,M ,2.5*2.0*1.0 ,R/TP ,Chip power 8.2 nH,J ,1005 ,R/TP , 10 nH,J ,1005 ,R/TP ,PBFREE 5.6 nH,S ,1005 ,R/TP , 39 nH,J ,1005 ,R/TP , 10 nH,J ,1005 ,R/TP ,PBFREE 1.8 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP 3.3 nH,S ,1005 ,R/TP , NTC ,4700 ohm,SMD ,1005 J B:3500K ESM ,100 mW,R/TP ,NPN TRANSISTOR
R101
SAFP0000501
6 6 6
R102 R103 R104
ERHZ0000404 ERHZ0000411 ERHZ0000509
1 Kohm,1/16W ,J ,1005 ,R/TP 120 ohm,1/16W ,J ,1005 ,R/TP 75 ohm,1/16W ,J ,1005 ,R/TP
R105
SAFP0000501
6 6
R107 R109
ERHZ0000402 ERHZ0000495
10 ohm,1/16W ,J ,1005 ,R/TP 56 ohm,1/16W ,J ,1005 ,R/TP
R111
SAFP0000501
R112
SAFP0000501
R114
SAFP0000501
R115
SAFP0000501
R116
SAFO0000501
0OHM_1005_DNI
R118
SAFP0000501
R120
ERHZ0000522
24 ohm,1/16W ,J ,1005 ,R/TP
- 237 -
Level 6 6 6 6
Location No. R121 R123 R124 R125
Description RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP INDUCTOR,CHIP PCB ASSY,MAIN,PAD SHORT INDUCTOR,CHIP RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER RES,CHIP RES,CHIP,MAKER RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT CAP,CERAMIC,CHIP RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT
Part Number ERHZ0000495 ERHZ0000496 ERHY0000170 ELCH0004733
Spec 56 ohm,1/16W ,J ,1005 ,R/TP 560 ohm,1/16W ,J ,1005 ,R/TP 390 ohm,1/16W ,F ,1005 ,R/TP 4.3 nH,S ,1005 ,R/TP ,Coil
Color
Remark
R126
SAFP0000501
6 6
R128 R129
ELCH0001057 ERHZ0000451
3.9 nH,S ,1005 ,R/TP ,PBFREE 27 ohm,1/16W ,J ,1005 ,R/TP
R130
SAFP0000501
6 6
R131 R132
ERHZ0000531 ERHZ0000531
R133
SAFP0000501
6 6 6 6
R134 R135 R136 R137
ERHZ0000451 ERHY0003501 ERHZ0000531 ERHZ0000531
27 ohm,1/16W ,J ,1005 ,R/TP 220 ohm,1/16W ,J ,1005 ,R/TP 270 ohm,1/16W ,J ,1005 ,R/TP 270 ohm,1/16W ,J ,1005 ,R/TP
R140
SAFP0000501
6 6
R142 R143
ECCH0000113 ERHZ0000496
18 pF,50V,J,NP0,TC,1005,R/TP 560 ohm,1/16W ,J ,1005 ,R/TP
R144
SAFP0000501
R146
ERHZ0000286
4700 ohm,1/16W ,F ,1005 ,R/TP
R147
SAFP0000501
R151
SAFP0000501
R152
SAFP0000501
R156
SAFP0000501
R157
SAFP0000501
- 238 -
Level
Location No. R161
Description PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT RES,CHIP RES,CHIP PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT
Part Number
Spec
Color
Remark
SAFP0000501
R162
SAFP0000501
R165
SAFP0000501
R166
SAFP0000501
6 6
R209 R210
ERHZ0000465 ERHZ0000465
R302
SAFP0000501
R303
SAFP0000501
R307
SAFP0000501
R309
SAFP0000501
6 6 6 6 6 6 6 6 6
R402 R408 R409 R411 R412 R413 R414 R416 R419
ERHZ0000222 ERHZ0000295 ERHZ0000474 ERHZ0000295 ERHZ0000222 ERHZ0000236 ERHZ0000229 ERHZ0000456 ERHZ0000445
150 Kohm,1/16W ,F ,1005 ,R/TP 51 Kohm,1/16W ,F ,1005 ,R/TP 390 ohm,1/16W ,J ,1005 ,R/TP 51 Kohm,1/16W ,F ,1005 ,R/TP 150 Kohm,1/16W ,F ,1005 ,R/TP 2000 ohm,1/16W ,F ,1005 ,R/TP 1800 ohm,1/16W ,F ,1005 ,R/TP 2.2 ohm,1/16W ,J ,1005 ,R/TP 220 Kohm,1/16W ,J ,1005 ,R/TP
R420
SAFP0000501
6 6
R421 R422
ERHY0003601 ERHY0003601
R423
SAFP0000501
R425
ERHZ0000493
51 Kohm,1/16W ,J ,1005 ,R/TP
R426
SAFP0000501
- 239 -
Level 6
Location No. R429
Description RES,CHIP,MAKER
Part Number ERHZ0000406
Spec 100 Kohm,1/16W ,J ,1005 ,R/TP
Color
Remark
R513
PCB ASSY,MAIN,PAD OPEN PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD OPEN
SAFO0000501
0OHM_1005_DNI
R515
SAFP0000501
R517
SAFP0000501
R518
SAFO0000501
0OHM_1005_DNI
6 6 6 6 6 6
R614 R616 R617 R618 R619 R625
RES,CHIP,MAKER RES,CHIP,MAKER RES,CHIP RES,CHIP RES,CHIP RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT RES,CHIP,MAKER PCB ASSY,MAIN,PAD SHORT PCB ASSY,MAIN,PAD SHORT RES,ARRAY,R CONN,SOCKET FRAME,SHIELD PCB,MAIN
ERHZ0000483 ERHZ0000499 ERHY0003301 ERHY0000253 ERHY0000253 ERHZ0000499
47 ohm,1/16W ,J ,1005 ,R/TP 5600 ohm,1/16W ,J ,1005 ,R/TP 100 ohm,1/16W ,J ,1005 ,R/TP 4.3K ohm,1/16W,J,1005,R/TP 4.3K ohm,1/16W,J,1005,R/TP 5600 ohm,1/16W ,J ,1005 ,R/TP
R632
SAFP0000401
R633
SAFP0000401
R634
SAFP0000401
R635
SAFP0000401
R637
ERHZ0000406
100 Kohm,1/16W ,J ,1005 ,R/TP
R640
SAFP0000401
R642
SAFP0000401
R645
ERHZ0000402
10 ohm,1/16W ,J ,1005 ,R/TP
R652
SAFP0000501
R656
SAFP0000401
6 6 6 6
RA400 S400 SC1 SPFY
ERNR0000404 ENSY0020901 MFEA0027901 SPFY0197201
100 Kohm,100 Kohm,8 PIN,J ,1/16W ,SMD ,R/TP 8 PIN,STRAIGHT , , mm, PRESS, STS, , , , , FR-4 ,0.8 mm,STAGGERED-10 , ,; , , , , , , , , , BLACK
- 240 -
Level 6 6
Location No. U100 U101 IC
Description
Part Number EUSY0299401 SMRH0004901 ,6 PIN,R/TP ,0.3_2v
Spec
Color
Remark
RF MODULE,HANDSET
MHz, MHz, ,Tx Module(ASM + PAM) - WCDMA TriMode 28 dBm, %, A, dBc, dB,3x3x1 ,SMD ,EMP U330 Band 1 PAM ,; ,3.6 , , , , , , ,R/TP ,R/TP ,8 20.5 dB,0.22 dB,34 dB,1.0*0.5*0.4 ,SMD ,Pb_free_KPCS+USPCS+WCDMA ,; ,[empty] ,1865MHz ,230MHz ,SMD ,R/TP 19.4 dB,0.25 dB,32 dB,1.0*0.5*0.4 ,SMD ,Pbfree_DCN+JCDMA ,; ,[empty] ,874.5MHz ,101MHz ,SMD ,R/TP 28 dBm, %, A, dBc, dB,3x3 ,SMD ,EMP U300 ,; , , , , , , , ,R/TP ,R/TP , DRL ,5 PIN,R/TP ,SINGLE,BUFFER,3STATE,1.7X1.7 MicroSMD ,8 PIN,R/TP ,DCDC for PAM 650mA, ~3.4V DFN1612-4B ,4 ,R/TP ,300mA 2.8V LDO ,; ,IC,LDO Voltage Regulator HVQFN ,56 PIN,R/TP ,GSM,EDGE,WCDMA Transceiver, 7X7 mm. ,; ,IC,CMOS BGA ,8 PIN,R/TP ,Class AB SPK AMP ,; ,IC,Audio Amplifier 3*3 QFN ,10 PIN,R/TP ,3xis Accelerometer ,; ,IC,A/D Converter PLP1010-4 ,4 PIN,R/TP ,1x1 LDO, 3.3V , 150mA ,; ,IC,LDO Voltage Regulator BGA ,20 PIN,R/TP ,Levelshifter,sdcard,6ch ,; ,IC,Bus Controller BGA ,12 PIN,R/TP ,4-BIT BIDIRECTIONAL VOLTAGELEVEL TRANSLATOR (ZXU type) CSP ,12 PIN,R/TP ,Touchscreen Controller IC , ,IC,A/D Converter PLP1010-4 ,4 PIN,R/TP ,150mA 2.8V Single LDO ,; ,IC,Voltage Regulator WDFN-8L ,8 PIN,R/TP ,300mA/300mA 2.8V/1.8V Dual LDO
U102
PAM
SMPY0018601
U103
COUPLER,RF DIRECTIONAL
SCDY0004301
U106
COUPLER,RF DIRECTIONAL
SCDY0004401
U107
PAM
SMPY0018501
6 6
U108 U109
IC IC
EUSY0245902 EUSY0222103
U110
IC
EUSY0365901
U111
IC
EUSY0357401
U400
IC
EUSY0349001
U401
IC
EUSY0345201
U402
IC
EUSY0353801
U403
IC
EUSY0334202
U404
IC
EUSY0334201
U405
IC
EUSY0337101
U406
IC
EUSY0355701
U601
IC
EUSY0319001
U602
IC
EUSY0321201
BGA ,64 PIN,R/TP ,6*6 ISP
U603
IC
EUSY0319001
WDFN-8L ,8 PIN,R/TP ,300mA/300mA 2.8V/1.8V Dual LDO
6 6
VA400 VA401
VARISTOR VARISTOR
SEVY0003801 SEVY0003801
18 V, ,SMD , 18 V, ,SMD ,
- 241 -
Level 6 6 6 6 6
Location No. VA402 VA403 VA404 VA405 VA406
Description VARISTOR VARISTOR VARISTOR VARISTOR VARISTOR
Part Number SEVY0003801 SEVY0003801 SEVY0003801 SEVY0003801 SEVY0004001 18 V, ,SMD , 18 V, ,SMD , 18 V, ,SMD , 18 V, ,SMD , 18 V, ,SMD ,3pF, 1005
Spec
Color
Remark
VA602
DIODE,TVS
EDTY0009401
VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1 26 MHz,10 PPM,14 pF,25 ohm,SMD ,32*25*0.6 ,EMP Reference X-Tal, CF360, Pb-Free ,; ,26MHz ,10PPM ,14 , , ,SMD ,R/TP VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1 VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1 VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1 VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW ,[empty] ,[empty] ,2P ,1 SOD-923 ,5 V,150 mW,R/TP ,1.0*0.6*0.4
X100
X-TAL
EXXY0026101
ZD400
DIODE,TVS
EDTY0009401
ZD401
DIODE,TVS
EDTY0009401
ZD402
DIODE,TVS
EDTY0009401
ZD403
DIODE,TVS
EDTY0009401
ZD603
DIODE,TVS
EDTY0009101
- 242 -
11.3 Accessory
Location No.
Level
Description
Part Number
Spec 3.7 V,1000 mAh,1 CELL,PRISMATIC ,553446,INNERPACK,WW ,; ,3.7 ,1000 ,200 ,PRISMATIC ,5.5X34X46 ,6.1X47X36.5 ,BLACK ,INNERPACK , 3.7 V,1000 mAh,1 CELL,PRISMATIC ,553446, INNERPACK ,; ,3.7 ,1000 ,200 ,PRISMATIC ,5.5X34X46 ,6.1X37X47 ,BLACK ,INNERPACK , ; ,[empty] ,[empty] ,1.2M , ,BLACK ,1.2m, 4, Shield case MicroUSB, ID resistor open ,N ; ,RMS 20mW(0.56V,RMS) ,16Ohm+-2.4Ohm 1KHZ ,116dB+-3dB 1KHZ,3mW ,116dB 1KHZ ,96dB 100HZ ,[empty] ,BLACK ,5P MICRO USB CONNECTOR , MICRO USB 5P ,Earphone,Stereo 100-240V ,5060 Hz,5.1 V,0.7 A,CE ,AC-DC ADAPTOR ,; ,90Vac~264Vac ,4.75Vdc~5.25Vdc ,700mA ,5060 , ,WALL 3P ,USB , 100-240V ,5060 Hz,5.1 V,0.7 A,CE ,AC-DC ADAPTOR ,; ,90Vac~264Vac ,4.75Vdc~5.25Vdc ,700mA ,5060 , ,WALL 2P ,USB ,
Color
Remark
SBPL00
BATTERY PACK,LI-ION
SBPL0098701
BLACK
BATTERY PACK,LI-ION
SBPL0098001
SGDY00
DATA CABLE
SGDY0014302
SGEY00
EAR PHONE/EAR MIKE SET
SGEY0003741
SSAD00
ADAPTOR,AC-DC
SSAD0032901
ADAPTOR,AC-DC
SSAD0032902
- 243 -

LG GT500 GT505 Service Manual

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LG GT500 GT505 Service Manual

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Service Manual

Internal Use Only

Service Manual GT500

Date: June, 2009 / Issue 1.0

5. Download ................................................... 169

3. Technical Description .................................. 19

11. EXPLODED VIEW & REPLACEMENT PART LIST ................................................. 211

4. TROUBLE SHOOTING ..................................... 73

LGE Internal Use Only

LGE Internal Use Only

1.2 Regulatory Information

LGE Internal Use Only

LGE Internal Use Only

H. Electrostatic Sensitive Devices

LGE Internal Use Only

LGE Internal Use Only

LGE Internal Use Only

2.2 Usable environment

* CLA : 12~24V (DC)

2.3 Radio Performance

LGE Internal Use Only

GSM 30M ~ 1GHz -36dBm

MS allocated Channel Radiated 1 Spurious Emission Idle Mode

-30dBm -57dBm -59dBm -57dBm -47dBm -53dBm -47dBm

Frequency Error Phase Error

0.1ppm 5(RMS) 20(PEAK) 3dB below reference sensitivity

Frequency Error Under Multipath and Interference Condition 4

0 ~ 100kHz 200kHz 250kHz 400kHz 600 ~ 1800kHz 1800 ~ 6000kHz 6000kHz

+0.5dB -30dB -31dB -33dB -60dB -60dB -73dB

Due to Output RF Spectrum modulation

400kHz 600 ~ 1800kHz 1800 ~ 3000kHz 3000 ~ 6000kHz 6000kHz

5 Due to Switching transient

400kHz 600kHz 1200kHz 1800kHz

400kHz 600kHz 1200kHz 1800kHz

-22dB -24dB -24dB -27dB

LGE Internal Use Only

DCS/PCS Frequency offset 800kHz

Power control Level 5 6 7 8 9 10 8 Transmitter Output Power 11 12 13 14 15 16 17 18 19

LGE Internal Use Only

2) Transmitter WCDMA Mode

Inner Loop Power control in uplink

Minimum Output Power

Out-of-synchronization handling of output power

Transmit OFF Power

Transmit ON/OFF Time Mask

Power setting in uplink compressed Occupied Bandwidth(OBW)

Spectrum emission Mask

LGE Internal Use Only

Item Adjacent Channel Leakage Ratio(ACLR)

Spurious Emissions *: additional requirement

Error Vector Magnitude(EVM)

Transmit OFF Power

3) Receiver - GSM Mode

Blocking Response (TCH/FS Class II, RBER)

LGE Internal Use Only

4) Receiver WCDMA Mode

Item Reference Sensivitivity Level

Maximum Input Level

Adjacent Channel Selectivity(ACS)

-60dBm@f=1920~1980MHz, 3.84MHz -60dBm@f=2110~2170MHz, 3.84MHz

LGE Internal Use Only

5) Bluetooth Mode 5.1) Transmitter

Init. Carrier Freq. Tolerance

Carrier Frequency Drift