EXTENSION OF RESURF PRINCIPLE TODIELECIWCALLYISOLATEDPOWERDEVI~

Y.S.Huang and B.J. Baliga

Electrical & Computer Engineering Department, North Carolina State University, Raleigh, N.C. 27695-7911

Abstract
The RESURF principle has been extended to dielectrically isolated power devices including the effect of the formation of an inversion layer under the isolating oxide. Two device structures that allow high voltage operation have been investigated. Extensive two-dimensional simulations have been performed to relate the breakdown voltage to the doping and length of the drift region, the thicknesses of the silicon layer and isolating oxide. It has been shown that lateral devices with breakdown voltages up to 600 volts can be obtained.

CATHODE

ANODE
/ / / / / A

I////Y

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P+

P- SUBSTRATE

Introduction
The Reduced Surface Field (RESURF)principle has been a very useful method for obtaining high voltage lateral power devices in junction isolated (JI) silicon [l-31. This concept utilizes the coupling of the charge in the drift region to the substrate in order to obtain an improved lateral electric field distribution. Using this technique, lateral power MOSFETs with breakdown voltages as high as 1200 volts have been demonstrated in JI technology.
Dielectrically isolated @I) silicon technology is of interest for the fabrication of power integrated circuits because it provides superior isolation with low leakage current. Many of the parasitics associated with JI are also eliminated with DI, allowing the use of bipolar power devices which operate at higher power density than power MOSFETs. In this paper, it is demonstrated that the RESURF principle can be applied to dielectrically isolated power devices. In this case, the charge in the drift region of the lateral power device is coupled to the substrate through the intervening oxide layer. It has been found that lateral devices with breakdown voltages up to 600 volts can be obtained.

Fig. 1. DI device structure I. Consequently, inversion can no longer occur under the oxide and the depletion layer spreads into the psubstrate. This allows the formation of DI devices with RESURF. However, compared with the JI device, which can have the breakdown voltage equal to the theoretical value of a parallel-planejunction when the peak electric field occurs at the horizontal p-n junction, this DI device has smaller breakdown voltage due to the effect of curvature of the junction between the N+ diffusion and the psubstrate when the breakdown occurs in the substrate. Another drawback of structure I is that the additional p-n junction leads to large substrate current flow (due to the large depletion volume in the substrate) which is about two orders of magnitude larger than the leakage current in the drift region. A further disadvantage is that extra processing steps, which may not be compatible with basic DI technology, are required to form the N+ diffusion into the substrate and to make a contact to this region.

The RESURF concept cannot be applied to a DI technology directly by inserting a dielectric layer between the epitaxial layer and the substrate of the JI silicon because an inversion layer forms below the isolating oxide as in the case of an MOS capacitor structure. This prevents the spreading of the electric field into the substrate and reduces the charge coupling effect. A modified device structure (structure I), as shown in Fig. 1, has been investigated to eliminate the formation of the inversion layer under the buried isolation oxide (box) [4]. The key feature of this structure is that the cathode is connected to an N+ region which is formed in the substrate. When a positive voltage is applied to the cathode, any electrons attracted to the surface under the isolation oxide are removed by the adjacent N + region.
CH2987-6/91/0000-0027 . 0 01991 IEEE $ 0 1 2 7

As an alternative, a high voltage DI device structure (structure 11) can be obtained by carefully selected structural parameters even when the substrate doping is large. This structure is shown in Fig. 2. The silicon layer is lightly doped and can be either p-type or n-type. Taking n-type silicon as an example, when a positive voltage is applied to the cathode, two depletion regions are formed: one is around the p-type anode diffusion and the other above the isolating oxide. An inversion layer may even exist above the oxide, so that the depletion layer is limited to a few microns. However, when the voltage is increased, the two depletion regions overlap. Further voltage increase produces an electric field that sweeps the holes away from the inversion layer allowing deep depletion to occur. During high voltage operation, the drift region is completely depleted and some of the voltage is then transfered across the isolation oxide.
An appropriate implantation can be applied into the front silicon surface to adjust the total charge i the drift region as n reported previously for JI devices [3]. An optimum dose must be used to obtain a high breakdown voltage with uniform electric field distribution along the silicon surface. If the implant dose is too

ANODE

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W P- (or N-) DRIFT REGION DIELECTRIC MYER

-1
0 02 04
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1

N+ SUBSTRATE

Fig. 2. DI device structure 11.

12 14 16
18

high, a high electric field occurs at the edge of the junction (anode side). If too low a dose is used, the breakdown voltage is again low due to the formation of a high electric field at the cathode side.

DRIFTREGION DOPING CONCENTRATION (1 Oi5/CM 3 ,

Fig. 3.

Impact of drift-region doping on breakdown voltage for structure I.

Structure I The breakdown voltage of structure I depends upon the depth of the N+ diffusion in the substrate, the isolating oxide thickness, the drift region doping and thickness, the substrate doping, and the drift-region length of the device. Fig. 3 provides the relationship between the breakdown voltage and the drift region doping for the case of different isolating oxide thicknesses and for different depths of the N + diffusion. The drift region thickness is 5 microns, the substrate doping is 1E14 cm-3, and the driftregion length is 30um in this case. For high drift region doping, the breakdown occurs at the silicon surface near the edge of the anode field plate due to incomplete depletion of the drift region. When the doping concentration is decreased, the breakdown voltage increases, similar to the JI RESURF effect. At lower drift region doping, the breakdown moves from the drift region into the substrate. This is in contrast with the JI RESURF devices where the breakdown shifts to the interface between the N+ cathode and the N- drift region at low doping levels. Note that a high electric field does not develop at the interface between the N+ cathode and the N- drift region in the DI structure I. At an optimum doping, breakdown occurs simultaneously in both the drift region and the substrate. Fig. 4 shows the breakdown voltage versus the isolating oxide thickness with different N + diffusion depths in the substrate. Here, the drift region doping is fixed at 1E15 cm-3. It can be Seen that devices with thin isolating oxide layers can sustain higher voltages than devices with thick isolating oxide layers. The breakdown occurs in the substrate for smaller N+ diffusion depths and in the drift region for larger diffusion depths. This can be explained as follows: for smaller N+ diffusion depths, the breakdown occurs at the p-n junction in the substrate at lower voltages due to the junction curvature effect [ 5 ] . However, the top silicon layer (drift region) acts as a resistive field plate for the planar junction under the isolation oxide. Therefore, thinner oxide thicknesses produce higher breakdown voltages. For larger N+ diffusion depths, the junction in the substrate has a high breakdown voltage, so the RESURFed junction in the drift region determines the breakdown voltage. In this case, the doping in the drift region can be decreased to improve the breakdown voltage. The drift-region length and the substrate doping also have strong effect on the breakdown voltage. With a 60 micron
28

stNCtue I NSI=IEld c m 3 NSlh=lE14 cm-3 TSI=Sm

P-

. . . . . . . . . . . . . . . . . . . . . .
0

10

12

14

16

18

20

ISOLATING OXIDE THICKNESS Tbox (kA)

Fig. 4.

Impact of buried isolating oxide thickness on breakdown voltage for structure I.

drift-region length, breakdown voltages in excess of 600 volts can be achieved by choosing 5000A isolating oxide thickness, 7um N+ diffusion depth under the isolating oxide and 1E14 cm-3 substrate doping concentration. Structure I1 In the D1 structure 11, the breakdown voltage is mainly dependent upon the drift region thickness, the isolation oxide thickness, the surface implant dose, and the drift-region length of the device. Fig. 5 illustrates the effects of different implant doses on the electric field distribution along the silicon surface from the results of PISCES I1 simulation. Note that the peak electric field occurs at the anode side for high implant doses and at the cathode side at low implant doses, indicating that proper RESURF behavior is occumng in this DI structure. The breakdown voltage as a function of implant dose in the drift region is shown in Fig. 6 in the case of a p-type drift region. An optimum implant dose must be selected to achieve maximum breakdown voltage, again indicating that the RESURF phenomenon is occumng. With a drift-region length of 60 microns, a breakdown voltage of nearly 600 volts c n be obtained with 25 micron drift layer thickness and a 4 micron isolating oxide thickness, The breakdown voltage is also a function of the driftregion length and isolating oxide thickness as shown in Figs. 7 and

nn.

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NSI-i El 4 m 3

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20

40

POSITION (urn)

DRIFT-REGION THICKNESS (urn)

Fig. 5.

Electric field distribution along the silicon surface in structure I . I

Fig. 8.

Impact of p-type drift region breakdown voltage for structure 11.

TSi A
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thickness on

- n-type drift region

-p-type drift region

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i

,
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,
20

,
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POSITION (arbitrary unit)

IMPLANT DOSE ( 102 IONS/CM2)

Fig. 6.

Impact of implant dose in p-type drift region on breakdown voltage for structure 11.

Fig. 9.

Electric field distribution along the vertical path under the N+ diffusion region in structure 11.

obtained from Fig. 9:

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20

.
40

.
60

.
80

im

DRIFT-REGION LENGTH Id(um)

Fig. 7.

Impact of p-type drift region length on breakdown voltage for structure 11.

8. As expected, the breakdown voltage increases for higher values of the drift-region length, the drift region thickness, and the isolating oxide thickness. The breakdown voltage approaches an upper limit as the drift-region length is increased because of breakdown under the cathode, which is limited by the combination of the silicon and oxide thicknesses. By evaluating the maximum electric field, E at the silicon/isolatingoxide interface under the ,, N+ diffusion, the maximum breakdown voltage, SV, can be

where E, and E, are the dielectric constants of silicon and oxide, respectively, T, and Th are the thicknesses of the drift region layer under the N+ diffusion and the isolating oxide, respectively, , and N is the doping concentration of the drift region. E- can be calculated from the empirical expression E, = 4010 Nd[5]. For example, a 5 micron drift region thickness and 1 micron oxide thickness will result in a breakdown voltage of about 180 volts as seen in Fig. 7. This is achieved even with 10 microns of driftregion length. For a 25 micron drift region thickness and 3 micron oxide thickness, the maximum breakdown voltage obtained using the equation (2) is 620 volts. However, with an implant dose of 1E12 cm-2 and drift-region length of 100 microns, a breakdown voltage of only about 550 volts is obtained from the two-dimensional simulation. Although both p-type and n-type drift regions can be used, the n-type drift region gives a higher breakdown voltage. This is because, under breakdown conditions, the electric field is

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Referenee
[l]

J.A. Appels and H.M.J. Vaes, "High-Voltage Thin Layer Devices (RESURF DEVICES)," 1979IEEE Int. Electron Devices Meeting Digest, Abst. 10.1, pp. 238-241, 1979. Z. Parpia and C.A.T. Salama, "Optimization of RESURF LDMOS Transistors: An Analytical Approach," IEEE Trans. Electron Devices, vol. ED37, pp. 789-796, 1990. M.F. Chang, G. Pifer, H. Yilmaz, E.J. Wildi, R.G. Hodgins, K. Owyang, and M.S. Adler, "Lateral HVIC with 1200-V Bipolar and Field-Effect Devices," IEEE Trans. Electron Devices, vol. ED-33, pp. 1992-2001, 1986. P. Ratnam, "Novel Silicon-on-InsulatorMOSFET for High-Voltage Integrated Circuits," Electronics Letter, vol. 25, pp. 536-537, 1989. B.J. Baliga, Modem Power Devices. New York, NY: John Wiley, 1987. A. Nakagawa, N. Yasuhara and Y. Baba, "New 500V Output Device Structures for Thin Silicon Layer on Silicon Dioxide Film," in 2ndInt. Symp. on Power Semiconductor Devices and ICs, 1990, pp.97-101.

[2]

3
m

im0

[3]

larger at the siliconlisolating oxide interface for the n-type silicon, as shown in Fig. 9, than for the p-type silicon. Since the electric field inside the oxide is three times that at the interface, the breakdown voltage for the n-type drift region is (qN,T,Ta/e, higher than that for the p-type drift region. It can be seen from Fig. 10, which shows the dependenceof the breakdown voltage on the implant dose, that 2 micron isolating oxide thickness is enough for the n-type silicon drift region to get a breakdown voltage of 600 volts, while 4 micron oxide thickness is required in the case of p-type drift region (seeFig. 6). In the application to the lateral MOSFETs, the n-type drift region also provides a lower onresistance due to the higher mobility for electrons as compared with holes. In Fig. 10, the surface (top) RESURF implant approach described above is compared with an implant at the interface between the drift region and the isolating oxide (bottom) as discussed by A. Nakagawa, ef al. [6]. It can be seen that devices with RESURF implant on the top surface have a higher breakdown voltage. An important observation is that the breakdown voltage changes quite smoothly in some ranges of the implant dose near the optimum point. This will provide good process control during device fabrication.

[4]

[5] [6]

Conclusioq
In order to develop techniques for obtaining high voltage integrable dielectrically isolated power devices, the RESURF principle has been successfully applied to these devices. The formation of an inversion layer under the isolating oxide in DI RESURF structure has been eliminated by two proposed device structures. It has been found from extensive simulations that the design parameters for both of these structures can be adjusted to obtain breakdown voltages in excess of 600 volts.

Acknowledgement
The authors would like to acknowledge the financial support for this work received from Texas Instruments, and thank Dr. S. Malhi of Texas Instruments for his continuous interest and help.