A Novel Active Auxiliary Commutation Circuit for Three-Level Inverters

Jos Eduardo Baggio and Jos Renes Pinheiro

Department of Electronics and Computer Engineering Federal University of Santa Maria 97119-960 - Santa Maria - RS - BRAZIL - renes@ctlab.ufsm.br Abstract-This paper presents the analysis and design of a new low loss auxiliary circuit for three level PWM singlephase inverters which achieve soft-switching at all semiconductor devices. The active auxiliary commutation circuit is composed by a LC circuit and two bi-directional switches which operate at ZCS and ZVS. The proposed active auxiliary commutation circuit (AACC) dispenses the use of auxiliary voltage sources. Low reactive energy is added to the converter resulting in low RMS current stresses at main switches and consequently higher efficiency is achieved. The design and experimental results are presented to prove the operation principle, as well as it is performed a fully description of the circuit operation. I. INTRODUCTION Several circuit topologies have been proposed and investigated with the aim to achieve soft switching in inverters. In the general form, the presence of soft switching techniques in the power converters allow that the power semiconductor devices operate at higher switching frequencies. However, to achieve this purpose (ZVS and/or ZCS), the power semiconductor devices can suffer from a significant increase in their device ratings, which yields additional conduction losses on semiconductor and passive devices, beyond EMI problems. A LC resonant snubber circuit trigged by auxiliary switches was proposed by Bingen and McMurray [1, 2] to minimize the high dynamic stresses encountered when the primary switches in inverters circuits turn on or off. The circuit presented as Auxiliary Resonant Commutated Pole (ARCP) is composed by one bi-directional switch, one resonant inductor, resonant capacitors and two low frequency capacitors or two dc sources, since the arrangement of the capacitors can be considered like a single capacitor connected to the midpoint of the input dc source. Therefore, the low frequency capacitors (usually the output fundamental frequency is 50~60 Hz) provide the input voltage share. This topology is interesting whenever halfbridges topologies are employed. Now, whether the fullbridge topology is considered, two ARCP are necessary, one for each leg, beside two large input capacitors to divide the input voltage source. This practice may increase the volume of the converter. It is important comment that in some cases, as in high voltage, the capacitors may be a center-tapped ones, so in these cases the volume is not penalized. Others proposed AACC are presented in [4, 5] for DC-AC converters whose auxiliary voltage source are implemented by an autotransformer. The proposed circuit, as illustrated in Fig.1, dispenses the use of auxiliary voltage sources or input low frequency center-tap capacitor and it operates under the resonant principle. The resonant inductor and capacitor are designed to operate at high frequency. This procedure yields small size components. The snubber capacitors are placed in parallel with the main switches. The auxiliary switches are placed in series with the resonant inductor Lr, and the resonant capacitor Cr is placed in parallel with one of the auxiliary switches. This set (capacitor, inductor and auxiliary switches) is considered an Active Auxiliary Commutation Circuit (AACC), which provide a temporary parallel path in a manner that main power switches can commutate softly (ZVS) at any load condition. Therefore, the proposed AACC performs soft turn-on and off every power switches. The auxiliary switches operate at ZCS (Sa3, Sa4) and ZVS (Sa1, Sa2).
Sa1 D1 C1 S1 Da1 E Cr Load S2 C2 D2 D4 S4 C4 Da2 Lr Sa3 Sa4 Da3 Da4 S3 Sa2 D3 C3

Fig. 1 - ZVS Full-Bridge inverter with an Active Auxiliary Commutation Circuit

Due to the fact that the inverter is three-level (+E, 0, -E), to commutate softly at instants (0-E) and (0+E), a DC auxiliary source or trapped energy in the auxiliary circuit is needed. Whether the energy is trapped in the resonant inductor, the conduction losses become a very important drawback. So, to achieve successfully this purpose the energy must be stored in the resonant capacitor. II. OPERATION PRINCIPLES Proposed AACC is appropriate for single-phase ZVS fullbridge structures operating under three level PWM control. All devices are operating at high frequency, and the AACC assures soft commutation at all switches. To explain the circuit operation, assume that the load voltage commutates from +E to 0 and from 0 to +E. Initially (Stage 0), it is considered the switches S1 and S4 are conducting the load current, and that the initial conditions are vCr(t) = 0, iLr(t) = 0. Sa1 and Sa2 are gated on. Stage 1: At t0, Sa3 turns on at ZCS, beginning the resonant inductor boost stage. As vCr(t0)=0 and Sa1 is closed, iLr(t) increases linearly due to the presence of the main voltage source +E.

I Lr =

E . t Lr

(1)

Where: ILr = variation of current through the resonant inductor at t interval time. Stage 2: At t1, S1 is turned off and S2 is enabled to gate on, starting the main switches commutation. At this time, begin the resonance between the snubber capacitors and the resonant inductor Lr. The capacitor voltage vC2(t) begins to decrease. Lr (2) Z1 = C2 + C1 i Lr (t 2 ) = I Lr + E Z1 (3)

capacitor voltage increases and the inductor current decreases until t4, when the current reaches zero and Da4 turns off. Lr (4) Z2 = Cr (5) vC (t3 ) = Z2 . i Lr (t2 )
r

Where: Z1 = characteristic impedance of the first resonance occurred in AACC. C2 , C1 = intrinsic main capacitors in the MOSFETs (See Fig.1). iLr(t2) = peak current through the resonant inductor. Stage 3: At t2 vC2(t2) = 0 and S2 is turned on (ZVS). The load current freewheels through D2 and S4, and the resonant inductor current freewheels through D2, Sa1, Da2, Lr, Sa3, Da4 and S4. Stage 4: At t3, Sa1 and Sa2 are turned off (ZVS), the resonant circuit (LC) evolves in a resonant form. The Stage 0
Sa1 D1 S1 C1 E Da1 Cr VCr=0 S2 C2 D2 Load ILoad S4 C4 D4 Da2 Lr Sa3 Sa4 Da3 Da4 S3 C3 Sa2 D3

Where: Z2 = characteristic impedance of the second resonance occurred in AACC. vCr(t3) = peak voltage of the resonant capacitor. Stage 5: At t5, Sa3 is turned off under ZCS, and only the load current freewheels through D2 and S4. Stage 6: At t6, Sa4 is turned on (ZCS), beginning the resonance between Cr and Lr. The capacitor voltage decreases and the inductor current increases. Stage 7: At t7, when vCr(t7) = 0, Sa1 and Sa2 are turned on, and the resonant inductor current freewheels through S2, D4, Sa4, Da3, Lr, Sa2 and Da1. Stage 8: At t8, S2 is turned off and S1 is enabled to turn on. The capacitors C1 and C2 evolve resonantly with the inductor Lr. Stage 9: At t9, vC1(t9) = 0 and S1 is turned on. The resonant inductor current decreases, so it transfers its trapped energy to the main voltage source (+E). When the resonant inductor current reaches zero, Da3 blocks and the auxiliary switch Sa4 is turned off under ZCS. Stage 1
Sa1 D1 S1 C1 E Da1 Cr VCr=0 S2 C2 D2 Load ILoad S4 C4 D4 Da2 ILr Sa3 Sa4 Da3 Da4 S3 C3 Sa2 D3

Stage 2
Sa1 D1 S1 C1 E Da1 Cr VCr=0 S2 C2 D2 Load ILoad S4 C4 D4 S2 C2 D2 Da2 ILr Sa3 Sa4 Da3 Da4 S3 C3 E Sa2 D3 S1 C1 Da1 Cr VCr=0 Sa1 D1

Stage 3
Sa2 D3 Da3 Da2 ILr Sa3 Load ILoad S4 C4 D4 Sa4 Da4 S3 C3

Stage 4
Sa1 D1 S1 C1 E Da1 Cr Load S2 C2 D2 ILoad S4 C4 D4 S2 C2 D2 Da2 ILr Sa3 Sa4 Da3 Da4 S3 C3 E Sa2 D3 S1 C1 Da1 Cr Sa1 D1

Stage 5
Sa2 D3 Da3 Da2 ILr Sa3 Load ILoad S4 C4 D4 Sa4 Da4 S3 C3

Stage 6
Sa1 D1 S1 C1 E Da1 Cr Load S2 C2 D2 ILoad S4 C4 D4 D2 S2 C2 Da2 ILr Sa3 Sa4 Da3 Da4 S3 C3 E Sa2 D3 S1 C1 Da1 Cr VCr=0 D1 Sa1

Stage 7
Sa2 D3 Da3 Da2 ILr Sa3 Load ILoad S4 C4 D4 Sa4 Da4 S3 C3

Stage 8
Sa1 D1 S1 C1 E Da1 Cr VCr=0 S2 C2 D2 Load ILoad S4 C4 D4 D2 S2 C2 Da2 ILr Sa3 Sa4 Da3 Da4 S3 C3 E Sa2 D3 S1 C1 Da1 Cr VCr=0 D1 Sa1

Stage 9
Sa2 D3 Da3 Da2 ILr Sa3 Load ILoad S4 C4 D4 Sa4 Da4 S3 C3

Fig. 2 - Operation stages of the proposed AACC.

S1 S2 S3 S4 Sa1 Sa3 Sa4 ILr ILrmx

commutation as described following. Stage 1: At t0, Sa3 is turned on, beginning the inductor boost stage. The inductor current increase linearly due to the presence of the voltage source +E. Stage 2: At t1, S1 and S4 are turned off, and S2 and S3 are enabled to turn on. The resonant inductor and snubber capacitors evolve in a resonant form, starting the ZVS commutation process of all main switches. Stage 3: At t2, vC2(t) = vC3(t) = 0 and S2 and S3 are turned on (ZVS). At this time, it is applied -E on the load, and the inductor current decreases linearly transferring its energy to the voltage source. Stage 4: At t3, iLr(t3) reaches zero blocking Da4. From this instant, the converter operates in a similar form to previous described stages (0-9), remembering that from this time the output voltage varies from -E to zero and after from zero to E. Stage 0

VCr

VCrmx
D1

Sa1 S1 C1 E Da1 Cr VCr=0

Sa2 D3 Da3 Da2 Lr Sa3 Load ILoad S4 C4 D4 Sa4 Da4 S3 C3

+E VLoad
to t1 t2 t3 t4 t5 t6 t7 t9 t10 t8 t

S2 C2 D2

Fig. 3 - Main theoretical waveforms

The above stages describe the converter operation when is applied +E and 0 (zero) Volts on the load. As the auxiliary switches are bi-directional, the proposed AACC can be applied to -E and 0 (zero) Volts on the load, since it is based in the same principle (see Fig. 5). A particularity occurs when the load voltage is inverted. It is well known that if the load is of the inductive type, itself may commutate the main switches (E.g. +E -E); however to assure successfully the load voltage inversion for any load (including no load), the AACC must operate to perform the

Stage 1
Sa1 D1 S1 C1 E Da1 Cr VCr=0 S2 C2 D2 Load ILoad S4 C4 D4 Da2 ILr Sa3 Sa4 Da3 Da4 S3 C3 Sa2 D3

Stage 2
Sa1 D1 S1 C1 E Da1 Cr VCr=0 S2 C2 D2 Load ILoad S4 C4 D4 Da2 ILr Sa3 Sa4 Da3 Da4 S3 C3 Sa2 D3

S1 S2 S3 S4 Sa1 Sa3 Sa4

D3 Da3 Da4 S3 C3

Stage 3
Sa1 D1 S1 C1 E Da1 Cr VCr=0 S2 C2 D2 Load ILoad S4 C4 D4 Da2 ILr Sa3 Sa4 Sa2

ILr

ILrmx

VCr

Stage 4
Sa1 D1 S1 C1 E Da1 Cr VCr=0 S2 C2 D2 Load ILoad S4 C4 D4 Da2 ILr Sa3 Sa4 Da3 Da4 S3 C3 Sa2 D3

+E VLoad -E
t0 t1 t2 t3 t

Fig. 5 - Theoretical waveforms at the load voltage inversion time

Fig. 4 - Operation stages at the load voltage inversion time

IV . EXPERIMENTAL RESULTS III. DESIGN METHODOLOGY As described in the operation principles of the AACC, the resonant inductor current must be greater than the load peak current for that the main switches commutation occur successfully. A resonant components design is as follows: Defining the load and the source as: Pout = 500W , E = 200V DC , Mod . Depth = 0 .8 , Vout = 110Vrms so, I o peak = 6.4 A . Considering that tlinear = 560s, and I linear > I o peak and assuming that I linear = 7 A , E . t linear then Lr = = 16H . (6) I linear During the resonance time, the resonant capacitor voltage must not be greater than the input voltage E. How VCr = Z . I linear , (7) where Z = Lr , Cr Cr 19.6F . (8) A single-phase three-level PWM inverter with AACC was developed and implemented in laboratory, with two purpose: the first one, to verify the validation of the theoretical analysis; the second one, to observe the behavior and performance of the converter, utilizing devices available in the market. Therefore, from the values obtained in the design, as shown in the previous session, the inverter was built using the following devices and components. Converter specifications: Pout=500W, Vout= 2 110 V, E=200V, fo=60Hz, fs=45kHz, where: fo = output fundamental frequency fs = switching frequency Vout = output peak voltage TABLE I DEVICES AND COMPONENTS
Component S1,S2,S3,S4,Sa1,Sa2 C1,C2,C3,C4 D1,D2,D3,D4,Da1,Da2 Sa3,Sa4 Da3,Da4 Lr Cr Parameter MOSFET - IRFP450 MOSFET capacitance MOSFET intrinsic IGBT - HGTP3N60C3D IGBT intrinsic 16H 20F

the resonant capacitor value is obtained as follows Cr I linear 2 . Lr E2

It can be verified, from the obtained experimental results, that the AACC operates as desired. However, under the lights of the results, some considerations must be done. It is

strongly recommended the use of switches of the minoritary carrier type like IGBT for the ZCS auxiliary switches (Sa3, Sa4), and for the ZVS ones (Sa1, Sa2), it is commended the use of switches of the majoritary carrier type, such as MOSFET. The commutations of the main and auxiliary switches can be seen in figures 6, 7 and 8, being the ZVS shown in figures 6 and 7, and the ZCS shown in Fig. 8. The waveforms of the resonant components, vCr(t) and iLr(t), are depicted in Fig. 9. Note that the available energy to perform the commutation 2 (see figure) is smaller than the commutation 1 energy. This fact is due to that the quality factor of the real circuit is finite. A detail of the output voltage inversion of the three level

PWM inverter is shown in Fig. 10. The two-level commutation was used at this time for that the commutation is independent of the value and sense of the load current, allowing that the converter operates as with capacitive loads as with inductive ones. In figures 11 and 12 are shown the waveforms of the three level PWM output voltage and the current and voltage at the load. The distortion (see figures) of the output voltage occurs at the zero cross (small voltage values), it is due to the requirement of a minimum time for the auxiliary circuit resonance. However, it can be eliminated by an appropriate command, which provides smaller voltage values.

Fig. 6: 1>Gate voltage of the main switch S1 (10V/div); 2> Drain-source voltage of the main switch S1 ( 50V/div) 100s/div

Fig.7: 1> Gate voltage of the auxiliary switch Sa1 (10V/div); 2> Drain-source voltage on the auxiliary switch Sa1 (100V/div) 250s/div

1 2

Fig. 8: 1> Gate voltage of the auxiliary switch Sa3 (10V/div); 2> Collector-emitter current in the auxiliary switch Sa3 (2A/div) - 500s/div

Fig. 9: 1> Resonant capacitor voltage (50V/div); 2>Resonant inductor current (5A/div) - 2.5s/div

Fig. 10: 1> Resonant inductor current (5A/div); 2> Three Level Output voltage of the inverter (150V/div) - 12s/div

Fig. 11: 1> TL Output voltage of the inverter (100V/div); 2> Output current for a inductive load (2A/div) - 2.5ms/div

REFERENCES [1] G. Bingen, Utilisation de Transistors a Fort Courant et Tension Elevee, Proceeding of the First European Conference on Power Electronics and Applications, 1985, Vol. 1, pp. 1.15-1.20. [2] W. McMurray, Resonant Snubbers With Auxiliary Switches, Conference Record of the 24th IEEE Industry Applications Society Annual Meeting, 1989, Vol. 1, pp. 829-834. [3] R. W. De Doncker and J.P. Lyons, The Auxiliary Resonant Commutated Pole Converter, Conference Record of the 25th IEEE Industry Applications Society Annual Meeting, 1990, Vol. 1, pp. 1228-1235. [4] I. Barbi and D.C. Martins, A True PWM ZeroVoltage Switching Pole With Very Low Additional RMS Current Stress, IEEE Power Electronics Specialists Conference Records, 1991, Vol. 1, pp. 261-267. [5] J.R. Pinheiro and H.L. Hey, An Active Auxiliary Commutation Circuit for Inverters, Proceeding of the 27th Annual IEEE Power Electronics Specialists Conference, 1996, Vol. 1, pp. 223-229.

Fig. 12: 2> Voltage at a capacitive load (50V/div) - 5ms/div

V. CONCLUSIONS: This work presents an Active Auxiliary Commutation Circuit (AACC) topology for three-level PWM ZVS inverters, based on resonance principle. The auxiliary circuit is composed by two bi-directional switches operating at ZVS and ZCS, a resonant capacitor and a resonant inductor. It is important to highlight that the proposed AACC permits the ZVS full-bridge inverter works at three-level without the need of auxiliary sources, differently of its AACC counterparts. The proposed circuit assure soft switching to all main switches, with low RMS current stress and high efficiency. The experimental results show the principle operation validation, from no load to full load.