Sunteți pe pagina 1din 9

STP9NC60 STP9NC60FP

N - CHANNEL 600V - 0.6 - 9A TO-220/TO-220FP PowerMESH MOSFET


T YPE STP9NC60 STP9NC60FP

V DSS 600 V 600 V

R DS(on) < 0.75 < 0.75

ID 9.0 A 5.2 A

TYPICAL RDS(on) = 0.6 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED
1 2

3
1 2

DESCRIPTION The PowerMESH II is the evolution of the first generation of MESH OVERLAY . The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns switching speed, gate charge and ruggedness. APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING SWITH MODE POWER SUPPLIES (SMPS) DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVER

TO-220

TO-220FP

INTERNAL SCHEMATIC DIAGRAM

ABSOLUTE MAXIMUM RATINGS


Symb ol V DS V DGR V GS ID ID I DM () P tot dv/dt( 1 ) V ISO T s tg Tj Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (R GS = 20 k) G ate-source Voltage Drain Current (continuous) at Tc = 25 o C Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) T otal Dissipation at T c = 25 o C Derating Factor Peak Diode Recovery voltage slope Insulation Withstand Voltage (DC) Storage Temperature Max. O perating Junction Temperature
o

Value ST P9NC60 STP9NC60F P 600 600 30 9.0 5.7 36 125 1.0 4.5 -65 to 150 150
(1) ISD 9A, di/dt 200 A/s, VDD V(BR)DSS, Tj TJMAX

Unit V V V A A A W W/ C V/ns V
o o o

5.2 3.3 36 40 0.32 4.5 2000

C C 1/9

() Pulse width limited by safe operating area

February 2000

STP9NC60/FP
THERMAL DATA
T O- 220 R thj- ca se R t hj-a mb R thc -sin k Tl Thermal Resistance Junction-case Max 1.0 62.5 0.5 300 T O-220F P 3.12
o o o

C/W C/W C/W o C

Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose

AVALANCHE CHARACTERISTICS
Symbo l I AR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by T j max, < 1%) Single Pulse Avalanche Energy o (starting Tj = 25 C, I D = IAR , V DD = 50 V) Max Valu e 9 850 Unit A mJ

ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF


Symbo l V ( BR)DSS I DSS I GSS Parameter Drain-source Breakdown Voltage Test Cond itions ID = 250 A V GS = 0 Min. 600 1 50 100 Typ . Max. Un it V A A nA

VDS = Max Rating Zero G ate Voltage Drain Current (V GS = 0) VDS = Max Rating Gate-body Leakage Current (VDS = 0) VGS = 30 V

Tc = 125 C

ON ()
Symbo l V GS(th ) R DS(on ) I D(on) Parameter Gate Threshold Voltage VDS = V GS Static Drain-source On Resistance On State Drain Current VGS = 10V Test Cond itions ID = 250 A ID = 4 A 9.0 Min. 2 Typ . 3 0.6 Max. 4 0.75 Un it V A

VDS > I D(on ) x R DS(on )max VGS = 10 V

DYNAMIC
Symbo l g fs () C is s C os s C rs s Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse T ransfer Capacitance Test Cond itions VDS > I D(on ) x R DS(on )max VDS = 25 V f = 1 MHz ID = 4 A V GS = 0 Min. Typ . 10 1400 196 31 Max. Un it S pF pF pF

2/9

STP9NC60/FP
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbo l t d( on) tr Qg Q gs Q gd Parameter Turn-on Delay T ime Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Cond itions VDD = 300 V I D = 4.5 A VGS = 10 V R G = 4.7 (Resistive Load, see fig. 3) VDD = 480 V I D = 9.0 A V GS = 10 V Min. Typ . 28 15 44 10.5 19.5 62 Max. Un it ns ns nC nC nC

SWITCHING OFF
Symbo l t d( off ) tf t r(Vof f ) tf tc Parameter Turn-off Delay Time Fall T ime Off-voltage Rise Time Fall T ime Cross-over Time Test Cond itions VDD = 300 V I D = 4.5 A VGS = 10 V R G = 4.7 (Resistive Load, see fig. 3) VDD = 480 V I D = 9.0 A V GS = 10 V R G = 4.7 (I nductive Load, see fig. 5) Min. Typ . 53 30 15 12 24 Max. Un it ns ns ns ns ns

SOURCE DRAIN DIODE


Symbo l I SD I SDM () V SD () t rr Q rr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward O n Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 9 A V GS = 0 610 5.4 17 Test Cond itions Min. Typ . Max. 9.0 36 1.6 Un it A A V ns C A

di/dt = 100 A/s ISD = 9 A o T j = 150 C VDD = 100 V (see test circuit, fig. 5)

() Pulsed: Pulse duration = 300 s, duty cycle 1.5 % () Pulse width limited by safe operating area

Safe Operating Area for TO-220

Safe Operating Area for TO-220FP

3/9

STP9NC60/FP
Thermal Impedance for TO-220 Thermal Impedance forTO-220FP

Output Characteristics

Transfer Characteristics

Transconductance

Static Drain-source On Resistance

4/9

STP9NC60/FP
Gate Charge vs Gate-source Voltage Capacitance Variations

Normalized Gate Threshold Voltage vs Temperature

Normalized On Resistance vs Temperature

Source-drain Diode Forward Characteristics

5/9

STP9NC60/FP
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform

Fig. 3: Switching Times Test Circuits For Resistive Load

Fig. 4: Gate Charge test Circuit

Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times

6/9

STP9NC60/FP

TO-220 MECHANICAL DATA


DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.2 5 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 1 5.7 5 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147
E

mm TYP. MAX. 4.60 1.32 2.72 1.27 0.70 0.88 1.70 1.70 5.15 2.7 1 0.4 0 0.019 0.024 0.044 0.044 0.194 0.094 0.393 MIN. 0.173 0.048 0.094 4.40 1.23 2.40

inch TYP. MAX. 0.1 81 0.0 51 0.1 07 0.050 0.0 27 0.0 34 0.0 67 0.0 67 0.2 03 0.1 06 0.4 09 0.645 0.5 51 0.1 16 0.6 20 0.2 60 0.1 54 0.1 51

D1

L2 F1

G1

Dia. F2 F

L5 L7 L6

L9

L4

H2

P011C

7/9

STP9NC60/FP

TO-220FP MECHANICAL DATA


DIM. MIN. A B D E F F1 F2 G G1 H L2 L3 L4 L6 L7 28.6 9.8 15.9 9 3 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 30.6 10.6 16.4 9.3 3.2 1.126 0.385 0.626 0.354 0.118 mm TYP. MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.2 04 0.4 17 0.6 45 0.3 66 0.1 26 inch TYP. MAX. 0.1 81 0.1 06 0.1 08 0.0 27 0.0 39 0.0 67 0.0 67 0.2 04 0.1 06 0.4 09

L3 L6 L7 F1 F

G1

F2

1 2 3 L2 L4

8/9

STP9NC60/FP

Information furnished is believed to be accurate and reliable. However, STMicroelectonics assumes no responsibil ity for the consequences r of use of such information nor for any infringement of patents or other rights of third partes which may result from its use. No license is i granted by implication or otherwise under any patent or patent rights of STMicroelectro nics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all informaton previously supplied. STMicroelectronics products i are not authorized for use as critical components in life support devices or systems with express written approval of STMicroelectronics. out The ST logo is a trademark of STMicroelectronics 1999 STMicroelectronics Printed in Italy All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japa - Malaysia - Malta - Morocco n Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com .

9/9

S-ar putea să vă placă și