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ChipScope Tutorial

Whats ChipScope?
Information could be found at: http://www.xilinx.com/products/software/chipscope/chipscope_ila_t ut.pdf (Official document which is not necessarily easy to understand) https://wiki.ittc.ku.edu/ittc/images/b/bf/Edk_chipscope.pdf (pg. 1~ pg. 8, about some basic ideas, e.g. IBA, ILA) http://www.soe.ucsc.edu/classes/cmpe225/Spring08/chips.html (about the system diagram)

How to set up IBA in EDK?


1) Go to Debug in the Xilinx Platform Studio (XPS) menu; 2) Choose Debug Configuration; 3) Choose Add New Chip Scope Peripheral and select To monitor OPB bus signals (adding OPB IBA) as in the figure below;

4) In the following dialog, you can choose the number of samples you want to collect. The default value is 512 which uses around 3 BRAMs. You can use more as long as we have enough BRAMs left. Leave the settings as they are and click OK; 5) Ready to go! Click the Download button and the new design would be re-synthesized. 6) Run the ChipScope Pro Analyzer from the start menu. After open up, initialize the cable by clicking . Then a dialog should pop up telling you the device on the JTAG chain shown as

7) After successfully initialization, a window would pop up shown as

. 8) In the upper left window, we would choose the DEV:2 MyDevice 2 (XC3VP30) which is the XC2VP30 FPGA. In the Waveform window, a list of signals is shown which each represents a physical signal inside FPGA. The Trigger Setup window tells you which signal is set to be the trigger to tell the hardware when to start. 9) A good thing is that because we used the IBA, Xilinx provides us a configuration file which indicates the mapping

of these signals which saves us the time to look up the signal and set the names. To load the file, choose the Import from the File in the menu. Then Select New File and choose the file located at \\project(your project)\implementation\ chipscope_opb_iba_0_wrapper\ cs_coregen_chipscope_opb_iba_0.cdc and click OK. Then a nice list of signals would be shown as

10) Set up the trigger The trigger set up window looks like

It is composed of 3 parts: a. Match Functions: define the signals we use as triggers. In this case, there are three of them, which is M0: TRIG0: OPB_CTRL; M1: TRIG1: OPB_ABUS; M2: TRIG2: OPB_DBUS. For example, if we want to use OPB_xferAck as trigger, we can set the value to 1 in the Value tab shown as

And make sure the unwanted signals are marked as X which means I dont use it for trigger. b. Trigger Conditions: This defines the way you organize the triggers. Besides one single trigger, you could also use a sequence of triggers. By clicking on the Trigger Condition Equations, we can edit the sequencer of the trigger as shown below.

c. Capture Settings: This defines the relation between the time point when the samples start being saved related to the time when trigger conditioned is met. Also it defines the amount of sampling window each time and each windows size. If we use 1 window, and set position to 0, it means I only want to capture sample for one time and the starting time is the time when trigger fires. If position is set to 256, it means I want to see the 256 samples before trigger is fired.

11) All are set!!! Pls note that the 3 parts above, only the Match functions is necessary. If you are fine with the default setting in Trigger Conditions and Capture Settings, you dont need to set them. For each debugging case, you should carefully evaluate the case and set up the corresponding trigger settings. For now, we could try firing by clicking the button shown as below.

And hopefully, you will see some waveform as follows: (for sure, it wont be the same in your case). Sometimes, we

need to fire a few times to get the interested waveform and thats why we need to set the right trigger, otherwise, the waveform probably wont be the one which can help!

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