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PROJECT REPORT
EC2308 Microprocessor and Microcontroller Lab
Guided By
Ms Philomena Jennifer
Lecturer, ECE Date: 28/09/2011
ABSTRACT
Our Term Project is to study and implement a PRE-SETTABLE ALARM SYSTEM using 8253/8254 timer and 8086 Microprocessor .We have approached this design without using interrupts and it mainly involves the use of thumbwheel switches which are interfaced through 8255 ports. The alarm lasts for 5 seconds .The timing parameters are derived from 8253/54and control signals are generated using 74LS138.
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ACKNOWLEDGEMENT
Our indebted thanks to our respected Dean Prof V.Thyagarajan, to do this project work. We express our sincere thanks to our Head of the department, Mr.V.Salaiselvam M.E. (PhD) who has helped us to take this invaluable project. We express our sincere thanks to our guide Ms PHILOMENA JENNIFER, Lecturer ECE for the untiring continued technical guidance during the fabrication and preparation of the Project. This is a major motivation force for us to complete our project work.
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REGISTER NO:
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TABLE OF CONTENTS
3. Program Coding
3.1 Coding 3.2 Delay Routine
4. Conclusion
4.1 Advantage of Pre-settable alarm system
5. References
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INTRODUCTION
An electronic alarm timepiece has a time counter, an alarm time memory circuit and a coincidence detector for detecting a coincidence between the time count and the stored alarm time for actuating an alarm. The alarm time memory circuit is a pre-settable counter and it is pre-settable to load the present time count in the time counter therein. In this way, a coarse adjustment of the alarm time can be set and a manually operable mechanism is provided to increment the count in the alarm time memory circuit to obtain the precise desired alarm time. There are various types of alarm system available in the market.
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Clock This is the clock input for the counter. The counter is 16 bits. The maximum clock frequency is 1 / 380 nanoseconds or 2.6 megahertz. The minimum clock frequency is DC or static operation. Out This single output line is the signal that is the final programmed output of the device. Actual operation of the outline depends on how the device has been programmed. Gate This input can act as a gate for the clock input line, or it can act as a start pulse, depending on the programmed mode of the counter.
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B. 8255
1 D0 - D7 These are the data input/output lines for the device. All information read from and written to the 8255 occurs via these 8 data lines. 2 (Chip Select Input). If this line is a logical 0, the microprocessor can read and write to the 8255. (Read Input): whenever this input line is a logical 0 and the RD input is a logical 0, the 8255 data outputs are enabled onto the system data bus. (Write Input) Whenever this input line is a logical 0 and the CS input is a logical 0, data is written to the 8255 from the system data bus
5 A0 - A1 (Address Inputs): The logical combination of these two input lines determines which internal register of the 8255 data is written to or read from. 6 RESET The 8255 is placed into its reset state if this input line is a logical 1. All peripheral ports are set to the input mode.
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7 PA0 - PA7, PB0 - PB7, and PC0 - PC7: These signal lines are used as 8-bit
I/O ports. They can be connected to peripheral devices.
Here and signals are activated when M/ signal is low, indicating I/O Bus cycle. To get absolute address, all remaining address lines (A3A15) are used to decode the address for it. In order to access it we must use indirect addressing modes
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The address map shows how addresses have been allocated for memory and any other devices connected to the address bus.
Ports/Control Register
Address lines A7 A6 A5 A4 A3 A2 A1 A0
Address
Counter 0 Counter 1 Counter 2 Control register Port A Port B Port C Control register
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
0 0 0 0 0 0 0 0
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SC1 0
SC2 0
RW1 1
RW0 1
M2 0
M1 0
M0 0
BCD 1
SC1 0
SC2 1
RW1 1
RW0 1
M2 0
M1 1
M0 1
BCD 1
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SC1 0
SC2 0
RW1 0
RW0 0
M2 0
M1 0
M0 0
BCD 1
SC1 1
SC2 0
RW1 0
RW0 0
M2 0
M1 0
M0 0
BCD 1
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SC1 1
SC2 0
RW1 1
RW0 1
M2 0
M1 0
M0 0
BCD 1
BSR/IO 1 0
MODE A 0
PA 1
PCH MODE B PB 0 0 1
PCL 0
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3. PROGRAM CODING
3.1 Main Program Coding
MOV AL, 92H; Load control word in accumulator OUT 0EH, AL; Initialize 8255 by sending control word at the addresses of
Control register START: IN AL, 08H; Get the lower two digit of count MOV BL, AL; Store the lower two digit of the count IN AL, 0AH; Get the higher two digit of count MOV BH, AL; Store the higher two digit of the count
MOV AL, 31H OUT 06, AL; Load control word (31H) in the control register to load 16-bit
Count in count register of counter 0
MOV AL, BL OUT 00, AL; Loads lower byte of the count MOV AL, BH OUT 00, AL; Loads higher byte of the count BACK: BACK MOV AL, 01H; OUT 06, AL; Load control word (01H) in the control register to load 16-bit
Count in count register of counter 0 IN AL, 00H; Get the lower two digit of count CMP AL, 00H; Compare with zero JNZ BACK; Repeat IN AL, 00H; Get the higher two digit of count CMP AL, 00H; Compare with zero JNZ BACK; Repeat BACK; MOV AL, 01H; Load bit pattern to run alarm OUT 0CH, AL; send it to Port C CALL DELAY; Wait for 5 seconds MOV AL, 00H; Load bit pattern to stop alarm OUT 0CH, AL; send it to Port C JMP START; Repeat START;
3.2
Delay Routine
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This delay routine gives a delay of 5 seconds. Counter 1 of 8253/54 is used to give delay of 1 second. As output of counter1 is used as a clock for counter2, the count in the counter2 acts as a multiplying factor. Therefore, by loading 05H in the count register of counter 2 we get a delay of (51) seconds. MOV AL, 77H OUT 06, AL; Loads control word (71H) in the control register MOV AL, 10H OUT 02, AL MOV AL, 27H OUT 02H MOV AL, B1H OUT 06H, AL MOV AL, 05H OUT 04, AL; Loads lower byte of the count MOV AL, 00H; Loads higher byte of the count OUT 04, AL BACK: BACK MOV AL, 81H OUT 06, AL; Loads control word (81H) in the control register to latch
16-bit count in the count registers of counter 2 IN AL, 04H; Get lower two digits of the count CMP AL, 00H; Compare with zero JNZ BACK If not zero, repeat BACK: IN AL, 04H; Get the higher two digits of the count CMP AL, 00H; Compare with zero
JNZ BACK If not zero, repeat BACK: RET; Return to main program
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4. CONCLUSION
4.1 Advantages 1. Simple to design. 2. Reduces the need of using Schmitt trigger NAND gate usually used in
alarms.
5. REFERENCES
1 Pre-settable alarm clock-Wikipedia. 2 www.seminarprojects.com 3 Microprocessors and interfacing: Programming and hardware Douglas V. Hall
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