PUBLIC VERSION UNITED STATES INTERNATIONAL TRADE COMMISSION Washington, D.C.

In the Matter of CERTAIN SEMICONDUCTOR CHIPS AND PRODUCTS CONTAINING SAME Inv. No. 337-TA-753

COMBINED RESPONSE OF THE OFFICE OF UNFAIR IMPORT INVESTIGATIONS TO THE PRIVATE PARTIES PETITIONS FOR REVIEW OF THE INITIAL DETERMINATION ON VIOLATION OF SECTION 337

OFFICE OF UNFAIR IMPORT INVESTIGATIONS Lynn I. Levine, Director David O. Lloyd, Supervisory Attorney Daniel L. Girdwood, Investigative Attorney U.S. International Trade Commission 500 E Street, S.W. Suite 401 Washington, D.C. 20436 202.205.3409 (ph) 202.205.2158 (fax) Conf. Version: Public Version: March 27, 2012 April 16, 2012

i TABLE OF CONTENTS

I.

ISSUES SPECIFIC TO THE BARTH I PATENTS.............................................. 3 A. B. 1. 2. 3. C. 1. 2. 3. 4. D. 1. 2. E. A. B. 1. 2. 3. 4. C. 1. 2. D. Background ......................................................................................................... 3 Infringement ....................................................................................................... 7 Direct Infringement .......................................................................................... 7 Indirect Infringement ........................................................................................ 9 Exhaustion ...................................................................................................... 11 Invalidity ........................................................................................................... 12 The Credibility of Rambuss Expert Dr. Przybylski ...................................... 12 Anticipation .................................................................................................... 14 Obviousness .................................................................................................... 38 Written Description ........................................................................................ 45 Inequitable Conduct ......................................................................................... 48 Materiality ...................................................................................................... 48 Specific Intent To Deceive ............................................................................. 50 Unclean Hands .................................................................................................. 51 Background ....................................................................................................... 52 Infringement ..................................................................................................... 56 The Transmitter Limitations ........................................................................... 57 Infringement As To LSI ................................................................................. 60 Infringement As To Cisco .............................................................................. 62 Indirect Infringement ...................................................................................... 62 Invalidity ........................................................................................................... 63 Anticipation .................................................................................................... 64 Obviousness .................................................................................................... 84 Standing............................................................................................................. 87

II. ISSUES SPECIFIC TO THE DALLY PATENTS .............................................. 52

III. EXCLUSION OF CERTAIN INVALIDITY TESTIMONY AND COUMENTATION......................................................................................................... 88 IV. A. B. 1. RAMBUSS LICENSING-BASED DOMESTIC INDUSTRY ........................ 89 Background ....................................................................................................... 89 Application of Multimedia Display .................................................................. 91 An Investment In The Exploitation Of The Asserted Patents ........................ 92 PUBLIC VERSION

ii 2. 3. 4. The Investments Relationship To Licensing ................................................. 94 The Investments Relationship To The United States .................................... 95 Conclusion ...................................................................................................... 95

V. IMPORTATION ..................................................................................................... 95 VI. CONCLUSION .................................................................................................... 96

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iii TABLE OF AUTHORITIES

Cases Absolute Software, Inc. v. Stealth Signal, Inc., 659 F.3d 1121 (Fed. Cir. 2011) .............. 59 August Tech. Corp. v. Camtek, Ltd., 655 F.3d 1278 (Fed. Cir. 2011) .............................. 83 Callicrate v. Wadsworth Mfg., Inc., 427 F.3d 1361 (Fed. Cir. 2005) ............................... 47 Certain Dynamic Random Access Memories, Components Thereof, and Products Containing Same, Inv. No. 337-TA-242, Errata to Commn Action & Order, 1987 ITC LEXIS 170 (Nov. 1987).......................................................................................... 13, 25 Certain Electronic Devices with Image Processing Systems, Components Thereof, and Associated Software, Inv. No. 337-TA-724, Commn Op., EDIS Doc. ID 467105 (Dec. 21, 2011) ................................................................................................................. 7, 8, 9 Certain Electronic Devices, Including Wireless Communication Devices, Portable Music and Data Processing Devices, and Tablet Computers, Inv. No. 337-TA-794, Order No. 40 (Mar. 12, 2012) ........................................................................................................ 89 Certain Liquid Crystal Display Devices, Including Monitors, Televisions, and Modules, and Components Thereof, Initial Determination, EDIS Doc. ID 726395 (Mar. 7, 2012) ....................................................................................................................................... 91 Certain Mobile Communications and Computer Devices and Components Thereof, Inv. No. 337-TA-704, Trial Tr. (Nov. 10, 2010).................................................................. 89 Certain Multimedia Display and Navigation Devices, Inv. No. 337-TA-694, Commn Op., 2011 ITC LEXIS 1416 (July 22, 2011) ...................................................... 90, 91, 92, 93 Certain Wireless Communications System Server Software, Wireless Handheld Devices and Battery Packs, Inv. No. 337-TA-706, Order No.10 (June 10, 2010) ..................... 89 DSU Med. Corp. v. JMS Corp., 471 F.3d 1293 (Fed. Cir. 2006) ................................. 9, 10 Dynstar Textilfarben GMBH & Co. Deutschland KG v. C.H. Patrick Co., 464 F.3d 1356 (Fed. Cir. 2006) ............................................................................................................. 44 Fantasy Sports Props., Inc. v. Sportsline.com, Inc., 287 F.3d 1108 (Fed. Cir. 2002) ...... 62 General Electric Co. v. Intl Trade Commn, 2012 U.S. App. LEXIS 4118 (Fed. Cir. 2012) ............................................................................................................................. 51 In re King, 801 F.2d 1324 (Fed. Cir. 1986) ...................................................................... 82 In re Lister, 583 F.3d 1307 (Fed. Cir. 2009)............................................................... 16, 18 John Mezzalingua Associates, Inc. v. U.S. Intl Trade Commn, 660 F.3d 1322 (Fed. Cir. 2011) ............................................................................................................................. 95 Larson Mfg. Co. v. Aluminart Prods., Ltd., 559 F.3d 1317 (Fed. Cir. 2009) ................... 49 Leviton Mfg. Co. v. Universal Sec. Instruments, Inc., 606 F.3d 1353 (Fed. Cir. 2010) ... 49 Lucent Techs., Inc. v. Gateway, Inc., 580 F.3d 1301 (Fed. Cir. 2009) ........................... 8, 9 Perfect Web Techs., Inc. v. InfoUSA, Inc., 587 F.3d 1324 (Fed. Cir. 2009) ..................... 44 Rambus Inc. v. Hynix Semiconductor, Inc., 2008 WL 5771128 (N.D. Cal. Nov. 21, 2008) ....................................................................................................................................... 24 Saunders Group, Inc. v. Comfortrac, Inc., 492 F.3d 1326 (Fed. Cir. 2007)..................... 60 Silicon Graphics, Inc. v. ATI Techs., Inc., 607 F.3d 784 (Fed. Cir. 2010) ....................... 62 PUBLIC VERSION

iv Star Scientific, Inc., v. R.J Reynolds Tobacco Co., 537 F.3d 1357 (Fed. Cir. 2008) ........ 50 Sundance, Inc. v. Demonte Fabricating Ltd., 550 F.3d 1356 (Fed. Cir. 2008) ................ 44 Therasense Inc. v. Becton, Dickinson & Co., 649 F.3d 1276 (Fed. Cir. 2011) (en banc) 51 Statutes 19 U.S.C. 1337 ................................................................................................................. 7 Other Authorities Manual of Patent Examining Procedure (8th Ed. With July 2008 Revisions).................. 82

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1 The Office of Unfair Import Investigations (OUII) respectfully submits this combined response to the private parties petitions for review of the Initial Determination (March 2, 2012) in this investigation which found no violation of Section 337 as to all five of the asserted patents, i.e., U.S. Patent Nos. 6,470,405 (the 405 patent); 6,591,353 (the 353 patent); 7,287,109 (the 109 patent); 7,602,857 (the 857 patent); and 7,715,494 (the 404 patent).1 The 405, 353, and 109 patents are from the same patent family, and are referred to herein as the Barth I patents. The 857 and 494 patents are also from a common patent family, and are referred to herein as the Dally patents. The Barth I and Dally patents are collectively referred to herein as the Asserted Patents. Complainant Rambus, Inc. (Rambus) has petitioned for review of the IDs finding that the Barth I patents are unenforceable due to unclean hands arising out of Rambuss spoliation of evidence. See id. at 56-95. As discussed in OUIIs contingent petition for review, OUII agrees with Rambus insofar as the IDs analysis and conclusions regarding spoliation of evidence appear to be contrary to positions taken by the Commission in appellate proceedings from the 661 investigation which involved the same Barth I patents, a virtually identical unclean hands defense, and a similar factual record. See OUII Pet. 4-8. OUII thus supports this aspect of Rambuss petition. Rambus has also petitioned for review of the IDs finding that the asserted claims of both the Barth I patents and the Dally patents are invalid as anticipated by or obvious in view of the See Initial Determination on Violation of Section 337 and Recommended Determination on Remedy and Bond, EDIS Doc. IDs. 725571 & 725577 (Mar. 2, 2012) (ID); Respondents Contingent Petition for Review of the Initial Determination, EDIS Doc. ID 475141 (Mar. 19, 2012) (Resp. Pet.); Complainant Rambus Inc.s Petition for Review, EDIS Doc. ID 475134 (Mar. 19, 2012) (Comp. Pet.); see also Contingent Petition of the Office of Unfair Import Investigations for Review of the Initial Determination on Violation of Section 337, EDIS Doc. ID 475054 (Mar. 19, 2012) (OUII Pet.).
1

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2 prior art (Comp. Pet. 4-56), and that Rambus has exhausted its rights in the Barth I patents as to a subset of the accused products from one of the downstream respondents based on the respondents use of licensed memory devices in those products (id. at 95-99). OUII submits that Rambuss petition on these two issues largely consists of rearguing factual and credibility determinations that did not go in its favor but are fully supported by the record. OUII thus opposes these aspects of Rambuss petition. The Respondents have petitioned for review of the IDs analysis and conclusions regarding Rambuss standing to enforce the Dally patents. See Resp. Pet. 37-42. As discussed more fully in OUIIs contingent petition for review, OUII agrees that Commission review of this issue is warranted, albeit on different grounds. See OUII Pet. 8-11. In particular, the ID did not address OUIIs argument that the relevant contract on which the Respondents standing defense relies is void against Rambus under the bona fide purchaser provision of 35 U.S.C. 261. Because OUII took no position at trial on the alternative grounds for rejecting this defense that are addressed in the ID and in the Respondents petition for review, OUII takes no position on the Respondents petition as it relates to other aspects of their standing defense. The Respondents have also petitioned for review of: (1) the IDs finding that the Barth I patents are not invalid under 35 U.S.C. 112, 1 for lack of written description (Resp. Pet. 1523); (2) the IDs rejection of two of the Respondents prior art arguments as to the Barth I patents (id. at 25-32); (3) the IDs finding that the Barth I and Dally patents are infringed by the Respondents standards-compliant products (id. at 23-25; id. at 46-50); (4) the IDs finding that the Barth I patents were not unenforceable due to inequitable conduct (id. at 32-36); (5) the IDs finding that the importation requirement was met as to Respondent ST Microelectronics N.V. (id. at 66); (6) the IDs finding that a licensing-based domestic industry exists as to the Barth I and

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3 Dally patents (id. at 67-72); (7) a pre-trial evidentiary ruling that excluded certain testimony related to prior art arguments on which the Respondents ultimately prevailed (id. at 50-66); and (8) the finding that certain prior art invalidity arguments as to the Dally patents were waived (id. at 56-60), amongst other issues. As discussed below, OUII submits that the facts and legal conclusions reached in the ID on these issues are fully supported by the record and should not be reviewed by the Commission. OUII thus opposes these aspects of the Respondents petition. I. ISSUES SPECIFIC TO THE BARTH I PATENTS With respect to the Barth I patents, Rambus asserts claims 11-13 of the 353 patent, claims 11-13, 15, and 18 of the 405 patent, and claims 1, 2, 4, 5, 12, 13, 20, 21, and 24 of the 109 patent. See Notice of Investigation. Provided below is an overview of the Barth I patents, followed by a discussion of the Barth I specific issued raised in the parties petitions for review. A. Background

The three Barth I patents all generally relate to two types of data transfer operations, i.e., read and write operations, between a memory controller and a memory device. See 353 patent, 1:11-14; 7:40-43. In a write operation, the memory controller is the data transferring device and the memory device is the data receiving device, such that the memory controller writes data to the memory device much like a pitcher (i.e., a memory controller) throws a ball (i.e., data) to a catcher (i.e., a memory device). See RX-5429C, Jacobs Direct Q/A 148-149; Jacobs, Tr. 1052:01-03, 1056:07-14. By contrast, in a read operation, the memory device is the data transferring device and the memory controller is the data receiving device, such that the memory controller reads data from the memory device much like a catcher (i.e., a memory device) throws a ball (i.e., data) back to a pitcher (i.e., a memory controller). See RX-5429C, Jacobs Direct Q/A 145-147; Jacobs, Tr. 1052:04-06.

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4 As discussed more fully in subsequent sections of this brief, the primary claim limitation in dispute for infringement and validity purposes is the strobe signal of the 353 and 405 patents, and the analogous signal of the 109 patent. For purposes of this background discussion, the term strobe signal is used to denote this common limitation. As explained in the ID on pages 232-237, the Barth I patents use a strobe signal to better facilitate the transfer of data between the memory controller and the memory device as part of a read or write operation. For example, a strobe signal can be used to initiate sampling of data propagated between these two devices to ensure that the receiving device captures data off a data bus when valid data is available for sampling. See ID at 234 (citing 353 patent, 8:59-64; CX-10765C, Przybylski Rebuttal Q/A 108-130; SX-5, Illustrated Dict. of Elecs. (5th Ed. 1991) at 318, 360 525, 599). In the context of the write operations called for in the asserted claims, a strobe signal initiates sampling of data by the memory device such that the memory device captures valid data received from the memory controller via the data bus. See CX-10765C, Przybylski Rebuttal Q/A 120-130. However, there are at least two distinct ways in which a strobe signal can initiate sampling as part of the claimed write operations. In one configuration, the strobe signal indirectly initiates the sampling of data. See ID at 234. For example, the memory devices in the preferred embodiments of the Barth I patents can be configured to sample data a programmable number of clock cycles after first detecting the strobe signal. See id. at 234-235 (citing Jacobs, Tr. 1058:12-22; Smith, Tr. 908:15-909:12, 943:03-944:04; Przybylski, Tr. 2677:08-12). In this configuration, a transition of the clock signal directly controls the actual sampling of data by the memory device and the strobe signal preceding the data indirectly initiates that process by informing the memory device when sampling is to begin based on the clock signal. See id. at 235 (citing 353 patent, 10:34-38; Przybylski, Tr. 2677:13-2678:23, 2724:04-2725:06). One

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5 such embodiment is shown in Appendix A of the Barth I patents, an excerpt of which is provided below:

See id. (citing 353 patent, Appendix A). As illustrated above, a write operation is instructed by the write command appearing at clock cycle 40. See id. (citing Barth, Tr. 391:03-08; Przybylski, Tr. 2726:19-2729:03). Thereafter, the strobe is issued once and only once (for that write operation) at clock cycle 47, one clock cycle before data associated with that write operation appears on the data bus BD[8:0] at clock cycle 48 (and is latched into memory by operation of a clock signal). See id. at 236 (citing Barth, Tr. 391:09-393:14; Przybylski, Tr. 2679:24-2681:18, 2682:03-18, 2729:09-2732:08). As this embodiment illustrates, the strobe

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6 signal need not directly control the actual sampling of data by a memory device to nonetheless initiate sampling as claimed. In another configuration, a strobe signal directly initiates sampling by itself controlling actual sampling of data by a memory device. See ID at 236. Taking the accused products as an example, a transition in the DQS strobe signal (high-to-low or low-to-high) after an initial assertion low causes a memory device to capture data off of the DQ data bus:

ID (citing CX-4347.0070; Przybylski, Tr. 2721:06-14; CX-9543C, Przybylski Direct Q/A 336). This direct control configuration differs from the preferred embodiments described previously in that the memory device need not utilize a clock signal to capture data because the DQS signal transitions at the appropriate time (i.e., when valid data is available for sampling on the DQ data bus). See id. However, a key similarity between the direct control configuration utilized with the memory devices of the accused Barth I products (i.e., where the DQS strobe signal controls the latching of data) and the indirect control configuration of certain preferred embodiments in the Barth I patents (i.e., where a clock signal controls the latching of data after first detecting a

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7 strobe signal) is that both configurations utilize a strobe signal to initiate the sampling of data by a memory device as part of a write operation. See id. at 237. B. Infringement

In OUIIs view, a preponderance of the evidence supports the IDs finding that the Respondents have contributed to or induced infringement of the asserted Barth I patent claims under 35 U.S.C. 271(b),(c). See ID at 47-67. The Respondents petition for review as to this issue should be accordingly denied. 1. Direct Infringement

Turning first to the Respondents petition as it relates to direct infringement, the Respondents assert that the ID cites to but does not properly apply the Commissions recent Electronic Devices opinion, which issued after the completion of post-trial briefing in this investigation. See Resp. Pet. 24 (citing Certain Electronic Devices with Image Processing Systems, Components Thereof, and Associated Software, Inv. No. 337-TA-724, Commn Op., EDIS Doc. ID 467105 at 12-20 (Dec. 21, 2011) (Electronic Devices)). OUII disagrees. As background, Section 337 prohibits the importation, sale for importation, or sale after importation of articles that infringe a U.S. patent claim. See 19 U.S.C. 1337(a)(1)(B)(i); Electronic Devices at 13. Because a method claim must be practiced to be infringed, in those investigations in which method claims have been asserted e.g., the asserted Barth I patent claims, which are all method claims the statute requires that there be more than mere evidence of importation, sale for importation, or sale after importation of articles capable of practicing the claimed method to show a violation of Section 337.2 Rather, there must be proof of a respondent
2

See Electronic Devices at 17 (Apple does not directly infringe the patented method when it imports the accused computers because the act of importation is not an act that practices the steps of the asserted method claim.).

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8 inducing or contributing to direct infringement by another.3 In other words, to support a violation of Section 337 that is based on infringement of a method claim, the evidentiary record must include two things: (1) proof of direct infringement by some entity practicing the claimed method; and (2) proof that the respondent induces or contributes to that infringement. The ID followed this precedent. The ID found that the evidence showing Respondents extensive domestic sales of the accused products none of which can be used in a noninfringing manner was at least circumstantial proof that the Respondents customers use those products in the United States and thus directly infringe the asserted Barth I method claims. See ID at 63 (citing Lucent Techs., Inc. v. Gateway, Inc., 580 F.3d 1301, 1317 (Fed. Cir. 2009) (extensive domestic sales of an accused product are sufficient to support supporting a finding of direct infringement by customers for purposes of an inducement analysis) (Lucent)). As discussed more fully below, the ID also found that the Respondents induce or contribute to their customers direct infringement, e.g., by instructing their customers on how to use those products in an infringing manner. See ID at 6567. Notably, the Lucent case on which the ID relies for its infringement analysis involved virtually identical circumstances, i.e., a finding of indirect infringement that was based on evidence of extensive domestic sales of products that were designed to practice the claimed method coupled with manufacturer-provided instructions on the infringing use. See Lucent, 580 F.3d 1318-19. To the extent that the Respondents further argue that the ID did not properly apply Electronic Devices as part of its importation analysis, OUII disagrees. See Resp. Pet. 24 (citing ID at 20-21). Because all of the accused products are manufactured abroad, the ID correctly held
3

See Electronic Devices at 19 (S3G might have proved a violation of section 337 if it had proved indirect infringement of method claim 16.).

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9 that evidence demonstrating extensive domestic sales, use and testing of the accused products necessarily shows that these products were imported into the United States. See ID at 21. Further, because indirect infringement was shown as discussed later in the ID and in the next section of this brief - these imported articles could support a finding of a violation of Section 337.4 Thus, the importation findings in the ID are consistent with the Electronic Devices precedent. For at least these reasons, the Respondents petition for review as to direct infringement on the Barth I patent claims should be denied. 2. Indirect Infringement

In OUIIs view, the Respondents arguments regarding indirect infringement are similarly without merit. Indeed, much of the indirect infringement analysis is undisputed. The Respondents only appear to challenge: (1) whether Rambus showed culpable conduct for purposes of inducement under 35 U.S.C. 271(b); (2) whether Rambus showed knowledge that the combination for which [Respondents] components were especially made was both patented and infringing under 35 U.S.C. 271(c); and (3) whether Rambus showed that all of the accused products have no non-infringing use. See Resp. Pet. 24-25. None of these arguments has merit. Turning first to the Respondents inducement argument, the Respondents rely on the Federal Circuits DSU opinion as requiring more proof of culpable conduct than allegedly exists in the evidentiary record. See Resp. Pet. 24-25 (citing DSU Med. Corp. v. JMS Corp., 471 F.3d 1293, 1306 (Fed. Cir. 2006)). However, the Respondents overlook the Federal Circuits post-DSU decision in Lucent which relied on exactly the same sort of evidence of intent that the Judge relied on in the ID. See Lucent, 580 F.3d at 1318-19. The Respondents also overlook the
4

See Electronic Devices at 19 (S3G might have proved a violation of section 337 if it had proved indirect infringement of method claim 16.).

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10 Commissions post-DSU indirect infringement analysis and findings in the 661 investigation, which also involved the Barth I patents, a similar set of accused products, and a similar evidentiary record with respect to indirect infringement. See 661 ID at 41-44. Turning next to the Respondents knowledge argument as to contributory infringement, the Respondents are of the view that accused infringers with objectively reasonable beliefs in their defenses can never be found to infringe under 35 U.S.C. 271(c). However, the DSU opinion on which the Respondents rely for their inducement arguments explains that the minimal intent requirement for contributory infringement can be met by evidence that the accused product was designed for use in a patented combination, so long as the contributory acts took place in the United States. See DSU, 471 F.3d at 1303-04. Such evidence exists here. See ID at 65-67. Moreover, analogous evidence was found sufficient to support a finding of contributory infringement in the 661 investigation as to the same the Barth I patents. See 661 ID at 41-44. Finally, the Respondents non-infringing use argument boils down to an allegation that the accused products are staple articles of commerce that can perform non-infringing operations. See Resp. Pet. 25. According to Respondents, [t]he ALJ does not dispute, for example, that write commands are non-infringing. Id. (citing ID at 67). Yet, there is no such statement on the cited page of the ID, which instead holds that write operations (and their associated write commands) necessarily infringe asserted claims. See ID at 67. The Respondents also state that some of the accused products can also be used with . . . non-accused memory such as [single data rate] SDR memory. Id. However, the ID explains that this small subset of accused products are being imported in setups with accused double data rate (DDR) memory and that these particular setups have no non-infringing use. See ID at 67, n. 9.

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11 For at least these reasons, the Respondents petition for review as to indirect infringement of the Barth I patent claims should also be denied. 3. Exhaustion ] established at ] products,

As set forth in pages 330 to 339 of the ID, Customer Respondent [ trial that Rambus has exhausted its rights in the Barth I patents as to certain [

which use licensed memory devices purchased from third party Samsung. Rambus has petitioned for review of the IDs findings in this regard on three separate grounds: (1) the territoriality requirement of a proper exhaustion defense has not been established because [ ] purchases its memory devices abroad (Comp. Pet. 95-97); (2) the Samsung license

agreement exempts coverage of the asserted Barth I claims (id. at 97-98); and (3) the Samsung memory devices do not substantially embody the Barth I claims (id. at 98-99). With respect to issues (2) and (3), OUII submits that Rambuss arguments are not meritorious for at least the reasons set forth in the ID on pages 336-337. Namely, the agreements broadly define [ ] To the extent that Rambus argues that the license agreement excludes products used in conjunction with a memory controller, OUII notes that the agreement at issue [

] See, e.g., RX-4079C, Samsung Agreement at 2.5.

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12 With respect to issue (1), Rambus contests the finding in the ID that [ ] purchases

Samsung memory devices in the United States. See Comp. Pet. 95-97. For example, Rambus notes that Samsung memory devices are [

] However, Rambus concedes that the record contains evidence of a purchase order with [ ]noted thereon. See id.at 95 (citing ID at 337; [

]). While Rambus attempts to explain away this evidence as uncorroborated by testimony of a witness with personal knowledge as to the shipments at issue and as an unusual notation in view of other purchase orders that lack such a designation, OUII submits that this evidence is nonetheless sufficient to support the conclusion ultimately reached in the ID. See id. at 96. For at least these reasons, Rambuss petition for review as to the exhaustion findings in the ID should be denied. C. Invalidity

In OUIIs view, clear and convincing evidence supports the IDs finding that the asserted Barth I patent claims are invalid as anticipated by or obvious in view of the prior art. See ID at 89-125 (anticipation); id. at 210-223 (obviousness). The evidence also supports the IDs finding that the specification provides adequate written description support for these claims. See id. at 232-237. The private parties petitions for review of these invalidity findings should be rejected. 1. The Credibility of Rambuss Expert Dr. Przybylski

Before addressing the substantive invalidity findings, one particular issue implicates much of the corresponding analysis in the ID. Specifically, the Judge found Rambuss invalidity expert Dr. Przybylski to be evasive, forgetful, contradictory and [to have] offered set statements with no explanation. The ALJ found Dr. Przybylski so unreliable overall that his testimony in PUBLIC VERSION

13 this matter could not assist him. ID at 309. Rambus seeks to overturn this credibility finding on three grounds: (1) the discussion of Dr. Przybylski and his lack of credibility appears within the section on Unclean Hands in the ID even though he did not provide any testimony as to the Respondents unclean hands defense (Comp. Pet. 79-80); (2) the ID favorably cites testimony from Dr. Przybylski as part of its infringement analysis (id. at 80); and (3) the exemplary testimony cited in the ID as contradictory was not in fact contradictory (id. at 80-81). As discussed below, OUII respectfully submits that the Judges credibility determination as to Dr. Przybylski is entitled to deference and should not be set aside by the Commission. See Certain Dynamic Random Access Memories, Components Thereof, and Products Containing Same, Inv. No. 337-TA-242, Errata to Commn Action & Order, 1987 ITC LEXIS 170 at *69 (Nov. 1987) (DRAMS) (Because the ALJs conclusions were based on the ALJs credibility determination, the Commission defers to the ALJs conclusion.). First, Rambus is correct that Dr. Przybylski did not offer a word of testimony on unclean hands and the nature and quality of his testimony could not provide any support for finding bad faith as to that defense. See Comp. Pet. 79-80. However, all of the witnesses other than Dr. Przybylski on which the ID provides a detailed credibility analysis testified on unclean hands issues. See ID at 270-283 (Joel Karp); id. at 283-287 (Neil Steinberg); id. at 287-289 (Jose Moniz); id. at 289-295 (Geoff Tate); id. at 295-305 (Richard Barth). While the ID could have further separated its discussion of Dr. Przybylski from its discussion of Rambuss unclean hands witnesses, its contrary organizational structure does not show reversible error. Indeed, nowhere in its discussion of Dr. Przybylski does the ID suggest that he provided testimony on unclean hands or otherwise demonstrate confusion as to his lack of involvement on that particular issue. See ID at 305-309.

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14 Second, Rambus argues that the ID is not consistent as to its view of Dr. Przybylskis credibility in stat[ing] that he provides no useful testimony to the ALJ or the Commission (ID at 306), even though the ALJ cited extensively to his testimony in support of other findings, such as infringement. Comp. Pet. 80. OUII submits that favorable citation in the ID to Dr. Przybylskis testimony on points such as infringement where other evidence of record sufficiently corroborates that testimony versus criticism in the ID of his testimony on points that lack sufficient corroboration such as invalidity over prior art in fact shows the careful attention that was paid to his testimony overall. It does not show reversible error. Finally, Rambus contests whether the contradictory statements identified in the ID were indeed contradictory. See Comp. Pet. 80-81. Even assuming that Rambuss interpretation of these testimony excerpts is correct, it fails to address the IDs further characterization of Dr. Przybylski as evasive and forgetful: The doctors . . . demeanor on the stand, as he was confronted with prior art, previous statements he and others had made, and diagrams of the evidence was remarkable: he would have long periods of silence, punctuated with heavy sighs, conveyed the impression that he had run out of answers and was making statements that he himself did not believe. He often merely disputed the words on the paper, rather than offering an explanation or argument for the court to consider. See ID at 306. OUII submits that these observations independently support the Judges credibility determination as to Dr. Przybylski. For at least these reasons, Rambuss petition for review of the credibility determinations as to Dr. Przybylski should be denied. 2. Anticipation

Turning to the anticipation analysis on the merits, the ID found that two distinct groupings of prior art, i.e., NextBus and Yano/Dan, anticipate the asserted claims of the

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15 353 patent and certain of the asserted 109 patent claims.5 These groupings include the following three references: Prior Art Yano (JP 3-276344) RX-4260 (Japanese) RX-4261 (English) Dan (EP 0 632 457 A1) RX-4262 NextBus Specification6 RX-4265 Anticipated 353 Patent Claim 11 11 11, 12, 13 Anticipated 109 Patent Claim N/A N/A 1, 20, 24

The ID rejected the Respondents anticipation arguments with respect to the following two references: Prior Art Farmwald-Horowitz (RX-4269) SyncLink (RX-4270C) Anticipated 353 Patent Claim NA 11, 12, 13 Anticipated 109 Patent Claim 1, 2, 4, 5, 12, 13, 20, 21, 24 1, 20, 24

The discussion below focuses on Rambuss petition as it relates to NextBus, Yano, and Dan, and on Respondents petition as it relates to Farmwald-Horowitz and SyncLink. OUII submits that the other references are not as relevant as the primary references discussed below. a. The NextBus Specification (RX-4265)

According to the ID, the NextBus prior art anticipates claims 11, 12, and 13 of the 353 patent and claims 1, 20, and 24 of the 109 patent. See ID at 104-121. Rambuss petition addresses three purported deficiencies in the IDs analysis as it relates to this finding: The Respondents did not allege that a single reference anticipates all of the asserted 353 and 109 patent claims. Nor did the Respondents identify any reference that allegedly anticipates the asserted 405 patent claims. The ID also addresses U.S. Patent Nos. 5,313,624 (Harriman) and 5,218,684 (Hayes) which contain disclosures analogous to that of the NextBus Specification. See ID at 104 (Harriman); id. at 117-121 (Hayes). OUII did not address these arguments in detail in post-trial briefing due to their similarity to the NextBus Specification.
6 5

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16 (1) whether NextBus qualifies as prior art (Comp. Pet. 30-32); (2) whether the NextBus memory board qualifies as a memory device (id. at 32-39); and (3) whether the NextBus MCLKSEL* signal qualifies as a clock signal (id. at 39-40). None of these purported deficiencies has merit. i. NextBus Qualifies As Prior Art

The Federal Circuit has articulated the standard for determining the public availability of a reference as follows: In order to qualify as a printed publication within the meaning of 102, a reference must have been sufficiently accessible to the public interested in the art. Because there are many ways in which a reference may be disseminated to the interested public, public accessibility has been called the touchstone in determining whether a reference constitutes a printed publication bar under 35 U.S.C. 102(b). Whether a reference is publicly accessible is determined on a case-by-case basis based on the facts and circumstances surrounding the references disclosure to members of the public. A reference is considered publicly accessible if it was disseminated or otherwise made available to the extent that persons interested and ordinarily skilled in the subject matter or art exercising reasonable diligence, can locate it. In re Lister, 583 F.3d 1307, 1311 (Fed. Cir. 2009) (internal citations omitted) (Lister). OUII submits that - when considered as a whole - several undisputed facts support the IDs finding that NextBus was publicly available under this standard. First, NextBus is a specification document by NeXT Inc. that describes a synchronous bus architecture. See RX-4265.0002. Respondents expert Dr. Jacobs provided the following historical testimony regarding NeXT Inc. and its product lineup in the 1990 timeframe: NeXT was a computer workstation company that was formed by Steve Jobs in the late 1980s. And they built something called the NeXT computer. It was an innovative computer. It had an innovative operating system. And I believe their first product rolled out in the 1990 time frame. Jacobs, Tr. 1153:05-12. Given the NextBus specifications 1990 copyright date, it is highly probable that this document describes the bus architecture in the NeXT product that also rolled out in the 1990 timeframe. See id. at 1152:24-1153:01. A reasonable inference can thus be

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17 drawn that the NextBus specification became publicly available in this same general timeframe because implementers of the NeXT product would have needed access to the specification documents, such as NextBus. Second, the NextBus specification includes a reorder number N6010. See RX4265.0002. As Dr. Jacobs testified, reorder numbers are typically provided in publicly available specifications to facilitate the ordering of copies by interested parties: Q. A. What does reorder product number N6010 mean to you? That suggests that if you want more copies of the specification, you could call NeXT, give them that number, and they would send you more copies.

Jacobs, Tr. 1153:16-21. This evidence is consistent with implementers of the NeXT product having needed (and being able to obtain) access to the specification documents on that product, such as the NextBus specification. Third, the NextBus specification includes a technical support number. See RX4265.0017. As Dr. Jacobs testified, the technical support number suggests that NextBus was indeed publicly available because the company set up a technical support department to field calls regarding that document: Q. A. Q. A. Do you see the line, for more information, telephone NeXT telebusiness at 415-424-8500 and ask to speak with the technical support department? Yes, I do. What does that mean to you? Well, that suggests that the tech support department was familiar with this document and wanted to be able to tell people about the contents of the document.

Jacobs, Tr. 1153:22-1154:07.

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18 Finally, a patent in the same general art-field as the NextBus specification and in the same early 1990s timeframe as the NeXT product rollout refers to a NextBus Specification from Next Inc. the same title that appears on the cover page of the 1990 NextBus specification (RX4265) on which the ID relies. See RX-4266, U.S. Patent No. 5,313,624 at 15:43-60 (filed on May 14, 1991) (Harriman) (above right). As Dr. Jacobs testified, the discussion in Harriman of a NextBus Specification and the related embodiments therein closely tracks an analogous discussion in the NextBus specification (RX-4265). See Jacobs, Tr. 1154:08-1155:07. Thus, Harriman further suggests that implementers of the NeXT product lineup indeed had access to the NextBus specification in the early 1990s. When viewed as a whole, these facts suggest that NextBus was disseminated or otherwise made available to the extent that persons interested and ordinarily skilled in the subject matter or art exercising reasonable diligence can locate it. See Lister, 538 F.3d at 1311. Indeed, Rambus does not point to any contrary evidence of record. See Comp. Pet. 30-32. Instead, Rambus speculates that a stronger case of public availability could have been made if the record contained testimony from someone with personal knowledge of and experience working with a particular hard copy of the NextBus specification. See id. at 31 (citing Tr. 286:05-07). While true, the fact that a stronger case could theoretically have been made does not demonstrate that the evidence of record is inadequate to support a finding of public availability. Rambus further argues that [t]he ALJs analysis is akin to finding that the placement of a copyright date on this brief (2012) along with a telephone number (555-1212) and something

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19 called a reorder number (1234) means that this document is publicly available. See id. at 31. However, this analogy falls apart when viewed in light of Dr. Jacobs testimony, which: (1) ties the technology described in the 1990 NextBus specification with the NeXT Inc. product lineup in 1990; and (2) explains that the Harriman patent filed in 1991 which explicitly identifies the NextBus specification discloses embodiments that closely track features disclosed in the NextBus specification. In short, the copyright date, technical support number, and reorder number within the NextBus specification itself do not stand on their own and should not be viewed in isolation they form merely parts of the totality of the evidence before the ALJ, which collectively shows the public availability of this reference. To the extent that Rambus further argues that the website from which Respondents obtained the [NextBus] document . . . was not created until 2005, a decade after the 1995 Barth I filing date and implies that the reference thus has a 2005 publication date, OUII disagrees. See Comp. Br. 31. As Dr. Jacobs testified at trial, the website at issue contains an archived copy of the NextBus specification that was uploaded long after the reference first became publicly available in the early 1990s. See Jacobs, Tr. 1166:18-1167:17. Finally, to the extent that Rambus argues that the 1991 Harriman patent fails to properly incorporate by reference the NextBus specification, this fact is not dispositive as to the public availability of NextBus. See Comp. Pet. 31-32. Harriman explicitly identifies the NextBus specification and discloses embodiments that closely track the discussion in the NextBus specification (RX-4265) as noted above. Harriman thus supports the conclusion reached in the ID that NextBus was publicly available, regardless of whether the entire NextBus specification also forms part of the Harriman disclosure by way of a formal incorporation by reference. See Jacobs, Tr. 1154:08-1155:07.

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20 ii. The Memory Device Limitation

Turning to the substantive disclosure of the NextBus specification, the proper interpretation of one particular claim limitation i.e., the memory device limitation is largely dispositive as to the anticipation analysis for this reference.7 More specifically, Rambus argues that the ID conflates the memory controller term with the memory device term by interpreting memory device so broadly as to encompass the memory board of NextBus which has a slave controller and memory chips mounted thereon. See Comp. Pet. 32-33. Rambus asserts that such a construction is contrary to the intrinsic record of the Barth I patents, which require the memory controller be discrete from the memory device. See id. at 33-35. This argument should be rejected for the reasons discussed below.8

Rambus does not dispute the IDs finding that NextBus discloses each and every limitation of claim 11 of the 353 patent and of claims 1, 20 and 24 of the 109 patent under the adopted construction of the memory device limitation. See Comp. Pet. 39. The discussion below uses NextBus as context for the corresponding claim construction dispute on the memory device term. See Wilson Sporting Goods Co. v. Hillerich & Bradsby Co., 442 F.3d 1322, 1326-27 (Fed. Cir. 2006) (knowledge of an accused product or process provides meaningful context for a claim construction analysis); Lava Trading, Inc. v. Sonic Trading Mgmt., LLC, 445 F.3d 1348, 1350 (Fed. Cir. 2006) (same).

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21 As depicted in Figure 1-1, NextBus discloses a NeXT Computer including a NeXT CPU Board provided in Slot 0:

RX-4265.0014; see also Jacobs, Tr. 1161:21-1162:05, 1163:22-1164:01. A memory controller on the NeXT CPU Board issues write commands and strobe signals to one or more memory boards that are provided in Slots 2, 4, and/or 6. See Przybylski, Tr. 2655:09-18. Because the NeXT CPU Board is distinct from the memory boards, the memory controller will always and necessarily be distinct from the memory boards controlled thereby:

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22 As in Figure 1-1 of NextBus, the Barth I patents likewise disclose embodiments with a memory controller that is distinct from the memory devices controlled thereby. The embodiment of Figure 6, for example, depicts a memory controller 601 that is distinct from memory device 603:

353 patent, Figure 6; see also id. at 5:61-67 (describing same). Given the above referenced similarity between NextBus and the embodiments claimed in the Barth I patents, Rambus essentially appears to be arguing that the claimed memory device must be devoid of slave control functionality that is responsive to signaling from the memory controller. Using NextBus as an example, Rambus argues that this system is distinguishable from the claimed invention because the main memory controller (i.e., on NeXT CPU Board in Slot 0) issues write commands and strobe signals to a memory board (e.g., in Slots 2, 4, and/or 6) on which a slave controller and memory chips are mounted. See Comp. Pet. 39. In other words, NextBus includes two memory controllers. This point was best illustrated by Rambuss cross examination of Respondents expert Dr. Jacobs at trial:

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23 Q. And that memory system or that memory device, according to your definition, would include a memory controller, correct? A. Yes. It would include a memory controller, which would control the local DRAMs, and it would be necessarily a slave memory controller under the direction of some external memory controller. This would be a slave that is simply performing control logic manipulating, maintaining, administering the functions that need to be performed on the DRAMs and managing and orchestrating the flow of data through this system, but it would not be the memory controller. It would be a slave memory controller, potentially. For instance, if this were on a board that sat in a back plane and spoke over a bus to another memory controller. Jacobs, Tr. 1098:01-18. OUII submits that the IDs rejection of Rambuss argument is supported by the intrinsic record of the Barth I patents. In particular, the embodiment of Figure 6 has a main memory controller 601 that issues write commands and strobe signals to a memory device 603, which includes internal control section 634 and storage section 632. See 353 patent, 5:61-6:20 (describing Figure 6). Thus, the embodiment of Figure 6 is consistent with an interpretation of memory device that is broad enough to encompass slave control functionality therein. Notably, the Examiner in charge of reexamining the Barth I patents recently reached a similar conclusion. See ID at 108 (quoting SX-0008, Feb. 26, 2010 Office Action at 2; RX-4246.0005; Przybylski, Tr. 2660:08-20); see also Jacobs, Tr. 1159:08-1161:06. As such, NextBus cannot be distinguished merely because its memory board similarly includes slave control functionality therein. Provided below is a demonstrative of this concept:

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24

To the extent that Rambus relies on extrinsic evidence to support its narrow interpretation of memory device and corresponding attempt to distinguish NextBus on this basis, its reliance is similarly misplaced. See Comp. Pet. 36-38. For example, Rambus relies on a textbook from 2008 (CX-9731), a patent with a 2005 priority date (CX-9784), and an article from 2000 (RX4421) none of which is from the relevant 1995 timeframe of the Barth I patents. See Comp. Pet. 37. Rambus also relies on a district court order involving its Farmwald-Horowitz patent family, which fails to address how the term memory device in the asserted Barth I patents should be construed.9 See id. (citing Rambus Inc. v. Hynix Semiconductor, Inc., 2008 WL 5771128 at *2 (N.D. Cal. Nov. 21, 2008)). OUII submits that what little extrinsic evidence remains cannot trump the intrinsic record of the Barth I patents, and, on balance, was overweighed by the extrinsic evidence cited in the ID. See ID at 108-109 (citing RX-5429C; RX-5429C, Jacobs Q/A 310; Jacobs, Tr. 1119:15-1121:07, 1122:21-1123:17, 1156:02-1161:20).

OUII notes that the Federal Circuit recently heard oral argument in an appeal from the USPTO in which Rambus raised similar arguments. The transcript for this oral argument can be retrieved from the Courts website at http://www.cafc.uscourts.gov/oral-argumentrecordings/2011-1247/all/rambus.html.

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25 Conclusion As To The Memory Device Limitation For at least these reasons, OUII respectfully submits that the IDs rejection of Rambuss interpretation of the memory device term should not be reviewed. Because Rambus does not dispute the IDs corresponding findings that NextBus discloses each and every limitation of claim 11 of the 353 patent and of claims 1, 20 and 24 of the 109 patent under the adopted construction of the memory device limitation, these findings should likewise be affirmed. See Comp. Pet. 39. iii. The MCLKSEL* Signal

Turning to dependent claims 12 and 13 of the 353 patent, Rambus seeks review of the IDs finding that the MCLKSEL* signal of NextBus qualifies as a clock signal. See Comp. Pet. 39-40. In particular, Rambus takes issue with the IDs fact findings as to how a person of ordinary skill in the relevant art would interpret the NextBus specification on this point. See id. Rambuss petition cites to the witness statement (CX-10765C) of its expert Dr. Przybylski as support for its contrary interpretation of this reference. However, the ID found Dr. Przybylskis invalidity testimony lacks credibility and could not be relied upon as previously discussed. OUII submits that it was not clear error for the ID to thus reject Dr. Przybylskis opinion as to the MCLKSEL* signal in NextBus in favor of the credible testimony of Respondents expert, Dr. Jacobs. See ID at 114-117; DRAMS, 1987 ITC LEXIS 170 at *69 (Because the ALJs conclusions were based on the ALJs credibility determination, the Commission defers to the ALJ's conclusion.). iv. Conclusion

For the above stated reasons, OUII submits that Rambuss petition as it relates to anticipation by NextBus should be denied.

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26 b. Yano (RX-4261) & Dan (RX-4262)

As set forth in the ID, the Yano and Dan references anticipate claim 11 of the 353 patent. See ID at 90-99 (Yano); id. at 99-104 (Dan). Rambuss petition addresses three purported deficiencies in the IDs anticipation analysis as it relates to these two references: (1) whether the claimed memory device is broad enough to encompass asynchronous memory (Comp. Pet. 42-43); (2) whether Yano and Dan disclose the claimed strobe signal (id. at 43-44 (Dan); id. at 46-47 (Yano)); and (3) whether Yano and Dan disclose the claimed write command (id. at 4446 (Dan); id. at 47 (Yano)). None of these three purported deficiencies has merit. i. Asynchronous Versus Synchronous Memory

Rambuss first argument as to Yano and Dan relates to asynchronous versus synchronous systems. See Comp. Pet. 42-43. In a synchronous system the command, address, and data signals are timed according to a clock signal, whereas in asynchronous systems they are not. See, e.g., RX-5429C, Jacobs Direct Q/A 126-127; CX-10765C, Przybylski Rebuttal Q/A 89. Typically, for command, address, and data signals to be timed according to a clock signal, the receiving device must receive a clock signal, which is not shown in Yano or Dan. According to Rambus, claim 11 is thus distinguishable from Yano and Dan because these references are directed solely at asynchronous systems whereas claim 11 is directed at synchronous systems. See Comp. Pet. 42-43. As discussed below, the IDs decision not to limit claim 11 to synchronous systems and thereby distinguish Yano and Dan is supported by the intrinsic and extrinsic evidence of record and should not be reviewed by the Commission. See ID at 94-95 (Yano); id. at 101-102 (Dan). More specifically, claim 11 is broadly written as a method of controlling a memory device - neither clock signal nor synchronous appears anywhere in the claim. See 353 patent, 41:29-41; Przybylski, Tr. 2637:09-11 ([T]he claims dont specifically recite a clock in PUBLIC VERSION

27 the context of the Barth I patents . . . .). Without explicit language to rely upon, Rambus attempts to indirectly read such a limitation into claim 11 by way of the write command and strobe signal terms. This argument lacks support in the record. Turning first to Rambuss strobe signal argument, Rambus is correct that the strobe signal of claim 11 must initiate sampling of a first portion of data. See 353 patent, 41:40-41. However, Rambus assumes that sampling in this context necessarily occurs only at a discrete point in time, which it believes is an implicit reference to synchronous systems. See Comp. Pet. 44 ([T]he claimed strobe signal indicates that data is captured at a discrete point in time in a synchronous operation.). Stated another way, because a strobe signal initiates sampling and sampling occurs at a discrete point in time and synchronous systems operate at discrete points in time (whereas asynchronous systems do not), claim 11 is purportedly limited to synchronous systems. As discussed below, Rambuss purported support for this argument is flawed. More specifically, Rambus argues that the Commission confirmed that construction of sampling i.e., that sampling refers to a synchronous system that captures data at a discrete point in time as part of the infringement findings in 661 investigation. See Comp. Pet. 43 n. 19 (citing 661 ID at 20-28). To the contrary, at most the Commission agreed with the presiding Judge that claim 11 is broad enough to encompass a synchronous system, such as the infringing products at issue in that investigation (and in the instant investigation). Whether claim 11 is limited to synchronous systems was not at issue or otherwise addressed by the Commission. Indeed, Rambus fails to identify any language in the Markman order purportedly construing claim 11 in this manner. See 661 Order No. 12 at 11-21 (construing the strobe signal and signal limitations of the asserted Barth I patent claims).

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28 Turning next to Rambuss write command argument, this argument fails for similar reasons. Namely, Rambus argues that the claimed write command must be encoded into a code that consists of one or more bits that are sampled only at a discrete point in time. See Comp. Pet. at 43 (citing 405 patent, 3:31-32, 3:50-52, 3:62-64). However, Rambus has not shown that sampling always has the narrow connotation that it ascribes to this term. Moreover, the plain and ordinary meaning of write command is simply an instruction to store data such a command need not be represented by a code or bits as supposedly appear in synchronous systems. See ID at 94 (quoting SX-5 at 113, 655; SX-6 at 360).10 Nor does the specification provide an express definition of write command that more narrowly defines this term. Rather, the specification at most explains that one embodiment of the invention conveys write commands in this manner. See 405 patent, 6:51-7:15; see also Comp. Pet. 45 (citing 405 patent, 6:51-75). To the extent that Rambus argues that the meaning of write command in claim 11 was agreed to in the 661 Investigation, it again misrepresents the proceedings in that investigation. See Comp. Pet. 44. Rambus voluntarily withdrew the different patent family in which the write command term was to be construed before issuance of the Markman order. See 661 Order No. 12 at 1, n. 1 (explaining no constructions were being adopted for the withdrawn patents). Thus, neither the Judge nor the Commission addressed Rambuss proposed construction of write command in that investigation.

Rambus argues that SX-5 defines command as an instruction, and instruction . . . as a set of bits defining an operation and comprising an operation code.). Comp. Pet. 45. However, no evidentiary citation is provided for this statement in Rambuss petition. Nor does SX-5 contain a page in which a definition of instruction is set forth. See EDIS Doc. ID 688209. It is thus unclear to what Rambus is referring.

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29 For at least these reasons, OUII submits that Rambus has failed to demonstrate error in the IDs finding that claim 11 reads on an asynchronous system. Its petition for review of this issue should be denied. However, even assuming that this particular finding was indeed erroneous, the ID also found that it would have been obvious to combine aspects of asynchronous and synchronous art so as to achieve the inventions claimed in the Barth I patents. ID at 212 (citing RX-5429C, Jacobs Direct Q/A 105, 129, 492-496). This separate ground for invalidating claim 11 over Dan/Yano is addressed more fully below in the section on obviousness. ii. The Strobe Signal

Only two limitations that appear explicitly in claim 11 remain in dispute for purposes of the anticipation analysis involving Yano and Dan. The first of these two limitations is the strobe signal previously discussed, which is highlighted in the language of claim 11 below: 11. A method of controlling a memory device that includes a plurality of memory cells, the method comprising: issuing a first write command to the memory device, the memory device being configured to defer sampling data that corresponds to the first write command until a strobe signal is detected; delaying for a first time period after issuing the write command; and after delaying for the first time period, issuing the strobe signal to the memory device to initiate sampling of a first portion of the data by the memory device. 353 patent, 41:29-41 (emphasis added). With respect to this limitation, Rambus does not challenge the IDs finding that Dan discloses an external write strobe and that Yano discloses a data strobe signal (DS) and that both of these references issue their purported strobe signal to a memory device. See ID at 95-98 (Yano); id. at 102-104. Rambus instead argues that neither of these two signals qualifies as the strobe signal of claim 11 because data flows into an asynchronous memory device over a period of time rather than at a discrete point in time as in the synchronous systems allegedly recited in the claim. See Comp. Pet. 43-44 (Dan); id. at 46-47 PUBLIC VERSION

30 (Yano). In short, Rambuss asynchronous/synchronous arguments carry over to its strobe signal arguments. These arguments are not meritorious for the reasons previously discussed and for the additional reasons set forth below. Turning first to the Dan reference, the ID relies upon the testimony of Respondents expert Dr. Jacobs that a memory device in Dan is instructed to perform a write operation by the assertion low of an output enable signal. See ID at 101-102 (citing RX-5429C, Jacobs Direct Q&A 256-257, 262, and 266). After a brief delay, an [external write] strobe signal in Dan causes data to be sampled by the memory device [110] in essentially the same manner as the claimed strobe signal of the Barth I patents. ID at 102 (citing RX-5429C, Jacobs Direct Q&A 258-260, 262).11 Thus, the write command of claim 11 corresponds to the output enable of Dan, and the strobe signal of claim 11 corresponds to the external write strobe of Dan. This explanation in the ID is consistent with Figure 3 of Dan, which depicts an output enable signal 300 that is asserted low to high, followed by the assertion high to low of an external write strobe 309, during which write data 312 appears on a data bus:

While Rambus argues that the external write strobe signal in Dan is sometimes described as being used to indicate write operations rather than initiate sampling, this fact at most suggests that Dan uses different phrasing than the Barth I patents when referring to similar functionality. See Comp. Pet. 44.

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31 RX-4262.0010. As illustrated in Figure 3, the write data 312 in Dan is held stable on the data bus for a period of time. See RX-4262.0005 at 7:16-17 (Shortly after data is placed on data bus 250 it becomes stable as indicated by 328.). Rambus infers from this fact that Dan discloses allowing data to flow into its asynchronous memory device over a drawn out period of time, thus differing from the discrete point in time in which data is purportedly sampled by the memory device of claim 11. Comp. Pet. 43. Yet, aside from the discredited testimony of its expert, Rambus has not identified any evidence to suggest that data is continuously written (i.e., flows into memory) in this manner. See id. at 43-44. In fact, Rambus recognizes for infringement purposes that data can be held stable on a data bus for a time period but nonetheless still be sampled as claimed. See Complainants Initial Post-Trial Brief (CIB) at 28 (To ensure proper sampling, the data is held valid for a period of time before the DQS signal transitions, and is then held valid for some period of time after the DQS transition.). Rambuss arguments as to Yano are similarly unpersuasive. More specifically, the ID relies upon Dr. Jacobs testimony that a memory device in Yano is instructed to perform a write operation by the assertion low of a R/W signal (Read/Write). See ID at 93-95 (citing RX5429C, Jacobs Direct Q&A 233, 234, 241, 247; Jacobs, Tr. 1142:14-21, 1144:09-1145:01). After a brief delay, a data strobe signal (DS) is asserted low contemporaneous with the high phase of the system clock at S5 which causes data to be written to memory 2 at that point in time. ID at 97 (citing RX-5429C, Jacobs Direct Q&A 232, 235-236, 241, 248; Jacobs, Tr. 1139:23-1140:16). This testimony tracks Figure 2 of Yano, which depicts the R/W line asserted high to low at the transition of S2 to S3, followed by the assertion high to low of the data strobe (DS) in the middle of a data packet DBx:

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32

RX-4261.008. Similar to its arguments with respect to Dan, Rambus asserts that Yano is distinguishable from the claimed invention because data flows into the memory during the active state in an asynchronous operation corresponding to the high phase S5 of the system clock rather than captured at a discrete point in time by the purportedly synchronous memory device of claim 11. See Comp. Pet. 46-47. In particular, Rambus assumes that if data were sampled on an edge of DS, in Yano there would be no need to hold data throughout the entire duration of DS, as shown in Figure 2. Id. at 47. However, Rambuss validity position is again contradicted by its infringement position, as the accused products similarly hold data throughout a period that extends before, during, and after sampling on an edge of strobe signal DQS. See CIB at 28 (Figure 21 of the DDR standard and its associated description shows sampling in its depiction of the DQS signal transitioning in the center of the data window.). For at least these reasons, Rambuss attempts to distinguish the strobe signals and associated sampling functionality of Dan and Yano should be rejected.

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33 iii. The Write Command

The second of the two disputed limitations is the write command, which is highlighted in the language of claim 11 below: 11. A method of controlling a memory device that includes a plurality of memory cells, the method comprising: issuing a first write command to the memory device, the memory device being configured to defer sampling data that corresponds to the first write command until a strobe signal is detected; delaying for a first time period after issuing the write command; and after delaying for the first time period, issuing the strobe signal to the memory device to initiate sampling of a first portion of the data by the memory device. 353 patent, 41:29-41 (emphasis added). With respect to the write command limitation, Rambus does not challenge the IDs finding that Dan discloses an output enable signal and that Yano discloses a R/W signal and that both of these references issue these commands to a memory device. See ID at 93-95 (Yano); id. at 101-102 (Dan). Rambus instead argues that [t]he ALJ . . . erred in equating . . . asynchronous control signals . . . with the write command of claim 11. See Comp. Pet. 44 (arguing as to Dan); see also id. at 47 (similar argument as to Yano). This argument is not meritorious for the reasons previously discussed with respect to the strobe signal limitation and the non-existent asynchronous/synchronous limitation. iv. Conclusion

For the above stated reasons, OUII submits that Rambuss petition as it relates to the anticipation findings on Yano and Dan should be denied. c. Farmwald-Horowitz (RX-4269)

According to the ID, the Respondents failed to show by clear and convincing evidence that the Farmwald-Horowitz prior art anticipates claims 1, 2, 4, 5, 12, 13, 20, 21, 24 of the 109 patent for similar reasons in the 661 Investigation, wherein another patent from the same prior art family was found not to be invalidating. See ID at 121-122. The Respondents argue that in so

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34 holding, the ID failed to consider their new argument not presented in the 661 investigation that the storing of the delay value in the access register qualifies as the signal limitation of the asserted 109 patent claims. See Resp. Pet. 27. The Respondents also challenge the IDs validity holding on Farmwald-Horowitz as contrary to its infringement holding as to the accused products. See Id. at 28. Neither argument has merit. More specifically, the Respondents rely on the following disclosure in FarmwaldHorowitz as the basis for their new invalidity argument: In a preferred implementation, semiconductor devices connected to the bus contain registers 172 which specify the memory addresses contained within that device and access-time registers 173 which store a set of one or more delay times at which the device can or should be available to send or receive data. RX-4269, 6:39-45; see also RX-4269C, Jacobs Direct Q/A 374. However, Farmwald-Horowitz goes on to explain that the delay times are specified relative to the end of a request packet. See CX-10765C, Przybylski Rebuttal Q/A 387-388. As such, the Respondents new invalidity contentions suffer from at least some of the same deficiencies noted in the 661 ID with respect to the 661 respondents argument involving AccessType[1:2] bits. See 661 ID at 54-56 (explaining that the claimed strobe signal provides flexibility not found in the prior art, wherein the sampling time was specified relative to the end of a request packet). While OUII agreed with the 661 respondents that the 109 patent claims were anticipated by Farmwald-Horowitz, OUIIs position was considered and rejected by the Judge and was not adopted by the Commission. Given the similarity to the Respondents analogous argument on delay values, a contrary result is not warranted in this investigation.12 The inadequacy of prior art wherein sampling is specified relative to the end of a request packet stands irrespective of the order in which the claim steps are performed, i.e., whether that delay is specified during initialization or as part of a write operation. Thus, the Respondents argument that the ID improperly required the claim steps be performed in a specific order need not be addressed. See Resp. Pet. at 28-29. PUBLIC VERSION
12

35 To the extent that the Respondents rely on purported inconsistencies between Rambuss infringement and validity positions as support for their new invalidity arguments, their reliance is similarly misplaced. See Resp. Pet. 28. In particular, the Respondents contend that the infringing products have a latency period that is programmed into mode registers, (see tr. at 876:9-12)-just like the delay value is stored in the access register in Farmwald 037. Id. However, Rambus has not alleged that the programming of a write latency in the accused products satisfies the strobe signal of the 353 and 405 patent claims or the signal of the 109 patent claims. Rather, Rambus accuses the DQS strobe signal of satisfying these limitations. See ID 50-56. And, as the trial record reflects, programmable write latency and DQS initiated sampling are distinct, albeit related, concepts: Within the context of the specific DDR-type memories, the write latency is an integral number of clock cycles. There is an additional component of that delay that is variable and determined by the DQS. Przybylski, Tr. 873:01-05; see also id. at 878:12-20 (similar testimony). Because sampling in the accused products is initiated by the DQS signal rather than expiration of the programmable write latency as in the Farmwald-Horowitz prior art, Respondents have not shown any conflict between Rambuss validity and infringement positions as to this particular reference. For the above stated reasons, OUII submits that the Respondents petition as it relates to the anticipation findings on Farmwald-Horowitz should be denied. d. SyncLink (RX-4270C)

According to the ID, the Respondents failed to show by clear and convincing evidence that the SyncLink prior art anticipates claims 11-13 of the 353 patent and claims 1, 20, and 24 of the 109 patent. See ID at 122-123. Respondents assert that this finding was erroneously based on the conclusion that the flags signal in SyncLink merely indicates intermediary bytes, such

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36 as address information, and thus fail to initiate sampling in the manner called for in the asserted claims. Resp. Pet. 29 (quoting ID at 123). OUII disagrees. As discussed more fully below in the section addressing the Respondents inequitable conduct defense, SyncLink discloses a packet-based communications system that is similar in many respects to that of the Farmwald-Horowitz prior art discussed above and in the context of the 661 investigation:

RX-4270C.0043; see also CX-10765C, Przybylski Q/A 412; ID at 123. The Respondents contend that [t]he flags signal is the strobe signal/signal limitations of Claims 11-13 of the 353 patent and 1, 20, 24 of the 109 patent . . . . Resp. Pet. 30. Clear and convincing evidence does not support this conclusion. In their petition, the Respondents characterize the flag signal of SyncLink as switching from 0/1 to 1/0 to indicate intermediary bits that follow thereafter. See Resp. Pet. 29. While Respondents note that data can be included as part of the intermediary bits, such bits are also used to represent other types of information, such as address information:

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37

CDX-1904; see also CX-10765C, Przybylski Rebuttal Q/A 417 (describing same). Thus, the flags signal does not represent data to be sampled. Respondents attempt to explain away the presence of other, non-data intermediary bits in SyncLink as irrelevant. See Resp. Pet. 31. In particular, Respondents cite the testimony of their expert Dr. Jacobs who testified that [f]or write packets, the first few bytes . . . are address information, and these are followed by data. Id. (quoting RX-5429C, Jacobs Direct Q/A 405). However, at most this testimony confirms that the intermediary bytes in SyncLink can contain both address information and data. It does not provide clear and convincing evidence that the flags signal initiates the sampling of the data portion therein as Respondents infer. Curiously, Respondents appear to focus on a different invalidity issue involving SyncLink for inequitable conduct purposes. See Resp. Pet. 32-34. For purposes of that argument, the Respondents contend that the clock signal in SyncLink corresponds to the strobe signal/signal limitation of the 353 and 109 patent claims. See id. at 32 ([T]he strobe signal and clock shown in RamLink and SyncLink, respectively, are not cumulative to the Farmwald 755 patent that was before the USPTO.). The IDs rejection of this argument should be affirmed for the reasons discussed below with respect to the Respondents inequitable conduct defense.

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38 3. Obviousness

Turning to obviousness, the ID found all of the asserted Barth I patent claims to be invalid as obvious under 103(a). See ID 210-223. The particular obviousness combinations relied upon by OUII that are discussed in the ID include: (1) Yano (RX-4261) in view of Farmwald-Horowitz (RX-4269); (2) Dan (RX-4262) in view of Farmwald-Horowitz (RX-4269); and (3) NextBus (RX-4265) in view of Farmwald-Horowitz (RX-4269). A brief discussion of the Farmwald-Horowitz prior art highlights what few issues remain in dispute as to obviousness. At trial, Rambus and its expert Dr. Przybylski only contested whether FarmwaldHorowitz discloses the strobe signal/signal limitation of the asserted claims no other limitations are disputed as for this particular reference. See Przybylski, Tr. 2717:07-2719:07. The obviousness inquiry thus focuses primarily on two issues: (1) whether the strobe signal disclosed in other references would have been an obvious addition to the system disclosed in FarmwaldHorowitz; and (2) whether features disclosed in Farmwald-Horowitz (e.g., autoprecharge, double data rate transmission, multiple memory banks, sense amplifiers, etc.) would have been obvious additions to other references that disclose a strobe signal. The ID answered both of these questions in the affirmative, and the evidence supports its findings in this regard. Certain of Rambuss main arguments to the contrary, none of which is well founded, are discussed below. a. The NextBus Specification (RX-4265)

While discussed last in Rambuss petition, OUII submits that the obviousness combination involving NextBus and Farmwald-Horowitz is the most straightforward. See ID at 219-220. In particular, NextBus discloses a data strobe (DSTB*) that initiates the sampling of data off a data bus. See RX-4265.0025; Przybylski, Tr. 2651:17-23; see also id. at 2653:13-16

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39 (similar testimony). Rambus does not dispute this fact.13 Nor does Rambus dispute the fact that both NextBus and Farmwald-Horowitz disclose synchronous systems. See Comp. Pet. 54-55. Because Farmwald-Horowitz discloses the remaining limitations as previously discussed and because it would be obvious to combine these references, Rambuss arguments as to the combination of NextBus with Farmwald-Horowitz should be dismissed. First, Rambus argues that the ID failed to address why it would have been obvious to implement the alleged DDR features in NextBus . . . or even that such a modification was possible. See Comp. Pet. 54. DDR in this context refers to the Double Data Rate operation i.e., the sampling of data twice per clock cycle required by certain claims. As an initial matter, the IDs finding of obviousness as to the DDR limitations is a secondary issue given the IDs finding that NextBus expressly discloses DDR functionality. See discussion supra on MCLKSEL*; ID at 114-117. However, the ID explains that even if NextBus failed to disclose DDR functionality, such functionality is disclosed in Farmwald-Horowitz and it would have been an obvious addition to NextBus for the same reasons discussed previously in Section VI.C.1.b . . . . ID at 220. In Section VI.C.1.b, the ID explains that DDR techniques were widely available and known as an effective way to increase speed without significantly increasing circuit complexity, pincount, etc. ID at 213 (citing RX-5429C, Jacobs Direct Q/A 202-207). Thus, the IDs obviousness findings as to the DDR limitation includes a detailed analysis and evidentiary support.

13

While Rambus contests whether the DSTB* signal initiates sampling of data by a memory device based on its memory board/memory device argument previously discussed, it does not contest the fact that the DSTB* initiates the sampling of data off a data bus. See Comp. Pet. 39. Rather, Rambus only contests the Respondents alternative theory that is based on the related DRQ* signal. See id. at 39 n. 16. PUBLIC VERSION

40 Second, Rambus argues that NextBus involved communications over a backplane bus over which signaling associated with the precharge operation, sense operation, and memory bank selection of certain claims would not have been provided to a memory device because the CPU connected to that bus does not keep track of this type of information. See Comp. Pet. 54. However, the sole evidence cited by Rambus in support of this argument is the discredited and conclusory testimony of Dr. Przybylski. See id. (citing CX-10765C, Przybylski Rebuttal at pp. 46-47, 79, 123-127). OUII submits that it was not clear error for the Judge to reject this evidence in light of the contrary testimony of Respondents expert Dr. Jacobs. See ID at 219-222. Lastly, Rambus argues that if the claimed memory device is read broadly enough to encompass the memory board of NextBus, then to practice the asserted method claims the NextBus memory device would nonsensically have to issue signals to itself. See Comp. Pet. 5455. This appears to simply be a rehashed version of Rambuss argument that there must be a memory controller that is distinct from the memory device to practice the claimed methods, whereas the memory controller of NextBus is purportedly embedded within its memory board. See id. at 54. As discussed in the section on anticipation, NextBus includes a memory controller on the NeXT CPU Board provided in Slot 0 that is distinct from its memory boards in Slots 2, 4, and/or 6. Thus, Rambuss characterization of NextBus is incorrect on this point. Moreover, OUII notes the additional finding in the ID that [t]o the extent an element of a specific Barth claim is not disclosed in the NextBus Spec . . ., it would have been obvious . . . to combine that element from one of a number of prior art references such as FarmwaldHorowitz. ID at 220. With respect to the memory device term in particular, this holding means that it would have been obvious to implement the memory device of Farmwald-Horowitz

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41 in the system of NextBus should Rambuss definition of the memory device term be adopted. Rambus does not appear to have directly addressed this issue in its petition. For at least these reasons, Rambuss petition for review of the IDs obviousness findings based on NextBus as a primary reference should be denied. b. Yano (RX-4261) / Dan (RX-4262)

Aside from reiterating its view that neither Yano nor Dan disclose the strobe signal limitation (Comp. Pet. 49), Rambuss petition for review of the obviousness findings involving Yano or Dan are largely premised on the same theme, i.e., that it would not have been obvious to apply features from advanced synchronous systems such as NextBus and Farmwald-Horowitz into legacy asynchronous systems such as Yano and Dan, and vice versa. As discussed below, this argument should be rejected, and Rambuss petition as to the Yano/Dan obviousness findings should be denied.14 As the record reflects, the state of the art began transitioning in the 1990s timeframe of the Barth I patents from the asynchronous memory systems used in legacy products to the synchronous memory systems that are now commonplace in consumer electronics. For example, documentation from the standards-setting organization JEDEC confirms that it was working on synchronous DRAM technologies in 1995 when the original Barth I application was filed. See See, e.g., Comp. Pet. 50 (Dan and Yano disclose asynchronous signals that are controlled throughout the duration of the write operation while data flows into memory.); id. (The ALJ rejected Rambuss argument that it would not have been obvious to take features from asynchronous systems (such as Dan and Yano) and put them in synchronous systems (such as Farmwald 037) and vice versa to arrive at the claimed inventions.); id. at 52 ([T]he memory devices in Yano and Dan are asynchronous and do not receive a clock signal. . . . . It would not have made sense to incorporate synchronous DDR clock features from Farmwald 037 or SCI into the memory devices of Yano and Dan when they do not even receive a clock signal.); id. ([I]t would not have been obvious to combine aspects of asynchronous and synchronous systems.); id. at 53 ([O]ne of ordinary skill would not have incorporated the alleged strobe signals from the slower asynchronous systems of Yano and Dan into the already faster systems of Farmwald 037 to enable faster data access operations.).
14

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42 RX-2124.0007 to 0009 (discussing SDRAM offerings from various companies); RX2414C.0005 (discussing a write data latency proposal); see also Comp. Pet. 51 (noting that a JEDEC standard issued in 1999). While Rambus characterizes this shift as a significant departure from the legacy asynchronous systems [that] were cheaper and had better performance in comparison to the then-existing SDRAM systems (Comp. Pet. 51), at most these facts highlight the need for persons of skill in the art to look for ways to merge the advantageous features of legacy asynchronous systems (such as the strobe signal of Yano and Dan) with the advantageous features of the up and coming synchronous systems (such as the DDR, precharge operation, sense operation, and memory bank featuress of Farmwald-Horowitz). See ID at 212 (quoting SX-0008, Sept. 1, 2011 BPAI Decision at 12) (holding known asynchronous functions were being combined routinely with, and integrated into, synchronous DRAM systems by skilled artisans.); see also RX-5429C, Jacobs Direct Q/A 105, 129, 492-496. Downplaying this evidence and the corresponding discussion in the ID, Rambus argues that the sole rationale for the [IDs obviousness] combinations is improved speed and faster data access. Comp. Pet. 48 (citing ID at 213, 214, 218, 221, 222). This is not a fair characterization of the ID. Taking the IDs discussion of Yano and Dan as base references as an example, on page 213 the ID discusses the double data-rate (DDR) feature of certain claims which is admittedly not taught in Yano or Dan. See ID at 213-214. The ID holds that, once the strobe signal of Yano/Dan has been implemented in a synchronous environment, wherein data is timed according a clock signal, it would further have been obvious to sample data twice per clock cycle (i.e., on both the rising and falling edges of a clock signal) based on the well-known fact that the DDR feature in synchronous systems such as Farmwald-Horowitz allowed for faster data speeds without increasing the number of input/output pins . . . . ID at 213 (citing

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43 RX-4329C, Jacobs Direct Q/A 470). On pages 215-216, the ID similarly found that it also would have been obvious to implement the multiple memory bank limitation of certain claims in light of the growing need for larger memory capacities and the corresponding capacities of multiple memory bank systems such as Farmwald-Horowitz. See ID at 216 (citing RX-5429C, Jacobs Direct Q/A 474-476, 512-514). The IDs discussion of the precharge limitation and the sense operation limitation, both of which are expressly taught in the synchronous system of Farmwald-Horowitz, similarly contains such a detailed analysis. See ID at 214-217. For at least these reasons, Rambuss petition for review of the IDs obviousness findings based on Yano and Dan should be denied. c. Farmwald-Horowitz (RX-4269)

Because Farmwald-Horowitz discloses each and every limitation of the asserted claims with the exception of the strobe signal, the obviousness findings based on Farmwald-Horowitz as a primary reference look to other references such as Yano, Dan, and NextBus that disclose the sole missing limitation. See ID 217-219 (combinations of Farmwald-Horowitz with Yano/Dan); id. at 222-223 (combinations of Farmwald-Horowitz with NextBus). Rambuss petition for review of these findings should be denied. See Comp. Pet. 53-55. According to Rambus, the IDs finding of obviousness over Farmwald-Horowitz in view of Yano, Dan, and/or NextBus is improperly premised on the view that adding a strobe signal would enable higher speeds by overcoming the inherent skew associated with various clocking schemes. See Comp. Pet. 55. Rambus argues that such a finding does not take into consideration the fact that Farmwald-Horowitz already operated at a higher speed than the references to be combined with it, and that it already included a mechanism for informing memory devices that data is on the bus for sampling. See id. However, Rambus characterizes the Barth I patents as achieving improved memory access by decoupling the timing between a PUBLIC VERSION

44 command and data transfer through the use of a strobe signal. See id. at 49-50. The strobe signals of Yano, Dan, and NextBus all perform this same decoupling through their respective strobe signals for reasons previously discussed. Knowing that decoupling can provide improved memory access, a person of skill in the art would have looked to the strobe signal functionality of Yano, Dan, and NextBus to further improve upon the memory access of coupled systems such as Farmwald-Horowitz as noted in the ID. See ID at 222-223. For at least these reasons, Rambuss petition for review of the IDs obviousness findings based on Farmwald-Horowitz as a primary reference should be denied. d. Secondary Considerations of Non-Obviousness

According to the ID, secondary considerations cannot overcome the strong showing of obviousness in this instance. ID at 226 (citing Perfect Web Techs., Inc. v. InfoUSA, Inc., 587 F.3d 1324, 1333 (Fed. Cir. 2009); Sundance, Inc. v. Demonte Fabricating Ltd., 550 F.3d 1356, 1368 (Fed. Cir. 2008); Dynstar Textilfarben GMBH & Co. Deutschland KG v. C.H. Patrick Co., 464 F.3d 1356, 1371 (Fed. Cir. 2006)). Rambus argues that this finding is erroneous because the corresponding analyses of prima facie obviousness are legally and factually incorrect and because the ID did not consider evidence of secondary considerations beyond the discredited testimony of Rambus expert Dr. Przybylski. See Comp. Pet. 226-227. For reasons previously discussed, OUII disagrees that the obviousness analysis is legally and factually incorrect. OUII further respectfully submits that the strong showing of prima facie obviousness supports the ultimate finding of obvious in the ID irrespective of what little evidence of secondary consideration was adduced at trial beyond the discredited testimony of Dr. Przybylski. See ID at 210-223.

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45 4. Written Description

As discussed on pages 232 to 237 of the ID, Respondents asserted at trial that the Barth I patents fail to disclose the broad concept of using a strobe signal to initiate sampling of data by a memory device as part of a write operation. See ID at 232-237. According to the Respondents, the asserted Barth I claims are thus invalid for lack of written description support under 35 U.S.C. 112, 1. See id. The ID rejected this argument, finding instead that the broad concept of strobe initiated sampling was adequately disclosed in the specification for purposes of 35 U.S.C. 112, 1. See id. The Respondents seek review of the IDs finding in this regard on three separate grounds: (1) the ID relies upon the contradictory testimony of Rambuss expert Dr. Przybylski (Resp. Pet. 16); (2) the ID relies upon an irrelevant discussion of samples in the specification which refers to clock signals rather than strobe signals (id. at 16-17); and (3) the ID relies upon an irrelevant discussion of prior art latching techniques in the background section of the specification (id. at 17-18). OUII submits that each of these three arguments should be rejected. a. Dr. Przybylskis Testimony

As discussed in the background section of this brief, the Barth I patents generally disclose two types of data transfer operations, i.e., read and write operations, between a memory controller and a memory device. See 353 patent, 1:11-14; 7:40-43. The Respondents arguments as to Dr. Przybylskis credibility, and, to some extent, on the merits as well, focus on the relationship between transferring data and sampling data. Taking excerpted quotes out of context, the Respondents argue that Dr. Przybylski was at one point of the opinion that transferring data is not sampling data and at other points of the opinion that transferring data is sampling data. See Resp. Pet. 16. OUII submit that this is not a fair characterization of Dr. Przybylskis testimony.

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46 In actuality, Dr. Przybylski testified at his deposition that transferring data and sampling data are not synonymous they have different meanings in the context of the Barth I patents. See Resp. Pet. 16 (quoting Przybylski, Tr. 2668:12:14). This is a true and accurate statement that Dr. Przybylski stood by at trial. When pressed for clarification as to how these terms differ, Dr. Przybylski elaborated that transferring data encompasses both the act of putting data on a data bus (which does not involve sampling) and taking data off the data bus (which does involve sampling). For example, in his witness statement Dr. Przybylski states: Dr. Jacobs interpretation of data transfer is incorrect in light of the Barth I specification. More specifically, the act of transferring data involves both putting data on the bus and retrieving that data off the bus by sampling it. CX-10765C, Przybylski Rebuttal Q/A 110. On the stand, Dr. Prybylski reiterated the same basic point time and time again: I think that one of ordinary skill looking at this claim language being a data transfer embodying a transmission and a reception, a reception in the context of the Barth I specification means sampling. Przybylski, Tr. 2666:16-20; see also id. at 2667:01-06; id. at 2667:19-24. Thus, insofar as Dr. Przybylski was testifying on the relationship between transferring data and sampling data in the context of the Barth I patents, his testimony was consistent and, as discussed below, supported by the intrinsic evidence of record. b. Delayed Sampling Initiated By Strobe Signals

As discussed more fully in the background section of this brief, the specification describes embodiments in which data is sampled a specified number of clock cycles after receipt of a strobe signal. One such embodiment is depicted in Appendix A, with the following excerpt specifically mentioning the bus samples that take place during a write operation: Timing information proceeds down the template, with each horizontal row representing a clock cycle or two bus samples.

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47 353 patent, 24:19-21. Respondents argue that this excerpt equates bus samples to clock cycles rather than strobe signals, and thus teaches away from strobe initiated sampling as claimed. See Resp. Pet. 16-17. OUII does not agree. The discussion of each horizontal row representing a clock cycle or two bus samples means the bus of Appendix A is sampled twice per clock cycle i.e., it depicts operation of a system with DDR functionality. This fact does not mean that the clock cycle in and of itself initiates the sampling of data. Rather, Appendix A goes on to explain that a strobe signal informs the memory device when valid data is available for sampling and thereby initiates a twice per clock cycle sampling of the data at the relevant time. See ID at 236 (citing Barth, Tr. 391:09-393:14; Przybylski, Tr. 2679:24-2681:18, 2682:03-18, 2729:09-2732:08). The ID recognized this fact, and found accordingly that the reference to bus samples in the context of Appendix A was consistent with usage of the related term sampling in the asserted claims. See ID at 234 (discussing 353 patent, 24:19-21); id. at 235 (discussing Appendix A). c. Latching Techniques

While the asserted method claims are not limited to a particular sampling mechanism, the ID also notes that the specification describes latches and signals that cause a memory device to latch data on transitions thereof. ID at 234 (citing 353 patent, 2:25-26; Przybylski, Tr. 2736:07-2738:18). According to the Respondents, this disclosure is irrelevant because the statement is in the Background section of the specification and is a reference to the prior art . . . . Resp. Pet. 17. However, disclosure of prior art techniques can provide the support for a subsequent claim limitation. See Callicrate v. Wadsworth Mfg., Inc., 427 F.3d 1361, 1374 (Fed. Cir. 2005) (holding the claimed tightening / pulling mechanism covered a prior art technique that was disclosed and disparaged in the background section of the specification). Thus, it was not

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48 erroneous for the ID to cite and rely upon the noted passage as further confirming that the specification contains written description support for strobe initiated sampling. d. Conclusion

For the above stated reasons, OUII submits that the Respondents petition as it relates to the Barth I written description findings in the ID should be denied. D. Inequitable Conduct

In OUIIs view, the evidence supports the finding in the ID that the asserted Barth I patent claims are not unenforceable due to inequitable conduct arising out of Rambuss alleged intentional withholding of SyncLink and RamLink prior art during prosecution. The Respondents petition for review of this issue should be rejected accordingly. 1. Materiality

Turning first to the IDs materiality findings, the Respondents expressly waived any analysis comparing RamLink to the Barth I patents or otherwise demonstrating the materiality of this reference. See RIB 42 n. 29 (stating Respondents have elected not to discuss [the RamLink] prior art reference[] in detail.); ID at 90 n. 11 (noting same); Ground Rule 11.1 (issues not discussed in detail in initial post-hearing brief shall be deemed waived). Thus, what little evidence is of record as to RamLink cannot support the Respondents attempt to resuscitate their argument regarding this reference. With respect to SyncLink, the Respondents argue that the ID improperly found this reference to be cumulative of the analogous Farmwald-Horowitz prior art that was disclosed to the USPTO and overcome during prosecution. See Resp. Pet. 33. However, the Respondents also appear to take the directly contrary position that Farmwald-Horowitz and SyncLink are similar and that subsequent findings during reexamination of the Barth I patents as to Farmwald-

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49 Horowitz necessarily demonstrate the materiality of the SyncLink art. Id. To the extent understood, OUII disagrees. In OUIIs view, the evidence cited in the ID in the section on materiality supports the conclusion reached therein that the SyncLink reference is indeed cumulative of the disclosed Farmwald-Horowitz art. See ID at 246 (citing CX-10765C, Przybylski Rebuttal Q/A 403-451). On this point, the Respondents argue that the SyncLink art discloses a strobe whereas Farmwald-Horowitz does not. See Resp. Pet. 32-33. However, the Respondents expert Dr. Jacobs testified at trial that the signal labeled strobe in SyncLink is actually a clock signal. See Jacobs, Tr. 1081:05-1082:15. Dr. Jacobs further testified that [w]ithin the context of the Barth patents . . . a clock signal is not a strobe. See id. at 1068:18-20. Indeed, the FarmwaldHorowitz art, which also discloses a clock signal, was distinguished on this very basis in the prior 661 investigation. See 661 ID at 52-53. The Respondents alternative argument as to the flags signal in SyncLink is likewise analogous to the AddrValid bit in Farmwald-Horowitz, as discussed more fully in the 661 ID. See also ID at 123 (discussing the request-packet nature of SyncLink); 661 ID at 50-52 (discussing the analogous AddrValid bit and associated requestpacket nature of Farmwald-Horowitz). Thus, SyncLink is not anticipatory for the same reasons as the Farmwald-Horowitz prior art, and is cumulative with that art as noted in the ID. Moreover, as a cumulative reference, SyncLink cannot be material for inequitable conduct purposes. See Leviton Mfg. Co. v. Universal Sec. Instruments, Inc., 606 F.3d 1353, 1359 (Fed. Cir. 2010) (quoting Larson Mfg. Co. v. Aluminart Prods., Ltd., 559 F.3d 1317 (Fed. Cir. 2009)) ([A] withheld otherwise material reference is not material if it is merely cumulative to, or less relevant than, information already considered by the examiner.)). Thus, the IDs related

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50 finding that SyncLink is not material for inequitable conduct purposes should likewise be affirmed. 2. Specific Intent To Deceive

With respect to the specific intent prong of an inequitable conduct analysis, the Respondents argue that the ID erroneously focused on their assertion that intent should be inferred based on Rambus having been aware of the RamLink and SyncLink prior art during prosecution of the Barth I patents and having failed to give a credible argument as to why this art was not disclosed to the USPTO. See Resp. Pet. 34. However, such inferred intent arguments fail to show a specific intent to deceive and the ID rejected them accordingly. See ID at 247 (citing Star Scientific, Inc., v. R.J Reynolds Tobacco Co., 537 F.3d 1357, 1368 (Fed. Cir. 2008) (the absence of a good faith explanation for withholding a material reference does not, by itself, prove intent to deceive)). Now, the Respondents raise a new argument that Rambus proclivity towards misuse of the patent system and patent prosecution should have been considered in the ID as part of the inequitable conduct analysis. See id. at 34-36. No such argument was raised in the specific intent portion of the Respondents initial or reply post-hearing briefs. See Respondents Initial Post-Trial Brief (RIB) at 217; Respondents Reply Post-Trial Brief (RRB) at 96-97. Thus, this argument has been waived and need not be addressed. See Ground Rule 11.1 (issues not discussed in detail in initial post-hearing brief shall be deemed waived). To the extent the Commission nonetheless considers this argument on the merits, it should still be rejected. More specifically, the evidence supports the view that Rambus did not believe that the withheld SyncLink art was relevant to the Barth I patents or attempt to cover that technology in those patents. For example, the fact that SyncLink appears to be cumulative with Rambuss Farmwald-Horowitz patents as discussed in the materiality section above suggests that Rambus PUBLIC VERSION

51 may have looked to SyncLink in the context of those patents, which are not asserted here. See Barth, Tr. 484:15-485:09. In addition, it would have been illogical for Rambus to knowingly pursue coverage of SyncLink in the Barth I applications because SyncLink predates (and is thus prior art to) those applications, whereas SyncLink would not constitute prior art to the earlier Farmwald-Horowitz patents from the 1990 timeframe. As such, the Respondents have failed to carry their burden to prove that the only reasonable inference would support a finding of inequitable conduct as to the Barth I patents. See Therasense Inc. v. Becton, Dickinson & Co., 649 F.3d 1276, 1290 (Fed. Cir. 2011) (en banc). For at least these reasons, the Respondents petition as to unenforceability due to inequitable conduct should be denied. E. Unclean Hands

Rambus has petitioned for review of the IDs finding that the asserted Barth I patents are unenforceable due to unclean hands. See Comp. Pet. 56-79. As discussed in OUIIs contingent petition for review, OUII agrees with Rambus insofar as the IDs analysis and conclusions appear to be contrary to positions taken by the Commission in appellate proceedings from the 661 investigation, which involved the same Barth I patents, a virtually identical unclean hands defense, and a similar factual record.15 See OUII Pet. 4-8. OUII thus supports Rambuss petition for review of this same issue. OUII notes that its petition for review on unclean hands argues for the Commission to grant review of the spoliation issue and to address it on the merits. However, OUII also noted that the Commission has in the past granted review and taken no position on issues that are not required to support a finding of no violation, such as the spoliation issue in this investigation. To the extent that such a practice is no longer viable under the Federal Circuit's opinion in General Electric, which held that the Court has not authorized this practice but nonetheless remanded for the Commission to address the no position issues in the first instance, OUII respectfully submits that its primary argument is unaffected by this precedent. See generally General Electric Co. v. Intl Trade Commn, 2012 U.S. App. LEXIS 4118 (Fed. Cir. 2012).
15

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52 II. ISSUES SPECIFIC TO THE DALLY PATENTS Rambus asserts claims 1, 2, 4-6, 9-13, 24-28, 31-36, 39-44, 47, and 49-53 of the 857 patent, and claims 1-3, 6, 8, 25, 26, 30, 39, 40, and 42 of the 494 patent. See Notice of Investigation. Provided below is an overview of the Barth I patents, followed by a discussion of the Barth I specific issued raised in the parties petitions for review. A. Background

The two Dally patents are generally directed at compensating for signal distortion that occurs as a signal is propagated from a transmitter to a receiver:

857 patent, Figure 2A (showing signal output from transmitter), Figure 2B (showing signal received by receiver); see also Singer, Tr. 574:13-582:22, 696:18-697:14. At a high level, the compensation techniques disclosed in the Dally patents can be thought of as intentionally pre distorting the output signal of the transmitter such that the additional signal distortion that occurs in transit returns the output signal to a sufficiently close approximation of its pre-transmission form for the receiver circuit to properly recognize it:

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53 857 patent, Figure 7A (showing pre-distorted signal output from transmitter), Figure 7B (showing signal received by receiver); see also RX-5430C, Hajimiri Direct Q/A 26, 31; Singer, Tr. 582:23-588:02. In the asserted claims, the circuitry that achieves the above referenced functionality is embedded within a transmitter and is often referred to by the parties as pre-emphasis/deemphasis circuitry or equalization circuitry. See Singer, Tr. 608:15-609:03. While phrased slightly differently in the asserted claims of the two asserted patents, the claims cover substantially similar circuitry across both patents. Excerpts from two asserted claims, one from each of the two patents, are provided in the table below: 857 Patent, Claim 1 a transmitter circuit within the chip, the transmitter circuit being coupled to the processor to accept a digital input signal including a plurality of digital values from the processor, the transmitter circuit being operable to send an output signal including a series of signal levels representing the digital values and to emphasize high frequency components of the output signal relative to low frequency components of the output signal so that: (i) an output bit signal of the output signal representing a particular bit value has one signal level when the bit value is the same as a bit value represented by a predetermined preceding output bit signal; and 494 Patent, Claim 1 a transmitter circuit within the chip, the transmitter circuit being operable to accept a digital input signal including a plurality of bits and send an output signal including a series of output bit signals,

each bit of the digital input signal being represented by a single output bit signal, the transmitter circuit generating a sign which depends upon the value of the bit represented by such output bit signal and generating a magnitude which is a function of the value of the bit represented by such output bit signal and the values of the bits represented by one or more preceding output bit signals, each output bit signal having sign and magnitude determined by the generated sign and generated magnitude.

(ii) the output bit signal representing the particular bit value has another signal level when the bit value is different from the bit

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54 857 Patent, Claim 1 value represented by the predetermined preceding output bit signal. 494 Patent, Claim 1

As exemplified by the excerpts above, both of the claimed transmitter circuits send an output signal that has a signal strength e.g., in volts (V) that is used to represent bits e.g., a logical 0 or a logical 1 that are propagated from a transmitter to a receiver. In claim 1 of the 857 patent, this signal strength is described in terms of signal level, whereas claim 1 of the 494 patent describes this same concept in terms of magnitude and sign. An example using Figure 7A from the 857 patent highlights this concept, an annotated copy of which is reproduced below:

Every time the signal level is at or above the top dotted line the output signal represents a logical 1 bit and every time the signal level is at or below the bottom dotted line the output signal represents a logical 0 bit. Starting at the left, the output signal first represents a series of logical 0s, then alternates between logical 1s and 0s, then represents a series of logical 0s, and so on:

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55

Note that the signal strength varies based on two factors: (1) whether the bit currently being represented is a logical 1 or a logical 0; and (2) whether the logical level of that bit differs from the bit previously represented. To better illustrate this principle, a logical 1 could be represented by +1 Volt or +0.75 Volts (depending on whether the prior bit was a logical 1 (i.e., the same) or a logical 0 (i.e., different). Similarly, a logical 0 could be represented by -1 Volt or -0.75 Volts (depending on whether the prior bit was a logical 0 (i.e., the same) or a logical 1 (i.e., different)):

The corresponding signal levels in the context of claim 1 of the 857 patent and the magnitude/sign in the context of the 494 patent would thus be as follows: Signal Strength (in Volts) +1V +0.75V Signal Level (857 Patent) +1V +0.75V Magnitude (494 Patent) 1 0.75 Sign (494 Patent) Positive (+) Positive (+)

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56 Signal Strength (in Volts) -0.75V -1V Signal Level (857 Patent) -0.75V -1V Magnitude (494 Patent) 0.75 1 Sign (494 Patent) Negative (-) Negative (-)

In short, alternating bits in this example are emphasized by 0.25V relative to other bits so as to compensate for signal attenuation that occurs during transmission:

Compare Figure 2A (above left without pre-emphasis) to Figure 7A (above right with preemphasis); 857 patent, 5:42-47 (describing same). B. Infringement

In OUIIs view, a preponderance of the evidence supports the IDs finding that the Respondents directly infringe the asserted apparatus claims of the Dally patents, i.e., claims 1, 2, 4-6, 9-13, 24-28, 31-36, 39-44, 47, and 49-53 of the 857 patent as well as claims 1-3, 6, 8, 25, 26, and 30 of the 494 patent, under 35 U.S.C. 271(a). See ID at 68-85. A preponderance of the evidence also supports the IDs finding that the Respondents have contributed to or induced infringement of all of the asserted claims of the Dally patents, including method claims 39, 40, and 42 of the 494 patent, under 35 U.S.C. 271(b) and (c). See id. at 82-85. The Respondents petition for review as to these issues should be denied accordingly.

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57 1. The Transmitter Limitations

Before addressing the substantive infringement findings in the ID and the corresponding portions of the petitions for review, OUII first addresses the one disputed claim term that relates to infringement, i.e., the transmitter limitation. As discussed in the overview, the transmitter limitation corresponds to the portion of the claimed system/method in which the pre-emphasis or de-emphasis functionality is performed. Certain of the Respondents argued at trial that a particular type of pre-emphasis circuitry, i.e., conventional FIR filters, should be specifically excluded from the scope of the claims. However, it is unclear whether any of the remaining Respondents still support this argument. More specifically, there are only three supplier respondents left in this investigation, i.e., MediaTek, LSI, and ST Micro. Of these three respondents, MediaTek and its customer respondents have moved to terminate the investigation based on a settlement with Rambus.16 With respect to the remaining two supplier respondents LSI and ST Micro, LSIs expert Dr. Hajimiri agreed with Rambus and OUII that the transmitter limitations should be given the broad construction that was ultimately adopted in the ID. See, e.g., Hajimiri, Tr. 1578-1579. ST Micros noninfrinement expert Dr. Walker used the same broad construction and conceded that all of the accused products on which he opined have transmitter circuitry as he understood the term. See, e.g., JX-147C, Walker 90:05-10; CX-9542C, Singer Direct Q/A 133 (discussing CDX-1526C). It is thus unclear whether ST Micro, LSI, or any of their customer respondents that remain in this investigation advocate the narrow construction set forth in the Respondents

See Joint Motion to Terminate Investigation as to Respondents MediaTek Inc., Audio Partnership PLC and Oppo Digital Inc. on the Basis of a Settlement and Patent License Agreement, Mtn. Dkt. No. 753-107EDIS Doc. ID 475021 (Mar. 16, 2012).

16

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58 petition. If so, their position conflicts with the testimony of their own experts and should be rejected accordingly. On the merits, certain former Respondents (e.g., nVidia and Broadcom) previously argued that the transmitter limitations should be given a narrow construction that expressly excludes a particular technique, i.e., conventional FIR filters, that can be used to compensate for the signal distortion problems purportedly addressed by the Dally patents. See RIB 111-117; RRB 58-63. However, all of the experts agree that the plain and ordinary meaning of transmitter and transmitter circuit does not require the particular equalization mechanisms of certain preferred embodiments or otherwise exclude the use of conventional FIR filters. See, e.g., Hassoun, Tr. 1439:19-1440:12; Hajimiri, Tr. 1578:25-1579:07, 1579:08-15; Singer, Tr. 597:13598:01, 815:09-817:04. Nor does any other language in the asserted claims itself suggest such a construction. See, e.g., Hassoun, Tr. 1442:18-1444:16; Hajimiri, Tr. 1578:07-12. Thus, the plain language of the asserted claims and the plain and ordinary meaning of transmitter circuit support the broad construction adopted in the ID. Given the above, any remaining arguments in favor of a narrower construction that excludes conventional FIR filters largely distill down to whether Dr. Dally disclaimed such embodiments by including present invention language in the specification. See Resp. Pet. 43 (These statements apply to the present invention as a whole, and limit the scope of the invention to only those transmitter circuits that generate signals as a logical function of bit history.). However, as explained in the Absolute Software case that is cited and relied upon in the ID, use of the phrase present invention or this invention is not always so limiting, such as where the reference to a certain limitation as being the invention are not uniform, or whether other portions of the intrinsic evidence do not support applying the limitation to the entire patent.

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59 ID at 39-40 (quoting Absolute Software, Inc. v. Stealth Signal, Inc., 659 F.3d 1121, 1136 (Fed. Cir. 2011)). OUII submits that such a situation exists here. More specifically, the specification discloses embodiments that would not be viewed by a person of ordinary skill in the relevant art as limited to non conventional-FIR filter techniques. See ID at 36-40. One such example reads as follows: Preferred implementations of the invention include finite input response (FIR) filters, and FIG. 8 illustrates one such implementation. In this case, a 5 tap filter has been selected as a balance between higher fractional bandwidth and circuit complexity. With a greater number of taps, equalization can be obtained at lower frequencies. The present design provides for equalization in a range of 100 MHz to 2 GHz. By reducing to 2 or 3 taps, the lower end of the range may be no less than 500 MHz. 857 patent, 5:50-58; see also CX-9542C, Singer Direct Q/A 129. Ignoring this introductory paragraph, the Respondents petition selectively quotes the subsequent paragraph, which they contend contrasts the invention as a whole from conventional FIR filter techniques: As in a conventional FIR filter, the input Di is delayed in successive delay elements 28. However, rather than weighting the individual delayed signals and summing the weighted signals to obtain the desired output, the delayed signals are applied to a 5-to-32 decoder 32. Resp. Pet. 44 (quoting 857 patent, 5:59-63). When read in its entirety, however, column 5 makes clear that the passage on which the Respondents petition relies is merely an illustrative example of one preferred implementation that uses an unconventional FIR filter, whereas other implementations may utilize either a conventional or an unconventional FIR filter. See 857 patent, 5:50-52; CX-9542C, Singer Direct Q/A 129. Unasserted claims from the Dally patent family confirm that the invention as a whole is not limited to non conventional FIR filter techniques. For example, claims 2, 4, and 13 from U.S. Patent No. 6,542,555 explicitly recite a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. CX-9687 at 8:66-67, 9:15-15, 10:6-8.

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60 By contrast, the asserted claims of the 857 and 494 patents do not explicitly recite equalization based on a logical function of bit history. See Hassoun, Tr. 1445:06-1446:14. This distinction between the asserted claims and certain unasserted claims weighs against a finding that the invention as a whole is so limited.17 To the extent that the Respondents petition also raises disclaimer arguments based on the prosecution history of an unasserted Dally patent, these arguments are similarly without merit. See Resp. Pet. 44-45. In particular, the petition does not address the IDs analysis (with evidentiary support) that the purported disclaimer fails to carry over to the asserted patents because the claims at issue in the two patents are different in several . . . material respects. ID at 41. The petition instead relies on the related patents sharing a common specification and some overlapping claim features. See Resp. Pet. 45. The petition argues that these facts preclude Rambus from captur[ing] prior art that the applicant[] specifically addressed and was aware of while the [asserted] patents were being prosecution. Id. However, the petition fails to identify any legal authority for this position, which should be rejected accordingly. For at least these reasons, OUII submits that the IDs interpretation of the transmitter limitation should be affirmed. 2. Infringement As To LSI

Supplier Respondent LSI has petitioned for review of the IDs finding of infringement as to a subset of its accused products, i.e., those LSI products that implement a [ ]. According to LSI, these particular products do not infringe the asserted Dally patent
17

See Saunders Group, Inc. v. Comfortrac, Inc., 492 F.3d 1326, 1333 (Fed. Cir. 2007) (While . . . restrictive language of the specification might be sufficient in other contexts to limit the scope of the claims, it is not sufficient . . . where the language of the claims so clearly distinguishes between those claims that require the [limitation sought to be read in] and those that do not.).

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61 claims because [ ] the asserted claims allegedly take into consideration only preceding and current bits. See Resp. Pet. 46-48. The ID correctly concluded otherwise. See ID at 74-78. As noted in the ID, [ ]. See ID at 75 (citing Tracy, Tr. 1404:14-1405:04). LSI recognizes that there is an undeniable similarity between its purportedly non-infringing [ ]. See Resp. Pet. 47. LSI nonetheless argues that a [ ] See id. In essence, LSI argues that a [ ], whereas

the Dally patents allegedly prohibit such a bit be considered at all (regardless of whether it is given any weight). See id. However, LSIs position is refuted by its own documentation, [

]. See CX-9208C.0009 to 0010; see also CX-9542C, Singer Direct Q/A 260 (describing same excerpt as reproduced in CDX-1689C). An LSI witness verified this fact at his deposition. See JX-137, Tracy Tr. 180:02-12; id. at 225:07-226:12; id. at 268:09269:22; CX-9542C, Singer Direct Q/A 260 (discussing testimony of Mr. Tracy as reproduced in CDX-1691C). Thus, the evidence of record supports the conclusion reached in the ID that LSIs [

]. For at least these reasons, LSIs petition for review of the infringement findings specific to its [ ] should be rejected.

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62 3. Infringement As To Cisco

Customer Respondent Cisco has similarly petitioned for review of the IDs finding of infringement as to a subset of its accused products, i.e., [ ]. Resp. Pet. 48. According to Cisco, the ID as improperly shifted the burden of proving non-infringement to Cisco and should be reversed accordingly. See id. OUII disagrees. As explained in the ID, Rambus has asserted apparatus claims from the Dally patents. See ID at 77. Unlike method claims, an apparatus claim is infringed by a product that is capable of operating in an infringing mode so long as a user can enable that functionality.18 Applying this precedent to the accused Cisco products that have a [ still infringe at least the asserted apparatus claims because [ ], these products

]. See ID at 72 [ ]. Absent evidence to the contrary, which Cisco has not identified, the IDs finding on infringement should be affirmed. See id. 4. Indirect Infringement

The Respondents have petitioned for review of the IDs analysis and conclusions regarding indirect infringement of the asserted Dally patent claims. See Resp. Pet. 49-50. These arguments are essentially identical to the Respondents indirect infringement arguments

18

See ID at 77 (citing Silicon Graphics, Inc. v. ATI Techs., Inc., 607 F.3d 784, 794 (Fed. Cir. 2010) (quoting Fantasy Sports Props., Inc. v. Sportsline.com, Inc., 287 F.3d 1108, 1118 (Fed. Cir. 2002) (holding infringement of an apparatus claim occurs so long as the product is designed in such a way as to enable a user of that [product] to utilize the function ... without having to modify [the product].)).

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63 discussed above with respect to the Barth I patents, and should be rejected for the same reasons. However, one additional issue specific to the Dally patents is discussed below. The Respondents argue that a violation of Section 337 as to the asserted method claims of the Dally patents must be based on a showing of indirect infringement under the Electronic Devices opinion. OUII agrees and submits that a preponderance of the evidence shows induced infringement of the asserted method claims 39, 40 and 42 of the 494 patent under 35 U.S.C. 271(b). See ID at 82-85. But, in any event, OUII notes that Rambus has also asserted apparatus claims 1, 2, 4-6, 9-13, 24-28, 31-36, 39-44, 47, and 49-53 of the 857 patent, as well as apparatus claims 1-3, 6, 8, 25, 26, and 30 of the 494 patent. None of Rambuss infringement allegations as to these apparatus claims is impacted by the Electronic Devices opinion, which addresses violations of Section 337 based on infringement of a method claim. The section spanning pages 49 to 50 of the Respondents petition is thus inapplicable to the vast majority of the Dally patent claims in dispute. C. Invalidity

In OUIIs view, clear and convincing evidence supports the IDs finding that the asserted Dally patent claims are invalid as anticipated by or obvious in view of the prior art. See ID at 124-205 (anticipation); id. at 223-231 (obviousness). The private parties petitions for review of these issues should be rejected accordingly.

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64 1. Anticipation

Turning to the anticipation analysis, the ID found that two distinct groupings of prior art, i.e., Widmer and SL500, anticipate the asserted claims of the Dally patents. These anticipation findings are summarized as follows:19 Prior Art Widmer (RX-4109)20 SL500 Art (multiple documents) Anticipated 857 Patent Claim 1, 4-6, 9, 10, 24-28, 35, 36, 39-44, 47, 53 1-6, 9, 10, 24-28, 31, 35, 36, 39, 41-44, 47, 49, 53 Anticipated 494 Patent Claim 1, 2, 6, 8 1-3, 6, 8, 25-26, 30, 39, 40, 42

In addition, the ID rejected the Respondents anticipation (and obviousness) arguments with respect to the Lau reference (RX-4106) as waived. See ID at 224-225. Rambus has petitioned for review of the anticipations findings as to Widmer and the SL500 art. See Comp. Pet. 4-28. Respondents argue that the anticipation findings as to Widmer and the SL500 art did not go far enough, and seek review of the finding that certain claims were obvious in view of, but not anticipated by, these references. See Resp. Pet. 60-66. The Respondents also seek review of the waiver finding as to Lau. See Resp. Pet. 58-60. Respondents arguments as to Lau are addressed in the subsequent section on obviousness along with other waived invalidity arguments. The remaining anticipation issues raised in the private parties petitions are addressed below.

OUII does not dispute the Respondents assertion that the anticipation finding regarding claims 26 and 40 in view of the SL500 art may have been inadvertently left off the legal conclusions on page 365 of the ID. See Resp. Pet. 51 n. 17.
20

19

The ID also discusses two other pieces of prior art that are related to the Widmer article, i.e., specification of chip called Odysseus (RX-4299C) that purportedly implemented the system disclosed in the Widmer article and an earlier patent by Mr. Widmer (RX-2870) that is referenced within the article. A timeline of Mr. Widmers work in the art of the Dally patents is provided in RDX-0201 and discussed on page 128 of the ID. The discussion below focuses primarily on the Widmer article on which OUIIs anticipation analysis was largely based.

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65 a. Widmer (RX-4109)

With respect to the Widmer prior art, Rambuss petition addresses three purported deficiencies in the IDs analysis as it relates to anticipation by this reference: (1) whether Widmer contains an enabling disclosure (Comp. Pet. 5-10); (2) whether Widmer discloses transmitter circuitry that is located on-chip (id. at 10-14); and (3) whether the ID properly construed the rate limitation of 494 patent claims 30 and 42 (id. at 15, n. 6). The Respondents petition addresses two additional issues: (1) whether Widmer disclose a common processor coupled to multiple transmitter circuits (Resp. Pet. 60); and (2) whether the data rate of four outputs in Widmer can be treated as a single aggregated output with 4x the data rate (id. at 6264). None of these arguments has merit. i. Widmer Is Enabled

As discussed in the ID, the Widmer article (RX-4109) discloses a quartet (four part) transceiver (transmitter/receiver) with each of the four parts therein having a Line Driver and a Line Receiver connected to a serial output and a serial input respectively. ID at 132. Particularly relevant to the Dally patents is disclosure in the Widmer article of a programmable predistorting driver that performs a pre-emphasis function to address signal degradation that occurs during transmission: The links have frequency-dependent attenuation (worst case 9dB at 500MHz) and discontinuities that cause significant signal distortion. The path can include 65cm of card trace and 3.5m of 25AWG, 50 coax, along with 50mil-pitch microstrip card-to-card connectors, and dense 4-row 100mil-pitch shielded cable connectors. In the serial driver, a digital predistortion technique boosts high-frequency content, improving the eye opening of the received signal [2]. The low level and high level are each peaked by 50% for a 1-baud interval immediately following any transition. A circuit diagram of the predistorting driver is shown in Figure 4. Control inputs DHBASE and DLBASE set the base driver levels, and DHPEAK and DLPEAK turn on the extra drive required for peaking. The high and low levels are programmable to 1 of 4 levels. Dc-freecoding of serial data permits ac coupling to the receiver, reducing S/N degradation caused by ground shifts.

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66 ID at 133 (quoting RX-4109.0001); see also Hassoun, Tr. 1488:25-1489:14. Rambuss primary challenge to the Widmer article is based on the argument that the article is not enabled with respect to the above referenced predistorting driver circuit and the DHPEAK and DLPEAK signals referenced therein. Namely, Rambus characterizes the Widmer Article [as] nothing more than another hard-to-decode ISSOC paper . . . leading [Rambuss expert] Dr. Singer to explain that one of ordinary skill in the art would have found it impossible to make and use the claimed invention without undue experimentation. Comp. Pet. 6 (quoting CX-107647.0023, Singer Rebuttal). Rambuss non-enablement arguments are not well founded and should be rejected. First, Rambus argues that the ID improperly found the Widmer article (RX-4109) to be enabled based on the articles explicit reference to an earlier patent by Mr. Widmer, i.e., U.S. Patent No. 3,980,826 (RX-2870), which also discloses a pre-distorting circuit. See Comp. Pet. 6. Rambus argues that this patent describes 1970s-era technology implemented with mostly discrete circuit components that could not be easily implemented on a chip or scaled to the rates at issue in the Widmer article and the Dally patents, and that the predistorting mechanism disclosed in Mr. Widmers patent differs substantially from that of the Widmer article. See id. at 6-7. OUII submits that Rambuss arguments in this regard are nothing more than challenges to factual determinations that did not go in its favor but are fully supported by the evidentiary record. See ID at 133-137; see also RX-5431C, Hassoun Direct Q/A 286 (refuting Rambuss discrete component argument); Hassoun, Tr. 1544:12-1550:04 (refuting Rambuss argument that the predistorting mechanism of the Widmer article and the Widmer patent are substantially different). Second, Rambus argues that the ID erroneously relies on Respondents experts flippant and conclusory testimony that a sophomore or junior in electrical engineering would have been

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67 able to make and use the Widmer Articles emphasis circuit. Comp. Pet. 7-8. In particular, Rambus cites to the testimony of its expert Dr. Singer as purportedly demonstrating that the Widmer article discloses a nonfunctional design based on the arrangement of the DHBASE, DLBASE, DHPEAK, and DLPEAK inputs to the transistors of its driver circuit. See id. at 8 (citing Singer, Tr. 2577-2579). In actuality, however, the cited portions of Dr. Singers testimony at most demonstrate his view that it was a bit overly simplistic to assume that one of ordinary skill could look at this [circuit] and immediately know how to generate a peak signal. See Singer, Tr. 2579:12-19. At no point in the cited testimony does Dr. Singer state that the circuit is nonfunctional. Rather, Dr. Singer confirmed that the circuit could work as intended by adding what he characterized as more sophisticated circuitry for generating the DHBASE, DLBASE, DHPEAK, and DLPEAK inputs. See id. at 2579:18-19. And as Respondents expert Dr. Hassoun explained, a person of ordinary skill in the art could easily have implemented that circuitry without undue experimentation. See Hassoun, Tr. 1491:25-1492:16; RX-5431C, Hassoun Direct Q/A 134. While Rambus criticizes this testimony as flippant, it is corroborated by several other references such as the Widmer patent expressly referred to in the Widmer article, amongst others that confirm that techniques for performing pre-distortion were well known in the art prior to the 1996 critical date of the Dally patents. See ID at 128-129 (quoting RX-4429 at 999). Certain of these references, such as the SL500 Art addressed more fully below, confirm that these pre-distortion techniques could be implemented on-chip and scaled to the rates at issue in the Widmer article. Finally, Rambus argues that the Respondents effectively conceded the nonenablement of the Widmer article by seeking to admit testimony from Mr. Widmer himself to fill in the gaps and explain it. See Comp. Pet. 9. According to Rambus, this fact is confirmed by

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68 Respondents expert having purportedly admitted to having to ask Mr. Widmer for confirmation of how the Widmer Articles design functioned, and in particular . . . about the [pre-distorting] driver and how it worked. See id. (quoting CX-10764.0026). As an initial matter, the cited page of Dr. Singers witness statement (CX-10764.0026) was not admitted into evidence and cannot be relied upon. Moreover, the mere fact that Respondents expert purportedly sought to speak with an individual with personal knowledge of the references at issue at most demonstrates that he was diligent in his invalidity analysis. It does not demonstrate improper assumptions or conclusions reached as to the references at issue. For at least these reasons, Rambuss petition for review of the IDs conclusion as to enablement of the Widmer article should be denied. ii. On-Chip Transmitter Circuitry

Rambus also seeks review of the anticipation findings with respect to the Widmer article based on a theory that the asserted Dally patent claims require the transmitter circuit be located wholly on-chip, whereas the transmitter circuit of the Widmer article includes off-chip components. See Comp. Pet. 10-14. Rambuss attempts to distinguish the Widmer article in this manner were rejected in the ID, and should not be reviewed. See ID at 141-143. As an initial matter, the ID found that Rambuss expert Dr. Singer lacks credibility as to his purported off-chip/on-chip distinction. See ID 141-143. Rambus attempts to distinguish this credibility finding as inapplicable to Dr. Singers analysis of circuitry that generates the DHPEAK and DLPEAK signals. See Comp. Pet. 11, n. 5. However, the ID explains that Dr. Singer repeatedly waffled on [the off-chip/on-chip] point during questioning by the Staff. ID at 141. In the ALJs view, Dr. Singers inability to maintain a consistent position on his purported off-chip/on-chip distinction and the corresponding scope of the transmitter circuit

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69 limitation reflects serious credibility problems that taint his entire analysis. Id. at 143 (emphasis added). The discussion immediately thereafter focuses exclusively on the off-chip/onchip DHPEAK and DLPEAK signaling issue. Id. at 143-144. Thus, the IDs credibility finding as to Dr. Singer is relevant to the DHPEAK/DLPEAK signaling issue and supports the rejection of his opinions in this regard. On the merits, Rambuss argument essentially boils down to the assumption that because DHPEAK and DLPEAK are described as inputs to the predistorting driver circuit within the Widmer chip, and because none of the figures explicitly show another circuit on the chip that generates these signals, they must be generated by off-chip circuitry. See Comp. Pet. 11-12. However, this assumption is contradicted by a statement in the Widmer article that [n]o external components are required. RX-4109.0001; see also Hassoun, Tr. 1539-05-1540:16. To the extent that Rambus continues to dispute this disclosure in the Widmer article (Comp. Pet. 13) as it relates to the DHPEAK and DLPEAK signals, OUII submits that its arguments are nothing more than challenges to factual determinations that did not go in its favor but are fully supported by the evidentiary record particularly in view of the credibility determination as to Rambuss expert Dr. Singer. For at least these reasons, Rambuss petition for review of the IDs on-chip/off-chip findings as to the Widmer article should be denied. iii. Additional Transmitter Circuits

Dependent claims 11, 32, and 50 of the 857 patent add a requirement that there be multiple transmitter circuits coupled to the processor of the corresponding independent claim. See, e.g., 857 patent, 9:26-31 (claim 11). The ID found that the quartet-transceiver of the Widmer article does not include multiple transmitters coupled to a common processor, and thus

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70 rejected the Respondents corresponding anticipation argument as to these three claims (and other asserted claims dependent thereon). See ID at 155-156. However, the ID found the missing limitation to be an obvious addition to the Widmer article and thus still invalidated these claims in view of the Widmer article. See id. Rambus does not appear to have sought review of this particular finding. See Comp. Pet. 14-17 (seeking review of the obviousness findings as to claims 2, 31, and 49 of the 857 patent but not as to the specific limitations of claims 11, 32, and 50). As such, Rambus has effectively conceded that the multiple transmitter circuit limitation does not distinguish claims 11, 12, and 50 over the Widmer article. Respondents nonetheless petition for review of the IDs finding that claims 11, 21, and 50 are invalid as obvious in view of - but not anticipated by - the Widmer article. See Resp. Pet. 60-62. Thus, the Respondents essentially seek a finding that invalidated claims are even more invalid in view of Widmer. In OUIIs view, this argument is essentially moot but OUII nonetheless responds as follows. As illustrated in the demonstrative below, the ID found that claims 5, 11, and 50 of the 857 patent require multiple transmitter circuits coupled to the processor of the corresponding independent claim, whereas the Widmer article discloses multiple transmitter circuits that are coupled to individual (non-shared) processors:

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71 See ID 155-156 (contrasting claimed configuration from Quartet Transceiver of Widmer article). The Respondents argue that the IDs findings in this regard fail to appreciate their argument that the Widmer article discloses a common Serializer (with four 8b/10b encoders therein) that is connected to four Line Drivers. See Resp. Pet. 61. OUII disagrees. In discussing the asserted independent claims, which all call for a processor and a transmitter circuit in the singular, Respondents expert Dr. Hassoun explains that the Widmer article discloses a processor within the chip, namely, the four 8B/10B encoders found within the Serializers. RX-5431C.0077, Hassoun Direct Q/A 131. Dr. Hassoun is correct in this regard. The Widmer article discloses a processor (i.e., any one of the four Serializers, each of which includes an 8B/10B encoder) coupled to a transmitter circuit (i.e., a corresponding Line Driver). In short, each individual transceiver within the Widmer articles four part (i.e., Quartet) transceiver includes a corresponding processor coupled to a corresponding transmitter circuit. See RDX-0221 (above right); see also RX-5431C.0080, Hassoun Direct (describing RDX-0221). When Dr. Hassoun turns to claim 11, i.e., the first additional transmitter claim wherein multiple transmitter circuits are coupled to a common processor, he again identifies the four individual Line Drivers as transmitter circuits but this time glosses over their inputs being connected to corresponding different Serializers. Instead, Dr. Hassoun points to the four SerDes inputs of the Quartet-Transceiver as a whole. See RDX-0260 (below right); RX-5431C,

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72 Hassoun Direct Q/A 174 (describing RDX0260). Dr. Hassoun thus appears to be reading the processor on an unspecified component i.e., whatever device is coupled to the Quartet-Transceiver as a whole. At no point does Dr. Hassoun explain that the four Serializers disclosed in the Widmer article are combined within a unified processor. Nor would such testimony be consistent with the Widmer articles discussion of 4 SerDes circuits with four SerDes inputs and a corresponding set of four Serial Outputs i.e., a separate Serializer for each Line Driver as shown in Figure 1. See RX-4109.0001. Thus, the testimony of Respondents expert Dr. Hassoun and the corresponding disclosure in the Widmer article is, in fact, consistent with the IDs analysis of the multiple transmitter limitation and the corresponding disclosure of the Widmer article. To the extent that the Respondents note the fact that Rambus does not dispute that the Widmer Article discloses the limitations of claims 11, 32, and 50, this fact does not warrant review of the IDs findings in this regard. See Resp. Pet. 61. OUII disputed whether the Respondents proved by clear and convincing evidence anticipation of these claims in view of the Widmer article. See SIB 178. OUIIs arguments were adopted in the ID and are supported by the evidence of record as discussed above. To the extent that the Respondents assert conflict between the anticipation and infringement findings in the ID as they relate to the multiple transmitter limitation, OUII notes that the Respondents did not raise a noninfringement argument in post-trial briefing as to this particular limitation. See Resp. Pet. 42; RIB 124-141 (noninfringement arguments as to the

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73 Dally patents); see also id. at 153-154 (anticipation arguments for the multiple transmitter limitation in view of the Widmer article). The Respondents have thus waived review of this issue. See Ground Rule 11.1 (issues not discussed in detail in initial post-hearing brief shall be deemed waived). For at least these reasons, the Respondents petition for review of the ID as it relates to whether the Widmer article discloses the multiple transmitter limitation should be denied. iv. The Output Frequency Limitations

The parties also dispute the meaning of two closely related speed limitations in certain dependent claims: (1) an output frequency of a least 1 GHz (109 cycles-per-second) as recited in claims 2, 31, and 49 of the 857 patent and claim 3 of the 494 patent; and (2) a rate of at least 400 MHz (106 cycles-per-second) as recited in claims 30 and 42 of the 494 patent. In particular, the parties dispute whether the conversion from Hertz (as claimed) to bits-per-second (as specified in certain prior art references) involves a 1:1 ratio or a 1:2 ratio, such that a 1 GHz output frequency either equates to 1 Gbps (109 bits-per-second) or 2 Gbps (2x109 bits-per-second) and a 400 MHz rate either equates to 400 Mbps (4x106 bits-per-second) or 800 Mbps (8x106 bitsper-second). While the recited speed (i.e., 1 GHz or 400 MHz) differs between the output frequency and rate claims, the parties treat output frequency and rate as synonyms. Thus, the term output frequency is used to denote both limitations in the discussion below. The ID found a 1:1 ratio to be the correct conversion ratio for Hertz to bits-per-second, and construed the claims accordingly. See ID at 24-34. Rambus seeks review of the IDs rejection of its proposed 1:2 ratio. See Comp. Pet. 26-28. Respondents seek review of the IDs application of a 1:1 ratio to the system disclosed in the Widmer article. See Resp. Pet. 62-64. OUII respectfully submits that the Commission should deny review of both of these issues.

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74 Interpretation Of The Output Frequency/Rate Limitations As background, several undisputed facts guide the analysis in the ID of the output frequency limitation having a 1:1 ratio between Hertz and bits-per-second. See ID at 24-34. First, the exact phrase output frequency appears solely in the claims. Neither the specification nor prosecution history uses the term output frequency in even a single instance. See Hassoun, Tr. 1554:17-24; Singer, Tr. 812:06-813:14. Thus, there is no definitive, explicit statement as to the meaning of output frequency in the intrinsic record of the Dally patents. Second, the claims that recite an output frequency limitation use the unit Hertz to quantify an end point of the claimed range. See, e.g., 857 patent 8:64-67 (dependent claim 2). The unit Hertz (Hz) refers to cycles-per-second, with 1 MHz representing a megahertz (i.e., 106 cycles-per-second) and 1 GHz representing a gigahertz (i.e., 109 cycles-per-second). See Hassoun, Tr. 1555:16-20. Cycles-per-second, in turn, are referred to in terms of a systems symbol rate (also known as baud (Bd)), with each symbol representing one or more bits depending on the particular implementation. See id. 1555:21-24. Thus, one or more bits can be transmitted per Hertz. Rambus argues that the systems disclosed and claimed in the Dally patents require the transmission of two bits per Hertz (i.e., a 1:2 ratio) based, in part, on its reading of the claims as requiring Non-Return-to-Zero (NRZ) encoding where each high signal level represents one data bit (e.g., a logical 1 as processed by the processor) and each low signal represents one data bit (e.g., a logical 0 as processed by the processor). See Comp. Pet. 27 n. 12. Because a periodic clock signal in such a system can be expressed as alternating 1 bits and 0 bits, the maximum clock rate (in Hertz) for an NRZ system is purportedly one-half the data rate. See Comp. Pet. 26. However, there are at least two problems with Rambuss argument in this regard.

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75 First, none of the claims specifies a particular encoding scheme that must be used by the processor. Rather, the claims recite an output signal (and the corresponding bit rate thereof) from the perspective of an input to the transmitter circuit wherein each bit output from the transmitter circuit has a signal level that represents a corresponding digital value input to that circuit: a transmitter circuit within the chip, the transmitter circuit being coupled to the processor to accept a digital input signal including a plurality of digital values from the processor, the transmitter circuit being operable to send an output signal including a series of signal levels representing the digital values and to emphasize high frequency components of the output signal relative to low frequency components of the output signal so that 857 patent, 8:48-55 (emphasis added). The particular encoding scheme used by the processor to create those digital values from data e.g., NRZ encoding, Manchester encoding, etc. is not called out in the claims. See Hassoun, Tr. 1544:24-1550:04 (describing NRZ and Manchester encoding, both of which generate a plurality of digital values as called for in the asserted Dally patent claims); see also ID at 28 (depicting a Manchester encoding scheme). Thus, the ID did not err in refusing to limit the claims to an unspecified NRZ encoding scheme. See ID at 27-28. Second, each of the embodiments disclosed in the specification appears to equate Hertz with bits-per-second in a 1:1 ratio as construed in the ID. See ID at 30-34. For example, the embodiment of Figure 1 includes a label of 4Gbps for what the specification describes in terms of 4GHz, thus equating 1 Hertz with 1 bit-per-second:

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76

857 patent, Figure 1; see also ID at 31-32 (describing Figure 1 and corresponding disclosure thereof in the specification). Figure 12 similarly includes a label of 4Gbps for what the specification again describes in terms of 4GHz, thus equating 1 Hertz with 1 bit-per-second. See 857 patent, Figure 12 (right); see also ID at 32 (describing Figure 12 and the corresponding disclosure thereof in the specification). Other examples also exist in the specification. See ID at 33 (quoting 857 patent, 8:13-16). To the extent that Rambus relies on other portions of the specification as support for its proposed 1:2 ratio between Hertz and bits-per-second, its reliance is misplaced. See Comp. Pet. 27 (citing 857 patent, 3:59-63; id. at 4:16-19). The portions of the specification on which Rambus relies describe a frequency of interest and an operating frequency respectively not output frequency as claimed. See Singer, Tr. 720:03-06, 811:25-812:05 (Rambuss expert admitting that column 3 does not recite output frequency); id. at 810:07-24 (Rambuss expert

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77 admitting that column 4 does not recite output frequency). Thus, the specification does not support Rambuss proposed construction. For at least these reasons, Rambuss petition for review of the IDs interpretation of the output frequency limitations should be denied. The Widmer Articles Aggregated Output Applying the above referenced construction of output frequency to the Widmer article, the ID found that each individual transceiver of the Widmer articles Quartet-Transceiver has an output data rate of 500 MBaud, which corresponds to 500 Mbps. See ID at 152 (discussing the output data rate of the Widmer article); RX-4109.0002, Figure 1. Because 500 Mbps is less than the 1 Gbps specified in claims 2, 31, and 49 of the 857 patent and claim 3 of the 494 patent (per the 1:1 ratio between Hertz and bits-per-second as discussed above), the ID concluded that the Widmer article does not anticipate these claims. See ID at 150-152. The ID did conclude that the output frequency limitation was obvious in view of the Widmer article when combined with other art, but the Respondents nonetheless seek review of the anticipation determination. See ID 153-154 (finding the output frequency limitation obvious); Resp. Pet. 62-64. Thus, the Respondents are again seeking a finding that invalidated claims are even more invalid over a given reference. In OUIIs view, this argument is again essentially moot but OUIIs position is set forth below. According to the Respondents, the IDs reasoning is flawed because: (1) it failed to correctly view the Widmer articles four independent Serializers as a common processor (Resp. Pet. 63); and (2) it read output signal too narrowly as referring to that of an individual output rather than multiple parallel outputs (id. at 63-64). The first argument fails for the reasons previously discussed with respect to the multiple transmitter limitations. As for the second

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78 argument, the Respondents state that [n]either the ALJ nor Rambus point to any evidence or reason that the output frequency cannot be applied to the aggregate output frequency of a parallel output. Id. at 64. However, the discussion spanning pages 151 to 152 of the ID and the corresponding discussion in OUIIs briefing before the ALJ identifies the purportedly missing evidence. For at least these reasons, the Respondents petition for a more expansive invalidity finding based on the Widmer article should be denied. b. The SL500 Art

At trial, the Respondents relied on several related invalidity theories stemming from LSIs work in the 1995 to 1996 timeframe on a chip called the SerialLink SL500 that was allegedly conceived, reduced to practice, used, and offered for sale prior to June 1996 critical date of the Dally patents. See ID at 160. Rambuss petition does not appear to dispute the substantive comparison in the ID of the SL500 materials to the asserted claims under the constructions adopted therein.21 Rather, Rambus challenges the extent to which the SL500 materials qualify as prior art. See Comp. Pet. 17-25. Specifically, Rambus argues that: (1) because the pre-emphasis circuitry in LSIs CWSL500 core design could be (and sometimes was) disabled when instantiated in a chip, the ID should have identified a particular chip with pre-emphasis circuitry enabled therein (Comp. Pet. 17-20); (2) the record lacks circuit diagrams, layouts or testimony from witnesses with personal knowledge of how pre-emphasis was implemented in an actual chip (id. at 21-25); (3) the pre-emphasis circuitry in the SL500 chip
21

Rambus petitions for review of the substantive comparison in the ID only as to the output frequency limitations and only insofar as its construction of output frequency is adopted by the Commission. See Comp. Pet. 26. For the reasons previously stated with respect to the Widmer article, Rambuss proposed construction of output frequency should not be adopted. As such, this aspect of Rambuss petition should correspondingly be denied.

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79 that LSI offered to Seagate [ ] (id. at 20-21);

and (4) it is unclear whether the pre-emphasis circuitry in the SL500 chip that LSI offered to Cabletron included permanently disabled pre-emphasis circuitry (id. at 25). None of these arguments has merit. The Respondents argue that the ID erred in its analysis of the SL500 Art insofar as it only found the multiple transmitter limitations to be obvious (rather than anticipated) in view of that art. See Resp. Pet. 64-65. The Respondents thus seek review of the ID to expand the invalidity findings over the SL500 Art. See id. OUII also opposes review of this issue as discussed below. i. Background Of The SL500 Art

There are three critical components to the SL500 Art of record in this investigation: (1) CWSL500 cores; (2) SL500 chips; and (3) [ ]. The CWSL500

core refers to the core ware of the SL500 Art. See Hajimiri, Tr. 1607:01-18. A core in this context constitutes a design that is subsequently instantiated in a commercial product such as an SL500 chip without substantial modification to the relevant functionality or circuitry of that design. See Hajimiri, Tr. 1582:03-16, 1588:01-1590:07; RX-5506C, Vorenkamp Rebuttal Q/A 10; Singer, Tr. 756:24-759:05, 760:08-21, 761:05-18; Comp. Pet. 19 n. 8 ([T]he CWSL500 core is meant to be incorporated into the SL500 chips.). With respect to the CWSL500 core and SL500 chips in particular, the record shows that LSI personnel developed equalization circuitry within a CWSL500 core sometime in the spring to early summer of 1995, and ultimately instantiated that core in an SL500 chip sometime in the fall of 1995. See RX-5430C, Hajimiri Direct Q/A 519; Hajimiri, Tr. 1607:19-25. The record also shows that LSI produced a [ ] with an SL500 chip in this same timeframe. See Hajimiri, Tr. 1608:01-04.

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80 As noted above, Rambus purportedly raises four distinct arguments in its petition challenging whether the LSIs work in the 1990s on the CWSL500 core and related SL500 chip and [ ] qualifies as prior art to the Dally patents under 35 U.S.C. 102(b) (offer for

sale) and/or 102(g) (prior conception and reduction to practice). However, its petition repeats two basic themes throughout these arguments. First, Rambus focuses on an alleged lack of evidence involving circuit diagrams, layouts, and testimony from witnesses with personal knowledge as to the particular implementation of pre-emphasis circuitry within the CWSL500 core or SL500 chips with such a core instantiated therein. See Comp. Pet. 21-22. Second, Rambus focuses on certain variations of the CWSL500 core as instantiated in SL500 chips that contained disabled pre-emphasis circuitry. See id. at 20-21 (arguing that the SL500 chip designed for Seagate did not have working pre-emphasis circuitry therein); id. at 25 (speculating that the SL500 chip designed for Cabletron did not have working pre-emphasis circuitry therein). OUII submits that neither theme as articulated in Rambuss petition warrants review or reversal of the IDs finding that the SL500 Art qualifies as prior art. OUII thus opposes this aspect of Rambuss petition. ii. The CWSL500 Included Pre-Emphasis Circuitry

Turning first to Rambuss argument that the record lacks circuit diagrams, layouts, etc. for particular implementations of pre-emphasis circuitry in the SL500 Art, OUII submits that this argument is not relevant to the issue of whether a sufficient showing of invalidity was made, but instead simply an argument that a stronger showing of invalidity could theoretically have been made. The record in this investigation contains a considerable body of evidence that confirms that working pre-emphasis circuitry was indeed developed by LSI and was included within the CWSL500 core design prior to the June 1996 critical date of the Dally patents. See ID

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81 at 169-170, 188-190 (summarizing relevant evidence). Examples include: (1) manuals and specifications that describe programmable pre-emphasis circuitry (RX-4116C.0007; RX4130.0047); (2) output waveforms from simulations run on proposed designs that sufficiently confirm their viability (RX-4094C; RX-4092C); and (3) a journal entry from a Seagate engineer noting that LSI offered to provide Seagate with an SL500 chip that will have pre-emphasis option (RX-4173C.0048). This evidence is sufficient to support the conclusions reached in the ID regarding the structure and operation of the CWSL500 core design and associated SL500 chips. Rambuss petition as it relates to this issue should therefore be denied. iii. The Pre-Emphasis Circuitry Was Programmable

Turning to Rambuss argument that certain variations of the CWSL500 core were instantiated in SL500 chips that contained disabled pre-emphasis circuitry, this argument is also flawed and should be rejected. See id. at 20-21 (arguing that the SL500 chip designed for Seagate did not have working pre-emphasis circuitry therein); id. at 25 (speculating that the SL500 chip designed for Cabletron did not have working pre-emphasis circuitry therein). First, the CWSL500 core design as conceived and reduced to practice by LSI contained programmable pre-emphasis circuitry that could be disabled/enabled for different applications. See RX-5430C, Hajimiri Direct Q/A 466. This fact is verified by documentation describing programmable emph[0:1] inputs and the corresponding simulations thereof as previously discussed. Proof that the CWSL500 core design as conceived and reduced to practice by LSI included pre-emphasis circuitry that could be enabled in at least some applications invalidates even the asserted method claims because, unlike an infringement analysis under Section 271, a prior art invalidity analysis does not require evidence of a prior art product actually being used in the claimed manner. See Manual of Patent Examining Procedure, 2112.02 (Process Claims)

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82 (8th Ed. With July 2008 Revisions) (citing In re King, 801 F.2d 1324, 1326-1327 (Fed. Cir. 1986)). Thus, it does not matter whether the CWSL500 core design as instantiated in certain SL500 chips contained temporarily or permanently disabled pre-emphasis circuitry. Second, insofar as Rambus contests the facts and circumstances surrounding LSIs offers to sell an SL500 chip to Seagate and Cabletron, Rambus appears to be misrepresenting the relevant inquiry. Namely, Rambus focuses on the functionality of particular SL500 chips as purportedly delivered to these customers rather than the functionality of the SL500 chips that LSI offered to sell these customers. This is a significant distinction. Even assuming that the preemphasis circuitry was permanently disabled in the particular SL500 chips ultimately delivered to Seagate and Cabletron, LSI previously offered to sell chips to these companies that included pre-emphasis circuitry therein. Indeed, a Seagate employee documented this fact in one of his engineering notebooks of record.22 See ID at 178 (quoting RX-4173C.0048; Singer, Tr. 2517:15-2518:13, 2520:10-19 (discussing RX-4173C.0048)). Because LSI also reduced to practice its CWSL500 core design with programmable pre-emphasis circuitry in the 1995 to 1996 timeframe as previously discussed, its offers to sell SL500 chips based on that core design are sufficient for 102(b) purposes regardless of whether the offers were ultimately accepted or

Rambus argues that [s]peculation-based, isolated, and uncorroborated notebook entries cannot show that the pre-emphasis circuitry referenced therein was actually offered to Seagate. Comp. Pet. 23. OUII disagrees. The notebook entry at issue was that of Seagate employee Bruce Johnson and is dated July 20, 1995. See RX-4173.0048. The July 1995 timeframe of this notebook is the exact same timeframe in which LSI was offering to sell an SL500 chip to Seagate. See, e.g., RX-4149.0011 (May 1995 presentation referring to the Seagate offer for sale). Moreover, Mr. Johnson later tested a prototype SL500 chip from LSI in April 1996, further confirming his involvement on Seagates side of the offer for sale and corresponding negotiations with LSI. See RX-4175.0065 to .0074. Thus, the identity of the employee at issue, the timing of the relevant notebook entries, and the surrounding documentation from LSI all corroborate the relationship between the notebook entry and the SL500 chip offered to Seagate.

22

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83 the products ultimately sold included that circuitry. See August Tech. Corp. v. Camtek, Ltd., 655 F.3d 1278, 1289 (Fed. Cir. 2011). In short, Rambus raises a distinction without significance. iv. Additional Transmitter Circuits

Turning to the Respondents petition, dependent claims 11, 32, and 50 of the 857 patent add a requirement that there be multiple transmitter circuits coupled to the processor of the corresponding independent claim as previously discussed with respect to the Widmer article. See, e.g., 857 patent, 9:26-31 (claim 11). The ID found that while the SL500 Art rendered the multiple transmitter limitation obvious, the Respondents failed to identify a common processor coupled to multiple transmitters in the SL500 Art. The ID therefore rejected their anticipation arguments accordingly. See ID at 193-194. Respondents seek review of the rejection of their anticipation arguments on the multiple transmitters limitation so as to expand the invalidity findings over the SL500 Art. See Resp. Pet. 64-65. In OUIIs view, this argument is again essentially moot, particularly in light of the fact that Rambus has not contested whether this limitation distinguishes the asserted claims over the SL500 Art. To the extent the Commission nonetheless determines to consider the issue, the Respondents appear to be raising an inherency argument based on the CWSL500 core including a processor and being expandable to include multiple transmitter circuits. See Resp. Pet. 65 ([A]s there is no mention of adding one or more processors, it is inherent that any additional transmitters are coupled to the same processor (i.e., the 8b/10b encoder) already on the chip.). This inherency argument is flawed because failure in the SL500 Art to specify the use of multiple processors does not translate to a corresponding finding that one and only one processor is necessarily used. For example, the Widmer article shows a system with multiple processors coupled to corresponding transmitter circuits. Moreover, this inherency argument was waived

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84 for failure to present it in post-trial briefing. See RIB at 176 (discussing anticipation of the multiple transmitter limitation); Ground Rule 11.1 (issues not discussed in detail in initial posthearing brief shall be deemed waived). For at least these reasons and the other reasons set forth in the ID, the Respondents petition for review of this issue should be denied. v. Conclusion

For the above stated reasons, OUII submits that the private parties petitions as they relate to the anticipation findings on the SL500 Art should be rejected. 2. Obviousness

Turning to the obviousness analysis as to the Dally patents, three findings are relevant to the private parties petitions: (1) the ID found that it would have been obvious to implement the system disclosed in the Widmer article (RX-4109) at an output frequency of at least 1 GHz in view of other art such as Ewen (RX-4125) (ID at 153-154); (2) the ID found that it would have been obvious to modify the single-ended signaling in the Widmer article to implement differential signaling in view of other art such as Ewen (RX-4125) (id. at 147-150); and (3) the ID found that the Respondents have waived their obviousness arguments as to Nakamura under Ground Rule 11.1 (id. at 224). Rambus petitions for review of issues (1) and (2). See Comp. Pet. 14-17. Respondents petition for review of issue (3). See Resp. Pet. 57-58. i. Widmer Article (RX-4109) In View Of Ewen (RX-4125)

According to the ID, two limitations recited in a subset of the asserted Dally patent claims are not taught by the Widmer article: (1) the use of differential signaling (ID at 147-150); and (2) an output frequency of at least 1 GHz (id. at 150-154). The ID nonetheless found these two limitations to be obvious in view of Ewen, which is explicitly referenced in the Widmer article. See id. at 147-154. Rambus has petitioned for review of these findings. See Comp. Pet. 14-17. OUII respectfully submits that Rambuss petition for review should be denied. PUBLIC VERSION

85 With respect to both the differential signaling and output frequency limitations, Rambus argues that reference to Ewen in the Widmer article cuts against a finding of obviousness rather than supports such a finding. In particular, Rambus argues that the overlapping authors on Widmer and Ewen made a conscious decision to reject certain features that are disclosed in Ewen but not found in the Widmer embodiments i.e., that only the relevant features from Ewen were incorporated into the Widmer embodiments. See Comp. Pet. 14. Aside from attorney argument, Rambus merely points to the conclusory testimony of its expert Dr. Singer as support for this understanding of Ewen and how it relates to the Widmer article. See id. OUII respectfully submits that it was not clear error for the ID to adopt the contrary view of Respondents expert Dr. Hassoun on this point. With respect to the differential signaling limitation in particular, Rambus further argues that the Widmer article teaches away from the proposed combination by emphasizing the need for reduced pin-count. See Comp. Pet. 16. However, the ID explains that a person of ordinary skill in the art would appreciate that the benefits of using differential signaling outweigh the pincount concerns in certain applications and that engineers routinely switched between singleended and differential signaling depending on the particular application at hand so as to take advantage of features attributable to each of these two types of signaling. See ID 149-150 (quoting Hassoun, Tr. 1552:25-1553:23). Thus, the IDs finding of obviousness as to the use of differential signaling is again supported by clear and convincing evidence. With respect to the output frequency limitation in particular, Rambus argues that a person of ordinary skill in the relevant art could not have combined the 500 MBaud output of the Widmer article with the 1.062 GBaud rate of Ewen so as to achieve the claimed 1GHz capabilities because Ewen is directed at on-chip signaling that does not scale well to off-chip

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86 applications. See Comp. Pet. 15-16. However, aside from attorney argument Rambus again merely points to the conclusory testimony of its expert Dr. Singer as support for this understanding of Ewen, Widmer, and the combinability of these two references. See id. OUII respectfully submits that it was not clear error for the ID to adopt the contrary view of Respondents expert Dr. Hassoun on this point. For the above stated reasons, OUII submits that Rambuss petition for review of the obviousness findings based on the Widmer article in view of Ewen should be rejected. ii. Respondents Waived Their Arguments On Nakamura & Lau

In post-trial briefing, the Respondents raised at least six anticipation arguments (ID at 8990) and twelve obviousness combinations (id. at 210-211) as to the Barth I patents, multiple anticipation and obviousness arguments as to eight references (id. at 125) directed at the Dally patents, and several written description, enablement, and inoperability arguments as to both the Dally and the Barth I patents (id. at 231-243). The total number of invalidity defenses does not even take into consideration the Respondents other affirmative defenses, such as inequitable conduct (id. at 243-248), prosecution laches (id. at 248-254), equitable estoppel (id. at 317-321), preclusion from seeking injunctive relief (id. at 321-326), lack of standing (id. at 326-330), and patent misuse (id. at 339-341). In short, the ID was faced with a barrage of defenses purportedly addressed in the Respondents post-trial briefing. Respondents ignore the overwhelming number of defenses presented and the fact that they prevailed insofar as the asserted claims were found to be invalid over prior art, and nonetheless complain that the ID improperly rejected on waiver grounds two of their prior art invalidity defenses. See Resp. Pet. 56-60. In particular, the Respondents in post-trial briefing attempted to incorporate by reference the testimony of their expert Dr. Hajimiri to show where

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87 the Nakamura and Lau references disclosed various claim limitations, thereby effectively circumventing the page limits imposed on those briefs. See ID at 224 (waiver as to Nakamura); id. at 224-225 (waiver as to Lau). Respondents argue that this tactic is excusable because Respondents focused their post-hearing brief on addressing the few outstanding issues that Rambus did raise with respect to Nakamura (Resp. Pet. 57) and Lau (id. at 58). OUII respectfully submits that it was not an abuse of discretion for the Judge to require the Respondents to perform a limitation-by-limitation analysis of the references on which they intended to rely rather than force the presiding Judge to hunt through the record to find the evidence purportedly in support of Respondents arguments, particularly in light of the overwhelming number of defenses raised in post-trial briefing. See RIB 189-202 (limited discussion of Nakamura and Lau); Ground Rule 11.1 (all issues not adequately addressed in initial post-trial brief shall be deemed waived). Thus, Respondents petition for review as to these two references should be denied. D. Standing

In OUIIs view, the evidence supports the IDs finding that Rambus has standing to enforce the Dally patents based on an exclusive license agreement with the Massachusetts Institute of Technology (MIT), the owner of record with the U.S. Patent & Trademark Office. See ID at 326-330. The Respondents disagree, and have petitioned for review of the IDs analysis and findings in this regard. See Resp. Pet. 37-42. OUII notes that it has similarly petitioned for review of IDs analysis and findings on standing because the ID did not address OUIIs argument that the particular agreement on which the Respondents rely is void against Rambus as a bona fide purchaser of exclusive-license rights under 35 U.S.C. 261. See OUII Pet. 8-11. OUII respectfully submits that the IDs finding that Rambus has standing to enforce

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88 the Dally patents should be affirmed at least under the bona fide purchaser arguments set forth in OUIIs petition. III. EXCLUSION OF CERTAIN INVALIDITY TESTIMONY AND COUMENTATION As part of pretrial motions practice, the presiding Judge granted a motion in limine by Rambus seeking to exclude testimony from certain witnesses that the Respondents intended to call in support of their arguments that the asserted Dally patent claims are anticipated by or obvious in view of the SL500 Art.23 To the extent that the Commission finds the evidence of record as to the SL500 Art inadequate on a given issue, Respondents request review of the Judges pretrial evidentiary ruling as an abuse of discretion. See Resp. Pet. 51 n. 18. OUII opposes this request. The Respondents argue that the Judges evidentiary finding should be overturned because they timely identified the excluded witnesses on their tentative witness list and they further hinted at the nature of witnesses expected testimony by way of their notice of prior art. See Resp. Pet. 52-55. However, Respondents acknowledge that the Judge found there were too many names on Respondents Tentative Witness List to give adequate notice of the witnesses that the Respondents truly intended to bring to trial and the corresponding prior art issues on which those witnesses were expected to testify. See Resp. Pet. 55. The presiding Judges concern in this regard is shared by other judges at the Commission, who have similarly found a concerning number of parties identify excessive numbers of witnesses on their Tentative Witness Lists or excessive numbers of prior art materials on their Notices of Prior Art such that the
23

See Complainant Rambus Inc.s Motion In Limine No. 3 To Exclude Testimony From Witnesses Who Were Not Effectively Disclosed Before The Close Of Fact Discovery, Mtn. Dkt. No. 753-087, EDIS Doc. ID 460144 (Sept. 27, 2011); Tr. 34:06-37:04, 273:297:18, 994:031001:21, 1114:03-1116:03 (discussing Mtn. Dkt. No. 753-087).

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89 Witness List/Notice of Prior Art do not give adequate notice as to the prior art issues (and corresponding witnesses) to be addressed at trial.24 This problem was exacerbated here by the Respondents failure to detail the relevance of these witnesses to the investigation at even a high level prior to service of their July 20, 2011 invalidity expert report of Dr. Hajimiri, nine days after the close of fact discovery on July 11, 2011. See Resp. Pet. 53 (describing Respondents limited supplementation of interrogatory responses prior to the close of fact discovery). For at least these reasons, OUII respectfully submits that it was not an abuse of discretion for the presiding Judge to exclude certain of Respondents prior art witnesses from trial. The Respondents corresponding petition for review should therefore be denied. IV. RAMBUSS LICENSING-BASED DOMESTIC INDUSTRY In OUIIs view, a preponderance of the evidence supports the finding in the ID that Rambus has made a substantial investment in a licensing-based domestic industry under Section 337(a)(3)(C). See ID at 347-364. The Respondents petition for review as to this issue should be denied accordingly. A. Background

This is not the first investigation to address Rambuss licensing program. Rather, the presiding Judge previously found in the 661 investigation that Rambus made substantial investments in a licensing-based domestic industry as to the same Barth I patents that are again

See Certain Electronic Devices, Including Wireless Communication Devices, Portable Music and Data Processing Devices, and Tablet Computers, Inv. No. 337-TA-794, Order No. 40 (Mar. 12, 2012) (striking notice of prior art); Certain Wireless Communications System Server Software, Wireless Handheld Devices and Battery Packs, Inv. No. 337-TA-706, Order No.10 (June 10, 2010) (striking notice of prior art); Certain Mobile Communications and Computer Devices and Components Thereof, Inv. No. 337-TA-704, Trial Tr. 2151:22-2155:19 (Nov. 10, 2010) (striking documents purportedly describing a prior art system that were not adequately disclosed on a notice of prior art).

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90 asserted in this investigation.25 The Commission did not review those findings and has stood by them in a recent appeal to the Federal Circuit.26 Over a year after issuance of the 661 DI Op., but prior to the evidentiary hearing in this investigation, the Commission issued its Multimedia Display opinion in which the Commission provided guidance as to how a complainant can prove that it has made substantial investments in a licensing-based domestic industry with respect to specific patents within a portfolio of patents. See Certain Multimedia Display and Navigation Devices, Inv. No. 337-TA-694, Commn Op., 2011 ITC LEXIS 1416 (July 22, 2011). Notably, the Multimedia Display opinion favorably cites the 661 DI Op. for several different points. Examples include: Our administrative law judges have addressed the issue of whether a nexus between the activities and the asserted patents exists in prior investigations. See . . . Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controllers and Products Containing Same, Inv. No. 337-TA661, Order No. 21 (unreviewed) (Oct. 7, 2009) . . . . Multimedia Display, 2011 ITC LEXIS 1416 at *14, n. 5; Evidence demonstrating the relative value and/or importance of an asserted patent in a portfolio may indicate the focus of complainants investment and, in turn, may reflect the strength of the nexus between these activities and the asserted patent. See . . . Semiconductor Chips Having Synchronous DRAM Controllers at 7-9 (finding a nexus where an asserted patent was part of a particular patent portfolio where complainant had different portfolios for different technologies) . . . . Multimedia Display, 2011 ITC LEXIS 1416 at *18 n.6; [T]he asserted patent may be shown to be particularly important or valuable within the portfolio where there is evidence that (1) it was discussed during the licensing negotiation process, (2) it has been successfully litigated before

Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controllers And Products Containing Same, Inv. No. 337-TA-661, Order No. 21 (Oct. 7, 2009) (unreviewed ID) (661 DI Op.) See Exhibit 4 (Aug. 11, 2011 Rule 28j Letter From The Commission To The Federal Circuit) to Opposition of the Commission Investigative Staff To Respondents Motion For Summary Determination That Rambus Has Not Satisfied The Domestic Industry Requirement Of 19 U.S.C. 1337 With Respect To Any Of The Asserted Patents (Aug. 22, 2011).
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91 by complainant, (3) it relates to a technology industry standard, (4) it is a base patent or a pioneering patent, (5) it is infringed or practiced in the United States, or (6) the market recognizes its value in some other way. See . . . Semiconductor Chips Having Synchronous DRAM Controllers at 6-9 (finding that complainant's technology which is licensed is in fact covered by the asserted patents and noting that complainant highlighted the asserted patents during actual licensing negotiations) . . . . Multimedia Display, 2011 ITC LEXIS 1416 at *18 n.7; and When a complainants licensing activity is performed and directed within the United States, this weighs in favor of a strong nexus between the activities and the United States. See . . . Semiconductor Chips Having Synchronous DRAM Controllers at 5, 8 (noting that complainant's licensing activities are based out of its headquarters in the United States). Multimedia Display, 2011 ITC LEXIS 1416 at *24 n. 11.

Consistent with this precedent and with his prior findings in the 661 DI Op., the presiding Judge in this investigation found that Rambus has again shown substantial investments in a licensingbased domestic industry as to the Barth I patents, and that such an industry also exists as to the newly asserted Dally patents. See ID at 347-364. The Respondents seek review of these findings.27 B. Application of Multimedia Display

Recognizing that Rambus has again asserted a licensing-based domestic industry in this investigation, the ID summarizes the relevant analysis as follows: [A] complainant seeking to rely on licensing activities must satisfy three requirements: (1) the investment must be an investment in the exploitation of the asserted patent; (2) the investment must relate to licensing; and (3) the investment must be domestic, i.e., it must occur in the United States.

Notably, another Judge at the Commission recently issued a public version of an initial determination that addresses a licensing-based domestic industry by an entity with a similar business model as Rambus. See Certain Liquid Crystal Display Devices, Including Monitors, Televisions, and Modules, and Components Thereof, Initial Determination, EDIS Doc. ID 726395 at 408-431 (Mar. 7, 2012). The Commission granted review of the domestic industry findings in that case but has not yet issued an opinion. See Certain Liquid Crystal Display Devices, Including Monitors, Televisions, and Modules, and Components Thereof, Notice of Commission Determination, EDIS Doc. ID 475864 at Questions 15-20 (Mar. 26, 2012).

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92 ID at 345 (citing Multimedia Display, 2011 ITC LEXIS 1416 at *11-12). The Respondents do not appear to dispute the fact that Rambuss showing [on domestic industry] met some minimum threshold on each factor . . . Instead, the Respondents argue that the ID erroneously treated each of these factors as binary determinations, rather than evaluating their relative strength or weakness. Resp. Pet. 67; see also id. at 68 ([S]imply making some showing on each Garmin factor is not enough to satisfy the domestic industry requirement.) (emphasis in original). OUII disagrees and addresses each factor individually below. 1. An Investment In The Exploitation Of The Asserted Patents

As the Commission explained in Multimedia Devices, evidence of the following four subfactors should be examined when determining whether a nexus exists between an asserted patent within a patent portfolio and a complainants licensing activities as to that portfolio: (1) the number of patents in the portfolio (ID at 348-349); (2) the relative value contributed by the asserted patent to the portfolio (ID at 350351); (3) the prominence of the asserted patent in licensing discussions, negotiations and any resulting license agreement (ID at 352-353); and (4) the scope of technology covered by the portfolio compared to the scope of the asserted patent (ID at 353-354). See Multimedia Display, 2011 ITC LEXIS 1416 at *16. OUII submits that to the extent that the Respondents challenge the factual determinations as to these four subfactors, the Respondents petition lacks merit. For example, the Respondents claim that the record is devoid of evidence from which Rambuss firm-wide licensing investments can be allocated to particular patents or to particular subportfolios of patents within its overall patent portfolio. See Resp. Pet. 69. However, the Commission does not require that such an allocation be made. See ID at 357-358 (quoting

PUBLIC VERSION

93 Multimedia Display, 2011 ITC LEXIS 1416 at 15-22). Moreover, the ID cites to revenue data of record from which such an allocation to at least particular subportfolios can be made to the extent one is nonetheless required. See, e.g., ID at 349 (citing CX-7616C.0003; CX-7617C.0004; CX-9547C, Smith Direct Q/A 151-156); ID at 360 (citing CX-4342C.0003; CX-9547C, Smith Direct Q/A 157-159). The Respondents fail to address this revenue data in their petition. The Respondents also argue that it is impossible to determine the relative importance of the asserted patents given the large size of Rambuss overall patent portfolio and the companys failure to track which licensees are licensed to particular patents in that portfolio. See Resp. Pet. 70. However, the Commission explained in Multimedia Devices that: the asserted patent may be shown to be particularly important or valuable within the portfolio where there is evidence that (1) it was discussed during the licensing negotiation process, (2) it has been successfully litigated before by complainant, (3) it relates to a technology industry standard, (4) it is a base patent or a pioneering patent, (5) it is infringed or practiced in the United States, or (6) the market recognizes its value in some other way. ID at 350 (quoting Multimedia Display, 2011 ITC LEXIS 1416 at *16-17. The ID addresses several of these factors with citations to corresponding evidence of record. See id. at 350-351 (Barth I discussion); id. at 360-361 (Dally discussion). Notable examples include unrebutted evidence that the asserted patents were explicitly discussed during licensing negotiations with several entities that ultimately took a license from Rambus, that the Barth I patents were successfully litigated in the prior 661 investigation, and that both the Barth I patents and Dally patents relate to technology industry standards. See id. The Respondents remaining arguments consist of eight bullet points that purportedly identify overwhelming [evidence] that the asserted patents were actually quite minor parts of Rambuss licensing efforts-even when only those licensing efforts that Rambus alleges include the asserted patents are considered. Resp. Pet. 71-72. These bullet points, however, merely cite

PUBLIC VERSION

94 to attorney argument in the Respondents briefs. No evidence of record is cited in this portion of the petition. Even assuming that such evidence was somehow relevant to the analysis, other evidence of record that is cited and discussed in the ID supports the above referenced findings in favor of a licensing-based domestic industry. Thus, the Respondents have failed to demonstrate a reasonable basis for granting review of this portion of the ID. 2. The Investments Relationship To Licensing

The extent to which the Respondents still dispute the IDs analysis and findings regarding the relationship of Rambuss investments to licensing is unclear. See ID at 354-356 (Barth I patents); id. at 362-363 (Dally patents). In post-trial briefing the Respondents took the position that Rambuss domestic industry investments should be discounted because it has a litigationdriven business model. RIB at 287 (quoting Kaplan, Tr. 1827:03-1828:07). The ID rejected this argument as contrary to the evidence of record and to prior statements by the Respondents that characterize Rambus as a licensing entity that attempts monetization of its intellectual property through licensing . . . activities. See ID at 355 (quoting Respondents Memorandum in Support of Motion to Compel Product of Licensing Documents, Mtn. Dkt. No. 753-056, EDIS Doc. ID 454832 at 1-2 (July 19, 2011) (emphasis added)). The Respondents now appear to argue that [a]ll but five of [the] presentations on which Rambus relies [to show the relative value of the asserted patents] were made to the respondents in this matter, and thus made with an eye toward litigation. Resp. Pet. 71. However, the Respondents cite to no evidence or legal precedent for their conclusion that subsequent litigation against a prospective licensee somehow converts a relevant licensing presentation into an irrelevant litigation document. Moreover, even assuming that certain of Rambuss licensing presentations indeed relate to litigation, OUII submits that litigation related investments can still be relevant to a domestic industry analysis. See John Mezzalingua Associates, Inc. v. U.S. PUBLIC VERSION

95 Intl Trade Commn, 660 F.3d 1322, 1329-1330 (Fed. Cir. 2011) (affirming a finding of no licensing based domestic industry in an investigation in which the Administrative Law Judge used a flexible framework to analyze the extent to which complainants litigation investments related to a domestic industry showing). Thus, the Respondents have failed to demonstrate a reasonable basis for granting review of this portion of the ID. 3. The Investments Relationship To The United States

The Respondents do not appear to dispute the fact that all of the domestic industry investments on which Rambus relies were made in the United States. See ID at 356 (Barth I patents); id. at 363 (Dally patents). 4. Conclusion

For the above stated reasons, the Respondents petition should be denied insofar as it relates to Rambuss licensing-based domestic industry. V. IMPORTATION [

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96 [

] VI. CONCLUSION For the reasons stated above, OUII submits that the Commission should not grant review of any issue beyond the unclean hands and standing issues noted in OUIIs petition for review. OUII thus opposes the private parties petitions to the extent that they seek review beyond these two issues.

Respectfully Submitted, /s/ Daniel L. Girdwood Lynn I. Levine, Director David O. Lloyd, Supervisory Attorney Daniel L. Girdwood, Investigative Attorney OFFICE OF UNFAIR IMPORT INVESTIGATIONS U.S. International Trade Commission 500 E Street S.W., Suite 401 Washington, D.C. 20436 202.205.3409 (ph) 202.205.2158 (fax) Confidential Version: Public Version: March 27, 2012 April 16, 2012

PUBLIC VERSION

Certain Semiconductor Chips And Products Containing Same CERTIFICATE OF SERVICE

Inv. No. 337-TA-753

The undersigned certifies that on April 16, 2012, he caused the foregoing (PUBLIC VERSION) COMBINED RESPONSE OF THE OFFICE OF UNFAIR IMPORT INVESTIGAOITNS TO THE PRIVATE PARTIES PETITIONS FOR REVIEW OF THE INITIAL DETERMINATION ON VIOLATION OF SECTION 337 to be filed with the Commission, served by hand (2 copies) on Judge Theodore R. Essex (including a courtesy .pdf copy to tamara.foley@usitc.gov), served by hand (1 copy) on Sidney Rosenzweig in the Office of the General Counsel (including a courtesy .pdf copy to sidney.rosenzweig@usitc.gov), and served upon the private parties (1 copy each) in the manner indicated below: Complainant Rambus Inc. Christine E. Lehman c/o Finnegan Henderson 901 New York Ave., N.W. Washington, D.C. 20001-4413 202.408.4000 (ph) 202.408.4400 (fax) ITC753-Service@finnegan.com Respondents Cisco Systems Inc., Oppo Digital Inc., and Audio Partnership PLC Thomas Pease c/o Quinn Emanuel 51 Madison Ave., 22nd Floor New York, N.Y. 10010 212.849.7000 212.849.7100 Via Email Via Email

Quinn-ITC-753@quinnemanuel.com 337-753Kenyon@Kenyon.com (secondary counsel for MediaTek, Oppo Digital, and Audio Partnership) ciscoITCclientTeam@winston.com (secondary counsel for Cisco) atessar@perkinscoie.com (secondary counsel for Cisco)

Respondents LSI Corp. and Seagate Technology Jonathan D. Link c/o Kilpatrick Townsend & Stockton LLP Suite 900 607 14th St., N.W. Washington, D.C. 20005 202.508.5800 (ph) 202.508.5858 (fax) lsirambusitc@kilpatricktownsend.com FM-LSI@fostermurphy.com Respondents ASUSTek Computer Inc., Asus Computer Intl Inc., and HewlettPackard Co., Andrew R. Kopsidas c/o Fish Richardson 1425 K Street, N.W. - 11th Floor Washington, D.C. 20005 202.783.5070 (ph) 202.283.7331 (fax) 337-753Fish@fr.com Respondents STMicroelectronics N.V. and STMicroelectronics Inc. Eric Rusnak c/o K&L Gates 1601 K Street, N.W. Washington, D.C. 20006 202.778.9000 (ph) 202.778.9100 (fax) STMicro_ITC753@klgates.com Via Email Via Email Via Email

Respondent Hitachi Global Storage Tech. Alexander J. Hadjis c/o Morrison & Foerster 2000 Pennsylvania Ave., N.W. Suite 600 Washington, D.C. 20006 202.887.1500 (ph) 202.887.0763 (fax) mofo753-service@mofo.com Respondent Garmin Intl Louis S. Mastriani c/o Adduci, Mastriani & Schaumberg LLP 1133 Connecticut Avenue, 12th Floor Washington, D.C. 20036 202.467.6300 (ph) 202.466.2006 (fax) GAR-3@adduci.com /s/ Daniel L Girdwood Office Of Unfair Import Investigations U.S. International Trade Commission 500 E Street, S.W., Suite 401 Washington, D.C. 20436 202.205.3409 202.205.2158 (Facsimile) Via Email Via Email