Formal Languages and Automata

Lecture 6 Suresh Manandhar

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Building a vending machine

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Todays lecture - Applications Finite automata with output Moore Machines Mealy Machines
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Ref. Cohen Chap. 8

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Finite automata with output : Moore Machines Moore machines are essentially DFA with states emitting output symbols Finite automata with output : Mealy Machines Emits one extra symbol - i.e. one symbol more than the input
b a
q0/0 q1/0

Same as Moore machines but with transitions emitting output symbols Example 1 : 1s complement
b 0/1, 1/0
q3/1

a a

q2/0

a b

q0

automata counts the number of aabs in a string

Modelling a sequential circuit

Increment machine Task : Given a k-bit binary number n Output the k-bit binary number corresponding to n + 1 Ignore overow Say we want to increment the number 1011 We feed the number in reverse - rst 1 then 1 then 0 then 1 into the following Mealy machine
0/0, 1/1 0/1 q0 1/0 owe carry 1/0 no carry

input

NAND

DELAY

OR

output

OR

Four states in the circuit:

q0 q1 q2 q3

is A = 0, B = 0 is A = 0, B = 1 is A = 1, B = 0 is A = 1, B = 1

Circuit behaviour:
0/1

Let the new input recieved be 0 or 1 New B = old A New A = (input) NAND (old A OR old B) output = (input) OR (old B)
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Circuit behaviour (copied from previous page): Let a new input be recieved 0 or 1 New B = old A New A = (input) NAND (old A OR old B) output = (input) OR (old B) Suppose we are in state q0 and we recieve input 0 New B = 0 New A = (0) NAND (0 OR 0) = 0 NAND 0 = 1
input

Practical questions
1. Write down another version of the increment machine which has only two states. 2. Draw a Mealy machine equivalent to the following sequential circuit.

OR

DELAY

AND

output

OR

output = (0) or (0) = 0

q0 1/1 0/1 q1 1/1 1/1 q3 0/1 0/0 q2 0/0, 1/1

3. Design a machine to perform a parity check on the input string; that is, the output string ends in 1 if the total number of 1-bits in the input string is odd and 0 if the total number of 1-bits in the input string is even (only the last bit of the output string is used) 4. Given a bit string of length n, the shift-left-cyclic (SLC) operation places the rst bit at the end, leaving the rest of the bits unchanged. For example, SLC(100110) = 001101. (a) Build a Mealy machine with input and output alphabet f0; 1; $g such that for any n-bit string x when we input the n + 1-bit string x$, we get as output the n + 1-bit string $ SLC(x). (b) Explain why this cannot be done without a $
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One behaviour we can observe from the diagram is: a sequence of two 0s takes us to state q3