Journal of the Korean Physical Society, Vol. 54, No. 1, January 2009, pp.

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Stability Issues of RF System for PAL XFEL

tF F OhD F rF HwangD F F ParkD F rF KimD F tF HanD F hF JangD F qF SonD F tF Kwon nd tF rF Suh
Pohang Accelerator Laboratory, Pohang University of Science and Technology, Pohang 790-784

(Received 21 August 2008) The PAL (Pohang Accelerator Laboratory) is persuading to build an X-ray FEL (free electron laser) facility (PAL XFEL), of which the stable electron beam is essential. The beam energy stability is governed by an accelerating RF eld. The stable charging power supply is mostly responsible to the stable RF eld. Therefore, we are developing ultra stable klystron modulators. In addition, the slow drift of RF phase due to the thermal eect is to be compensated by a phase feedback system. This paper shows on-going R&Ds for two types of stability improvement schemes and a phase feedback system.

PACS numbers: 29.17.+w Keywords: PAL XFEL, Energy stability, Stable charging, Phase feedback
I. INTRODUCTION II. STABILITY OF K-LINAC MODULATOR

ev piv is Rth genertion light soure tht is oherent Ery free eletron lser y utilizing n existing PFSEqe lin IF his soure is sed on the priniple of elf emplied pontneous imission @eiAD singleE pss highEgin pivF fy dding n p photoEthode gunD two unh ompressors nd IFPEqe End inE jetor lin to the existing PFSEqe v linD the v lin n e onverted to ei piv fility whih supplies oherent Ery down to HFQEnm wvelengthF he lin system is hrterized y two groupsD Elin nd uElin s shown in pigure IF he Elin is new IFPE qe lin nd the uElin is the existing PFSEqe linF he p stility is key issue to get stle ei outputF he jitter requirement of system prmeters for ev piv is sed on the following riteri of piv perE formneX pekEtoEpek hnge in ei wvelength less thn HFS 7D pekEtoEpek hnge in sturtion length less thn IH 7D pekEtoEpek hnge in sturtion power less thn RH 7 nd pekEtoEpek hnge in unh rrivl time less thn SH fsF le I shows the w tolerne of key prmeters for ev piv to meet the jitter requirement PF e low level p drive system nd klystronEmodultors hve to e upgrded to provide stle operting ondiE tionsF he stility level of the modultor hs to e improved IH times etter to meet the strit pulse stE ilityF his pper shows the suitle upgrde sheme of the modultors nd design onsidertions for the stilE ity improvement of klystronEmodultors for ev pivF

es the existing modultors of uElin re using trdiE tionl resonnt hrging sheme to hrge px @pulse forming networkAD the hrging stility is diretly fE feted y the hg voltge stilityF he hrging voltge regultion of uElin is done y deEing system to the seondry side of hrging hokeF he deEing iruit shown in pigure P is onventionl method to regulte the px hrging voltge QF he omprtor in the deEing ontroller genertes n output pulse to trigger the g when the desired px voltge rehes the trE get voltgeF he energy left in the hrging hok t tht time is nlly dissipted in the lod resistors of the deEing iruitF he trget level is normlly djusted to few perent less thn the mximum voltge without deEing ontrolF he tehnil detils of the deEing system re desries in eferene RF px voltge wveforms mesured y IHDHHH X I diE vider re shown in pigure QF he stility is mesured y umulting the hrging wveform for IH minutes t repetition rte of QH rzF hen the deEing ontroller is not tivtedD the stility is out w SDHTU w
Table 1. Tolerance of key parameters for PAL XFEL. Bunch timing Bunch charge Bunch compressor eld Accelerating gradient Accelerating phase -32880 fs 1% 70 PPM 200 PPM 0.02

E-mail: jsoh@nfri.re.kr; Fax: +82-42-719-1099

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Fig. 1. Linac conguration for PAL XFEL.

Fig. 2. Circuit diagram of de-Qing system.

@pigure Q@AD men vlue a QTFW kD stndrd devition a IVU AF ith the id of deEingD the vrition meE sured is redued to w ISR w @pigure Q@AD men vlue a QRFS kD stndrd devition a SFQI AF he vriE tion of px hrging voltge meets the requirementF he deEing ontroller will e pplied to the ll the uE lin modultorsF
III. STABILITY OF X-LINAC MODULATOR

Elin modultors re intended to dopt hrging sheme tht uses onstnt urrent soure suh s n

inverter power supply euse it provides high reliilE ityD omptness nd stility SF hese fetures re well mthed to the next genertion modultor for ev piv filityF pigure R shows the shemti digrm of the klystronEmodultor inluding orse invertersD ne inverterD p driverD klystronD thyrtron swith of the modultorD digitl inverter ontrollerD high voltE ge proe nd mster timing ontroller @hqSQSAF ell the hrging inverters re onneted in prllel to the pxF he orse inverters hrge the px up to WW 7 of the trget hrging levelF he ne inverter will hrge to the trget voltge nd then regultes the hrged levelF he inrement of the px hrging voltge per inverter

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Journal of the Korean Physical Society, Vol. 54, No. 1, January 2009

Fig. 3. Stability of PFN charging voltage: horizontal = 100 s/div, C1 = Expanded view of PFN voltage, C2 = PFN voltage (20 kV/div), (a) de-Qing O (C1 = 1 kV/div), (b) de-Qing On (C1 = 100 V/div).

Fig. 4. Circuit diagram of a modulator adopting an inverter power as a PFN charging power supply.

Fig. 5. Regulating waveform of PFN voltage at the level of 10 kV with a PFN capacitance of 1.4 F. The accumulation time for statistical distribution of PFN voltage is 1 hour.

swithing yleD VPFN is given y VPFN a Idc =@CPFN fSW A a VPFN =@TC fSW A @IA where Idc is n verge hrging urrentD CPFN is px pitneD fSW is swithing frequeny nd TC is hrging timeF e hve to redue hrging urrent or inrese swithing frequeny in order to mke the hrgE ing step smllF he hrging urrent hs to e lrge enough to hrge the px to the trget level within the hrging time limited y pulse repetition rteF he swithing frequeny is lso limited to less thn IHH krz due to the swithing loss of the solid stte devies used in the inverterF hereforeD the px hrging voltge stility is usully round HFI 7 for IHH rz operting onditionF pigure S shows typil exmple of the regE ultion wveform of stndrd inverterD whih results QH @pekEtoEpekA utution tht is equivlent to TUH

w @pekEtoEpekA t RS k with the px pitne of IFR p nd verge hrging urrent of IFV eF he hrging voltge is not rising smoothly nd monoE tonilly ut inludes highEfrequeny spikesF he spike is mde y the iruit omponents onneted in prllel to the pulse trnsformer TF he noisy spikes hve to e removed for the feedk iruit to orretly ompre the hrging level with referene levelF he onditionE ing of feedk signl removes the spiky omponent y the lowEpss lter given y 2 $o H @ sA a 2 @PA 2 s C P&$o s C $o where !o is utEo frequeny nd  is dmping ftorF rowever it results phse dely of feedk signlF his uses the limittion of ne regultion of the hrge level s shown in pigure T tht shows the detil struture of

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Fig. 6. Detail structure of charging regulation. Fig. 8. PWM mode and charging regulation.

@pekEtoEpekA with px pitne of HFS pD whih is equivlent to the stility of RHH w @pekEtoEpekA t the typil hrging level of RS kF purther improveE ment of the hrging regultion is done y reduing the step size itselfF w @pulse width modultionA is typE il method for the step size ontrolF efter px voltge rehes the trget levelD hrging revel is regulted y smller step with w modeF pigure V shows the eet of w mode on the regultion of hrging levelF urnE ing on the w mode improves the regultion down to U @pekEtoEpekAD whih is equivlent to the stility of w IST w @pekEtoEpekA t the hrging level of RS kF
Fig. 7. Digital control of charging regulation.
IV. STABILITY OF RF PHASE

hrging regultionF he feedk signl in pigure T is ltered with utEo frequeny of P krz nd dmping ftor of HFUF sn order to overome the phse orretion diulties of n nlog feedkD we dopt digitl ontrollerF he digitl ontroller nturlly requires digitl referene ommnd for hrging level of the pxD whih is useful to keep stle referene free from ny therml drift nd hrmful noiseF e hEsed digitl ontroller is develE oped for the reliztion of highly stle inverter hrging systemF his ontroller hs highEresolution IVEit ehg @ehUTQRA nd highEspeed h @wQPHpPVIIAF here is lso ertin mount of overshoot due to the phse dely of the digitl lterD whih lso mkes the regultion poor t the trget hrging levelF es one hrging pulse is enough to reover hrging levelD only one hrging ommnd is llowed y h lok then next pulses re loked for whileF efter suitle setE tling timeD we n orretly see the hrging level tht is to e ompred with trget level s shown in pigure UF he hrging step y single hrging pulse is IV

he temperture ontrol of elerting struture is neessry to mintin the phse veloity of the eletroE mgneti wve in the elertor equl to the veloity of lightF he phse shift  etween the eletrons nd the wve is given y  a P Qo T @QA where o a unloded vlue of elerting olumn @IQDHHHAD  a ttenution oeient @$HFSUA nd5  a liner oeient of therml expnsion @IFTS IH A QF xorml ooling ondition of elerting olumn is onE trolled within HFP gF nder this onditionD the phse nE gle n e hnged up to PFV whih results energy drift of IDPHH wF pigure W shows the em energy vrition eted y ooling temperture vrition of elerting olumnsF he mesured energy drift is out QVHH w with the ooling temperture vrition of HFPS g during Q hoursD whih mens tht the drift is resulted y not only n elerting struture ut lso other p devies suh s p pulse ompressor nd klystronF

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Fig. 9. Beam energy drift vs. temperature drift of an accelerating column at 2.5-GeV beam energy.

Fig. 10. Test setup for phase feedback system of SSA.

Fig. 11. Phase feedback results of pulsed 2856 MHz SSA by digital phase measurement system (upper = phase change, lower = temperature drift), (a) Without phase feedback, (b) With phase feedback.

he slow drift of p phse due to the temperture vritions mkes em energy driftF e phse ontrol system is needed to ompenste the em energy driftF e prepred the phse feedk system nd tested its performneF st onsists of digitl mesurement sysE tem nd n nlogue phse shifter s shown in pigure IHF he digitl detetor system onsists of lol osE illtorD p ominer nd p digitizer s module mde y eeroex goF UF he referene g PVST wrz signl nd pulsed signl re dded y the p ominerF he phse of the pulsed PVST wrz signl is otined y omprison of g signl with g C pulsed PVST wrz signlF he phse of THHEwtts e @solid stte mpliE erA with pulsed PVST wrz signl is ompred with g PVST wrz referene signlF he phse hnge y the temperture vrition is ompensted y the nlogue phse shifter of whih phse is ontrolled y the s

ontrollerF he phse hnge without feedk system is out {PFSTGg s shown in pigure II@AF ith phse feedk systemD the phse drift relted to the temperE ture hnge is ompenstedF he rndom phse uE tution of e output is limited within w HFHPI s shown in pigure II@AF
V. SUMMARY

he stle em energy is essentil for Ery piv nd it requires stle p systemF gritil requirements on p stility for ev piv re the mplitude stilE ity within w PHH w nd the phse stility within w HFHP F 8h eorts for stility improvement re going on nd the present results re s followsX @IA w

Stability Issues of RF System for PAL XFEL { J. S. Oh et

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-333[2] Y. Kim et al., Proc. FEL2004 (Trieste, 2004). [3] R. B. Neal, The Stanford Two-Mile Accelerator, edited by W. A. Benjamin (New York, Amsterdam, 1968), p. 427. [4] S. H. Kim et al., The Fourth Asian Accelerator Conference (APAC2007) (Indore, 2007). [5] J. S. Oh et al., The XXI International LINAC Conference (Gyeongju, 2002). [6] J. S. Oh et al., Proc. FEL2006 (Berlin, 2006). [7] www.aero ex.com

ISR w stiliztion of uElin modultor y deEing ontroller @PA IST w @pekEtoEpekA stiliztion of n inverter hrging @QA HFHPI phse stiliztion of e output with phse feedkF
REFERENCES

[1] I. S. Ko, Proc.

FEL2005

(San Francisco, 2005).