Introduction To uCOS II V2 6 M11

Introduction to uCOS-II V2.
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Amr Ali Abdel-Naby@2010
Introduction to uCOS-II V2.6
About Me
Graduated 2004
ECE, ASU: 5 yrs distinction
5+ years in embedded systems development

SDLC, Apps, MW, DD, Porting, ...
3+ years in SW engineering
PSP, CMMI, Systematic reuse, ...
3+ years in SW testing
IBM certified, ISTQB certified, ...
Copyright
Materials in this course is the property of Amr Ali Abdel-Naby. Reproduction or transmission of the materials in any manner without the copyright owner permission is a law violation.
Course References
MicroC/OS-II The Real-Time Kernel, 2nd Edition, by Jean J. Labrosse
Obtaining the Status of a Semaphore, OSSemQuery

INT8U OSSemQuery (OS_EVENT *pevent, OS_SEM_DATA *pdata)
pevent: A pointer to the desired semaphore pdata: A pointer to the returned semaphore information Return value:
No error pevent is not a semaphore. pevent is null.
Now lets see OSSemQuery in os_sem.c
Porting C/OS-II
Outline
Introduction Development Tools Directories & Files INCLUDES.H OS_CPU.H OS_CPU_C.C OS_CPU_A.ASM Testing a Port Lab 8: 80x86 Port Real Mode, Large Model with Emulated Floating Point Summary
Outline
What is Porting?
The process of adapting SW so that an executable program can be created for a computing environment that is different from the one for which it was originally designed for
Porting in PC World
x86 is the dominant CPU architecture.
A lot of SW are never ported to different CPUs.
Windows & a Unix flavor are the dominant operating systems. International standards facilitate porting in the PC world.
ISO, POSIX,
Porting is rare in our world.
Porting for Embedded Systems World

Embedded systems are custom by nature.
CPUs Operating systems ...
Portability is a significant problem.
Layered Architecture & Porting

Application SW
Application Porting
Middleware
Middleware Porting
Operating System
OS Porting
Firmware / Device Drivers
HW
OS Porting
The most difficult type. OS provides HW abstraction. Needs solid HW Knowledge as well as solid HW knowledge
Types of OS Porting
OS Porting
Architecture
Basic Board BSP
Architecture Porting
The main task of OS is to support multitasking. Thus, architecture porting is about context switch & exceptions handling.
Context Switch
Volatile state of the CPU
CPU registers + MMU if OS is process based
Task A Stack(memory)
cpsr r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r14 (lr) r15 (pc) Task A TCB Stack ptr CPU Core Task B TCB Stack ptr
Task B Stack(memory)
cpsr r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r14 (lr) r15 (pc)
CPU Register
Save
Current running
Restore
Scheduling Decision Made
Context Switch
Task B
Context Switch Overhead
Task A Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6
Exceptions Handling
Board Porting
Basic board porting
Check proper board operation Function the minimum needed peripherals
Memory ICU PLL Timer I/O
Board Support Package

Boot loader + Device drivers Minimum BSP is the basic board porting.
C/OS-II Porting Prerequisites

CPU support interrupts. CPU can generate interrupts at regular rates. Interrupts can be enabled and disabled. CPU supports HW stack. CPU can load & store stack pointer & CPU registers.
C/OS-II Kernel Architecture

Application SW (Your Code)
C/OS-II (Processor Independent code)
C/OS-II Configuration (Application Specific)
C/OS-II Port (Processor Specific Code) HW
Outline
Development Tools Requirement

ANSI C compiler
Reentrant compiler
Assembler
== C compiler with
Inline assembly Registers manipulation from C
Saving & restoring registers
Linker
To combine object codes
Locator
To place code & data anywhere in the memory map of the target CPU
Outline
Directory Guideline
uCOS-II\CPU\Tool Chain
\OS_CPU.H \OS_CPU_A.ASM \OS_CPU_C.C
For example:
uCOS-II\ARM\ADS1.2 \OS_CPU.H \OS_CPU_A.ASM \OS_CPU_C.C
Outline
INCLUDES.H
Every C file should include it. == Master include file
Advantage: No need to worry about include files Disadvantage: Compilation times increase
Add needed includes at its end.
Outline
OS_CPU.H
Contains compiler specific typedefs Contains processor specific #define constants & macros
Data Types
typedef ?? BOOLEAN; typedef ?? INT8U; typedef ?? INT8S; typedef ?? INT16U; typedef ?? INT16S; typedef ?? INT32U; typedef ?? INT32S; typedef ?? FP32; typedef ?? FP64; typedef ?? OS_STK; typedef ?? OS_CPU_SR;
Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6
Processor Specifics
#define OS_CRITICAL_METHOD ?? #if OS_CRITICAL_METHOD == 1 #define OS_ENTER_CRITICAL() ?? #define OS_EXIT_CRITICAL() ?? #endif #if OS_CRITICAL_METHOD == 2 #define OS_ENTER_CRITICAL() ?? #define OS_EXIT_CRITICAL() ?? #endif #if OS_CRITICAL_METHOD == 1 #define OS_ENTER_CRITICAL() ?? #define OS_EXIT_CRITICAL() ?? #endif #define OS_STK_GROWTH ?? #define OS_TASK_SW() ??
Critical Sections Method 1

Not adequate implementation
#define OS_ENTER_CRITICAL()\ asm (DI) #define OS_EXIT_CRITICAL()\ asm (EI)
Interrupt state may differ before & after the critical section.
Interrupts are disabled
Interrupts are enabled
OS_ENTER_CRITICAL
OS_EXIT_CRITICAL

May not be supported by:
Your processor
No HW stack Addressing mode is relative.
#define OS_ENTER_CRITICAL()\ asm (PUSH PSW)\ asm (DI) #define OS_EXIT_CRITICAL()\ asm (POP PSW)
Your tool chain

Compiler does not support inline assembly. Compiler does not optimize inline assembly.

Compiler must support
Storing PSW in a C variable cpu_sr = get_processor_psw();\ Loading PSW from a C variabledisable_interrupts(); #define OS_EXIT_CRITICAL()\ Disabling interrupts from C
set_processor_psw(); #define OS_ENTER_CRITICAL()\
OS_CPU_SR cpu_sr; ... OS_ENTER_CRITICAL(); /* Critical Code */ OS_EXIT_CRITICAL();
Stack Growth
Some stacks grow from high-to-low memory. Others grow from low-to-high memory. #define OS_STK_GROWTH is defined to handle both models.
Set OS_STK_GROWTH to 0 for low-to-high memory stack growth. Set OS_STK_GROWTH to 1 for high-to-low memory stack growth.
OSInit & OSTaskStkChk need to know stack growth. Context switch algorithms need to know stack growth.
Task Switching
OS_TASK_SW performs task level context switch. In C/OS-II, the stack frame for a ready task always looks as if an interrupt has just occurred & all processor registers are saved onto it. OS_TASK_SW is used to simulate an interrupt. CPUs provide a SWI or trap instructions to accomplish this task. The ISR or trap handler must vector to OSCtxSw.
Outline
OS_CPU_C.C
A C/OS-II port requires rewriting 10 simple C functions. OSTaskStkInit
Only required function, the other 9 must be declared but can be empty
OSTaskCreateHook OSTaskDelHook OSTaskSwHook OSTaskIdleHook OSTaskStatHook OSTimeTickHook OSInitHookBegin OSInitHookEnd OSTCBInitHook
OSTaskStkInit
Called by OSTaskCreate & OSTaskCreateExt to initialize stack frame of the task
The stack looks as if an interrupt has just occurred & all the processor registers have been pushed onto the stack.
OS_STK * OSTaskStkInit(void(*task)(void*pd), void * pdata, OS_STK * ptos, INT16U opt){ 1 Simulate call to function with an argument(pdata); 2 Simulate ISR Vector; 3 Setup stack frame to contain desired initial values of all registers; 4 Return new top of stack pointer to caller; }
OSTaskStkInit contd
Stack-frame initialization with pdata passed to the stack.
Low Memory
3 Saved Processor Registers 3 Interrupt Return Address 2 Processor Status Word Task Start Address 2 1 pdata
4 Stack Pointer
High Memory
Stack Pointer = ptos
OSTaskStkInit contd
Stack-frame initialization with pdata passed in a register.
Low Memory
Saved Processor 3 Registers pdata Interrupt Return Address 2 2 Processor Status Word 1 Task Start Address
4 Stack Pointer
High Memory
Stack Pointer = ptos
OSTaskCreateHook
Called by OS_TCBInit whenever a task is created Called with interrupts enabled It receives a pointer to the OS_TCB of the task being created & can access all its structure members. It has limited capability when the task created by OSTaskCreate. With OSTaskCreateExt, it has access to the TCB extensions.
You can access information about task registers, MMU registers, task counters, & debug information.
OSTaskDelHook
Called by OSTaskDel whenever a task is deleted Called with interrupts disabled It receives a pointer to the OS_TCB of the task being deleted & can access all structure members. It is responsible for performing extra clean-up operations.
OSTaskSwHook
Called whenever a task switch occurs Executed with interrupts disabled It can access OSTCBCur & OSTCBHighRdy.
OSTaskIdleHook
Called by OS_TaskIdle Many CPUs have power-down mode. CPUs exit power-down mode by interrupts. This function can make use of this feature.
OSTaskStatHook
Called once every second by OSTaskStat It can extend statistics capability.
For example, display statistics on screen
OSTimeTickHook
Called by OSTimetick every system tick It is executed before actual processing to give the port the 1st claim of the tick.
OSInitHookBegin & OSInitHookEnd

OSInitHookBegin
Called immediately upon entering OSInit It allows extending OSInit with port specific code. It assists initialization encapsulation.
OSInitHookEnd
== OSInitHookBegin but called just before exiting OSInit
OSTCBInitHook
Called by OS_TCBInit & before the call of OSTaskCreateHook It initializes TCB related data. OSTaskCreateHook initializes task related data. There can be difference between them. It is up to the port whether to populate both initializations or not.
Outline
OS_CPU_A.ASM
A C/OS-II port requires rewriting 4 simple assembly functions:
OSStartHighRdy OSCtxSw OSIntCtxSw OSTickISR
If your compiler supports in-line assembly, you could place these functions in OS_CPU_C.C.
OSStartHighRdy
Called by OSStart to start the highest priority task ready to run
void OSStartHighRdy(void){ Call user definable OSTaskSwHook(); OSRunning = TRUE; Get the stack pointer of the task to resume: stack pointer = OSTCBHighRdy -> OSTCBStkPtr; Restore all processor registers from the new tasks stack; Execute a return from interrupt instruction; }
OSCtxSw
A task level context-switch is done by issuing a SW interrupt instruction. The interrupt must vector to OSCtxSw.
void OSCtxSw(void){ Save processor registers; Save the current tasks stack pointer into the current tasks OS_TCB: OSTCBCur -> OSTCBSTkPtr = Stack Pointer; OSTaskSwHook(); OSTCBCur = OSTCBHighRdy; OSPrioCur = OSPrioHighRdy; Get the stack pointer of the task to resume: Stack pointer = OSTCBHighRdy -> OSTCBStkPtr; Restore all processor registers from the new tasks stack; Execute a return from interrupt instruction; }
OSCtxSw contd
LPT calls a C/OS-II service LPT C/OS-II service OS_Sched OSCtxSw Context is performed & HPT runs
OS_TASK_SW C/OS-II service makes HPT ready Invoke an interrupt which vectors to OSCtxSw Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6
HPT
OSTickISR
void OSTickISR(void){ Save processor registers; Call OSIntEnter() or increment OSIntNesting; if (OSIntNesting == 1) OSTCBCurPtr -> OSTCBStkPtr = Stack Pointer; Clear Timer; Re-enable interrupts (optional); OSTimeTick(); OSIntExit(); Restore processor registers; Execute a return from interrupt instruction; }
OSIntCtxSw
Called by OSIntExit to perform interrupt level context switch, if needed Does half context only OSInctCtxSw == Jumping to proper location in OSCtxSw
void OSIntCtxSw(void){ OSTaskSwHook(); OSTCBCur = OSTCBHighRdy; OSPrioCur = OSPrioHighRdy; Get the stack pointer of the task to resume: Stack pointer = OSTCBHighRdy -> OSTCBStkPtr; Restore all processor registers from the new tasks stack; Execute a return from interrupt instruction; }
Outline
Testing a Port Is
More complicated than writing a port Done without application code
KISS If bugs occur, it is 100% from the port code.
Done with 2 simple tasks & ticker ISR
Testing a Port Can Be Done with

A source level debugger
Luxury Easy Change with environment Expensive
Go/No Go Testing with a peripheral

A led for example Not fancy More time consuming Cheap
Recommended Scenario
1. Verify OSTaskStkInit & OSStartHighRdy 2. Verify OSCtxSw 3. Verify OSIntCtxSw & OSTickISR
Verifying OSTaskStkInit & OSStartHighRdy Source Level Debugger

1. Disable statistics task. 2. Load source code to your debugger. 3. Step to OSStart. #include includes.h 4. Step into OSStart. 5. Step to OSStartHighRdy. void main(void){ OSInit(); Your Code!!! OSStart(); 6. Step into this code. } 7. This code should populate the registers in reverse order of OSTaskStkInit. 8. Your code should end with OS_TaskIdle.
Verifying OSCtxSw Source Level Debugger

1. Load source code into your debugger. includes.h 2. Step to OSTimeDly. #include TestTaskStk[100]; OS_STK 3. Step into OSTimeDly. void main(void){ 4. Step to OS_Sched. OSInit(); OSTaskCreate(TestTask, 0, &TestTaskStk[99], 0); 5. Step into OS_Sched. OSStart(); } 6. Step to OSCtxSw. 7. Step into OSCtxSw.
Your code!!! Context of test task should should be loaded.
This will cause an interrupt that must vector to OSCtxSw.

void TestTask(void * pdata){ pdata = pdata; while(1) OSTimeDelay(1); } be saved & that of OS_TaskIdle
8. Your code should end with OS_TaskIdle.
Verifying OSIntCtxSw & OSTickISR Source Level Debugger

1. Set up an interrupt vector for the clock tick ISR. 2. Initialize the clock tick & enable interrupts.
#include includes.h OS_STK TestTaskStk[100]; void main(void){ OSInit(); Install clock tick interrupt vector; OSTaskCreate(TestTask, 0, &TestTaskStk[99], 0); OSStart(); } void TestTask(void * pdata){ pdata = pdata; Initialize clock tick interrupt then enable interrupts; device_state = OFF; while(1) { OSTimeDly(1); if (device_state == OFF) device_state = ON; if (device_state == ON) device_state = OFF; } Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6 }
Verifying OSTaskStkInit & OSStartHighRdy Go/No Go

Same test code as Verifying OSTaskStkInit & OSStartHighRdy Source Level Debugger But OSTaskIdleHook will be modified.
void OSTaskIdleHook(void){ if (device_state == OFF) device_state = ON; if (device_state == ON) device_state = OFF; }
Verifying OSCtxSw Go/No Go

Same test code as Verifying OSCtxSw Source Level Debugger But OSTaskIdleHook will be modified as in Verifying OSTaskStkInit & OSStartHighRdy Go/No Go
Verifying OSIntCtxSw & OSTickISR Go/No Go

Same as Verifying OSIntCtxSw & OSTickISR Source Level Debugger
Outline
Lab 8: 80x86 Port Real Mode, Large Model with Emulated Floating Point
Please follow the instructions in the lab handout
Outline
Summary
Porting Porting C/OS-II

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