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Data transfer group Arithmetic group Bit manipulation group String instruction group Program transfer group Process control instruction group
4.Flag transfer LAHF (load AH register from flags) SAHF (store AH in flags) PUSHF (push flags onto stack) POPF (pop flags off stack)
PUSH source
Mnemonics :PUSH source Flags: no flags affected Algorithm: sp<--sp-2 Addressing mode: Register Addressing mode Operation: sp=sp-2 Examples: PUSH AX Explanation: copy word from AX reg to the location in (SS) stack segment where (SP) Stack pointer points. SS Data from specifies source
POP destination
Mnemonics :POP destination Flags: no flags affected Algorithm: sp<--sp+2 Addressing mode: Register Addressing mode Operation: sp=sp+2 Examples: POP AX Explanation: SS Data copied to destination .
Mnemonics :LDA register ,source Flags: no flags affected Algorithm: Registersource DS (source+2) Addressing mode: Register direct Addressing mode Operation: Registersource DS (source+2)
LDS (Load pointer with DS) Load register &DS with word from memory
LES (Load pointer with ES) Load register &ES with word from memory
Mnemonics :LEA register ,source Flags: no flags affected Algorithm: Registersource ES (source+2) Addressing mode: Register direct Addressing mode Operation: Registersource ES (source+2)
FLAG transfer LAHF (load AH register from flag) (copy lower byte flag reg to AH)
Mnemonics :LAHF Flags: no flags affected Algorithm: AHflag registers lower byte Addressing mode: implied Addressing mode Operation: AH= flag registers lower byte In this the lower byte 8086 flag register copied to the the AH.
FLAG transfer SAHF (store AH register from flag) (copy content of AH to lower byte of flag register)
Mnemonics :SAHF Flags: all the flags changed Algorithm: AH changed flag registers lower byte Addressing mode: implied Addressing mode Operation: AH= flag registers lower byte
ARITHMETIC INSTRUCTION
ADDITION SUBTRACTION MULTIPLICATION DIVISION
1
2 3
register
register memory
register
memory register
4
5 6
register
memory accumulator
immediate
immediate immediate
AL =00110101 (5) ascii BL= 00111001 (9) ascii ADD AL&BL 0011 0101 (al) 0011 1001 (bl) 0110 1110 in ascii(al) 0000 0110 0111 0100
AL =00110101 (5) ascii BL= 00111001 (9) ascii ADD AL&BL 0011 0101 (al) 0011 1001 (bl) 0110 1110 in ascii(al) 0110 [1] 0000 0100
compare
Mnemonics: MUL source Flags: all the flags are change Algorithm: AX=AL*Operand (DX:AX)=AX*Operand Addressing mode: register addressing mode Operation: MUL CX
IMUL
Mnemonics: IMUL source Flags: all the flags are change Algorithm: same as previous Addressing mode: addressing mode Operation:
DIVISION DIV
Mnemonics: DIV source Flags: all the flags are change Algorithm: AL=AX/Operand (quotient) AH=remainder (modulus) AX=(DS:AX)/operand (quotient) DX= remaninder (mod) Addressing mode: addressing mode Operation:
IDIV
Mnemonics: IDIV Flags: all the flags are change Algorithm: same as before Addressing mode: register addressing mode Operation:
AND
Mnemonics: AND destination, source Flags: all the flags are change Algorithm: destination= destination AND source Addressing mode: register addressing mode AND AL ,BL
OR
Mnemonics: OR destination, source Flags: all the flags are change Algorithm: destination= destination OR source Addressing mode: register addressing mode OR AL ,BL
XOR
Mnemonics: XOR destination, source Flags: all the flags are change Algorithm: destination= destination XOR source Addressing mode: register addressing mode OR AL ,BL
TEST
Mnemonics:TEST destination,source Flags: all the flags are change Algorithm: destination= destination AND source Addressing mode: immediate addressing mode TEST AL ,02 Operation 1 AND 1 =1 1AND 0 =0 0AND 1 =0 0AND 0 =0
Mnemonics: SAL/SHL destination,source Flags: all the flags are change Algorithm: Bn+1Bn Bo 0 CFB7(B15) Addressing mode: immediate addressing mode
Mnemonics: ROL destination,source Flags: all the flags are change Algorithm: CFMSBLSB Addressing mode: addressing mode
Mnemonics: ROR destination,source Flags: all the flags are change Algorithm: CF MSBLSB Addressing mode: Immediate addressing mode
MOVS
Mnemonics: MOVSB/MOVSW Flags: No flags affected Algorithm: ES:[DI]=DS:[SI] If DF=0 SI=SI+1(SI=SI+2) DI=DI+1(SI=SI+2) Addressing mode: String addressing mode Operation:
CMPS
Mnemonics: CMPSB/CPMSW Flags: all the flags are change Algorithm: DS:[SI]-ES:[DI] Addressing mode: addressing mode Operation: