Documente Academic
Documente Profesional
Documente Cultură
System Bus
Memory
ALU Section
ALU Can Performs
Addition Subtraction Logical AND Logical OR Logical EXCLUSIVE OR Complement (logical NOT) Increment (add 1) Decrement (subtract 1) Left shift Clear
Register Section
General Purpose Registers
B Reg C Reg D Reg E Reg H Reg L Reg
Instruction Decoder
Decoder then takes instruction and decodes or interprets the instruction. Decoded instruction then passed to next stage.
System Bus
Address Bus Data Bus Control Bus
Unidirectional.
Information flows out of the microprocessor and into the memory or peripherals.
When the 8085 wants to access a peripheral or a memory location, it places the 16-bit address on the address bus and then sends the appropriate control signals.
The 8085 uses the data bus to transfer the binary information. Since the data bus has 8-bits only, then the 8085 can manipulate data 8 bits at-a-time only.
Control Bus
The control bus has various lines which have specific functions for coordinating and controlling microprocessor operations. 8085 has 11 control signals
s0, s1, IO/M, RD, WR, ALE, READY, HOLD, HLDA,
RESET IN, RESET OUT.
3 2
8085 is a 40 pin IC, DIP package. The signals from the pins can be grouped as follows
Power supply and clock signals Address bus Data bus Control Bus Interrupts signals Serial I/O ports DMA Signals Reset Signals
Address Bus:
A8 - A15 (output) It carries the most significant 8 bits of the memory address or the 8 bits of the I/O address;
In the subsequent IO / memory, read / write clock cycle the lines are
used as data bus. The CPU may read or write out data through these lines.
device.
Status Signals It is used to know the type of current operation of the microprocessor.
Interrupts
They are the signals initiated by an external device to request the microprocessor to do a particular task or work. There are five hardware interrupts called,
(High Priority)
(Low Priority)
Interrupts Contd
On receipt of an interrupt, the microprocessor acknowledges the interrupt by the active low INTA (Interrupt Acknowledge) signal.
Reset Signals
Reset In (input, active low)
This signal is used to reset the microprocessor. The program counter inside the microprocessor is set to zero. The buses are tri-stated.
DMA Signal
HOLD signal generated by the DMA controller circuit. Indicates that another master is requesting for the use of address bus, data bus and control bus. HLDA Signal this active high signal is used to acknowledge HOLD Request.
READY (input) Memory and I/O devices will have slower response compared to microprocessors. Before completing the present job such a slow peripheral may not be able to handle further data or control signal from CPU. The processor sets the READY signal after completing the present job to access the data The microprocessor enters into WAIT state while the READY pin is disabled.
It takes four instruction clock cycles to get one into the CPU.
Execution of an Instruction
Now consider the execution of a simple instruction:
Instruction 3E (hex) means: Load a data byte into the accumulator The instruction is followed by the data byte 32 (hex) Two-byte instruction !
Execution of an Instruction
39
Execution of an Instruction
40
Execution of an Instruction
41
Execution of an Instruction
42
44
Cont..
45
Cont..
46
A Simple Program
Add two hexadecimal numbers:
A Simple Program
48