SYSTEM ON CHIP (SOC)

Manipur Institute of Technology Takyelpat ECE,2011

Comparison between mP and mC

mP
It consists of only the processor on the chip and the remaining ckts are interfaced externally The speed of operation is comparatively less. Space and size requirements are large The number of instruction available is more. Higher flexibility Cost of final product is higher

mC
It consists of a processor and other ckts like memory, I/O ports, Timers etc. in single chip. Speed of operation is higher Space and size requirements are very less. The number of instructions available is less Less flexibility. Cost effective.

TYPES OF mC
General purpose mC :- They are design to used for general purpose applications. Embedded mC :- They are design to used only for specific applications.

Embedded System
Embedded system means the processor is embedded into that application. An embedded product uses a microprocessor or microcontroller to do one task only. In an embedded system, there is only one application software that is typically burned into ROM. Exampleprinter, keyboard, video game player, mobile phones, Electronic toys etc.

Devices where mC are used

Some vendors of 8-bit mC

INTEL : 80C51 ,80C71 ATMEL :- AT89CXX family or AT89CXX51,AVR TEXAS :-TMS 1000 DALLAS/MAXIM :- DS MOTOROLA MICROCHIP (PIC) :- 16FXXX or 16CXXX PHILIPS/SIGNETCS INFENEON (FORMERLY SIEMENS)

INTEL MCS - 51 FAMILY

Comparison of the 8051 Family Members
Devices On chip RAM

On chip ROM

No. of 16 bit timers/count ers

No. of vectored interrupts

Full duplex serial I/O

8031 8032 8051 8052 8751 8752

128 256 128 256 128 256

None None 4k ROM 8k ROM 4k EPROM 8k EPROM

2 3 2 3 2 3

5 6 5 6 5 6

1 1 1 1 1 1

INTEL 8051 mC
Features: It is an 8-bit mC.

It is available in a 40 pin I.C. designed using CMOS or HMOS technology. It is based Harvard architecture model. It has 8 bit data bus and 16 bit address bus. It has 128 bytes on chip RAM (data memory). It has 4KB of on chip ROM (program memory). It has 32 I/O pins which are configured as four 8-bit I/O ports (P0,P1,P2,P3) It can access external data/program memory of maximum of 64 Kbytes. The range of operating frequency available is 1MHz 16 MHz. The most commonly used clock frequency is 11.0592 MHz.

FUNCTIONAL BLOCK DIAGRAM

External interrupts Interrupt Control On-chip ROM for program code
Timer/Counter

On-chip RAM

Timer 1 Timer 0

Counter Inputs

CPU
Serial Port

OSC

Bus Control

4 I/O Ports

P0 P1 P2 P3

TxD RxD

Address/Data

INTERNAL BLOCK DIAGRAM

STRUCTURE OF RAM
The 128 bytes RAM are divided into three different memory sections 1. Working registers 2. Bit addressable registers 3. General purpose registers

Working registers:- The first 32 locations of the RAM i.e. from 00H to 1FH are called working registers. The registers in these groups are divided into four(4) data banks Bank0(00-07),bank1(08-0F),Bank2(10-17) and bank3(18-1F).Each bank consists of 8-registers which are denoted as R0,R1,.R7. Only one memory bank is active at a time and the selection of a particular memory bank is done by programming the PSW register. Bit addressable registers:- The next 16 locations from 20H - 2FH are called bit addressable registers. Each bit of a register in these group are separately programmable. Therefore there are 128 bits which user can access. General purpose registers:- The remaining of the 128 locations i.e. from 30H 7FH are called general purpose registers. These registers are used for storing data or address.

REGISTER SET OF 8051

SFR(SPECIAL FUNCTION REGISTER)

There are 128 memory locations which are used for specific purposes .These registers are called SFR.The location of these registers are from 80H FFH.Although all the locations are not fully utilised, user cannot access these locations for general data storage.

REGISTER A AND B
Register A :- It is an 8 bit register which is used for arithmetical and logical operations.it holds the result after an operation. It is also called an Accumulator. Register B :- it is also an 8-bit register which is available as a general purpose register when not used in multiplication\division operations.

PSW (PROGRAM STATUS WORD)

It is an 8-bit register which is used as an indicator after the execution of an instruction and also for selecting a memory bank. It is a part of SFR The format of this register is as shown below:

Cy

AC

Fo

RS1 RSo OV

P= shows parity of register A 1:-> odd parity; 0 :-> even parity OV = overflow flag AC = Auxillary Carry flag CY = Carry flag F0 = User flag 0. RS1 ,RS2 = register bank selection bits RS1 0 0 1 1 RS0 0 1 0 1 REGISTE R ABNK BANK 0 BANK 1 BANK 2 BANK 3

DPTR(DATA POINTER REGISTER) : It is a 16 bit register which is used as a memory pointer when accessing external data/memory I.C. since it is of 16 bit it can access up to a maximum locations of 64 KB .It can also be used as a separate two 8-bit register denoted as DPH and DPL. It is a part of SFR.
STACK POINTER (S.P) :- It is an 8 bit register which holds the address of the current TOP OF STACK. The stack refers to an area in the internal RAM. It is increased before a data is PUSH on to stack and It is decremented after a data is POP. PROGRAM COUNTER (P.C.) :- It is a 16-bit register which holds the address of memory location from which the next instruction is to be fetched.

TIMER\COUNTER REGISTERS
The Timer register is a part of SFR . There are two 16 bit timer registers denoted as To and T1. These registers can be separately access as ToL,ToH and T1L,T1H. There are different modes of operation of Timer/counter. The selection of the mode is controlled by another set of registers in the SFR called TMOD(Timer mode) and TCON(Timer control)

CONTROL REGISTERS
There are six(6) control registers provided for the operation like interrupt control and power control operations.These registers are apart of SFR.These registers are denoted as:I.E. Interrupt control I.P. Interrupt priority PCON power control SCON serial control SBUF Serial Data Buffer Po-3 I/O ports

PIN DIGRAM OF 8051

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) EA/VPP ALE/PROG PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

8051 (8031)

Pin description of 8051

Many pins of 8051 are multifunctional The 8051 has four I/O ports Port 0 pins 32-39 P0 (P0.0 - P0.7) Port 1 pins 1-8 P1 (P1.0 - P1.7) Port 2 pins 21-28 P2 (P2.0 - P2.7) Port 3 pins 10-17 P3 (P3.0 - P3.7) Each port has 8 pins. Each port can be used as input or output (bi-direction).

- All the ports upon RESET are configured as output.

EA - external access The EA pin is connected to GND to indicate the code is stored externally. /PSEN ALE are used for external ROM. For 8051, /EA pin is connected to Vcc. PSEN - program store enable This is an output pin and is connected to the OE pin of the ROM.

RESET Value of Some 8051 Registers:

Register PC ACC B PSW SP DPTR RAM are all zero. Reset Value 0000 0000 0000 0000 0007 0000